code refactoring for Vivado, sv2v, and yosys compatibility

2021-09-27 08:55:10 -04:00
parent 9b04f3d9d6
commit 9f34b2944c
97 changed files with 1435 additions and 666 deletions
--- a/hw/rtl/libs/VX_find_first.v
+++ b/hw/rtl/libs/VX_find_first.v
@@ -5,7 +5,7 @@ module VX_find_first #(
    parameter N       = 1,
    parameter DATAW   = 1,
    parameter REVERSE = 0,
-    localparam LOGN   = $clog2(N)
+    parameter LOGN    = $clog2(N)
 ) (
    input  wire [N-1:0][DATAW-1:0] data_i,
    input  wire [N-1:0]            valid_i,