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RAM blocks inference fixes

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Blaise Tine
2020-11-30 14:02:47 -08:00
parent 5758ef9ebf
commit 97739e9dcf
27 changed files with 218 additions and 189 deletions
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hw/syn/quartus/project.tcl
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@@ -40,6 +40,7 @@ set_global_assignment -name VERILOG_MACRO NDEBUG
set_global_assignment -name MESSAGE_DISABLE 16818
set_global_assignment -name VERILOG_MACRO FPU_FAST
set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION AUTO
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"