From 8cddba46eeb9e6b5e32f5f1b1b92cfd6e9b420cc Mon Sep 17 00:00:00 2001 From: Lingjun Zhu Date: Mon, 11 Nov 2019 14:28:45 -0500 Subject: [PATCH] Added rf2_32x19_wm0 again --- .../rf2_32x19_wm0/rf2_32x19_wm0.bitmap | 33 + .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.cpf | 69 + .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.ctl | 381 + .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.lef | 6921 ++++++++ .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.mdt | 612 + .../rf2_32x19_wm0/rf2_32x19_wm0.memlib | 238 + .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.tv | 562 + .../cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v | 8309 ++++++++++ .../rf2_32x19_wm0/rf2_32x19_wm0_antenna.clf | 173 + .../rf2_32x19_wm0_ff_0p99v_0p99v_125c.avm | 162 + .../rf2_32x19_wm0_ff_0p99v_0p99v_125c.dat | 322 + .../rf2_32x19_wm0_ff_0p99v_0p99v_125c.lib | 13667 ++++++++++++++++ .../rf2_32x19_wm0_ff_0p99v_0p99v_125c.ps | 5288 ++++++ .../rf2_32x19_wm0/rf2_32x19_wm0_rtl.v | 257 + .../rf2_32x19_wm0_ss_0p81v_0p81v_m40c.avm | 162 + .../rf2_32x19_wm0_ss_0p81v_0p81v_m40c.dat | 322 + .../rf2_32x19_wm0_ss_0p81v_0p81v_m40c.lib | 13667 ++++++++++++++++ .../rf2_32x19_wm0_ss_0p81v_0p81v_m40c.ps | 5288 ++++++ .../rf2_32x19_wm0_tt_0p90v_0p90v_25c.avm | 162 + .../rf2_32x19_wm0_tt_0p90v_0p90v_25c.dat | 322 + .../rf2_32x19_wm0_tt_0p90v_0p90v_25c.lib | 13667 ++++++++++++++++ .../rf2_32x19_wm0_tt_0p90v_0p90v_25c.ps | 5288 ++++++ 22 files changed, 75872 insertions(+) create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.bitmap create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.cpf create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.ctl create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.lef create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.mdt create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.memlib create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.tv create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_antenna.clf create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.avm create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.dat create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.lib create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.ps create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_rtl.v create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.avm create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.dat create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.lib create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.ps create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.avm create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.dat create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.lib create mode 100644 models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.ps diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.bitmap b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.bitmap new file mode 100644 index 00000000..f5a89ff4 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.bitmap @@ -0,0 +1,33 @@ +#address bit[0] bit[0]_ bit[1] bit[1]_ bit[2] bit[2]_ bit[3] bit[3]_ bit[4] bit[4]_ bit[5] bit[5]_ bit[6] bit[6]_ bit[7] bit[7]_ bit[8] bit[8]_ bit[9] bit[9]_ bit[10] bit[10]_ bit[11] bit[11]_ bit[12] bit[12]_ bit[13] bit[13]_ bit[14] bit[14]_ bit[15] bit[15]_ bit[16] bit[16]_ bit[17] bit[17]_ bit[18] bit[18]_ +00000 15.175,2.960 15.275,3.030 15.175,5.840 15.275,5.910 15.175,8.720 15.275,8.790 15.175,11.600 15.275,11.670 15.175,14.480 15.275,14.550 15.175,17.360 15.275,17.430 15.175,20.240 15.275,20.310 15.175,23.120 15.275,23.190 15.175,26.000 15.275,26.070 15.175,72.060 15.275,71.990 15.175,74.940 15.275,74.870 15.175,77.820 15.275,77.750 15.175,80.700 15.275,80.630 15.175,83.580 15.275,83.510 15.175,86.460 15.275,86.390 15.175,89.340 15.275,89.270 15.175,92.220 15.275,92.150 15.175,95.100 15.275,95.030 15.175,97.980 15.275,97.910 +00001 15.175,1.590 15.275,1.520 15.175,4.470 15.275,4.400 15.175,7.350 15.275,7.280 15.175,10.230 15.275,10.160 15.175,13.110 15.275,13.040 15.175,15.990 15.275,15.920 15.175,18.870 15.275,18.800 15.175,21.750 15.275,21.680 15.175,24.630 15.275,24.560 15.175,73.430 15.275,73.500 15.175,76.310 15.275,76.380 15.175,79.190 15.275,79.260 15.175,82.070 15.275,82.140 15.175,84.950 15.275,85.020 15.175,87.830 15.275,87.900 15.175,90.710 15.275,90.780 15.175,93.590 15.275,93.660 15.175,96.470 15.275,96.540 15.175,99.350 15.275,99.420 +00002 15.545,2.960 15.445,3.030 15.545,5.840 15.445,5.910 15.545,8.720 15.445,8.790 15.545,11.600 15.445,11.670 15.545,14.480 15.445,14.550 15.545,17.360 15.445,17.430 15.545,20.240 15.445,20.310 15.545,23.120 15.445,23.190 15.545,26.000 15.445,26.070 15.545,72.060 15.445,71.990 15.545,74.940 15.445,74.870 15.545,77.820 15.445,77.750 15.545,80.700 15.445,80.630 15.545,83.580 15.445,83.510 15.545,86.460 15.445,86.390 15.545,89.340 15.445,89.270 15.545,92.220 15.445,92.150 15.545,95.100 15.445,95.030 15.545,97.980 15.445,97.910 +00003 15.545,1.590 15.445,1.520 15.545,4.470 15.445,4.400 15.545,7.350 15.445,7.280 15.545,10.230 15.445,10.160 15.545,13.110 15.445,13.040 15.545,15.990 15.445,15.920 15.545,18.870 15.445,18.800 15.545,21.750 15.445,21.680 15.545,24.630 15.445,24.560 15.545,73.430 15.445,73.500 15.545,76.310 15.445,76.380 15.545,79.190 15.445,79.260 15.545,82.070 15.445,82.140 15.545,84.950 15.445,85.020 15.545,87.830 15.445,87.900 15.545,90.710 15.445,90.780 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15.815,85.020 15.715,87.830 15.815,87.900 15.715,90.710 15.815,90.780 15.715,93.590 15.815,93.660 15.715,96.470 15.815,96.540 15.715,99.350 15.815,99.420 +00006 16.085,2.960 15.985,3.030 16.085,5.840 15.985,5.910 16.085,8.720 15.985,8.790 16.085,11.600 15.985,11.670 16.085,14.480 15.985,14.550 16.085,17.360 15.985,17.430 16.085,20.240 15.985,20.310 16.085,23.120 15.985,23.190 16.085,26.000 15.985,26.070 16.085,72.060 15.985,71.990 16.085,74.940 15.985,74.870 16.085,77.820 15.985,77.750 16.085,80.700 15.985,80.630 16.085,83.580 15.985,83.510 16.085,86.460 15.985,86.390 16.085,89.340 15.985,89.270 16.085,92.220 15.985,92.150 16.085,95.100 15.985,95.030 16.085,97.980 15.985,97.910 +00007 16.085,1.590 15.985,1.520 16.085,4.470 15.985,4.400 16.085,7.350 15.985,7.280 16.085,10.230 15.985,10.160 16.085,13.110 15.985,13.040 16.085,15.990 15.985,15.920 16.085,18.870 15.985,18.800 16.085,21.750 15.985,21.680 16.085,24.630 15.985,24.560 16.085,73.430 15.985,73.500 16.085,76.310 15.985,76.380 16.085,79.190 15.985,79.260 16.085,82.070 15.985,82.140 16.085,84.950 15.985,85.020 16.085,87.830 15.985,87.900 16.085,90.710 15.985,90.780 16.085,93.590 15.985,93.660 16.085,96.470 15.985,96.540 16.085,99.350 15.985,99.420 +00008 16.255,2.960 16.355,3.030 16.255,5.840 16.355,5.910 16.255,8.720 16.355,8.790 16.255,11.600 16.355,11.670 16.255,14.480 16.355,14.550 16.255,17.360 16.355,17.430 16.255,20.240 16.355,20.310 16.255,23.120 16.355,23.190 16.255,26.000 16.355,26.070 16.255,72.060 16.355,71.990 16.255,74.940 16.355,74.870 16.255,77.820 16.355,77.750 16.255,80.700 16.355,80.630 16.255,83.580 16.355,83.510 16.255,86.460 16.355,86.390 16.255,89.340 16.355,89.270 16.255,92.220 16.355,92.150 16.255,95.100 16.355,95.030 16.255,97.980 16.355,97.910 +00009 16.255,1.590 16.355,1.520 16.255,4.470 16.355,4.400 16.255,7.350 16.355,7.280 16.255,10.230 16.355,10.160 16.255,13.110 16.355,13.040 16.255,15.990 16.355,15.920 16.255,18.870 16.355,18.800 16.255,21.750 16.355,21.680 16.255,24.630 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17.435,95.030 17.335,97.980 17.435,97.910 +00011 17.335,1.590 17.435,1.520 17.335,4.470 17.435,4.400 17.335,7.350 17.435,7.280 17.335,10.230 17.435,10.160 17.335,13.110 17.435,13.040 17.335,15.990 17.435,15.920 17.335,18.870 17.435,18.800 17.335,21.750 17.435,21.680 17.335,24.630 17.435,24.560 17.335,73.430 17.435,73.500 17.335,76.310 17.435,76.380 17.335,79.190 17.435,79.260 17.335,82.070 17.435,82.140 17.335,84.950 17.435,85.020 17.335,87.830 17.435,87.900 17.335,90.710 17.435,90.780 17.335,93.590 17.435,93.660 17.335,96.470 17.435,96.540 17.335,99.350 17.435,99.420 +00012 17.705,2.960 17.605,3.030 17.705,5.840 17.605,5.910 17.705,8.720 17.605,8.790 17.705,11.600 17.605,11.670 17.705,14.480 17.605,14.550 17.705,17.360 17.605,17.430 17.705,20.240 17.605,20.310 17.705,23.120 17.605,23.190 17.705,26.000 17.605,26.070 17.705,72.060 17.605,71.990 17.705,74.940 17.605,74.870 17.705,77.820 17.605,77.750 17.705,80.700 17.605,80.630 17.705,83.580 17.605,83.510 17.705,86.460 17.605,86.390 17.705,89.340 17.605,89.270 17.705,92.220 17.605,92.150 17.705,95.100 17.605,95.030 17.705,97.980 17.605,97.910 +00013 17.705,1.590 17.605,1.520 17.705,4.470 17.605,4.400 17.705,7.350 17.605,7.280 17.705,10.230 17.605,10.160 17.705,13.110 17.605,13.040 17.705,15.990 17.605,15.920 17.705,18.870 17.605,18.800 17.705,21.750 17.605,21.680 17.705,24.630 17.605,24.560 17.705,73.430 17.605,73.500 17.705,76.310 17.605,76.380 17.705,79.190 17.605,79.260 17.705,82.070 17.605,82.140 17.705,84.950 17.605,85.020 17.705,87.830 17.605,87.900 17.705,90.710 17.605,90.780 17.705,93.590 17.605,93.660 17.705,96.470 17.605,96.540 17.705,99.350 17.605,99.420 +00014 17.875,2.960 17.975,3.030 17.875,5.840 17.975,5.910 17.875,8.720 17.975,8.790 17.875,11.600 17.975,11.670 17.875,14.480 17.975,14.550 17.875,17.360 17.975,17.430 17.875,20.240 17.975,20.310 17.875,23.120 17.975,23.190 17.875,26.000 17.975,26.070 17.875,72.060 17.975,71.990 17.875,74.940 17.975,74.870 17.875,77.820 17.975,77.750 17.875,80.700 17.975,80.630 17.875,83.580 17.975,83.510 17.875,86.460 17.975,86.390 17.875,89.340 17.975,89.270 17.875,92.220 17.975,92.150 17.875,95.100 17.975,95.030 17.875,97.980 17.975,97.910 +00015 17.875,1.590 17.975,1.520 17.875,4.470 17.975,4.400 17.875,7.350 17.975,7.280 17.875,10.230 17.975,10.160 17.875,13.110 17.975,13.040 17.875,15.990 17.975,15.920 17.875,18.870 17.975,18.800 17.875,21.750 17.975,21.680 17.875,24.630 17.975,24.560 17.875,73.430 17.975,73.500 17.875,76.310 17.975,76.380 17.875,79.190 17.975,79.260 17.875,82.070 17.975,82.140 17.875,84.950 17.975,85.020 17.875,87.830 17.975,87.900 17.875,90.710 17.975,90.780 17.875,93.590 17.975,93.660 17.875,96.470 17.975,96.540 17.875,99.350 17.975,99.420 +00016 18.245,2.960 18.145,3.030 18.245,5.840 18.145,5.910 18.245,8.720 18.145,8.790 18.245,11.600 18.145,11.670 18.245,14.480 18.145,14.550 18.245,17.360 18.145,17.430 18.245,20.240 18.145,20.310 18.245,23.120 18.145,23.190 18.245,26.000 18.145,26.070 18.245,72.060 18.145,71.990 18.245,74.940 18.145,74.870 18.245,77.820 18.145,77.750 18.245,80.700 18.145,80.630 18.245,83.580 18.145,83.510 18.245,86.460 18.145,86.390 18.245,89.340 18.145,89.270 18.245,92.220 18.145,92.150 18.245,95.100 18.145,95.030 18.245,97.980 18.145,97.910 +00017 18.245,1.590 18.145,1.520 18.245,4.470 18.145,4.400 18.245,7.350 18.145,7.280 18.245,10.230 18.145,10.160 18.245,13.110 18.145,13.040 18.245,15.990 18.145,15.920 18.245,18.870 18.145,18.800 18.245,21.750 18.145,21.680 18.245,24.630 18.145,24.560 18.245,73.430 18.145,73.500 18.245,76.310 18.145,76.380 18.245,79.190 18.145,79.260 18.245,82.070 18.145,82.140 18.245,84.950 18.145,85.020 18.245,87.830 18.145,87.900 18.245,90.710 18.145,90.780 18.245,93.590 18.145,93.660 18.245,96.470 18.145,96.540 18.245,99.350 18.145,99.420 +00018 18.415,2.960 18.515,3.030 18.415,5.840 18.515,5.910 18.415,8.720 18.515,8.790 18.415,11.600 18.515,11.670 18.415,14.480 18.515,14.550 18.415,17.360 18.515,17.430 18.415,20.240 18.515,20.310 18.415,23.120 18.515,23.190 18.415,26.000 18.515,26.070 18.415,72.060 18.515,71.990 18.415,74.940 18.515,74.870 18.415,77.820 18.515,77.750 18.415,80.700 18.515,80.630 18.415,83.580 18.515,83.510 18.415,86.460 18.515,86.390 18.415,89.340 18.515,89.270 18.415,92.220 18.515,92.150 18.415,95.100 18.515,95.030 18.415,97.980 18.515,97.910 +00019 18.415,1.590 18.515,1.520 18.415,4.470 18.515,4.400 18.415,7.350 18.515,7.280 18.415,10.230 18.515,10.160 18.415,13.110 18.515,13.040 18.415,15.990 18.515,15.920 18.415,18.870 18.515,18.800 18.415,21.750 18.515,21.680 18.415,24.630 18.515,24.560 18.415,73.430 18.515,73.500 18.415,76.310 18.515,76.380 18.415,79.190 18.515,79.260 18.415,82.070 18.515,82.140 18.415,84.950 18.515,85.020 18.415,87.830 18.515,87.900 18.415,90.710 18.515,90.780 18.415,93.590 18.515,93.660 18.415,96.470 18.515,96.540 18.415,99.350 18.515,99.420 +0001A 18.785,2.960 18.685,3.030 18.785,5.840 18.685,5.910 18.785,8.720 18.685,8.790 18.785,11.600 18.685,11.670 18.785,14.480 18.685,14.550 18.785,17.360 18.685,17.430 18.785,20.240 18.685,20.310 18.785,23.120 18.685,23.190 18.785,26.000 18.685,26.070 18.785,72.060 18.685,71.990 18.785,74.940 18.685,74.870 18.785,77.820 18.685,77.750 18.785,80.700 18.685,80.630 18.785,83.580 18.685,83.510 18.785,86.460 18.685,86.390 18.785,89.340 18.685,89.270 18.785,92.220 18.685,92.150 18.785,95.100 18.685,95.030 18.785,97.980 18.685,97.910 +0001B 18.785,1.590 18.685,1.520 18.785,4.470 18.685,4.400 18.785,7.350 18.685,7.280 18.785,10.230 18.685,10.160 18.785,13.110 18.685,13.040 18.785,15.990 18.685,15.920 18.785,18.870 18.685,18.800 18.785,21.750 18.685,21.680 18.785,24.630 18.685,24.560 18.785,73.430 18.685,73.500 18.785,76.310 18.685,76.380 18.785,79.190 18.685,79.260 18.785,82.070 18.685,82.140 18.785,84.950 18.685,85.020 18.785,87.830 18.685,87.900 18.785,90.710 18.685,90.780 18.785,93.590 18.685,93.660 18.785,96.470 18.685,96.540 18.785,99.350 18.685,99.420 +0001C 18.955,2.960 19.055,3.030 18.955,5.840 19.055,5.910 18.955,8.720 19.055,8.790 18.955,11.600 19.055,11.670 18.955,14.480 19.055,14.550 18.955,17.360 19.055,17.430 18.955,20.240 19.055,20.310 18.955,23.120 19.055,23.190 18.955,26.000 19.055,26.070 18.955,72.060 19.055,71.990 18.955,74.940 19.055,74.870 18.955,77.820 19.055,77.750 18.955,80.700 19.055,80.630 18.955,83.580 19.055,83.510 18.955,86.460 19.055,86.390 18.955,89.340 19.055,89.270 18.955,92.220 19.055,92.150 18.955,95.100 19.055,95.030 18.955,97.980 19.055,97.910 +0001D 18.955,1.590 19.055,1.520 18.955,4.470 19.055,4.400 18.955,7.350 19.055,7.280 18.955,10.230 19.055,10.160 18.955,13.110 19.055,13.040 18.955,15.990 19.055,15.920 18.955,18.870 19.055,18.800 18.955,21.750 19.055,21.680 18.955,24.630 19.055,24.560 18.955,73.430 19.055,73.500 18.955,76.310 19.055,76.380 18.955,79.190 19.055,79.260 18.955,82.070 19.055,82.140 18.955,84.950 19.055,85.020 18.955,87.830 19.055,87.900 18.955,90.710 19.055,90.780 18.955,93.590 19.055,93.660 18.955,96.470 19.055,96.540 18.955,99.350 19.055,99.420 +0001E 19.325,2.960 19.225,3.030 19.325,5.840 19.225,5.910 19.325,8.720 19.225,8.790 19.325,11.600 19.225,11.670 19.325,14.480 19.225,14.550 19.325,17.360 19.225,17.430 19.325,20.240 19.225,20.310 19.325,23.120 19.225,23.190 19.325,26.000 19.225,26.070 19.325,72.060 19.225,71.990 19.325,74.940 19.225,74.870 19.325,77.820 19.225,77.750 19.325,80.700 19.225,80.630 19.325,83.580 19.225,83.510 19.325,86.460 19.225,86.390 19.325,89.340 19.225,89.270 19.325,92.220 19.225,92.150 19.325,95.100 19.225,95.030 19.325,97.980 19.225,97.910 +0001F 19.325,1.590 19.225,1.520 19.325,4.470 19.225,4.400 19.325,7.350 19.225,7.280 19.325,10.230 19.225,10.160 19.325,13.110 19.225,13.040 19.325,15.990 19.225,15.920 19.325,18.870 19.225,18.800 19.325,21.750 19.225,21.680 19.325,24.630 19.225,24.560 19.325,73.430 19.225,73.500 19.325,76.310 19.225,76.380 19.325,79.190 19.225,79.260 19.325,82.070 19.225,82.140 19.325,84.950 19.225,85.020 19.325,87.830 19.225,87.900 19.325,90.710 19.225,90.780 19.325,93.590 19.225,93.660 19.325,96.470 19.225,96.540 19.325,99.350 19.225,99.420 diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.cpf b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.cpf new file mode 100644 index 00000000..1ea034ee --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.cpf @@ -0,0 +1,69 @@ +# cpf_memcomp Version: 4.0.6-EAC +# common_memcomp Version: c0.1.0-EAC +# lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# CPF Macro-Model for High Density Two Port Register File SVT MVT Compiler +# +# Instance Name: rf2_32x19_wm0 +# Words: 32 +# Bits: 19 +# Mux: 2 +# Drive: 6 +# Write Mask: Off +# Write Thru: Off +# Extra Margin Adjustment: On +# Test Muxes On +# Power Gating: Off +# Retention: On +# Pipeline: Off +# Read Disturb Test: Off +# +# Creation Date: Mon Nov 11 11:59:51 2019 +# Version: r4p0 +# +set_cpf_version 1.1 +set_macro_model rf2_32x19_wm0 + +#The Voltages Specified in this macro-model not real. They are dummy values suggested by Cadence. +create_nominal_condition -name nc_on -voltage 1 -ground_voltage 0.0 -state on +create_nominal_condition -name nc_off -voltage 0.0 -ground_voltage 0.0 -state off + +create_power_domain -name PDPE -default \ + -boundary_ports { CENYA AYA[*] CENYB AYB[*] QA[*] SOA[*] SOB[*] CLKA CENA AA[*] CLKB CENB AB[*] DB[*] EMAA[*] EMASA EMAB[*] TENA TCENA TAA[*] TENB TCENB TAB[*] TDB[*] SIA[*] SEA DFTRAMBYP SIB[*] SEB COLLDISN } \ + -instances { clk0_int CENA_int AA_int[4] AA_int[3] AA_int[2] AA_int[1] AA_int[0] clk1_int CENB_int AB_int[4] AB_int[3] AB_int[2] AB_int[1] AB_int[0] DB_int[18] DB_int[17] DB_int[16] DB_int[15] DB_int[14] DB_int[13] DB_int[12] DB_int[11] DB_int[10] DB_int[9] DB_int[8] DB_int[7] DB_int[6] DB_int[5] DB_int[4] DB_int[3] DB_int[2] DB_int[1] DB_int[0] EMAA_int[2] EMAA_int[1] EMAA_int[0] EMASA_int EMAB_int[2] EMAB_int[1] EMAB_int[0] TENA_int TCENA_int TAA_int[4] TAA_int[3] TAA_int[2] TAA_int[1] TAA_int[0] TENB_int TCENB_int TAB_int[4] TAB_int[3] TAB_int[2] TAB_int[1] TAB_int[0] TDB_int[18] TDB_int[17] TDB_int[16] TDB_int[15] TDB_int[14] TDB_int[13] TDB_int[12] TDB_int[11] TDB_int[10] TDB_int[9] TDB_int[8] TDB_int[7] TDB_int[6] TDB_int[5] TDB_int[4] TDB_int[3] TDB_int[2] TDB_int[1] TDB_int[0] SIA_int[1] SIA_int[0] SEA_int DFTRAMBYP_int SIB_int[1] SIB_int[0] SEB_int COLLDISN_int } +update_power_domain -name PDPE \ + -primary_power_net VDDPE -primary_ground_net VSSE + +create_power_domain -name PDCE \ + -boundary_ports { RET1N } \ + -instances { mem* RET1N_int } +update_power_domain -name PDCE \ + -primary_power_net VDDCE -primary_ground_net VSSE + + + # mode A1/A2 - Normal/Selective_Precharge + create_power_mode -name PM1 -domain_conditions \ + {PDPE@nc_on PDCE@nc_on} -default + + #mode A3 - Retention mode + create_power_mode -name PM2 -domain_conditions \ + {PDPE@nc_off PDCE@nc_on} + + #mode A4 - power down mode + create_power_mode -name PM3 -domain_conditions \ + {PDPE@nc_off PDCE@nc_off} + + +end_macro_model rf2_32x19_wm0 diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.ctl b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.ctl new file mode 100644 index 00000000..eb6a07c8 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.ctl @@ -0,0 +1,381 @@ +/* ctl_memcomp Version: 4.0.5-EAC3 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// CTL model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0 +// Words: 32 +// Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Mon Nov 11 11:59:52 2019 +// Version: r4p0 +STIL 1.0 { + CTL P2001.10; + Design P2001.01; +} +Header { + Title "CTL model for `rf2_32x19_wm0"; +} +Signals { + "CENYA" Out; + "AYA[4]" Out; + "AYA[3]" Out; + "AYA[2]" Out; + "AYA[1]" Out; + "AYA[0]" Out; + "CENYB" Out; + "AYB[4]" Out; + "AYB[3]" Out; + "AYB[2]" Out; + "AYB[1]" Out; + "AYB[0]" Out; + "QA[18]" Out; + "QA[17]" Out; + "QA[16]" Out; + "QA[15]" Out; + "QA[14]" Out; + "QA[13]" Out; + "QA[12]" Out; + "QA[11]" Out; + "QA[10]" Out; + "QA[9]" Out; + "QA[8]" Out; + "QA[7]" Out; + "QA[6]" Out; + "QA[5]" Out; + "QA[4]" Out; + "QA[3]" Out; + "QA[2]" Out; + "QA[1]" Out; + "QA[0]" Out; + "SOA[1]" Out; + "SOA[0]" Out; + "SOB[1]" Out; + "SOB[0]" Out; + "CLKA" In; + "CENA" In; + "AA[4]" In; + "AA[3]" In; + "AA[2]" In; + "AA[1]" In; + "AA[0]" In; + "CLKB" In; + "CENB" In; + "AB[4]" In; + "AB[3]" In; + "AB[2]" In; + "AB[1]" In; + "AB[0]" In; + "DB[18]" In; + "DB[17]" In; + "DB[16]" In; + "DB[15]" In; + "DB[14]" In; + "DB[13]" In; + "DB[12]" In; + "DB[11]" In; + "DB[10]" In; + "DB[9]" In; + "DB[8]" In; + "DB[7]" In; + "DB[6]" In; + "DB[5]" In; + "DB[4]" In; + "DB[3]" In; + "DB[2]" In; + "DB[1]" In; + "DB[0]" In; + "EMAA[2]" In; + "EMAA[1]" In; + "EMAA[0]" In; + "EMASA" In; + "EMAB[2]" In; + "EMAB[1]" In; + "EMAB[0]" In; + "TENA" In; + "TCENA" In; + "TAA[4]" In; + "TAA[3]" In; + "TAA[2]" In; + "TAA[1]" In; + "TAA[0]" In; + "TENB" In; + "TCENB" In; + "TAB[4]" In; + "TAB[3]" In; + "TAB[2]" In; + "TAB[1]" In; + "TAB[0]" In; + "TDB[18]" In; + "TDB[17]" In; + "TDB[16]" In; + "TDB[15]" In; + "TDB[14]" In; + "TDB[13]" In; + "TDB[12]" In; + "TDB[11]" In; + "TDB[10]" In; + "TDB[9]" In; + "TDB[8]" In; + "TDB[7]" In; + "TDB[6]" In; + "TDB[5]" In; + "TDB[4]" In; + "TDB[3]" In; + "TDB[2]" In; + "TDB[1]" In; + "TDB[0]" In; + "RET1N" In; + "SIA[1]" In; + "SIA[0]" In; + "SEA" In; + "DFTRAMBYP" In; + "SIB[1]" In; + "SIB[0]" In; + "SEB" In; + "COLLDISN" In; +} +SignalGroups { + "all_inputs" = '"CLKA" + "CENA" + "AA[4]" + "AA[3]" + "AA[2]" + "AA[1]" + "AA[0]" + + "CLKB" + "CENB" + "AB[4]" + "AB[3]" + "AB[2]" + "AB[1]" + "AB[0]" + "DB[18]" + + "DB[17]" + "DB[16]" + "DB[15]" + "DB[14]" + "DB[13]" + "DB[12]" + "DB[11]" + "DB[10]" + + "DB[9]" + "DB[8]" + "DB[7]" + "DB[6]" + "DB[5]" + "DB[4]" + "DB[3]" + "DB[2]" + + "DB[1]" + "DB[0]" + "EMAA[2]" + "EMAA[1]" + "EMAA[0]" + "EMASA" + "EMAB[2]" + + "EMAB[1]" + "EMAB[0]" + "TENA" + "TCENA" + "TAA[4]" + "TAA[3]" + "TAA[2]" + "TAA[1]" + + "TAA[0]" + "TENB" + "TCENB" + "TAB[4]" + "TAB[3]" + "TAB[2]" + "TAB[1]" + "TAB[0]" + + "TDB[18]" + "TDB[17]" + "TDB[16]" + "TDB[15]" + "TDB[14]" + "TDB[13]" + "TDB[12]" + + "TDB[11]" + "TDB[10]" + "TDB[9]" + "TDB[8]" + "TDB[7]" + "TDB[6]" + "TDB[5]" + + "TDB[4]" + "TDB[3]" + "TDB[2]" + "TDB[1]" + "TDB[0]" + "RET1N" + "SIA[1]" + "SIA[0]" + + "SEA" + "DFTRAMBYP" + "SIB[1]" + "SIB[0]" + "SEB" + "COLLDISN"'; + "all_outputs" = '"CENYA" + "AYA[4]" + "AYA[3]" + "AYA[2]" + "AYA[1]" + "AYA[0]" + + "CENYB" + "AYB[4]" + "AYB[3]" + "AYB[2]" + "AYB[1]" + "AYB[0]" + "QA[18]" + "QA[17]" + + "QA[16]" + "QA[15]" + "QA[14]" + "QA[13]" + "QA[12]" + "QA[11]" + "QA[10]" + "QA[9]" + + "QA[8]" + "QA[7]" + "QA[6]" + "QA[5]" + "QA[4]" + "QA[3]" + "QA[2]" + "QA[1]" + + "QA[0]" + "SOA[1]" + "SOA[0]" + "SOB[1]" + "SOB[0]"'; + "all_ports" = '"all_inputs" + "all_outputs"'; + "_pi" = '"CLKA" + "CENA" + "AA[4]" + "AA[3]" + "AA[2]" + "AA[1]" + "AA[0]" + "CLKB" + + "CENB" + "AB[4]" + "AB[3]" + "AB[2]" + "AB[1]" + "AB[0]" + "DB[18]" + "DB[17]" + + "DB[16]" + "DB[15]" + "DB[14]" + "DB[13]" + "DB[12]" + "DB[11]" + "DB[10]" + "DB[9]" + + "DB[8]" + "DB[7]" + "DB[6]" + "DB[5]" + "DB[4]" + "DB[3]" + "DB[2]" + "DB[1]" + + "DB[0]" + "EMAA[2]" + "EMAA[1]" + "EMAA[0]" + "EMASA" + "EMAB[2]" + "EMAB[1]" + + "EMAB[0]" + "TENA" + "TCENA" + "TAA[4]" + "TAA[3]" + "TAA[2]" + "TAA[1]" + "TAA[0]" + + "TENB" + "TCENB" + "TAB[4]" + "TAB[3]" + "TAB[2]" + "TAB[1]" + "TAB[0]" + "TDB[18]" + + "TDB[17]" + "TDB[16]" + "TDB[15]" + "TDB[14]" + "TDB[13]" + "TDB[12]" + "TDB[11]" + + "TDB[10]" + "TDB[9]" + "TDB[8]" + "TDB[7]" + "TDB[6]" + "TDB[5]" + "TDB[4]" + + "TDB[3]" + "TDB[2]" + "TDB[1]" + "TDB[0]" + "RET1N" + "SIA[1]" + "SIA[0]" + "SEA" + + "DFTRAMBYP" + "SIB[1]" + "SIB[0]" + "SEB" + "COLLDISN"'; + "_po" = '"CENYA" + "AYA[4]" + "AYA[3]" + "AYA[2]" + "AYA[1]" + "AYA[0]" + "CENYB" + + "AYB[4]" + "AYB[3]" + "AYB[2]" + "AYB[1]" + "AYB[0]" + "QA[18]" + "QA[17]" + "QA[16]" + + "QA[15]" + "QA[14]" + "QA[13]" + "QA[12]" + "QA[11]" + "QA[10]" + "QA[9]" + "QA[8]" + + "QA[7]" + "QA[6]" + "QA[5]" + "QA[4]" + "QA[3]" + "QA[2]" + "QA[1]" + "QA[0]" + + "SOA[1]" + "SOA[0]" + "SOB[1]" + "SOB[0]"'; + "_si" = '"SIA[0]" + "SIA[1]" + "SIB[0]" + "SIB[1]"' {ScanIn; } + "_so" = '"SOA[0]" + "SOA[1]" + "SOB[0]" + "SOB[1]"' {ScanOut; } +} +ScanStructures { + ScanChain "chain_rf2_32x19_wm0_1" { + ScanLength 9; + ScanCells "uDQA8" "uDQA7" "uDQA6" "uDQA5" "uDQA4" "uDQA3" "uDQA2" "uDQA1" "uDQA0" ; + ScanIn "SIA[0]"; + ScanOut "SOA[0]"; + ScanEnable "SEA"; + ScanMasterClock "CLKA"; + } + ScanChain "chain_rf2_32x19_wm0_2" { + ScanLength 10; + ScanCells "uDQA9" "uDQA10" "uDQA11" "uDQA12" "uDQA13" "uDQA14" "uDQA15" "uDQA16" "uDQA17" "uDQA18" ; + ScanIn "SIA[1]"; + ScanOut "SOA[1]"; + ScanEnable "SEA"; + ScanMasterClock "CLKA"; + } + ScanChain "chain_rf2_32x19_wm0_3" { + ScanLength 9; + ScanCells "uDQB8" "uDQB7" "uDQB6" "uDQB5" "uDQB4" "uDQB3" "uDQB2" "uDQB1" "uDQB0" ; + ScanIn "SIB[0]"; + ScanOut "SOB[0]"; + ScanEnable "SEB"; + ScanMasterClock "CLKB"; + } + ScanChain "chain_rf2_32x19_wm0_4" { + ScanLength 10; + ScanCells "uDQB9" "uDQB10" "uDQB11" "uDQB12" "uDQB13" "uDQB14" "uDQB15" "uDQB16" "uDQB17" "uDQB18" ; + ScanIn "SIB[1]"; + ScanOut "SOB[1]"; + ScanEnable "SEB"; + ScanMasterClock "CLKB"; + } +} +Timing { + WaveformTable "_default_WFT_" { + Period '100ns'; + Waveforms { + "all_inputs" { + 01ZN { '0ns' D/U/Z/N; } + } + "all_outputs" { + XHTL { '40ns' X/H/T/L; } + } + "CLKA" { + P { '0ns' D; '45ns' U; '55ns' D; } + } + "CLKB" { + P { '0ns' D; '45ns' U; '55ns' D; } + } + } + } +} +Procedures { + "capture" { + W "_default_WFT_"; + V { "_pi" = #; "_po" = #; } + } + "capture_CLK" { + W "_default_WFT_"; + V {"_pi" = #; "_po" = #;"CLKA" = P;"CLKB" = P; } + } + "load_unload" { + W "_default_WFT_"; + V { "CLKA" = 0; "CLKB" = 0; "_si" = \r2 N; "_so" =\r2 X; "SEA" = 1; "SEB" = 1; "DFTRAMBYP" = 1; } + Shift { + V { "CLKA" = P; "CLKB" = P; "_si" = \r2 #; "_so" = \r2 #; } + } + } +} +MacroDefs { + "test_setup" { + W "_default_WFT_"; + C {"all_inputs" = \r60 N; "all_outputs" = \r34 X; } + V { "CLKA" = P; "CLKB" = P; } + } +} +Environment "rf2_32x19_wm0" { + CTL { + } + CTL Internal_scan { + TestMode InternalTest; + Focus Top { + } + Internal { + "SIA[0]" { + CaptureClock "CLKA" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SIA[1]" { + CaptureClock "CLKA" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOA[0]" { + LaunchClock "CLKA" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOA[1]" { + LaunchClock "CLKA" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SEA" { + DataType ScanEnable { + ActiveState ForceUp; + } + } + "CLKA" { + DataType ScanMasterClock MasterClock; + } + "SIB[0]" { + CaptureClock "CLKB" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SIB[1]" { + CaptureClock "CLKB" { + LeadingEdge; + } + DataType ScanDataIn { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOB[0]" { + LaunchClock "CLKB" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SOB[1]" { + LaunchClock "CLKB" { + LeadingEdge; + } + DataType ScanDataOut { + ScanDataType Internal; + } + ScanStyle MultiplexedData; + } + "SEB" { + DataType ScanEnable { + ActiveState ForceUp; + } + } + "CLKB" { + DataType ScanMasterClock MasterClock; + } + } + } +} +Environment dftSpec { + CTL { + } + CTL all_dft { + TestMode ForInheritOnly; + } +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.lef b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.lef new file mode 100644 index 00000000..10598180 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.lef @@ -0,0 +1,6921 @@ +# Copyright (c) 1993 - 2019 ARM Limited. All Rights Reserved. +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Limited. + +# PhyVGen V 8.3.0 +# ARM Version r4p0 +# Creation Date: Mon Nov 11 12:00:01 2019 + + +# Memory Configuration: +# ~~~~~~~~~~~~~~~~~~~~~ +# -activity_factor 50 -atf off -back_biasing off -bits 19 -bmux on +# -bus_notation on -check_instname off -diodes on -drive 6 -ema on -frequency +# 1.0 -instname rf2_32x19_wm0 -left_bus_delim "[" -mux 2 -mvt BASE -name_case +# upper -pipeline off -power_gating off -power_type otc -pwr_gnd_rename +# vddpe:VDDPE,vddce:VDDCE,vsse:VSSE -rcols 2 -redundancy off -retention on +# -right_bus_delim "]" -rrows 0 -ser none -site_def off -top_layer m5-m10 +# -words 32 -wp_size 1 -write_mask off -write_thru off -corners +# ff_0p99v_0p99v_125c,ss_0p81v_0p81v_m40c,tt_0p90v_0p90v_25c +# + +VERSION 5.7 ; +BUSBITCHARS "[]" ; +MACRO rf2_32x19_wm0 + FOREIGN rf2_32x19_wm0 0 0 ; + SYMMETRY X Y ; + SIZE 21.165 BY 100.94 ; + CLASS BLOCK ; + PIN AA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 32.87 0.25 32.97 ; + LAYER M2 ; + RECT 0 32.87 0.25 32.97 ; + LAYER M3 ; + RECT 0 32.87 0.25 32.97 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[0] + + PIN AA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 35.9 0.25 36 ; + LAYER M2 ; + RECT 0 35.9 0.25 36 ; + LAYER M3 ; + RECT 0 35.9 0.25 36 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[1] + + PIN AA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 38.93 0.25 39.03 ; + LAYER M2 ; + RECT 0 38.93 0.25 39.03 ; + LAYER M3 ; + RECT 0 38.93 0.25 39.03 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[2] + + PIN AA[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 40.475 0.25 40.575 ; + LAYER M2 ; + RECT 0 40.475 0.25 40.575 ; + LAYER M3 ; + RECT 0 40.475 0.25 40.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[3] + + PIN AA[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 43.505 0.25 43.605 ; + LAYER M2 ; + RECT 0 43.505 0.25 43.605 ; + LAYER M3 ; + RECT 0 43.505 0.25 43.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AA[4] + + PIN AB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.785 0.25 65.885 ; + LAYER M2 ; + RECT 0 65.785 0.25 65.885 ; + LAYER M3 ; + RECT 0 65.785 0.25 65.885 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[0] + + PIN AB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.56 0.25 62.66 ; + LAYER M2 ; + RECT 0 62.56 0.25 62.66 ; + LAYER M3 ; + RECT 0 62.56 0.25 62.66 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[1] + + PIN AB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.725 0.25 59.825 ; + LAYER M2 ; + RECT 0 59.725 0.25 59.825 ; + LAYER M3 ; + RECT 0 59.725 0.25 59.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[2] + + PIN AB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 58.18 0.25 58.28 ; + LAYER M2 ; + RECT 0 58.18 0.25 58.28 ; + LAYER M3 ; + RECT 0 58.18 0.25 58.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[3] + + PIN AB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 55.15 0.25 55.25 ; + LAYER M2 ; + RECT 0 55.15 0.25 55.25 ; + LAYER M3 ; + RECT 0 55.15 0.25 55.25 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AB[4] + + PIN AYA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 33.275 0.25 33.375 ; + LAYER M2 ; + RECT 0 33.275 0.25 33.375 ; + LAYER M3 ; + RECT 0 33.275 0.25 33.375 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[0] + + PIN AYA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 36.305 0.25 36.405 ; + LAYER M2 ; + RECT 0 36.305 0.25 36.405 ; + LAYER M3 ; + RECT 0 36.305 0.25 36.405 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[1] + + PIN AYA[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.335 0.25 39.435 ; + LAYER M2 ; + RECT 0 39.335 0.25 39.435 ; + LAYER M3 ; + RECT 0 39.335 0.25 39.435 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[2] + + PIN AYA[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 40.1 0.25 40.2 ; + LAYER M2 ; + RECT 0 40.1 0.25 40.2 ; + LAYER M3 ; + RECT 0 40.1 0.25 40.2 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[3] + + PIN AYA[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 43.305 0.25 43.405 ; + LAYER M2 ; + RECT 0 43.305 0.25 43.405 ; + LAYER M3 ; + RECT 0 43.305 0.25 43.405 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYA[4] + + PIN AYB[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 65.38 0.25 65.48 ; + LAYER M2 ; + RECT 0 65.38 0.25 65.48 ; + LAYER M3 ; + RECT 0 65.38 0.25 65.48 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[0] + + PIN AYB[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 62.35 0.25 62.45 ; + LAYER M2 ; + RECT 0 62.35 0.25 62.45 ; + LAYER M3 ; + RECT 0 62.35 0.25 62.45 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[1] + + PIN AYB[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 59.35 0.25 59.45 ; + LAYER M2 ; + RECT 0 59.35 0.25 59.45 ; + LAYER M3 ; + RECT 0 59.35 0.25 59.45 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[2] + + PIN AYB[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 58.585 0.25 58.685 ; + LAYER M2 ; + RECT 0 58.585 0.25 58.685 ; + LAYER M3 ; + RECT 0 58.585 0.25 58.685 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[3] + + PIN AYB[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 55.525 0.25 55.625 ; + LAYER M2 ; + RECT 0 55.525 0.25 55.625 ; + LAYER M3 ; + RECT 0 55.525 0.25 55.625 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END AYB[4] + + PIN CENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 30.11 0.25 30.21 ; + LAYER M2 ; + RECT 0 30.11 0.25 30.21 ; + LAYER M3 ; + RECT 0 30.11 0.25 30.21 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENA + + PIN CENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 70.305 0.25 70.405 ; + LAYER M2 ; + RECT 0 70.305 0.25 70.405 ; + LAYER M3 ; + RECT 0 70.305 0.25 70.405 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENB + + PIN CENYA + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 28.7 0.25 28.8 ; + LAYER M2 ; + RECT 0 28.7 0.25 28.8 ; + LAYER M3 ; + RECT 0 28.7 0.25 28.8 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENYA + + PIN CENYB + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 70.85 0.25 70.95 ; + LAYER M2 ; + RECT 0 70.85 0.25 70.95 ; + LAYER M3 ; + RECT 0 70.85 0.25 70.95 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CENYB + + PIN CLKA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 39.73 0.25 39.83 ; + LAYER M2 ; + RECT 0 39.73 0.25 39.83 ; + LAYER M3 ; + RECT 0 39.73 0.25 39.83 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CLKA + + PIN CLKB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 60.38 0.25 60.48 ; + LAYER M2 ; + RECT 0 60.38 0.25 60.48 ; + LAYER M3 ; + RECT 0 60.38 0.25 60.48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END CLKB + + PIN COLLDISN + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 47.9 0.25 48 ; + LAYER M2 ; + RECT 0 47.9 0.25 48 ; + LAYER M3 ; + RECT 0 47.9 0.25 48 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END COLLDISN + + PIN DB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 2.195 0.25 2.295 ; + LAYER M2 ; + RECT 0 2.195 0.25 2.295 ; + LAYER M3 ; + RECT 0 2.195 0.25 2.295 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[0] + + PIN DB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 75.605 0.25 75.705 ; + LAYER M2 ; + RECT 0 75.605 0.25 75.705 ; + LAYER M3 ; + RECT 0 75.605 0.25 75.705 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[10] + + PIN DB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 78.485 0.25 78.585 ; + LAYER M2 ; + RECT 0 78.485 0.25 78.585 ; + LAYER M3 ; + RECT 0 78.485 0.25 78.585 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[11] + + PIN DB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 81.365 0.25 81.465 ; + LAYER M2 ; + RECT 0 81.365 0.25 81.465 ; + LAYER M3 ; + RECT 0 81.365 0.25 81.465 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[12] + + PIN DB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 84.245 0.25 84.345 ; + LAYER M2 ; + RECT 0 84.245 0.25 84.345 ; + LAYER M3 ; + RECT 0 84.245 0.25 84.345 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[13] + + PIN DB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 87.125 0.25 87.225 ; + LAYER M2 ; + RECT 0 87.125 0.25 87.225 ; + LAYER M3 ; + RECT 0 87.125 0.25 87.225 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[14] + + PIN DB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 90.005 0.25 90.105 ; + LAYER M2 ; + RECT 0 90.005 0.25 90.105 ; + LAYER M3 ; + RECT 0 90.005 0.25 90.105 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[15] + + PIN DB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 92.885 0.25 92.985 ; + LAYER M2 ; + RECT 0 92.885 0.25 92.985 ; + LAYER M3 ; + RECT 0 92.885 0.25 92.985 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[16] + + PIN DB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 95.765 0.25 95.865 ; + LAYER M2 ; + RECT 0 95.765 0.25 95.865 ; + LAYER M3 ; + RECT 0 95.765 0.25 95.865 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[17] + + PIN DB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 98.645 0.25 98.745 ; + LAYER M2 ; + RECT 0 98.645 0.25 98.745 ; + LAYER M3 ; + RECT 0 98.645 0.25 98.745 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[18] + + PIN DB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 5.075 0.25 5.175 ; + LAYER M2 ; + RECT 0 5.075 0.25 5.175 ; + LAYER M3 ; + RECT 0 5.075 0.25 5.175 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[1] + + PIN DB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.955 0.25 8.055 ; + LAYER M2 ; + RECT 0 7.955 0.25 8.055 ; + LAYER M3 ; + RECT 0 7.955 0.25 8.055 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[2] + + PIN DB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.835 0.25 10.935 ; + LAYER M2 ; + RECT 0 10.835 0.25 10.935 ; + LAYER M3 ; + RECT 0 10.835 0.25 10.935 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[3] + + PIN DB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.715 0.25 13.815 ; + LAYER M2 ; + RECT 0 13.715 0.25 13.815 ; + LAYER M3 ; + RECT 0 13.715 0.25 13.815 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[4] + + PIN DB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.595 0.25 16.695 ; + LAYER M2 ; + RECT 0 16.595 0.25 16.695 ; + LAYER M3 ; + RECT 0 16.595 0.25 16.695 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[5] + + PIN DB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.475 0.25 19.575 ; + LAYER M2 ; + RECT 0 19.475 0.25 19.575 ; + LAYER M3 ; + RECT 0 19.475 0.25 19.575 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[6] + + PIN DB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 22.355 0.25 22.455 ; + LAYER M2 ; + RECT 0 22.355 0.25 22.455 ; + LAYER M3 ; + RECT 0 22.355 0.25 22.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[7] + + PIN DB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 25.235 0.25 25.335 ; + LAYER M2 ; + RECT 0 25.235 0.25 25.335 ; + LAYER M3 ; + RECT 0 25.235 0.25 25.335 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[8] + + PIN DB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 72.725 0.25 72.825 ; + LAYER M2 ; + RECT 0 72.725 0.25 72.825 ; + LAYER M3 ; + RECT 0 72.725 0.25 72.825 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DB[9] + + PIN DFTRAMBYP + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 67.3 0.25 67.4 ; + LAYER M2 ; + RECT 0 67.3 0.25 67.4 ; + LAYER M3 ; + RECT 0 67.3 0.25 67.4 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END DFTRAMBYP + + PIN EMAA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 41.37 0.25 41.47 ; + LAYER M2 ; + RECT 0 41.37 0.25 41.47 ; + LAYER M3 ; + RECT 0 41.37 0.25 41.47 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[0] + + PIN EMAA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 41.17 0.25 41.27 ; + LAYER M2 ; + RECT 0 41.17 0.25 41.27 ; + LAYER M3 ; + RECT 0 41.17 0.25 41.27 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[1] + + PIN EMAA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 43.105 0.25 43.205 ; + LAYER M2 ; + RECT 0 43.105 0.25 43.205 ; + LAYER M3 ; + RECT 0 43.105 0.25 43.205 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAA[2] + + PIN EMAB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 55.905 0.25 56.005 ; + LAYER M2 ; + RECT 0 55.905 0.25 56.005 ; + LAYER M3 ; + RECT 0 55.905 0.25 56.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[0] + + PIN EMAB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 56.905 0.25 57.005 ; + LAYER M2 ; + RECT 0 56.905 0.25 57.005 ; + LAYER M3 ; + RECT 0 56.905 0.25 57.005 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[1] + + PIN EMAB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 54.425 0.25 54.525 ; + LAYER M2 ; + RECT 0 54.425 0.25 54.525 ; + LAYER M3 ; + RECT 0 54.425 0.25 54.525 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMAB[2] + + PIN EMASA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 29.05 0.25 29.15 ; + LAYER M2 ; + RECT 0 29.05 0.25 29.15 ; + LAYER M3 ; + RECT 0 29.05 0.25 29.15 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END EMASA + + PIN QA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 2.455 0.25 2.555 ; + LAYER M2 ; + RECT 0 2.455 0.25 2.555 ; + LAYER M3 ; + RECT 0 2.455 0.25 2.555 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[0] + + PIN QA[10] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 75.345 0.25 75.445 ; + LAYER M2 ; + RECT 0 75.345 0.25 75.445 ; + LAYER M3 ; + RECT 0 75.345 0.25 75.445 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[10] + + PIN QA[11] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 78.225 0.25 78.325 ; + LAYER M2 ; + RECT 0 78.225 0.25 78.325 ; + LAYER M3 ; + RECT 0 78.225 0.25 78.325 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[11] + + PIN QA[12] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 81.105 0.25 81.205 ; + LAYER M2 ; + RECT 0 81.105 0.25 81.205 ; + LAYER M3 ; + RECT 0 81.105 0.25 81.205 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[12] + + PIN QA[13] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 83.985 0.25 84.085 ; + LAYER M2 ; + RECT 0 83.985 0.25 84.085 ; + LAYER M3 ; + RECT 0 83.985 0.25 84.085 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[13] + + PIN QA[14] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 86.865 0.25 86.965 ; + LAYER M2 ; + RECT 0 86.865 0.25 86.965 ; + LAYER M3 ; + RECT 0 86.865 0.25 86.965 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[14] + + PIN QA[15] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 89.745 0.25 89.845 ; + LAYER M2 ; + RECT 0 89.745 0.25 89.845 ; + LAYER M3 ; + RECT 0 89.745 0.25 89.845 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[15] + + PIN QA[16] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 92.625 0.25 92.725 ; + LAYER M2 ; + RECT 0 92.625 0.25 92.725 ; + LAYER M3 ; + RECT 0 92.625 0.25 92.725 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[16] + + PIN QA[17] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 95.505 0.25 95.605 ; + LAYER M2 ; + RECT 0 95.505 0.25 95.605 ; + LAYER M3 ; + RECT 0 95.505 0.25 95.605 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[17] + + PIN QA[18] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 98.385 0.25 98.485 ; + LAYER M2 ; + RECT 0 98.385 0.25 98.485 ; + LAYER M3 ; + RECT 0 98.385 0.25 98.485 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[18] + + PIN QA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 5.335 0.25 5.435 ; + LAYER M2 ; + RECT 0 5.335 0.25 5.435 ; + LAYER M3 ; + RECT 0 5.335 0.25 5.435 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[1] + + PIN QA[2] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 8.215 0.25 8.315 ; + LAYER M2 ; + RECT 0 8.215 0.25 8.315 ; + LAYER M3 ; + RECT 0 8.215 0.25 8.315 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[2] + + PIN QA[3] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 11.095 0.25 11.195 ; + LAYER M2 ; + RECT 0 11.095 0.25 11.195 ; + LAYER M3 ; + RECT 0 11.095 0.25 11.195 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[3] + + PIN QA[4] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 13.975 0.25 14.075 ; + LAYER M2 ; + RECT 0 13.975 0.25 14.075 ; + LAYER M3 ; + RECT 0 13.975 0.25 14.075 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[4] + + PIN QA[5] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 16.855 0.25 16.955 ; + LAYER M2 ; + RECT 0 16.855 0.25 16.955 ; + LAYER M3 ; + RECT 0 16.855 0.25 16.955 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[5] + + PIN QA[6] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 19.735 0.25 19.835 ; + LAYER M2 ; + RECT 0 19.735 0.25 19.835 ; + LAYER M3 ; + RECT 0 19.735 0.25 19.835 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[6] + + PIN QA[7] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 22.615 0.25 22.715 ; + LAYER M2 ; + RECT 0 22.615 0.25 22.715 ; + LAYER M3 ; + RECT 0 22.615 0.25 22.715 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[7] + + PIN QA[8] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 25.495 0.25 25.595 ; + LAYER M2 ; + RECT 0 25.495 0.25 25.595 ; + LAYER M3 ; + RECT 0 25.495 0.25 25.595 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[8] + + PIN QA[9] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 72.465 0.25 72.565 ; + LAYER M2 ; + RECT 0 72.465 0.25 72.565 ; + LAYER M3 ; + RECT 0 72.465 0.25 72.565 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END QA[9] + + PIN RET1N + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 29.71 0.25 29.81 ; + LAYER M2 ; + RECT 0 29.71 0.25 29.81 ; + LAYER M3 ; + RECT 0 29.71 0.25 29.81 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END RET1N + + PIN SEA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 47.5 0.25 47.6 ; + LAYER M2 ; + RECT 0 47.5 0.25 47.6 ; + LAYER M3 ; + RECT 0 47.5 0.25 47.6 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SEA + + PIN SEB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 50.335 0.25 50.435 ; + LAYER M2 ; + RECT 0 50.335 0.25 50.435 ; + LAYER M3 ; + RECT 0 50.335 0.25 50.435 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SEB + + PIN SIA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 47.7 0.25 47.8 ; + LAYER M2 ; + RECT 0 47.7 0.25 47.8 ; + LAYER M3 ; + RECT 0 47.7 0.25 47.8 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIA[0] + + PIN SIA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 48.67 0.25 48.77 ; + LAYER M2 ; + RECT 0 48.67 0.25 48.77 ; + LAYER M3 ; + RECT 0 48.67 0.25 48.77 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIA[1] + + PIN SIB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 44.275 0.25 44.375 ; + LAYER M2 ; + RECT 0 44.275 0.25 44.375 ; + LAYER M3 ; + RECT 0 44.275 0.25 44.375 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIB[0] + + PIN SIB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 61.925 0.25 62.025 ; + LAYER M2 ; + RECT 0 61.925 0.25 62.025 ; + LAYER M3 ; + RECT 0 61.925 0.25 62.025 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SIB[1] + + PIN SOA[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 0.36 0.25 0.46 ; + LAYER M2 ; + RECT 0 0.36 0.25 0.46 ; + LAYER M3 ; + RECT 0 0.36 0.25 0.46 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOA[0] + + PIN SOA[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 100.48 0.25 100.58 ; + LAYER M2 ; + RECT 0 100.48 0.25 100.58 ; + LAYER M3 ; + RECT 0 100.48 0.25 100.58 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOA[1] + + PIN SOB[0] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 0.09 0.25 0.19 ; + LAYER M2 ; + RECT 0 0.09 0.25 0.19 ; + LAYER M3 ; + RECT 0 0.09 0.25 0.19 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOB[0] + + PIN SOB[1] + USE SIGNAL ; + DIRECTION OUTPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 100.75 0.25 100.85 ; + LAYER M2 ; + RECT 0 100.75 0.25 100.85 ; + LAYER M3 ; + RECT 0 100.75 0.25 100.85 ; + END + + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END SOB[1] + + PIN TAA[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 32.355 0.25 32.455 ; + LAYER M2 ; + RECT 0 32.355 0.25 32.455 ; + LAYER M3 ; + RECT 0 32.355 0.25 32.455 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[0] + + PIN TAA[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 35.385 0.25 35.485 ; + LAYER M2 ; + RECT 0 35.385 0.25 35.485 ; + LAYER M3 ; + RECT 0 35.385 0.25 35.485 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[1] + + PIN TAA[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 38.445 0.25 38.545 ; + LAYER M2 ; + RECT 0 38.445 0.25 38.545 ; + LAYER M3 ; + RECT 0 38.445 0.25 38.545 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[2] + + PIN TAA[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 40.96 0.25 41.06 ; + LAYER M2 ; + RECT 0 40.96 0.25 41.06 ; + LAYER M3 ; + RECT 0 40.96 0.25 41.06 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[3] + + PIN TAA[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 43.99 0.25 44.09 ; + LAYER M2 ; + RECT 0 43.99 0.25 44.09 ; + LAYER M3 ; + RECT 0 43.99 0.25 44.09 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAA[4] + + PIN TAB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 66.27 0.25 66.37 ; + LAYER M2 ; + RECT 0 66.27 0.25 66.37 ; + LAYER M3 ; + RECT 0 66.27 0.25 66.37 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[0] + + PIN TAB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 63.24 0.25 63.34 ; + LAYER M2 ; + RECT 0 63.24 0.25 63.34 ; + LAYER M3 ; + RECT 0 63.24 0.25 63.34 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[1] + + PIN TAB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 60.18 0.25 60.28 ; + LAYER M2 ; + RECT 0 60.18 0.25 60.28 ; + LAYER M3 ; + RECT 0 60.18 0.25 60.28 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[2] + + PIN TAB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 57.695 0.25 57.795 ; + LAYER M2 ; + RECT 0 57.695 0.25 57.795 ; + LAYER M3 ; + RECT 0 57.695 0.25 57.795 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[3] + + PIN TAB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 54.66 0.25 54.76 ; + LAYER M2 ; + RECT 0 54.66 0.25 54.76 ; + LAYER M3 ; + RECT 0 54.66 0.25 54.76 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TAB[4] + + PIN TCENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 29.91 0.25 30.01 ; + LAYER M2 ; + RECT 0 29.91 0.25 30.01 ; + LAYER M3 ; + RECT 0 29.91 0.25 30.01 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TCENA + + PIN TCENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 69.91 0.25 70.01 ; + LAYER M2 ; + RECT 0 69.91 0.25 70.01 ; + LAYER M3 ; + RECT 0 69.91 0.25 70.01 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TCENB + + PIN TDB[0] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 1.465 0.25 1.565 ; + LAYER M2 ; + RECT 0 1.465 0.25 1.565 ; + LAYER M3 ; + RECT 0 1.465 0.25 1.565 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[0] + + PIN TDB[10] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 76.335 0.25 76.435 ; + LAYER M2 ; + RECT 0 76.335 0.25 76.435 ; + LAYER M3 ; + RECT 0 76.335 0.25 76.435 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[10] + + PIN TDB[11] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 79.215 0.25 79.315 ; + LAYER M2 ; + RECT 0 79.215 0.25 79.315 ; + LAYER M3 ; + RECT 0 79.215 0.25 79.315 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[11] + + PIN TDB[12] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 82.095 0.25 82.195 ; + LAYER M2 ; + RECT 0 82.095 0.25 82.195 ; + LAYER M3 ; + RECT 0 82.095 0.25 82.195 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[12] + + PIN TDB[13] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 84.975 0.25 85.075 ; + LAYER M2 ; + RECT 0 84.975 0.25 85.075 ; + LAYER M3 ; + RECT 0 84.975 0.25 85.075 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[13] + + PIN TDB[14] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 87.855 0.25 87.955 ; + LAYER M2 ; + RECT 0 87.855 0.25 87.955 ; + LAYER M3 ; + RECT 0 87.855 0.25 87.955 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[14] + + PIN TDB[15] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 90.735 0.25 90.835 ; + LAYER M2 ; + RECT 0 90.735 0.25 90.835 ; + LAYER M3 ; + RECT 0 90.735 0.25 90.835 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[15] + + PIN TDB[16] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 93.615 0.25 93.715 ; + LAYER M2 ; + RECT 0 93.615 0.25 93.715 ; + LAYER M3 ; + RECT 0 93.615 0.25 93.715 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[16] + + PIN TDB[17] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 96.495 0.25 96.595 ; + LAYER M2 ; + RECT 0 96.495 0.25 96.595 ; + LAYER M3 ; + RECT 0 96.495 0.25 96.595 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[17] + + PIN TDB[18] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 99.375 0.25 99.475 ; + LAYER M2 ; + RECT 0 99.375 0.25 99.475 ; + LAYER M3 ; + RECT 0 99.375 0.25 99.475 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[18] + + PIN TDB[1] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 4.345 0.25 4.445 ; + LAYER M2 ; + RECT 0 4.345 0.25 4.445 ; + LAYER M3 ; + RECT 0 4.345 0.25 4.445 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[1] + + PIN TDB[2] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 7.225 0.25 7.325 ; + LAYER M2 ; + RECT 0 7.225 0.25 7.325 ; + LAYER M3 ; + RECT 0 7.225 0.25 7.325 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[2] + + PIN TDB[3] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 10.105 0.25 10.205 ; + LAYER M2 ; + RECT 0 10.105 0.25 10.205 ; + LAYER M3 ; + RECT 0 10.105 0.25 10.205 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[3] + + PIN TDB[4] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 12.985 0.25 13.085 ; + LAYER M2 ; + RECT 0 12.985 0.25 13.085 ; + LAYER M3 ; + RECT 0 12.985 0.25 13.085 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[4] + + PIN TDB[5] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 15.865 0.25 15.965 ; + LAYER M2 ; + RECT 0 15.865 0.25 15.965 ; + LAYER M3 ; + RECT 0 15.865 0.25 15.965 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[5] + + PIN TDB[6] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 18.745 0.25 18.845 ; + LAYER M2 ; + RECT 0 18.745 0.25 18.845 ; + LAYER M3 ; + RECT 0 18.745 0.25 18.845 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[6] + + PIN TDB[7] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 21.625 0.25 21.725 ; + LAYER M2 ; + RECT 0 21.625 0.25 21.725 ; + LAYER M3 ; + RECT 0 21.625 0.25 21.725 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[7] + + PIN TDB[8] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 24.505 0.25 24.605 ; + LAYER M2 ; + RECT 0 24.505 0.25 24.605 ; + LAYER M3 ; + RECT 0 24.505 0.25 24.605 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[8] + + PIN TDB[9] + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 73.455 0.25 73.555 ; + LAYER M2 ; + RECT 0 73.455 0.25 73.555 ; + LAYER M3 ; + RECT 0 73.455 0.25 73.555 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TDB[9] + + PIN TENA + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 32.05 0.25 32.15 ; + LAYER M2 ; + RECT 0 32.05 0.25 32.15 ; + LAYER M3 ; + RECT 0 32.05 0.25 32.15 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TENA + + PIN TENB + USE SIGNAL ; + DIRECTION INPUT ; + SHAPE ABUTMENT ; + PORT + LAYER M1 ; + RECT 0 66.525 0.25 66.625 ; + LAYER M2 ; + RECT 0 66.525 0.25 66.625 ; + LAYER M3 ; + RECT 0 66.525 0.25 66.625 ; + END + + ANTENNAGATEAREA 0.014 ; + ANTENNADIFFAREA 0.018 ; + ANTENNAPARTIALMETALAREA 0.025 ; + END TENB + + PIN VDDCE + USE POWER ; + DIRECTION INOUT ; + PORT + LAYER M4 ; + RECT 0 97.495 21.165 97.645 ; + END + + PORT + LAYER M4 ; + RECT 0 94.615 21.165 94.765 ; + END + + PORT + LAYER M4 ; + RECT 0 91.735 21.165 91.885 ; + END + + PORT + LAYER M4 ; + RECT 0 88.855 21.165 89.005 ; + END + + PORT + LAYER M4 ; + RECT 0 85.975 21.165 86.125 ; + END + + PORT + LAYER M4 ; + RECT 0 83.095 21.165 83.245 ; + END + + PORT + LAYER M4 ; + RECT 0 80.215 21.165 80.365 ; + END + + PORT + LAYER M4 ; + RECT 0 77.335 21.165 77.485 ; + END + + PORT + LAYER M4 ; + RECT 0 74.455 21.165 74.605 ; + END + + PORT + LAYER M4 ; + RECT 0 71.575 21.165 71.725 ; + END + + PORT + LAYER M4 ; + RECT 0 26.335 21.165 26.485 ; + END + + PORT + LAYER M4 ; + RECT 0 23.455 21.165 23.605 ; + END + + PORT + LAYER M4 ; + RECT 0 20.575 21.165 20.725 ; + END + + PORT + LAYER M4 ; + RECT 0 17.695 21.165 17.845 ; + END + + PORT + LAYER M4 ; + RECT 0 14.815 21.165 14.965 ; + END + + PORT + LAYER M4 ; + RECT 0 11.935 21.165 12.085 ; + END + + PORT + LAYER M4 ; + RECT 0 9.055 21.165 9.205 ; + END + + PORT + LAYER M4 ; + RECT 0 6.175 21.165 6.325 ; + END + + PORT + LAYER M4 ; + RECT 0 3.295 21.165 3.445 ; + END + + PORT + LAYER M4 ; + RECT 0 32.98 21.165 33.17 ; + END + + PORT + LAYER M4 ; + RECT 0 33.96 21.165 34.15 ; + END + + PORT + LAYER M4 ; + RECT 0 36.915 21.165 37.105 ; + END + + PORT + LAYER M4 ; + RECT 0 40.85 21.165 41.04 ; + END + + PORT + LAYER M4 ; + RECT 0 41.835 21.165 42.025 ; + END + + PORT + LAYER M4 ; + RECT 0 44.785 21.165 44.975 ; + END + + PORT + LAYER M4 ; + RECT 0 48.72 21.165 48.91 ; + END + + PORT + LAYER M4 ; + RECT 0 49.215 21.165 49.405 ; + END + + PORT + LAYER M4 ; + RECT 0 53.15 21.165 53.34 ; + END + + PORT + LAYER M4 ; + RECT 0 56.105 21.165 56.295 ; + END + + PORT + LAYER M4 ; + RECT 0 57.085 21.165 57.275 ; + END + + PORT + LAYER M4 ; + RECT 0 61.025 21.165 61.215 ; + END + + PORT + LAYER M4 ; + RECT 0 63.975 21.165 64.165 ; + END + + PORT + LAYER M4 ; + RECT 0 64.925 21.165 65.115 ; + END + + PORT + LAYER M4 ; + RECT 0 100.375 21.165 100.525 ; + END + + PORT + LAYER M4 ; + RECT 0 0.415 21.165 0.565 ; + END + + PORT + LAYER M4 ; + RECT 0 28.695 21.165 28.845 ; + END + + PORT + LAYER M4 ; + RECT 0 69.215 21.165 69.365 ; + END + + END VDDCE + + PIN VDDPE + USE POWER ; + DIRECTION INOUT ; + PORT + LAYER M4 ; + RECT 0 99.915 21.165 100.065 ; + END + + PORT + LAYER M4 ; + RECT 0 97.035 21.165 97.185 ; + END + + PORT + LAYER M4 ; + RECT 0 94.155 21.165 94.305 ; + END + + PORT + LAYER M4 ; + RECT 0 91.275 21.165 91.425 ; + END + + PORT + LAYER M4 ; + RECT 0 88.395 21.165 88.545 ; + END + + PORT + LAYER M4 ; + RECT 0 85.515 21.165 85.665 ; + END + + PORT + LAYER M4 ; + RECT 0 82.635 21.165 82.785 ; + END + + PORT + LAYER M4 ; + RECT 0 79.755 21.165 79.905 ; + END + + PORT + LAYER M4 ; + RECT 0 76.875 21.165 77.025 ; + END + + PORT + LAYER M4 ; + RECT 0 73.995 21.165 74.145 ; + END + + PORT + LAYER M4 ; + RECT 0 23.915 21.165 24.065 ; + END + + PORT + LAYER M4 ; + RECT 0 21.035 21.165 21.185 ; + END + + PORT + LAYER M4 ; + RECT 0 18.155 21.165 18.305 ; + END + + PORT + LAYER M4 ; + RECT 0 15.275 21.165 15.425 ; + END + + PORT + LAYER M4 ; + RECT 0 12.395 21.165 12.545 ; + END + + PORT + LAYER M4 ; + RECT 0 9.515 21.165 9.665 ; + END + + PORT + LAYER M4 ; + RECT 0 6.635 21.165 6.785 ; + END + + PORT + LAYER M4 ; + RECT 0 3.755 21.165 3.905 ; + END + + PORT + LAYER M4 ; + RECT 0 0.875 21.165 1.025 ; + END + + PORT + LAYER M4 ; + RECT 0 30.025 21.165 30.215 ; + END + + PORT + LAYER M4 ; + RECT 0 32.03 21.165 32.22 ; + END + + PORT + LAYER M4 ; + RECT 0 34.945 21.165 35.135 ; + END + + PORT + LAYER M4 ; + RECT 0 35.93 21.165 36.12 ; + END + + PORT + LAYER M4 ; + RECT 0 37.9 21.165 38.09 ; + END + + PORT + LAYER M4 ; + RECT 0 38.88 21.165 39.07 ; + END + + PORT + LAYER M4 ; + RECT 0 39.865 21.165 40.055 ; + END + + PORT + LAYER M4 ; + RECT 0 42.82 21.165 43.01 ; + END + + PORT + LAYER M4 ; + RECT 0 46.755 21.165 46.945 ; + END + + PORT + LAYER M4 ; + RECT 0 47.74 21.165 47.93 ; + END + + PORT + LAYER M4 ; + RECT 0 50.2 21.165 50.39 ; + END + + PORT + LAYER M4 ; + RECT 0 51.18 21.165 51.37 ; + END + + PORT + LAYER M4 ; + RECT 0 55.12 21.165 55.31 ; + END + + PORT + LAYER M4 ; + RECT 0 58.07 21.165 58.26 ; + END + + PORT + LAYER M4 ; + RECT 0 59.055 21.165 59.245 ; + END + + PORT + LAYER M4 ; + RECT 0 60.04 21.165 60.23 ; + END + + PORT + LAYER M4 ; + RECT 0 62.005 21.165 62.195 ; + END + + PORT + LAYER M4 ; + RECT 0 62.99 21.165 63.18 ; + END + + PORT + LAYER M4 ; + RECT 0 65.91 21.165 66.1 ; + END + + PORT + LAYER M4 ; + RECT 0 67.91 21.165 68.1 ; + END + + PORT + LAYER M4 ; + RECT 0 100.605 21.165 100.755 ; + END + + PORT + LAYER M4 ; + RECT 0 0.185 21.165 0.335 ; + END + + PORT + LAYER M4 ; + RECT 0 28.235 21.165 28.385 ; + END + + PORT + LAYER M4 ; + RECT 0 69.675 21.165 69.825 ; + END + + END VDDPE + + PIN VSSE + USE GROUND ; + DIRECTION INOUT ; + PORT + LAYER M4 ; + RECT 0 100.145 21.165 100.295 ; + END + + PORT + LAYER M4 ; + RECT 0 0.645 21.165 0.795 ; + END + + PORT + LAYER M4 ; + RECT 0 28.465 21.165 28.615 ; + END + + PORT + LAYER M4 ; + RECT 0 69.445 21.165 69.595 ; + END + + PORT + LAYER M4 ; + RECT 0 97.265 21.165 97.415 ; + END + + PORT + LAYER M4 ; + RECT 0 94.385 21.165 94.535 ; + END + + PORT + LAYER M4 ; + RECT 0 26.565 21.165 26.715 ; + END + + PORT + LAYER M4 ; + RECT 0 23.685 21.165 23.835 ; + END + + PORT + LAYER M4 ; + RECT 0 20.805 21.165 20.955 ; + END + + PORT + LAYER M4 ; + RECT 0 17.925 21.165 18.075 ; + END + + PORT + LAYER M4 ; + RECT 0 15.045 21.165 15.195 ; + END + + PORT + LAYER M4 ; + RECT 0 12.165 21.165 12.315 ; + END + + PORT + LAYER M4 ; + RECT 0 9.285 21.165 9.435 ; + END + + PORT + LAYER M4 ; + RECT 0 6.405 21.165 6.555 ; + END + + PORT + LAYER M4 ; + RECT 0 91.505 21.165 91.655 ; + END + + PORT + LAYER M4 ; + RECT 0 3.525 21.165 3.675 ; + END + + PORT + LAYER M4 ; + RECT 0 88.625 21.165 88.775 ; + END + + PORT + LAYER M4 ; + RECT 0 85.745 21.165 85.895 ; + END + + PORT + LAYER M4 ; + RECT 0 82.865 21.165 83.015 ; + END + + PORT + LAYER M4 ; + RECT 0 79.985 21.165 80.135 ; + END + + PORT + LAYER M4 ; + RECT 0 77.105 21.165 77.255 ; + END + + PORT + LAYER M4 ; + RECT 0 74.225 21.165 74.375 ; + END + + PORT + LAYER M4 ; + RECT 0 71.345 21.165 71.495 ; + END + + PORT + LAYER M4 ; + RECT 0 99.685 21.165 99.835 ; + END + + PORT + LAYER M4 ; + RECT 0 24.145 21.165 24.295 ; + END + + PORT + LAYER M4 ; + RECT 0 21.265 21.165 21.415 ; + END + + PORT + LAYER M4 ; + RECT 0 18.385 21.165 18.535 ; + END + + PORT + LAYER M4 ; + RECT 0 93.925 21.165 94.075 ; + END + + PORT + LAYER M4 ; + RECT 0 15.505 21.165 15.655 ; + END + + PORT + LAYER M4 ; + RECT 0 12.625 21.165 12.775 ; + END + + PORT + LAYER M4 ; + RECT 0 9.745 21.165 9.895 ; + END + + PORT + LAYER M4 ; + RECT 0 6.865 21.165 7.015 ; + END + + PORT + LAYER M4 ; + RECT 0 3.985 21.165 4.135 ; + END + + PORT + LAYER M4 ; + RECT 0 1.105 21.165 1.255 ; + END + + PORT + LAYER M4 ; + RECT 0 91.045 21.165 91.195 ; + END + + PORT + LAYER M4 ; + RECT 0 88.165 21.165 88.315 ; + END + + PORT + LAYER M4 ; + RECT 0 85.285 21.165 85.435 ; + END + + PORT + LAYER M4 ; + RECT 0 82.405 21.165 82.555 ; + END + + PORT + LAYER M4 ; + RECT 0 79.525 21.165 79.675 ; + END + + PORT + LAYER M4 ; + RECT 0 76.645 21.165 76.795 ; + END + + PORT + LAYER M4 ; + RECT 0 73.765 21.165 73.915 ; + END + + PORT + LAYER M4 ; + RECT 0 96.805 21.165 96.955 ; + END + + PORT + LAYER M4 ; + RECT 0 29.535 21.165 29.725 ; + END + + PORT + LAYER M4 ; + RECT 0 30.515 21.165 30.705 ; + END + + PORT + LAYER M4 ; + RECT 0 32.485 21.165 32.675 ; + END + + PORT + LAYER M4 ; + RECT 0 33.47 21.165 33.66 ; + END + + PORT + LAYER M4 ; + RECT 0 36.425 21.165 36.615 ; + END + + PORT + LAYER M4 ; + RECT 0 37.405 21.165 37.595 ; + END + + PORT + LAYER M4 ; + RECT 0 38.39 21.165 38.58 ; + END + + PORT + LAYER M4 ; + RECT 0 40.36 21.165 40.55 ; + END + + PORT + LAYER M4 ; + RECT 0 41.33 21.165 41.54 ; + END + + PORT + LAYER M4 ; + RECT 0 42.325 21.165 42.515 ; + END + + PORT + LAYER M4 ; + RECT 0 44.3 21.165 44.49 ; + END + + PORT + LAYER M4 ; + RECT 0 45.28 21.165 45.47 ; + END + + PORT + LAYER M4 ; + RECT 0 48.23 21.165 48.42 ; + END + + PORT + LAYER M4 ; + RECT 0 49.705 21.165 49.895 ; + END + + PORT + LAYER M4 ; + RECT 0 52.655 21.165 52.845 ; + END + + PORT + LAYER M4 ; + RECT 0 53.645 21.165 53.835 ; + END + + PORT + LAYER M4 ; + RECT 0 55.61 21.165 55.8 ; + END + + PORT + LAYER M4 ; + RECT 0 56.585 21.165 56.795 ; + END + + PORT + LAYER M4 ; + RECT 0 57.58 21.165 57.77 ; + END + + PORT + LAYER M4 ; + RECT 0 59.545 21.165 59.735 ; + END + + PORT + LAYER M4 ; + RECT 0 60.53 21.165 60.72 ; + END + + PORT + LAYER M4 ; + RECT 0 61.515 21.165 61.705 ; + END + + PORT + LAYER M4 ; + RECT 0 64.455 21.165 64.665 ; + END + + PORT + LAYER M4 ; + RECT 0 65.45 21.165 65.64 ; + END + + PORT + LAYER M4 ; + RECT 0 67.42 21.165 67.61 ; + END + + PORT + LAYER M4 ; + RECT 0 68.405 21.165 68.595 ; + END + + END VSSE + + OBS + LAYER M1 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 100.59 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 1.665 0.32 2.095 ; + RECT 0 2.655 0.32 4.245 ; + RECT 0 4.545 0.32 4.975 ; + RECT 0 5.535 0.32 7.125 ; + RECT 0 7.425 0.32 7.855 ; + RECT 0 8.415 0.32 10.005 ; + RECT 0 10.305 0.32 10.735 ; + RECT 0 11.295 0.32 12.885 ; + RECT 0 13.185 0.32 13.615 ; + RECT 0 14.175 0.32 15.765 ; + RECT 0 16.065 0.32 16.495 ; + RECT 0 17.055 0.32 18.645 ; + RECT 0 18.945 0.32 19.375 ; + RECT 0 19.935 0.32 21.525 ; + RECT 0 21.825 0.32 22.255 ; + RECT 0 22.815 0.32 24.405 ; + RECT 0 24.705 0.32 25.135 ; + RECT 0 25.695 0.32 28.6 ; + RECT 0 28.9 0.32 28.95 ; + RECT 0 29.25 0.32 29.61 ; + RECT 0 30.31 0.32 31.95 ; + RECT 0 32.555 0.32 32.77 ; + RECT 0 33.07 0.32 33.175 ; + RECT 0 33.475 0.32 35.285 ; + RECT 0 35.585 0.32 35.8 ; + RECT 0 36.1 0.32 36.205 ; + RECT 0 36.505 0.32 38.345 ; + RECT 0 38.645 0.32 38.83 ; + RECT 0 39.13 0.32 39.235 ; + RECT 0 39.535 0.32 39.63 ; + RECT 0 39.93 0.32 40 ; + RECT 0 40.3 0.32 40.375 ; + RECT 0 40.675 0.32 40.86 ; + RECT 0 41.57 0.32 43.005 ; + RECT 0 43.705 0.32 43.89 ; + RECT 0 44.475 0.32 47.4 ; + RECT 0 48.1 0.32 48.57 ; + RECT 0 48.87 0.32 50.235 ; + RECT 0 50.535 0.32 54.325 ; + RECT 0 54.86 0.32 55.05 ; + RECT 0 55.35 0.32 55.425 ; + RECT 0 55.725 0.32 55.805 ; + RECT 0 56.105 0.32 56.805 ; + RECT 0 57.105 0.32 57.595 ; + RECT 0 57.895 0.32 58.08 ; + RECT 0 58.38 0.32 58.485 ; + RECT 0 58.785 0.32 59.25 ; + RECT 0 59.55 0.32 59.625 ; + RECT 0 59.925 0.32 60.08 ; + RECT 0 60.58 0.32 61.825 ; + RECT 0 62.125 0.32 62.25 ; + RECT 0 62.76 0.32 63.14 ; + RECT 0 63.44 0.32 65.28 ; + RECT 0 65.58 0.32 65.685 ; + RECT 0 65.985 0.32 66.17 ; + RECT 0 66.725 0.32 67.2 ; + RECT 0 67.5 0.32 69.81 ; + RECT 0 70.11 0.32 70.205 ; + RECT 0 70.505 0.32 70.75 ; + RECT 0 71.05 0.32 72.365 ; + RECT 0 72.925 0.32 73.355 ; + RECT 0 73.655 0.32 75.245 ; + RECT 0 75.805 0.32 76.235 ; + RECT 0 76.535 0.32 78.125 ; + RECT 0 78.685 0.32 79.115 ; + RECT 0 79.415 0.32 81.005 ; + RECT 0 81.565 0.32 81.995 ; + RECT 0 82.295 0.32 83.885 ; + RECT 0 84.445 0.32 84.875 ; + RECT 0 85.175 0.32 86.765 ; + RECT 0 87.325 0.32 87.755 ; + RECT 0 88.055 0.32 89.645 ; + RECT 0 90.205 0.32 90.635 ; + RECT 0 90.935 0.32 92.525 ; + RECT 0 93.085 0.32 93.515 ; + RECT 0 93.815 0.32 95.405 ; + RECT 0 95.965 0.32 96.395 ; + RECT 0 96.695 0.32 98.285 ; + RECT 0 98.845 0.32 99.275 ; + RECT 0 99.575 0.32 100.38 ; + RECT 20.845 0 21.165 100.94 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 100.59 20.845 100.94 ; + LAYER M2 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 100.59 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 1.665 0.32 2.095 ; + RECT 0 2.655 0.32 4.245 ; + RECT 0 4.545 0.32 4.975 ; + RECT 0 5.535 0.32 7.125 ; + RECT 0 7.425 0.32 7.855 ; + RECT 0 8.415 0.32 10.005 ; + RECT 0 10.305 0.32 10.735 ; + RECT 0 11.295 0.32 12.885 ; + RECT 0 13.185 0.32 13.615 ; + RECT 0 14.175 0.32 15.765 ; + RECT 0 16.065 0.32 16.495 ; + RECT 0 17.055 0.32 18.645 ; + RECT 0 18.945 0.32 19.375 ; + RECT 0 19.935 0.32 21.525 ; + RECT 0 21.825 0.32 22.255 ; + RECT 0 22.815 0.32 24.405 ; + RECT 0 24.705 0.32 25.135 ; + RECT 0 25.695 0.32 28.6 ; + RECT 0 28.9 0.32 28.95 ; + RECT 0 29.25 0.32 29.61 ; + RECT 0 30.31 0.32 31.95 ; + RECT 0 32.555 0.32 32.77 ; + RECT 0 33.07 0.32 33.175 ; + RECT 0 33.475 0.32 35.285 ; + RECT 0 35.585 0.32 35.8 ; + RECT 0 36.1 0.32 36.205 ; + RECT 0 36.505 0.32 38.345 ; + RECT 0 38.645 0.32 38.83 ; + RECT 0 39.13 0.32 39.235 ; + RECT 0 39.535 0.32 39.63 ; + RECT 0 39.93 0.32 40 ; + RECT 0 40.3 0.32 40.375 ; + RECT 0 40.675 0.32 40.86 ; + RECT 0 41.57 0.32 43.005 ; + RECT 0 43.705 0.32 43.89 ; + RECT 0 44.475 0.32 47.4 ; + RECT 0 48.1 0.32 48.57 ; + RECT 0 48.87 0.32 50.235 ; + RECT 0 50.535 0.32 54.325 ; + RECT 0 54.86 0.32 55.05 ; + RECT 0 55.35 0.32 55.425 ; + RECT 0 55.725 0.32 55.805 ; + RECT 0 56.105 0.32 56.805 ; + RECT 0 57.105 0.32 57.595 ; + RECT 0 57.895 0.32 58.08 ; + RECT 0 58.38 0.32 58.485 ; + RECT 0 58.785 0.32 59.25 ; + RECT 0 59.55 0.32 59.625 ; + RECT 0 59.925 0.32 60.08 ; + RECT 0 60.58 0.32 61.825 ; + RECT 0 62.125 0.32 62.25 ; + RECT 0 62.76 0.32 63.14 ; + RECT 0 63.44 0.32 65.28 ; + RECT 0 65.58 0.32 65.685 ; + RECT 0 65.985 0.32 66.17 ; + RECT 0 66.725 0.32 67.2 ; + RECT 0 67.5 0.32 69.81 ; + RECT 0 70.11 0.32 70.205 ; + RECT 0 70.505 0.32 70.75 ; + RECT 0 71.05 0.32 72.365 ; + RECT 0 72.925 0.32 73.355 ; + RECT 0 73.655 0.32 75.245 ; + RECT 0 75.805 0.32 76.235 ; + RECT 0 76.535 0.32 78.125 ; + RECT 0 78.685 0.32 79.115 ; + RECT 0 79.415 0.32 81.005 ; + RECT 0 81.565 0.32 81.995 ; + RECT 0 82.295 0.32 83.885 ; + RECT 0 84.445 0.32 84.875 ; + RECT 0 85.175 0.32 86.765 ; + RECT 0 87.325 0.32 87.755 ; + RECT 0 88.055 0.32 89.645 ; + RECT 0 90.205 0.32 90.635 ; + RECT 0 90.935 0.32 92.525 ; + RECT 0 93.085 0.32 93.515 ; + RECT 0 93.815 0.32 95.405 ; + RECT 0 95.965 0.32 96.395 ; + RECT 0 96.695 0.32 98.285 ; + RECT 0 98.845 0.32 99.275 ; + RECT 0 99.575 0.32 100.38 ; + RECT 20.845 0 21.165 100.94 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 100.59 20.845 100.94 ; + LAYER M3 DESIGNRULEWIDTH 0.165 ; + RECT 0.32 0.35 20.845 100.59 ; + RECT 0 0.56 0.32 1.365 ; + RECT 0 1.665 0.32 2.095 ; + RECT 0 2.655 0.32 4.245 ; + RECT 0 4.545 0.32 4.975 ; + RECT 0 5.535 0.32 7.125 ; + RECT 0 7.425 0.32 7.855 ; + RECT 0 8.415 0.32 10.005 ; + RECT 0 10.305 0.32 10.735 ; + RECT 0 11.295 0.32 12.885 ; + RECT 0 13.185 0.32 13.615 ; + RECT 0 14.175 0.32 15.765 ; + RECT 0 16.065 0.32 16.495 ; + RECT 0 17.055 0.32 18.645 ; + RECT 0 18.945 0.32 19.375 ; + RECT 0 19.935 0.32 21.525 ; + RECT 0 21.825 0.32 22.255 ; + RECT 0 22.815 0.32 24.405 ; + RECT 0 24.705 0.32 25.135 ; + RECT 0 25.695 0.32 28.6 ; + RECT 0 28.9 0.32 28.95 ; + RECT 0 29.25 0.32 29.61 ; + RECT 0 30.31 0.32 31.95 ; + RECT 0 32.555 0.32 32.77 ; + RECT 0 33.07 0.32 33.175 ; + RECT 0 33.475 0.32 35.285 ; + RECT 0 35.585 0.32 35.8 ; + RECT 0 36.1 0.32 36.205 ; + RECT 0 36.505 0.32 38.345 ; + RECT 0 38.645 0.32 38.83 ; + RECT 0 39.13 0.32 39.235 ; + RECT 0 39.535 0.32 39.63 ; + RECT 0 39.93 0.32 40 ; + RECT 0 40.3 0.32 40.375 ; + RECT 0 40.675 0.32 40.86 ; + RECT 0 41.57 0.32 43.005 ; + RECT 0 43.705 0.32 43.89 ; + RECT 0 44.475 0.32 47.4 ; + RECT 0 48.1 0.32 48.57 ; + RECT 0 48.87 0.32 50.235 ; + RECT 0 50.535 0.32 54.325 ; + RECT 0 54.86 0.32 55.05 ; + RECT 0 55.35 0.32 55.425 ; + RECT 0 55.725 0.32 55.805 ; + RECT 0 56.105 0.32 56.805 ; + RECT 0 57.105 0.32 57.595 ; + RECT 0 57.895 0.32 58.08 ; + RECT 0 58.38 0.32 58.485 ; + RECT 0 58.785 0.32 59.25 ; + RECT 0 59.55 0.32 59.625 ; + RECT 0 59.925 0.32 60.08 ; + RECT 0 60.58 0.32 61.825 ; + RECT 0 62.125 0.32 62.25 ; + RECT 0 62.76 0.32 63.14 ; + RECT 0 63.44 0.32 65.28 ; + RECT 0 65.58 0.32 65.685 ; + RECT 0 65.985 0.32 66.17 ; + RECT 0 66.725 0.32 67.2 ; + RECT 0 67.5 0.32 69.81 ; + RECT 0 70.11 0.32 70.205 ; + RECT 0 70.505 0.32 70.75 ; + RECT 0 71.05 0.32 72.365 ; + RECT 0 72.925 0.32 73.355 ; + RECT 0 73.655 0.32 75.245 ; + RECT 0 75.805 0.32 76.235 ; + RECT 0 76.535 0.32 78.125 ; + RECT 0 78.685 0.32 79.115 ; + RECT 0 79.415 0.32 81.005 ; + RECT 0 81.565 0.32 81.995 ; + RECT 0 82.295 0.32 83.885 ; + RECT 0 84.445 0.32 84.875 ; + RECT 0 85.175 0.32 86.765 ; + RECT 0 87.325 0.32 87.755 ; + RECT 0 88.055 0.32 89.645 ; + RECT 0 90.205 0.32 90.635 ; + RECT 0 90.935 0.32 92.525 ; + RECT 0 93.085 0.32 93.515 ; + RECT 0 93.815 0.32 95.405 ; + RECT 0 95.965 0.32 96.395 ; + RECT 0 96.695 0.32 98.285 ; + RECT 0 98.845 0.32 99.275 ; + RECT 0 99.575 0.32 100.38 ; + RECT 20.845 0 21.165 100.94 ; + RECT 0.32 0 20.845 0.35 ; + RECT 0.32 100.59 20.845 100.94 ; + LAYER M4 DESIGNRULEWIDTH 0.165 ; + RECT 0.57 26.775 14.49 27.945 ; + RECT 14.185 27.945 14.49 28.175 ; + RECT 0.57 28.005 14.125 28.155 ; + RECT 0.57 28.905 14.49 29.015 ; + RECT 0.57 29.15 14.49 29.34 ; + RECT 0.57 29.825 14.49 29.925 ; + RECT 0.57 30.315 11.56 30.415 ; + RECT 0.57 30.805 14.49 30.905 ; + RECT 11.255 30.905 14.49 30.91 ; + RECT 11.255 30.91 12.345 31.255 ; + RECT 0.57 31.005 11.155 31.215 ; + RECT 12.445 31.01 14.49 31.2 ; + RECT 11.255 31.255 11.56 31.315 ; + RECT 0.57 31.315 11.56 31.385 ; + RECT 0.57 31.485 14.49 31.675 ; + RECT 0.57 31.775 14.49 31.93 ; + RECT 0.57 32.32 14.49 32.385 ; + RECT 0.57 32.775 14.49 32.88 ; + RECT 0.57 33.27 14.49 33.37 ; + RECT 0.57 33.76 14.15 33.86 ; + RECT 0.57 34.25 14.49 34.355 ; + RECT 0.57 34.745 14.49 34.845 ; + RECT 0.57 35.235 14.49 35.34 ; + RECT 0.57 35.44 14.49 35.63 ; + RECT 0.57 35.73 14.49 35.83 ; + RECT 0.57 36.22 14.49 36.325 ; + RECT 0.57 36.715 14.49 36.815 ; + RECT 0.57 37.205 14.49 37.305 ; + RECT 0.57 37.695 14.49 37.8 ; + RECT 0.57 38.19 14.49 38.29 ; + RECT 0.57 38.68 14.49 38.78 ; + RECT 0.57 39.17 14.49 39.275 ; + RECT 0.57 39.375 14.49 39.565 ; + RECT 0.57 39.665 14.49 39.765 ; + RECT 0.57 40.155 14.49 40.26 ; + RECT 0.57 40.65 14.49 40.75 ; + RECT 8.61 41.14 14.49 41.23 ; + RECT 0.57 41.155 8.56 41.225 ; + RECT 0.57 41.64 14.49 41.735 ; + RECT 0.57 42.125 14.49 42.225 ; + RECT 0.57 42.615 14.49 42.72 ; + RECT 9.515 43.11 14.49 43.2 ; + RECT 9.295 43.115 9.465 43.125 ; + RECT 0.57 43.125 9.465 43.195 ; + RECT 9.295 43.195 9.465 43.205 ; + RECT 0.57 43.3 14.49 43.51 ; + RECT 0.57 43.61 14.49 43.705 ; + RECT 0.57 44.095 14.49 44.2 ; + RECT 0.57 44.59 14.49 44.685 ; + RECT 0.57 45.075 14.49 45.18 ; + RECT 0.57 45.57 14.49 45.655 ; + RECT 0.57 46.045 14.49 46.28 ; + RECT 0.57 46.28 13.465 46.395 ; + RECT 13.565 46.38 14.49 46.57 ; + RECT 11.215 46.395 13.465 46.655 ; + RECT 0.57 46.455 11.155 46.605 ; + RECT 0.57 47.045 13.8 47.145 ; + RECT 0.57 47.245 14.49 47.435 ; + RECT 0.57 47.535 13.8 47.64 ; + RECT 0.57 48.03 14.49 48.13 ; + RECT 0.57 48.52 14.49 48.62 ; + RECT 0.57 49.01 7.02 49.115 ; + RECT 13.595 49.01 14.49 49.115 ; + RECT 0.57 49.505 14.49 49.605 ; + RECT 0.57 49.995 14.49 50.1 ; + RECT 0.57 50.49 13.8 50.59 ; + RECT 0.57 50.69 14.49 50.88 ; + RECT 0.57 50.98 13.8 51.08 ; + RECT 11.215 51.47 13.5 51.73 ; + RECT 13.6 51.495 14.49 51.685 ; + RECT 0.57 51.52 11.155 51.67 ; + RECT 0.57 51.73 13.5 51.785 ; + RECT 0.57 51.785 14.49 52.08 ; + RECT 0.57 52.47 14.49 52.555 ; + RECT 0.57 52.945 14.49 53.05 ; + RECT 0.57 53.44 14.49 53.545 ; + RECT 0.57 53.935 14.49 54.025 ; + RECT 7.785 54.435 14.49 54.515 ; + RECT 0.57 54.44 7.735 54.51 ; + RECT 0.57 54.615 14.49 54.825 ; + RECT 0.57 54.925 14.49 55.02 ; + RECT 0.57 55.41 14.49 55.51 ; + RECT 0.57 55.9 14.49 56.005 ; + RECT 0.57 56.395 14.49 56.485 ; + RECT 8.06 56.895 14.49 56.985 ; + RECT 0.57 56.9 8.01 56.97 ; + RECT 0.57 57.375 14.49 57.48 ; + RECT 0.57 57.87 14.49 57.97 ; + RECT 0.57 58.36 14.49 58.465 ; + RECT 0.57 58.565 14.49 58.755 ; + RECT 0.57 58.855 14.49 58.955 ; + RECT 0.57 59.345 14.49 59.445 ; + RECT 0.57 59.835 14.49 59.94 ; + RECT 0.57 60.33 14.49 60.43 ; + RECT 0.57 60.82 14.49 60.925 ; + RECT 0.57 61.315 14.49 61.415 ; + RECT 0.57 61.805 14.49 61.905 ; + RECT 0.57 62.295 14.15 62.39 ; + RECT 0.57 62.49 14.49 62.7 ; + RECT 2.785 62.8 14.49 62.89 ; + RECT 0.57 63.28 14.49 63.375 ; + RECT 0.57 63.79 14.49 63.86 ; + RECT 0.57 64.28 14.49 64.35 ; + RECT 0.57 64.765 14.49 64.825 ; + RECT 0.57 65.215 14.49 65.35 ; + RECT 0.57 65.74 14.49 65.81 ; + RECT 0.57 66.2 14.49 66.35 ; + RECT 0.57 66.45 14.49 66.64 ; + RECT 0.57 66.74 12.555 66.815 ; + RECT 11.255 66.815 12.555 66.825 ; + RECT 11.255 66.825 12.27 67.215 ; + RECT 0.57 66.915 11.155 67.125 ; + RECT 12.37 66.925 14.49 67.115 ; + RECT 11.255 67.215 14.49 67.225 ; + RECT 0.57 67.225 14.49 67.32 ; + RECT 0.57 67.71 12.555 67.81 ; + RECT 0.57 68.2 14.49 68.305 ; + RECT 0.57 68.705 14.49 68.915 ; + RECT 0.57 69.045 14.49 69.155 ; + RECT 14.21 69.885 14.49 70.115 ; + RECT 0.57 69.905 14.15 70.055 ; + RECT 0.57 70.115 14.49 71.285 ; + RECT 0.21 28.005 0.57 28.155 ; + RECT 0.215 29.15 0.57 29.34 ; + RECT 0.22 31.005 0.57 31.215 ; + RECT 0.22 31.485 0.57 31.675 ; + RECT 0.22 35.44 0.57 35.63 ; + RECT 0.23 39.375 0.57 39.565 ; + RECT 0.14 41.155 0.57 41.225 ; + RECT 0.15 43.125 0.57 43.195 ; + RECT 0.215 43.3 0.57 43.51 ; + RECT 0.21 46.455 0.57 46.605 ; + RECT 0.225 47.245 0.57 47.435 ; + RECT 0.325 50.69 0.61 50.88 ; + RECT 0.21 51.52 0.57 51.67 ; + RECT 0.15 54.44 0.57 54.51 ; + RECT 0.235 54.615 0.57 54.825 ; + RECT 0.14 56.9 0.57 56.97 ; + RECT 0.24 58.565 0.57 58.755 ; + RECT 0.225 62.49 0.57 62.7 ; + RECT 0.14 62.805 0.57 62.875 ; + RECT 0.235 66.45 0.57 66.64 ; + RECT 0.225 66.915 0.57 67.125 ; + RECT 0.24 68.705 0.57 68.915 ; + RECT 0.22 69.905 0.57 70.055 ; + RECT 5.7 23.225 13.945 23.375 ; + RECT 5.7 20.345 13.945 20.495 ; + RECT 5.7 17.465 13.945 17.615 ; + RECT 5.7 14.585 13.945 14.735 ; + RECT 5.7 11.705 13.945 11.855 ; + RECT 5.7 8.825 13.945 8.975 ; + RECT 5.7 5.945 13.945 6.095 ; + RECT 5.7 3.065 13.945 3.215 ; + RECT 5.7 26.105 13.945 26.255 ; + RECT 0.57 23.225 1.11 23.375 ; + RECT 0.57 20.345 1.11 20.495 ; + RECT 0.57 17.465 1.11 17.615 ; + RECT 0.57 14.585 1.11 14.735 ; + RECT 0.57 11.705 1.11 11.855 ; + RECT 0.57 8.825 1.11 8.975 ; + RECT 0.57 5.945 1.11 6.095 ; + RECT 0.57 3.065 1.11 3.215 ; + RECT 0.57 26.105 1.11 26.255 ; + RECT 1.005 23.225 5.7 23.375 ; + RECT 1.005 20.345 5.7 20.495 ; + RECT 1.005 17.465 5.7 17.615 ; + RECT 1.005 14.585 5.7 14.735 ; + RECT 1.005 11.705 5.7 11.855 ; + RECT 1.005 8.825 5.7 8.975 ; + RECT 1.005 5.945 5.7 6.095 ; + RECT 1.005 3.065 5.7 3.215 ; + RECT 1.005 26.105 5.7 26.255 ; + RECT 0.255 26.105 0.57 26.255 ; + RECT 0.255 23.225 0.57 23.375 ; + RECT 0.255 20.345 0.57 20.495 ; + RECT 0.255 17.465 0.57 17.615 ; + RECT 0.255 14.585 0.57 14.735 ; + RECT 0.255 11.705 0.57 11.855 ; + RECT 0.255 8.825 0.57 8.975 ; + RECT 0.255 5.945 0.57 6.095 ; + RECT 0.255 3.065 0.57 3.215 ; + RECT 5.7 74.685 13.945 74.835 ; + RECT 5.7 77.565 13.945 77.715 ; + RECT 5.7 80.445 13.945 80.595 ; + RECT 5.7 83.325 13.945 83.475 ; + RECT 5.7 86.205 13.945 86.355 ; + RECT 5.7 89.085 13.945 89.235 ; + RECT 5.7 91.965 13.945 92.115 ; + RECT 5.7 94.845 13.945 94.995 ; + RECT 5.7 97.725 13.945 97.875 ; + RECT 5.7 71.805 13.945 71.955 ; + RECT 0.57 74.685 1.11 74.835 ; + RECT 0.57 77.565 1.11 77.715 ; + RECT 0.57 80.445 1.11 80.595 ; + RECT 0.57 83.325 1.11 83.475 ; + RECT 0.57 86.205 1.11 86.355 ; + RECT 0.57 89.085 1.11 89.235 ; + RECT 0.57 91.965 1.11 92.115 ; + RECT 0.57 94.845 1.11 94.995 ; + RECT 0.57 97.725 1.11 97.875 ; + RECT 0.57 71.805 1.11 71.955 ; + RECT 1.005 74.685 5.7 74.835 ; + RECT 1.005 77.565 5.7 77.715 ; + RECT 1.005 80.445 5.7 80.595 ; + RECT 1.005 83.325 5.7 83.475 ; + RECT 1.005 86.205 5.7 86.355 ; + RECT 1.005 89.085 5.7 89.235 ; + RECT 1.005 91.965 5.7 92.115 ; + RECT 1.005 94.845 5.7 94.995 ; + RECT 1.005 97.725 5.7 97.875 ; + RECT 1.005 71.805 5.7 71.955 ; + RECT 0.255 71.805 0.57 71.955 ; + RECT 0.255 74.685 0.57 74.835 ; + RECT 0.255 77.565 0.57 77.715 ; + RECT 0.255 80.445 0.57 80.595 ; + RECT 0.255 83.325 0.57 83.475 ; + RECT 0.255 86.205 0.57 86.355 ; + RECT 0.255 89.085 0.57 89.235 ; + RECT 0.255 91.965 0.57 92.115 ; + RECT 0.255 94.845 0.57 94.995 ; + RECT 0.255 97.725 0.57 97.875 ; + RECT 15.63 28.905 16.17 29.015 ; + RECT 15.63 26.775 16.17 28.175 ; + RECT 16.17 28.905 16.71 29.015 ; + RECT 16.17 26.775 16.71 28.175 ; + RECT 16.71 28.905 17.25 29.015 ; + RECT 16.71 26.775 17.25 28.175 ; + RECT 15.09 28.905 15.63 29.015 ; + RECT 15.09 26.775 15.63 28.175 ; + RECT 14.49 28.905 15.09 29.015 ; + RECT 14.49 26.775 15.09 28.175 ; + RECT 17.25 28.905 17.79 29.015 ; + RECT 17.25 26.775 17.79 28.175 ; + RECT 17.79 28.905 18.33 29.015 ; + RECT 17.79 26.775 18.33 28.175 ; + RECT 18.33 28.905 18.87 29.015 ; + RECT 18.33 26.775 18.87 28.175 ; + RECT 19.41 28.905 20.01 29.015 ; + RECT 19.41 26.775 20.01 28.175 ; + RECT 18.87 28.905 19.41 29.015 ; + RECT 18.87 26.775 19.41 28.175 ; + RECT 15.09 69.045 15.63 69.155 ; + RECT 15.09 69.885 15.63 71.285 ; + RECT 14.49 69.045 15.09 69.155 ; + RECT 14.49 69.885 15.09 71.285 ; + RECT 15.63 69.045 16.17 69.155 ; + RECT 15.63 69.885 16.17 71.285 ; + RECT 16.17 69.045 16.71 69.155 ; + RECT 16.17 69.885 16.71 71.285 ; + RECT 16.71 69.045 17.25 69.155 ; + RECT 16.71 69.885 17.25 71.285 ; + RECT 17.25 69.045 17.79 69.155 ; + RECT 17.25 69.885 17.79 71.285 ; + RECT 17.79 69.045 18.33 69.155 ; + RECT 17.79 69.885 18.33 71.285 ; + RECT 18.33 69.045 18.87 69.155 ; + RECT 18.33 69.885 18.87 71.285 ; + RECT 19.41 69.045 20.01 69.155 ; + RECT 19.41 69.885 20.01 71.285 ; + RECT 18.87 69.045 19.41 69.155 ; + RECT 18.87 69.885 19.41 71.285 ; + RECT 20.01 26.775 21.165 28.175 ; + RECT 20.01 28.905 21.165 29.015 ; + RECT 20.97 29.015 21.165 29.435 ; + RECT 20.01 29.15 20.87 29.34 ; + RECT 20.01 29.825 21.165 29.925 ; + RECT 20.01 30.805 21.165 30.91 ; + RECT 20.97 30.91 21.165 31.255 ; + RECT 20.01 31.01 20.87 31.2 ; + RECT 20.97 31.435 21.165 31.775 ; + RECT 20.01 31.485 20.87 31.675 ; + RECT 20.92 31.775 21.165 31.93 ; + RECT 20.01 31.78 20.86 31.93 ; + RECT 20.01 32.32 21.165 32.385 ; + RECT 20.01 32.775 21.165 32.88 ; + RECT 20.01 33.27 21.165 33.37 ; + RECT 20.41 33.76 21.165 33.86 ; + RECT 20.01 34.25 21.165 34.355 ; + RECT 20.79 34.355 21.165 34.745 ; + RECT 20.01 34.745 21.165 34.845 ; + RECT 20.01 35.235 21.165 35.34 ; + RECT 20.97 35.34 21.165 35.73 ; + RECT 20.01 35.44 20.87 35.63 ; + RECT 20.01 35.73 21.165 35.83 ; + RECT 20.01 36.22 21.165 36.325 ; + RECT 20.01 36.715 21.165 36.815 ; + RECT 20.01 37.205 21.165 37.305 ; + RECT 20.01 37.695 21.165 37.8 ; + RECT 20.01 38.19 21.165 38.29 ; + RECT 20.01 38.68 21.165 38.78 ; + RECT 20.01 39.17 21.165 39.275 ; + RECT 20.97 39.275 21.165 39.665 ; + RECT 20.01 39.375 20.87 39.565 ; + RECT 20.01 39.665 21.165 39.765 ; + RECT 20.01 40.155 21.165 40.26 ; + RECT 20.01 40.65 21.165 40.75 ; + RECT 20.01 41.14 21.165 41.23 ; + RECT 20.01 41.64 21.165 41.735 ; + RECT 20.01 42.125 21.165 42.225 ; + RECT 20.01 42.615 21.165 42.72 ; + RECT 20.01 43.11 21.165 43.2 ; + RECT 20.97 43.2 21.165 43.61 ; + RECT 20.01 43.3 20.87 43.51 ; + RECT 20.01 43.61 21.165 43.705 ; + RECT 20.97 43.705 21.165 44.095 ; + RECT 20.01 44.095 21.165 44.2 ; + RECT 20.01 44.59 21.165 44.685 ; + RECT 20.01 45.075 21.165 45.18 ; + RECT 20.01 45.57 21.165 45.655 ; + RECT 20.97 45.655 21.165 46.655 ; + RECT 20.01 46.055 20.87 46.265 ; + RECT 20.01 46.38 20.86 46.57 ; + RECT 20.97 47.19 21.165 47.495 ; + RECT 20.01 47.245 20.87 47.435 ; + RECT 20.01 48.03 21.165 48.13 ; + RECT 20.01 48.52 21.165 48.62 ; + RECT 20.01 49.01 21.165 49.115 ; + RECT 20.01 49.505 21.165 49.605 ; + RECT 20.01 49.995 21.165 50.1 ; + RECT 20.97 50.635 21.165 50.935 ; + RECT 20.01 50.69 20.87 50.88 ; + RECT 20.97 51.47 21.165 52.47 ; + RECT 20.01 51.495 20.87 51.685 ; + RECT 20.01 51.83 20.87 52.04 ; + RECT 20.01 52.47 21.165 52.555 ; + RECT 20.01 52.945 21.165 53.05 ; + RECT 20.01 53.44 21.165 53.545 ; + RECT 20.01 53.935 21.165 54.025 ; + RECT 20.97 54.025 21.165 54.435 ; + RECT 20.01 54.435 21.165 54.515 ; + RECT 20.97 54.515 21.165 54.925 ; + RECT 20.01 54.615 20.87 54.825 ; + RECT 20.01 54.925 21.165 55.02 ; + RECT 20.01 55.41 21.165 55.51 ; + RECT 20.01 55.9 21.165 56.005 ; + RECT 20.01 56.395 21.165 56.485 ; + RECT 20.01 56.895 21.165 56.985 ; + RECT 20.01 57.375 21.165 57.48 ; + RECT 20.01 57.87 21.165 57.97 ; + RECT 20.01 58.36 21.165 58.465 ; + RECT 20.97 58.465 21.165 58.855 ; + RECT 20.01 58.565 20.87 58.755 ; + RECT 20.01 58.855 21.165 58.955 ; + RECT 20.01 59.345 21.165 59.445 ; + RECT 20.01 59.835 21.165 59.94 ; + RECT 20.01 60.33 21.165 60.43 ; + RECT 20.01 60.82 21.165 60.925 ; + RECT 20.01 61.315 21.165 61.415 ; + RECT 20.01 61.805 21.165 61.905 ; + RECT 20.41 62.295 21.165 62.39 ; + RECT 20.97 62.39 21.165 62.8 ; + RECT 20.01 62.49 20.87 62.7 ; + RECT 20.01 62.8 21.165 62.89 ; + RECT 20.01 63.28 21.165 63.375 ; + RECT 20.79 63.375 21.165 63.785 ; + RECT 20.74 63.785 21.165 63.875 ; + RECT 20.74 64.265 21.165 64.355 ; + RECT 20.01 64.765 21.165 64.825 ; + RECT 20.01 65.215 21.165 65.35 ; + RECT 20.01 65.74 21.165 65.81 ; + RECT 20.97 66.2 21.165 66.69 ; + RECT 20.01 66.2 20.87 66.35 ; + RECT 20.01 66.45 20.87 66.64 ; + RECT 20.97 66.87 21.165 67.215 ; + RECT 20.01 66.925 20.87 67.115 ; + RECT 20.01 67.215 21.165 67.32 ; + RECT 20.01 68.2 21.165 68.305 ; + RECT 20.97 68.695 21.165 69.045 ; + RECT 20.01 68.705 20.87 68.915 ; + RECT 20.01 69.045 21.165 69.155 ; + RECT 20.01 69.885 21.165 71.285 ; + RECT 14.49 29.15 19.41 29.34 ; + RECT 14.49 29.825 19.41 29.925 ; + RECT 14.49 30.805 19.41 30.91 ; + RECT 14.49 31.01 19.41 31.2 ; + RECT 14.49 31.485 19.41 31.675 ; + RECT 14.59 31.78 19.41 31.93 ; + RECT 14.49 32.32 19.41 32.385 ; + RECT 14.49 32.775 19.41 32.88 ; + RECT 14.49 33.27 19.41 33.37 ; + RECT 14.49 34.25 19.41 34.355 ; + RECT 14.49 34.745 19.41 34.845 ; + RECT 14.49 35.235 19.41 35.34 ; + RECT 14.49 35.44 19.41 35.63 ; + RECT 14.49 35.73 19.41 35.83 ; + RECT 14.49 36.22 19.41 36.325 ; + RECT 14.49 36.715 19.41 36.815 ; + RECT 14.49 37.205 19.41 37.305 ; + RECT 14.49 37.695 19.41 37.8 ; + RECT 14.49 38.19 19.41 38.29 ; + RECT 14.49 38.68 19.41 38.78 ; + RECT 14.49 39.17 19.41 39.275 ; + RECT 14.49 39.375 19.41 39.565 ; + RECT 14.49 39.665 19.41 39.765 ; + RECT 14.49 40.155 19.41 40.26 ; + RECT 14.49 40.65 19.41 40.75 ; + RECT 14.49 41.14 19.41 41.23 ; + RECT 14.49 41.64 19.41 41.735 ; + RECT 14.49 42.125 19.41 42.225 ; + RECT 14.49 42.615 19.41 42.72 ; + RECT 14.49 43.11 19.41 43.2 ; + RECT 14.49 43.3 19.41 43.51 ; + RECT 14.49 43.61 19.41 43.705 ; + RECT 14.49 44.095 19.41 44.2 ; + RECT 14.49 44.59 19.41 44.685 ; + RECT 14.49 45.075 19.41 45.18 ; + RECT 14.49 45.57 19.41 45.655 ; + RECT 14.49 46.045 14.595 46.28 ; + RECT 14.695 46.055 19.41 46.265 ; + RECT 14.49 46.38 19.41 46.57 ; + RECT 14.49 47.245 19.41 47.435 ; + RECT 14.49 48.03 19.41 48.13 ; + RECT 14.49 48.52 19.41 48.62 ; + RECT 14.49 49.01 19.41 49.115 ; + RECT 14.49 49.505 19.41 49.605 ; + RECT 14.49 49.995 19.41 50.1 ; + RECT 14.49 50.69 19.41 50.88 ; + RECT 14.49 51.495 19.41 51.685 ; + RECT 14.59 51.83 19.41 52.04 ; + RECT 14.49 52.47 19.41 52.555 ; + RECT 14.49 52.945 19.41 53.05 ; + RECT 14.49 53.44 19.41 53.545 ; + RECT 14.49 53.935 19.41 54.025 ; + RECT 14.49 54.435 19.41 54.515 ; + RECT 14.49 54.615 19.41 54.825 ; + RECT 14.49 54.925 19.41 55.02 ; + RECT 14.49 55.41 19.41 55.51 ; + RECT 14.49 55.9 19.41 56.005 ; + RECT 14.49 56.395 19.41 56.485 ; + RECT 14.49 56.895 19.41 56.985 ; + RECT 14.49 57.375 19.41 57.48 ; + RECT 14.49 57.87 19.41 57.97 ; + RECT 14.49 58.36 19.41 58.465 ; + RECT 14.49 58.565 19.41 58.755 ; + RECT 14.49 58.855 19.41 58.955 ; + RECT 14.49 59.345 19.41 59.445 ; + RECT 14.49 59.835 19.41 59.94 ; + RECT 14.49 60.33 19.41 60.43 ; + RECT 14.49 60.82 19.41 60.925 ; + RECT 14.49 61.315 19.41 61.415 ; + RECT 14.49 61.805 19.41 61.905 ; + RECT 14.49 62.49 19.41 62.7 ; + RECT 14.49 62.8 19.41 62.89 ; + RECT 14.49 63.28 19.41 63.375 ; + RECT 14.49 63.79 19.41 63.86 ; + RECT 14.49 64.28 19.445 64.35 ; + RECT 14.49 64.765 19.41 64.825 ; + RECT 14.49 65.215 19.41 65.35 ; + RECT 14.49 65.74 19.41 65.81 ; + RECT 14.49 66.2 14.63 66.35 ; + RECT 14.69 66.2 19.41 66.35 ; + RECT 14.49 66.45 19.41 66.64 ; + RECT 14.49 66.925 19.41 67.115 ; + RECT 14.49 67.215 19.41 67.32 ; + RECT 14.49 68.2 19.41 68.305 ; + RECT 14.49 68.705 19.41 68.915 ; + RECT 19.41 29.15 20.01 29.34 ; + RECT 19.41 29.825 20.01 29.925 ; + RECT 19.41 30.805 20.01 30.91 ; + RECT 19.41 31.01 20.01 31.2 ; + RECT 19.41 31.485 20.01 31.675 ; + RECT 19.41 31.78 20.175 31.93 ; + RECT 19.41 32.32 20.01 32.385 ; + RECT 19.41 32.775 20.01 32.88 ; + RECT 19.41 33.27 20.01 33.37 ; + RECT 19.41 34.25 20.01 34.355 ; + RECT 19.41 34.745 20.01 34.845 ; + RECT 19.41 35.235 20.01 35.34 ; + RECT 19.41 35.44 20.01 35.63 ; + RECT 19.41 35.73 20.01 35.83 ; + RECT 19.41 36.22 20.01 36.325 ; + RECT 19.41 36.715 20.01 36.815 ; + RECT 19.41 37.205 20.01 37.305 ; + RECT 19.41 37.695 20.01 37.8 ; + RECT 19.41 38.19 20.01 38.29 ; + RECT 19.41 38.68 20.01 38.78 ; + RECT 19.41 39.17 20.01 39.275 ; + RECT 19.41 39.375 20.01 39.565 ; + RECT 19.41 39.665 20.01 39.765 ; + RECT 19.41 40.155 20.01 40.26 ; + RECT 19.41 40.65 20.01 40.75 ; + RECT 19.41 41.14 20.01 41.23 ; + RECT 19.41 41.64 20.01 41.735 ; + RECT 19.41 42.125 20.01 42.225 ; + RECT 19.41 42.615 20.01 42.72 ; + RECT 19.41 43.11 20.01 43.2 ; + RECT 19.41 43.3 20.01 43.51 ; + RECT 19.41 43.61 20.01 43.705 ; + RECT 19.41 44.095 20.01 44.2 ; + RECT 19.41 44.59 20.01 44.685 ; + RECT 19.41 45.075 20.01 45.18 ; + RECT 19.41 45.57 20.01 45.655 ; + RECT 19.41 46.055 20.085 46.265 ; + RECT 19.41 46.38 20.01 46.57 ; + RECT 19.41 47.245 20.01 47.435 ; + RECT 19.41 48.03 20.01 48.13 ; + RECT 19.41 48.52 20.01 48.62 ; + RECT 19.41 49.01 20.01 49.115 ; + RECT 19.41 49.505 20.01 49.605 ; + RECT 19.41 49.995 20.01 50.1 ; + RECT 19.41 50.69 20.01 50.88 ; + RECT 19.41 51.495 20.01 51.685 ; + RECT 19.41 51.83 20.01 52.04 ; + RECT 19.41 52.47 20.01 52.555 ; + RECT 19.41 52.945 20.01 53.05 ; + RECT 19.41 53.44 20.01 53.545 ; + RECT 19.41 53.935 20.01 54.025 ; + RECT 19.41 54.435 20.01 54.515 ; + RECT 19.41 54.615 20.01 54.825 ; + RECT 19.41 54.925 20.01 55.02 ; + RECT 19.41 55.41 20.01 55.51 ; + RECT 19.41 55.9 20.01 56.005 ; + RECT 19.41 56.395 20.01 56.485 ; + RECT 19.41 56.895 20.01 56.985 ; + RECT 19.41 57.375 20.01 57.48 ; + RECT 19.41 57.87 20.01 57.97 ; + RECT 19.41 58.36 20.01 58.465 ; + RECT 19.41 58.565 20.01 58.755 ; + RECT 19.41 58.855 20.01 58.955 ; + RECT 19.41 59.345 20.01 59.445 ; + RECT 19.41 59.835 20.01 59.94 ; + RECT 19.41 60.33 20.01 60.43 ; + RECT 19.41 60.82 20.01 60.925 ; + RECT 19.41 61.315 20.01 61.415 ; + RECT 19.41 61.805 20.01 61.905 ; + RECT 19.41 62.49 20.01 62.7 ; + RECT 19.41 62.8 20.01 62.89 ; + RECT 19.41 63.28 20.01 63.375 ; + RECT 19.41 63.79 20.01 63.86 ; + RECT 19.41 64.28 20.01 64.35 ; + RECT 19.41 64.765 20.01 64.825 ; + RECT 19.41 65.215 20.01 65.35 ; + RECT 19.41 65.74 20.01 65.81 ; + RECT 19.41 66.2 20.01 66.35 ; + RECT 19.41 66.45 20.01 66.64 ; + RECT 19.41 66.925 20.01 67.115 ; + RECT 19.41 67.215 20.01 67.32 ; + RECT 19.41 68.2 20.01 68.305 ; + RECT 19.41 68.705 20.01 68.915 ; + RECT 0.295 34.455 20.69 34.645 ; + RECT 0.215 43.805 20.87 43.995 ; + RECT 0.21 45.755 20.86 45.945 ; + RECT 0.22 52.18 20.87 52.37 ; + RECT 0.225 54.125 20.87 54.335 ; + RECT 0.225 63.475 20.69 63.685 ; + RECT 0.225 63.79 0.57 63.86 ; + RECT 0.22 64.28 0.57 64.35 ; + RECT 11.61 30.32 21.07 30.41 ; + RECT 11.61 31.305 21.07 31.385 ; + RECT 14.2 33.765 20.36 33.855 ; + RECT 13.85 47.05 21.07 47.14 ; + RECT 13.85 47.545 21.07 47.635 ; + RECT 7.07 49.015 13.545 49.115 ; + RECT 13.85 50.495 21.07 50.585 ; + RECT 13.85 50.985 21.07 51.075 ; + RECT 14.2 62.3 20.36 62.39 ; + RECT 0.57 62.805 2.735 62.875 ; + RECT 12.605 66.74 21.07 66.82 ; + RECT 12.605 67.715 21.07 67.805 ; + RECT 20.01 63.79 20.69 63.86 ; + RECT 20.01 64.28 20.69 64.35 ; + LAYER VIA1 DESIGNRULEWIDTH 0.07 ; + RECT 0 0 21.165 100.94 ; + LAYER VIA2 DESIGNRULEWIDTH 0.07 ; + RECT 0 0 21.165 100.94 ; + LAYER VIA3 DESIGNRULEWIDTH 0.07 ; + RECT 0.435 28.015 0.485 28.145 ; + RECT 0.435 29.18 0.485 29.31 ; + RECT 0.435 31.045 0.485 31.175 ; + RECT 0.435 31.515 0.485 31.645 ; + RECT 0.435 35.47 0.485 35.6 ; + RECT 0.435 39.405 0.485 39.535 ; + RECT 0.435 43.34 0.485 43.47 ; + RECT 0.435 46.465 0.485 46.595 ; + RECT 0.435 47.275 0.485 47.405 ; + RECT 0.435 50.72 0.485 50.85 ; + RECT 0.435 51.53 0.485 51.66 ; + RECT 0.435 54.655 0.485 54.785 ; + RECT 0.435 58.595 0.485 58.725 ; + RECT 0.435 62.53 0.485 62.66 ; + RECT 0.435 66.48 0.485 66.61 ; + RECT 0.435 66.955 0.485 67.085 ; + RECT 0.435 68.745 0.485 68.875 ; + RECT 0.435 69.915 0.485 70.045 ; + RECT 0.435 28.475 0.485 28.605 ; + RECT 0.435 34.485 0.485 34.615 ; + RECT 0.435 63.515 0.485 63.645 ; + RECT 0.435 69.455 0.485 69.585 ; + RECT 1.085 28.015 1.135 28.145 ; + RECT 1.38 28.015 1.43 28.145 ; + RECT 1.86 28.015 1.91 28.145 ; + RECT 2.01 28.015 2.06 28.145 ; + RECT 3.25 28.015 3.3 28.145 ; + RECT 3.515 28.015 3.565 28.145 ; + RECT 4.51 28.015 4.56 28.145 ; + RECT 5.035 28.015 5.085 28.145 ; + RECT 6.22 28.015 6.27 28.145 ; + RECT 7.5 28.015 7.55 28.145 ; + RECT 9.315 28.015 9.365 28.145 ; + RECT 9.72 28.015 9.77 28.145 ; + RECT 11.025 28.015 11.075 28.145 ; + RECT 0.62 28.245 0.67 28.375 ; + RECT 3.65 28.245 3.7 28.375 ; + RECT 7.19 28.245 7.24 28.375 ; + RECT 14.14 28.245 14.19 28.375 ; + RECT 2.18 28.475 2.23 28.605 ; + RECT 8.56 28.475 8.61 28.605 ; + RECT 10.27 28.475 10.32 28.605 ; + RECT 13.8 28.705 13.85 28.835 ; + RECT 1.045 29.155 1.175 29.205 ; + RECT 1.34 29.155 1.47 29.205 ; + RECT 4.47 29.155 4.6 29.205 ; + RECT 9.275 29.155 9.405 29.205 ; + RECT 1.86 29.18 1.91 29.31 ; + RECT 2.01 29.18 2.06 29.31 ; + RECT 3.25 29.18 3.3 29.31 ; + RECT 3.515 29.18 3.565 29.31 ; + RECT 5.035 29.18 5.085 29.31 ; + RECT 6.22 29.18 6.27 29.31 ; + RECT 7.5 29.18 7.55 29.31 ; + RECT 9.72 29.18 9.77 29.31 ; + RECT 11.025 29.18 11.075 29.31 ; + RECT 1.045 29.285 1.175 29.335 ; + RECT 1.34 29.285 1.47 29.335 ; + RECT 4.47 29.285 4.6 29.335 ; + RECT 9.275 29.285 9.405 29.335 ; + RECT 3.02 29.54 3.15 29.59 ; + RECT 1.57 29.565 1.62 29.695 ; + RECT 4.87 29.565 4.92 29.695 ; + RECT 5.9 29.565 5.95 29.695 ; + RECT 8.955 29.565 9.005 29.695 ; + RECT 12.79 29.565 12.84 29.695 ; + RECT 14.33 29.565 14.38 29.695 ; + RECT 3.02 29.67 3.15 29.72 ; + RECT 3.8 30.03 3.93 30.08 ; + RECT 5.635 30.03 5.765 30.08 ; + RECT 8.31 30.03 8.44 30.08 ; + RECT 8.73 30.03 8.86 30.08 ; + RECT 0.9 30.055 0.95 30.185 ; + RECT 2.485 30.055 2.535 30.185 ; + RECT 2.615 30.055 2.665 30.185 ; + RECT 6.065 30.055 6.115 30.185 ; + RECT 6.725 30.055 6.775 30.185 ; + RECT 11.555 30.055 11.865 30.185 ; + RECT 12.52 30.055 12.57 30.185 ; + RECT 14.005 30.055 14.055 30.185 ; + RECT 3.8 30.16 3.93 30.21 ; + RECT 5.635 30.16 5.765 30.21 ; + RECT 8.31 30.16 8.44 30.21 ; + RECT 8.73 30.16 8.86 30.21 ; + RECT 11.685 30.34 11.735 30.39 ; + RECT 12.655 30.34 12.705 30.39 ; + RECT 3.02 30.52 3.15 30.57 ; + RECT 1.57 30.545 1.62 30.675 ; + RECT 4.87 30.545 4.92 30.675 ; + RECT 5.9 30.545 5.95 30.675 ; + RECT 8.955 30.545 9.005 30.675 ; + RECT 12.79 30.545 12.84 30.675 ; + RECT 14.335 30.545 14.385 30.675 ; + RECT 3.02 30.65 3.15 30.7 ; + RECT 1.045 31.02 1.175 31.07 ; + RECT 1.34 31.02 1.47 31.07 ; + RECT 4.47 31.02 4.6 31.07 ; + RECT 9.275 31.02 9.405 31.07 ; + RECT 13.675 31.04 13.725 31.17 ; + RECT 1.86 31.045 1.91 31.175 ; + RECT 2.01 31.045 2.06 31.175 ; + RECT 3.25 31.045 3.3 31.175 ; + RECT 3.515 31.045 3.565 31.175 ; + RECT 5.035 31.045 5.085 31.175 ; + RECT 6.22 31.045 6.27 31.175 ; + RECT 7.5 31.045 7.55 31.175 ; + RECT 9.72 31.045 9.77 31.175 ; + RECT 11.025 31.045 11.075 31.175 ; + RECT 1.045 31.15 1.175 31.2 ; + RECT 1.34 31.15 1.47 31.2 ; + RECT 4.47 31.15 4.6 31.2 ; + RECT 9.275 31.15 9.405 31.2 ; + RECT 11.685 31.32 11.735 31.37 ; + RECT 12.655 31.32 12.705 31.37 ; + RECT 1.045 31.49 1.175 31.54 ; + RECT 1.34 31.49 1.47 31.54 ; + RECT 4.47 31.49 4.6 31.54 ; + RECT 9.275 31.49 9.405 31.54 ; + RECT 1.86 31.515 1.91 31.645 ; + RECT 2.01 31.515 2.06 31.645 ; + RECT 3.25 31.515 3.3 31.645 ; + RECT 3.515 31.515 3.565 31.645 ; + RECT 5.035 31.515 5.085 31.645 ; + RECT 6.22 31.515 6.27 31.645 ; + RECT 7.5 31.515 7.55 31.645 ; + RECT 9.72 31.515 9.77 31.645 ; + RECT 11.025 31.515 11.075 31.645 ; + RECT 1.045 31.62 1.175 31.67 ; + RECT 1.34 31.62 1.47 31.67 ; + RECT 4.47 31.62 4.6 31.67 ; + RECT 9.275 31.62 9.405 31.67 ; + RECT 3.8 32.035 3.93 32.085 ; + RECT 5.635 32.035 5.765 32.085 ; + RECT 8.31 32.035 8.44 32.085 ; + RECT 8.73 32.035 8.86 32.085 ; + RECT 0.9 32.06 0.95 32.19 ; + RECT 2.485 32.06 2.535 32.19 ; + RECT 2.615 32.06 2.665 32.19 ; + RECT 6.065 32.06 6.115 32.19 ; + RECT 6.725 32.06 6.775 32.19 ; + RECT 11.555 32.06 11.865 32.19 ; + RECT 12.52 32.06 12.57 32.19 ; + RECT 14.005 32.06 14.055 32.19 ; + RECT 3.8 32.165 3.93 32.215 ; + RECT 5.635 32.165 5.765 32.215 ; + RECT 8.31 32.165 8.44 32.215 ; + RECT 8.73 32.165 8.86 32.215 ; + RECT 3.02 32.49 3.15 32.54 ; + RECT 1.57 32.515 1.62 32.645 ; + RECT 4.87 32.515 4.92 32.645 ; + RECT 5.9 32.515 5.95 32.645 ; + RECT 8.955 32.515 9.005 32.645 ; + RECT 12.79 32.515 12.84 32.645 ; + RECT 14.335 32.515 14.385 32.645 ; + RECT 3.02 32.62 3.15 32.67 ; + RECT 4.035 33.01 4.085 33.14 ; + RECT 6.495 33.01 6.545 33.14 ; + RECT 11.685 33.01 11.735 33.14 ; + RECT 12.655 33.01 12.705 33.14 ; + RECT 3.02 33.475 3.15 33.525 ; + RECT 1.57 33.5 1.62 33.63 ; + RECT 4.87 33.5 4.92 33.63 ; + RECT 5.9 33.5 5.95 33.63 ; + RECT 8.955 33.5 9.005 33.63 ; + RECT 12.79 33.5 12.84 33.63 ; + RECT 14.335 33.5 14.385 33.63 ; + RECT 3.02 33.605 3.15 33.655 ; + RECT 14.29 33.785 14.42 33.835 ; + RECT 4.035 33.99 4.085 34.12 ; + RECT 6.495 33.99 6.545 34.12 ; + RECT 2.18 34.485 2.23 34.615 ; + RECT 8.56 34.485 8.61 34.615 ; + RECT 10.27 34.485 10.32 34.615 ; + RECT 3.8 34.95 3.93 35 ; + RECT 5.635 34.95 5.765 35 ; + RECT 8.31 34.95 8.44 35 ; + RECT 8.73 34.95 8.86 35 ; + RECT 0.9 34.975 0.95 35.105 ; + RECT 2.485 34.975 2.535 35.105 ; + RECT 2.615 34.975 2.665 35.105 ; + RECT 6.065 34.975 6.115 35.105 ; + RECT 6.725 34.975 6.775 35.105 ; + RECT 11.555 34.975 11.865 35.105 ; + RECT 12.52 34.975 12.57 35.105 ; + RECT 14.005 34.975 14.055 35.105 ; + RECT 3.8 35.08 3.93 35.13 ; + RECT 5.635 35.08 5.765 35.13 ; + RECT 8.31 35.08 8.44 35.13 ; + RECT 8.73 35.08 8.86 35.13 ; + RECT 1.045 35.445 1.175 35.495 ; + RECT 1.34 35.445 1.47 35.495 ; + RECT 4.47 35.445 4.6 35.495 ; + RECT 1.86 35.47 1.91 35.6 ; + RECT 2.01 35.47 2.06 35.6 ; + RECT 2.32 35.47 2.37 35.6 ; + RECT 3.25 35.47 3.3 35.6 ; + RECT 3.515 35.47 3.565 35.6 ; + RECT 5.035 35.47 5.085 35.6 ; + RECT 6.22 35.47 6.27 35.6 ; + RECT 7.5 35.47 7.55 35.6 ; + RECT 9.72 35.47 9.77 35.6 ; + RECT 11.025 35.47 11.075 35.6 ; + RECT 1.045 35.575 1.175 35.625 ; + RECT 1.34 35.575 1.47 35.625 ; + RECT 4.47 35.575 4.6 35.625 ; + RECT 3.8 35.935 3.93 35.985 ; + RECT 5.635 35.935 5.765 35.985 ; + RECT 8.31 35.935 8.44 35.985 ; + RECT 8.73 35.935 8.86 35.985 ; + RECT 0.9 35.96 0.95 36.09 ; + RECT 2.485 35.96 2.535 36.09 ; + RECT 2.615 35.96 2.665 36.09 ; + RECT 6.065 35.96 6.115 36.09 ; + RECT 6.725 35.96 6.775 36.09 ; + RECT 11.555 35.96 11.865 36.09 ; + RECT 12.52 35.96 12.57 36.09 ; + RECT 14.005 35.96 14.055 36.09 ; + RECT 3.8 36.065 3.93 36.115 ; + RECT 5.635 36.065 5.765 36.115 ; + RECT 8.31 36.065 8.44 36.115 ; + RECT 8.73 36.065 8.86 36.115 ; + RECT 3.02 36.43 3.15 36.48 ; + RECT 1.57 36.455 1.62 36.585 ; + RECT 4.87 36.455 4.92 36.585 ; + RECT 5.9 36.455 5.95 36.585 ; + RECT 9.195 36.455 9.245 36.585 ; + RECT 10.27 36.455 10.32 36.585 ; + RECT 12.79 36.455 12.84 36.585 ; + RECT 14.335 36.455 14.385 36.585 ; + RECT 3.02 36.56 3.15 36.61 ; + RECT 4.035 36.945 4.085 37.075 ; + RECT 3.02 37.41 3.15 37.46 ; + RECT 1.57 37.435 1.62 37.565 ; + RECT 4.87 37.435 4.92 37.565 ; + RECT 5.9 37.435 5.95 37.565 ; + RECT 9.195 37.435 9.245 37.565 ; + RECT 9.43 37.435 9.48 37.565 ; + RECT 10.27 37.435 10.32 37.565 ; + RECT 12.79 37.435 12.84 37.565 ; + RECT 14.335 37.435 14.385 37.565 ; + RECT 3.02 37.54 3.15 37.59 ; + RECT 0.9 37.905 14.055 38.085 ; + RECT 3.02 38.395 3.15 38.445 ; + RECT 1.57 38.42 1.62 38.55 ; + RECT 4.87 38.42 4.92 38.55 ; + RECT 5.9 38.42 5.95 38.55 ; + RECT 9.43 38.42 9.48 38.55 ; + RECT 10.27 38.42 10.32 38.55 ; + RECT 12.79 38.42 12.84 38.55 ; + RECT 14.33 38.42 14.38 38.55 ; + RECT 3.02 38.525 3.15 38.575 ; + RECT 3.8 38.885 3.93 38.935 ; + RECT 5.635 38.885 5.765 38.935 ; + RECT 8.31 38.885 8.44 38.935 ; + RECT 8.73 38.885 8.86 38.935 ; + RECT 0.9 38.91 0.95 39.04 ; + RECT 2.485 38.91 2.535 39.04 ; + RECT 2.615 38.91 2.665 39.04 ; + RECT 6.065 38.91 6.115 39.04 ; + RECT 6.725 38.91 6.775 39.04 ; + RECT 11.555 38.91 11.865 39.04 ; + RECT 12.52 38.91 12.57 39.04 ; + RECT 14.005 38.91 14.055 39.04 ; + RECT 3.8 39.015 3.93 39.065 ; + RECT 5.635 39.015 5.765 39.065 ; + RECT 8.31 39.015 8.44 39.065 ; + RECT 8.73 39.015 8.86 39.065 ; + RECT 1.045 39.38 1.175 39.43 ; + RECT 1.34 39.38 1.47 39.43 ; + RECT 4.47 39.38 4.6 39.43 ; + RECT 1.86 39.405 1.91 39.535 ; + RECT 2.01 39.405 2.06 39.535 ; + RECT 2.32 39.405 2.37 39.535 ; + RECT 3.25 39.405 3.3 39.535 ; + RECT 3.515 39.405 3.565 39.535 ; + RECT 5.035 39.405 5.085 39.535 ; + RECT 6.22 39.405 6.27 39.535 ; + RECT 7.5 39.405 7.55 39.535 ; + RECT 9.72 39.405 9.77 39.535 ; + RECT 11.025 39.405 11.075 39.535 ; + RECT 1.045 39.51 1.175 39.56 ; + RECT 1.34 39.51 1.47 39.56 ; + RECT 4.47 39.51 4.6 39.56 ; + RECT 3.8 39.87 3.93 39.92 ; + RECT 5.635 39.87 5.765 39.92 ; + RECT 8.31 39.87 8.44 39.92 ; + RECT 8.73 39.87 8.86 39.92 ; + RECT 0.9 39.895 0.95 40.025 ; + RECT 2.485 39.895 2.535 40.025 ; + RECT 2.615 39.895 2.665 40.025 ; + RECT 6.065 39.895 6.115 40.025 ; + RECT 6.725 39.895 6.775 40.025 ; + RECT 11.555 39.895 11.865 40.025 ; + RECT 12.52 39.895 12.57 40.025 ; + RECT 14.005 39.895 14.055 40.025 ; + RECT 3.8 40 3.93 40.05 ; + RECT 5.635 40 5.765 40.05 ; + RECT 8.31 40 8.44 40.05 ; + RECT 8.73 40 8.86 40.05 ; + RECT 3.02 40.365 3.15 40.415 ; + RECT 1.57 40.39 1.62 40.52 ; + RECT 4.87 40.39 4.92 40.52 ; + RECT 5.9 40.39 5.95 40.52 ; + RECT 6.375 40.39 6.425 40.52 ; + RECT 10.27 40.39 10.32 40.52 ; + RECT 12.65 40.39 12.84 40.52 ; + RECT 14.33 40.39 14.38 40.52 ; + RECT 3.02 40.495 3.15 40.545 ; + RECT 4.035 40.88 4.085 41.01 ; + RECT 6.835 41.165 6.885 41.215 ; + RECT 3.02 41.345 3.15 41.395 ; + RECT 1.57 41.37 1.62 41.5 ; + RECT 4.87 41.37 4.92 41.5 ; + RECT 5.9 41.37 5.95 41.5 ; + RECT 6.375 41.37 6.425 41.5 ; + RECT 7.015 41.37 7.065 41.5 ; + RECT 10.27 41.37 10.32 41.5 ; + RECT 12.79 41.37 12.84 41.5 ; + RECT 14.33 41.37 14.38 41.5 ; + RECT 3.02 41.475 3.15 41.525 ; + RECT 4.035 41.865 4.085 41.995 ; + RECT 3.02 42.33 3.15 42.38 ; + RECT 1.57 42.355 1.62 42.485 ; + RECT 4.87 42.355 4.92 42.485 ; + RECT 5.9 42.355 5.95 42.485 ; + RECT 6.375 42.355 6.425 42.485 ; + RECT 7.015 42.355 7.065 42.485 ; + RECT 10.27 42.355 10.32 42.485 ; + RECT 12.79 42.355 12.84 42.485 ; + RECT 14.33 42.355 14.38 42.485 ; + RECT 3.02 42.46 3.15 42.51 ; + RECT 0.9 42.85 0.95 42.98 ; + RECT 2.485 42.85 2.535 42.98 ; + RECT 2.615 42.85 2.665 42.98 ; + RECT 6.065 42.85 6.115 42.98 ; + RECT 6.675 42.85 6.725 42.98 ; + RECT 11.555 42.85 11.865 42.98 ; + RECT 12.52 42.85 12.57 42.98 ; + RECT 14.005 42.85 14.055 42.98 ; + RECT 3.8 42.89 3.93 42.94 ; + RECT 5.635 42.89 5.765 42.94 ; + RECT 8.31 42.89 8.44 42.94 ; + RECT 8.73 42.89 8.86 42.94 ; + RECT 9.315 43.135 9.445 43.185 ; + RECT 1.045 43.315 1.175 43.365 ; + RECT 1.34 43.315 1.47 43.365 ; + RECT 4.47 43.315 4.6 43.365 ; + RECT 1.86 43.34 1.91 43.47 ; + RECT 2.01 43.34 2.06 43.47 ; + RECT 2.32 43.34 2.37 43.47 ; + RECT 3.25 43.34 3.3 43.47 ; + RECT 3.515 43.34 3.565 43.47 ; + RECT 5.035 43.34 5.085 43.47 ; + RECT 6.22 43.34 6.27 43.47 ; + RECT 7.5 43.34 7.55 43.47 ; + RECT 9.72 43.34 9.77 43.47 ; + RECT 11.025 43.34 11.075 43.47 ; + RECT 1.045 43.445 1.175 43.495 ; + RECT 1.34 43.445 1.47 43.495 ; + RECT 4.47 43.445 4.6 43.495 ; + RECT 0.62 43.835 0.67 43.965 ; + RECT 3.65 43.835 3.7 43.965 ; + RECT 7.19 43.835 7.24 43.965 ; + RECT 14.14 43.835 14.19 43.965 ; + RECT 3.02 44.305 3.15 44.355 ; + RECT 1.57 44.33 1.62 44.46 ; + RECT 4.87 44.33 4.92 44.46 ; + RECT 5.9 44.33 5.95 44.46 ; + RECT 6.375 44.33 6.425 44.46 ; + RECT 7.015 44.33 7.065 44.46 ; + RECT 10.27 44.33 10.32 44.46 ; + RECT 12.79 44.33 12.84 44.46 ; + RECT 14.335 44.33 14.385 44.46 ; + RECT 3.02 44.435 3.15 44.485 ; + RECT 4.035 44.815 4.085 44.945 ; + RECT 11.685 44.815 11.735 44.945 ; + RECT 13.9 44.815 13.95 44.945 ; + RECT 3.02 45.285 3.15 45.335 ; + RECT 1.57 45.31 1.62 45.44 ; + RECT 4.87 45.31 4.92 45.44 ; + RECT 5.9 45.31 5.95 45.44 ; + RECT 6.375 45.31 6.425 45.44 ; + RECT 7.015 45.31 7.065 45.44 ; + RECT 10.27 45.31 10.32 45.44 ; + RECT 12.79 45.31 12.84 45.44 ; + RECT 14.335 45.31 14.385 45.44 ; + RECT 3.02 45.415 3.15 45.465 ; + RECT 13.8 45.785 13.85 45.915 ; + RECT 13.675 46.41 13.725 46.54 ; + RECT 1.085 46.465 1.135 46.595 ; + RECT 1.38 46.465 1.43 46.595 ; + RECT 1.86 46.465 1.91 46.595 ; + RECT 2.01 46.465 2.06 46.595 ; + RECT 2.32 46.465 2.37 46.595 ; + RECT 3.25 46.465 3.3 46.595 ; + RECT 3.515 46.465 3.565 46.595 ; + RECT 4.51 46.465 4.56 46.595 ; + RECT 5.035 46.465 5.085 46.595 ; + RECT 6.22 46.465 6.27 46.595 ; + RECT 7.5 46.465 7.55 46.595 ; + RECT 9.72 46.465 9.77 46.595 ; + RECT 11.025 46.465 11.075 46.595 ; + RECT 3.8 46.76 3.93 46.81 ; + RECT 5.635 46.76 5.765 46.81 ; + RECT 8.31 46.76 8.44 46.81 ; + RECT 8.73 46.76 8.86 46.81 ; + RECT 0.9 46.785 0.95 46.915 ; + RECT 2.485 46.785 2.535 46.915 ; + RECT 2.615 46.785 2.665 46.915 ; + RECT 6.065 46.785 6.115 46.915 ; + RECT 6.675 46.785 6.725 46.915 ; + RECT 11.555 46.785 11.865 46.915 ; + RECT 12.52 46.785 12.57 46.915 ; + RECT 14.005 46.785 14.055 46.915 ; + RECT 3.8 46.89 3.93 46.94 ; + RECT 5.635 46.89 5.765 46.94 ; + RECT 8.31 46.89 8.44 46.94 ; + RECT 8.73 46.89 8.86 46.94 ; + RECT 13.9 47.07 13.95 47.12 ; + RECT 1.045 47.25 1.175 47.3 ; + RECT 1.34 47.25 1.47 47.3 ; + RECT 4.47 47.25 4.6 47.3 ; + RECT 1.86 47.275 1.91 47.405 ; + RECT 2.01 47.275 2.06 47.405 ; + RECT 2.32 47.275 2.37 47.405 ; + RECT 3.25 47.275 3.3 47.405 ; + RECT 3.515 47.275 3.565 47.405 ; + RECT 5.035 47.275 5.085 47.405 ; + RECT 6.22 47.275 6.27 47.405 ; + RECT 7.5 47.275 7.55 47.405 ; + RECT 9.72 47.275 9.77 47.405 ; + RECT 11.025 47.275 11.075 47.405 ; + RECT 1.045 47.38 1.175 47.43 ; + RECT 1.34 47.38 1.47 47.43 ; + RECT 4.47 47.38 4.6 47.43 ; + RECT 13.9 47.565 13.95 47.615 ; + RECT 3.8 47.745 3.93 47.795 ; + RECT 5.635 47.745 5.765 47.795 ; + RECT 8.31 47.745 8.44 47.795 ; + RECT 8.73 47.745 8.86 47.795 ; + RECT 0.9 47.77 0.95 47.9 ; + RECT 2.485 47.77 2.535 47.9 ; + RECT 2.615 47.77 2.665 47.9 ; + RECT 6.065 47.77 6.115 47.9 ; + RECT 6.675 47.77 6.725 47.9 ; + RECT 10.12 47.77 10.17 47.9 ; + RECT 11.555 47.77 11.865 47.9 ; + RECT 12.52 47.77 12.57 47.9 ; + RECT 14.005 47.77 14.055 47.9 ; + RECT 3.8 47.875 3.93 47.925 ; + RECT 5.635 47.875 5.765 47.925 ; + RECT 8.31 47.875 8.44 47.925 ; + RECT 8.73 47.875 8.86 47.925 ; + RECT 3.02 48.235 3.15 48.285 ; + RECT 1.57 48.26 1.62 48.39 ; + RECT 4.87 48.26 4.92 48.39 ; + RECT 5.9 48.26 5.95 48.39 ; + RECT 6.375 48.26 6.425 48.39 ; + RECT 7.015 48.26 7.065 48.39 ; + RECT 9.11 48.26 9.16 48.39 ; + RECT 10.27 48.26 10.32 48.39 ; + RECT 12.79 48.26 12.84 48.39 ; + RECT 14.335 48.26 14.385 48.39 ; + RECT 3.02 48.365 3.15 48.415 ; + RECT 4.035 48.75 4.085 48.88 ; + RECT 13.9 48.75 13.95 48.88 ; + RECT 7.19 49.04 7.24 49.09 ; + RECT 12.655 49.04 12.705 49.09 ; + RECT 4.035 49.245 4.085 49.375 ; + RECT 13.9 49.245 13.95 49.375 ; + RECT 3.02 49.71 3.15 49.76 ; + RECT 1.57 49.735 1.62 49.865 ; + RECT 4.87 49.735 4.92 49.865 ; + RECT 5.9 49.735 5.95 49.865 ; + RECT 6.375 49.735 6.425 49.865 ; + RECT 7.015 49.735 7.065 49.865 ; + RECT 9.11 49.735 9.16 49.865 ; + RECT 10.27 49.735 10.32 49.865 ; + RECT 12.79 49.735 12.84 49.865 ; + RECT 14.335 49.735 14.385 49.865 ; + RECT 3.02 49.84 3.15 49.89 ; + RECT 3.8 50.205 3.93 50.255 ; + RECT 4.22 50.205 4.35 50.255 ; + RECT 5.635 50.205 5.765 50.255 ; + RECT 8.31 50.205 8.44 50.255 ; + RECT 8.73 50.205 8.86 50.255 ; + RECT 0.9 50.23 0.95 50.36 ; + RECT 2.485 50.23 2.535 50.36 ; + RECT 2.615 50.23 2.665 50.36 ; + RECT 6.065 50.23 6.115 50.36 ; + RECT 6.675 50.23 6.725 50.36 ; + RECT 10.12 50.23 10.17 50.36 ; + RECT 11.555 50.23 11.865 50.36 ; + RECT 12.52 50.23 12.57 50.36 ; + RECT 14.005 50.23 14.055 50.36 ; + RECT 3.8 50.335 3.93 50.385 ; + RECT 4.22 50.335 4.35 50.385 ; + RECT 5.635 50.335 5.765 50.385 ; + RECT 8.31 50.335 8.44 50.385 ; + RECT 8.73 50.335 8.86 50.385 ; + RECT 13.9 50.515 13.95 50.565 ; + RECT 1.045 50.695 1.175 50.745 ; + RECT 1.34 50.695 1.47 50.745 ; + RECT 4.47 50.695 4.6 50.745 ; + RECT 1.86 50.72 1.91 50.85 ; + RECT 2.01 50.72 2.06 50.85 ; + RECT 2.32 50.72 2.37 50.85 ; + RECT 3.25 50.72 3.3 50.85 ; + RECT 3.515 50.72 3.565 50.85 ; + RECT 5.035 50.72 5.085 50.85 ; + RECT 6.22 50.72 6.27 50.85 ; + RECT 7.5 50.72 7.55 50.85 ; + RECT 9.72 50.72 9.77 50.85 ; + RECT 11.025 50.72 11.075 50.85 ; + RECT 1.045 50.825 1.175 50.875 ; + RECT 1.34 50.825 1.47 50.875 ; + RECT 4.47 50.825 4.6 50.875 ; + RECT 13.9 51.005 13.95 51.055 ; + RECT 0.9 51.185 14.055 51.365 ; + RECT 13.675 51.525 13.725 51.655 ; + RECT 1.085 51.53 1.135 51.66 ; + RECT 1.38 51.53 1.43 51.66 ; + RECT 1.86 51.53 1.91 51.66 ; + RECT 2.01 51.53 2.06 51.66 ; + RECT 2.32 51.53 2.37 51.66 ; + RECT 3.25 51.53 3.3 51.66 ; + RECT 3.515 51.53 3.565 51.66 ; + RECT 4.51 51.53 4.56 51.66 ; + RECT 5.035 51.53 5.085 51.66 ; + RECT 6.22 51.53 6.27 51.66 ; + RECT 7.5 51.53 7.55 51.66 ; + RECT 9.72 51.53 9.77 51.66 ; + RECT 11.025 51.53 11.075 51.66 ; + RECT 13.8 52.21 13.85 52.34 ; + RECT 3.02 52.66 3.15 52.71 ; + RECT 1.57 52.685 1.62 52.815 ; + RECT 4.87 52.685 4.92 52.815 ; + RECT 6.375 52.685 6.425 52.815 ; + RECT 7.015 52.685 7.065 52.815 ; + RECT 10.27 52.685 10.32 52.815 ; + RECT 12.79 52.685 12.84 52.815 ; + RECT 14.33 52.685 14.38 52.815 ; + RECT 3.02 52.79 3.15 52.84 ; + RECT 4.035 53.18 4.085 53.31 ; + RECT 12.655 53.18 12.705 53.31 ; + RECT 13.9 53.18 13.95 53.31 ; + RECT 3.02 53.65 3.15 53.7 ; + RECT 1.57 53.675 1.62 53.805 ; + RECT 4.87 53.675 4.92 53.805 ; + RECT 6.375 53.675 6.425 53.805 ; + RECT 7.015 53.675 7.065 53.805 ; + RECT 10.27 53.675 10.32 53.805 ; + RECT 12.79 53.675 12.84 53.805 ; + RECT 14.33 53.675 14.38 53.805 ; + RECT 3.02 53.78 3.15 53.83 ; + RECT 0.62 54.165 0.67 54.295 ; + RECT 3.65 54.165 3.7 54.295 ; + RECT 7.19 54.165 7.24 54.295 ; + RECT 14.14 54.165 14.19 54.295 ; + RECT 6.85 54.45 6.9 54.5 ; + RECT 1.045 54.63 1.175 54.68 ; + RECT 1.34 54.63 1.47 54.68 ; + RECT 4.47 54.63 4.6 54.68 ; + RECT 1.86 54.655 1.91 54.785 ; + RECT 2.01 54.655 2.06 54.785 ; + RECT 2.32 54.655 2.37 54.785 ; + RECT 3.25 54.655 3.3 54.785 ; + RECT 3.515 54.655 3.565 54.785 ; + RECT 5.035 54.655 5.085 54.785 ; + RECT 6.22 54.655 6.27 54.785 ; + RECT 7.5 54.655 7.55 54.785 ; + RECT 9.72 54.655 9.77 54.785 ; + RECT 11.025 54.655 11.075 54.785 ; + RECT 1.045 54.76 1.175 54.81 ; + RECT 1.34 54.76 1.47 54.81 ; + RECT 4.47 54.76 4.6 54.81 ; + RECT 0.9 55.125 14.055 55.305 ; + RECT 3.02 55.615 3.15 55.665 ; + RECT 1.57 55.64 1.62 55.77 ; + RECT 4.87 55.64 4.92 55.77 ; + RECT 6.375 55.64 6.425 55.77 ; + RECT 7.015 55.64 7.065 55.77 ; + RECT 10.27 55.64 10.32 55.77 ; + RECT 12.79 55.64 12.84 55.77 ; + RECT 14.33 55.64 14.38 55.77 ; + RECT 3.02 55.745 3.15 55.795 ; + RECT 4.035 56.135 4.085 56.265 ; + RECT 12.655 56.135 12.705 56.265 ; + RECT 13.9 56.135 13.95 56.265 ; + RECT 3.02 56.6 3.15 56.65 ; + RECT 1.57 56.625 1.62 56.755 ; + RECT 4.87 56.625 4.92 56.755 ; + RECT 6.375 56.625 6.425 56.755 ; + RECT 7.015 56.625 7.065 56.755 ; + RECT 10.27 56.625 10.32 56.755 ; + RECT 12.79 56.625 12.84 56.755 ; + RECT 14.33 56.625 14.38 56.755 ; + RECT 3.02 56.73 3.15 56.78 ; + RECT 6.85 56.91 6.9 56.96 ; + RECT 4.035 57.115 4.085 57.245 ; + RECT 12.655 57.115 12.705 57.245 ; + RECT 3.02 57.585 3.15 57.635 ; + RECT 1.57 57.61 1.62 57.74 ; + RECT 4.87 57.61 4.92 57.74 ; + RECT 6.375 57.61 6.425 57.74 ; + RECT 10.27 57.61 10.32 57.74 ; + RECT 12.79 57.61 12.84 57.74 ; + RECT 14.33 57.61 14.38 57.74 ; + RECT 3.02 57.715 3.15 57.765 ; + RECT 3.8 58.075 3.93 58.125 ; + RECT 5.635 58.075 5.765 58.125 ; + RECT 8.31 58.075 8.44 58.125 ; + RECT 8.73 58.075 8.86 58.125 ; + RECT 0.9 58.1 0.95 58.23 ; + RECT 2.485 58.1 2.535 58.23 ; + RECT 2.615 58.1 2.665 58.23 ; + RECT 6.065 58.1 6.115 58.23 ; + RECT 6.725 58.1 6.775 58.23 ; + RECT 11.555 58.1 12.57 58.23 ; + RECT 14.005 58.1 14.055 58.23 ; + RECT 3.8 58.205 3.93 58.255 ; + RECT 5.635 58.205 5.765 58.255 ; + RECT 8.31 58.205 8.44 58.255 ; + RECT 8.73 58.205 8.86 58.255 ; + RECT 1.045 58.57 1.175 58.62 ; + RECT 1.34 58.57 1.47 58.62 ; + RECT 4.47 58.57 4.6 58.62 ; + RECT 9.275 58.57 9.405 58.62 ; + RECT 1.86 58.595 1.91 58.725 ; + RECT 2.01 58.595 2.06 58.725 ; + RECT 2.32 58.595 2.37 58.725 ; + RECT 3.25 58.595 3.3 58.725 ; + RECT 3.515 58.595 3.565 58.725 ; + RECT 6.22 58.595 6.27 58.725 ; + RECT 7.5 58.595 7.55 58.725 ; + RECT 9.72 58.595 9.77 58.725 ; + RECT 11.025 58.595 11.075 58.725 ; + RECT 1.045 58.7 1.175 58.75 ; + RECT 1.34 58.7 1.47 58.75 ; + RECT 4.47 58.7 4.6 58.75 ; + RECT 9.275 58.7 9.405 58.75 ; + RECT 3.8 59.06 3.93 59.11 ; + RECT 5.635 59.06 5.765 59.11 ; + RECT 8.31 59.06 8.44 59.11 ; + RECT 8.73 59.06 8.86 59.11 ; + RECT 0.9 59.085 0.95 59.215 ; + RECT 2.485 59.085 2.535 59.215 ; + RECT 2.615 59.085 2.665 59.215 ; + RECT 6.065 59.085 6.115 59.215 ; + RECT 6.725 59.085 6.775 59.215 ; + RECT 11.555 59.085 11.865 59.215 ; + RECT 12.52 59.085 12.57 59.215 ; + RECT 14.005 59.085 14.055 59.215 ; + RECT 3.8 59.19 3.93 59.24 ; + RECT 5.635 59.19 5.765 59.24 ; + RECT 8.31 59.19 8.44 59.24 ; + RECT 8.73 59.19 8.86 59.24 ; + RECT 3.02 59.55 3.15 59.6 ; + RECT 1.57 59.575 1.62 59.705 ; + RECT 4.87 59.575 4.92 59.705 ; + RECT 6.375 59.575 6.425 59.705 ; + RECT 10.27 59.575 10.32 59.705 ; + RECT 12.79 59.575 12.84 59.705 ; + RECT 14.33 59.575 14.38 59.705 ; + RECT 3.02 59.68 3.15 59.73 ; + RECT 0.9 60.045 14.055 60.225 ; + RECT 3.02 60.535 3.15 60.585 ; + RECT 1.57 60.56 1.62 60.69 ; + RECT 4.87 60.56 4.92 60.69 ; + RECT 6.375 60.56 6.425 60.69 ; + RECT 10.27 60.56 10.32 60.69 ; + RECT 12.79 60.56 12.84 60.69 ; + RECT 14.33 60.56 14.38 60.69 ; + RECT 3.02 60.665 3.15 60.715 ; + RECT 12.655 61.045 12.705 61.175 ; + RECT 4.035 61.055 4.085 61.185 ; + RECT 3.02 61.52 3.15 61.57 ; + RECT 1.57 61.545 1.62 61.675 ; + RECT 4.87 61.545 4.92 61.675 ; + RECT 6.375 61.545 6.425 61.675 ; + RECT 10.27 61.545 10.32 61.675 ; + RECT 12.79 61.545 12.84 61.675 ; + RECT 14.33 61.545 14.38 61.675 ; + RECT 3.02 61.65 3.15 61.7 ; + RECT 0.9 62.01 14.055 62.19 ; + RECT 14.29 62.32 14.42 62.37 ; + RECT 1.045 62.505 1.175 62.555 ; + RECT 1.34 62.505 1.47 62.555 ; + RECT 4.47 62.505 4.6 62.555 ; + RECT 9.275 62.505 9.405 62.555 ; + RECT 1.86 62.53 1.91 62.66 ; + RECT 2.01 62.53 2.06 62.66 ; + RECT 2.32 62.53 2.37 62.66 ; + RECT 3.25 62.53 3.3 62.66 ; + RECT 3.515 62.53 3.565 62.66 ; + RECT 6.22 62.53 6.27 62.66 ; + RECT 7.5 62.53 7.55 62.66 ; + RECT 9.72 62.53 9.77 62.66 ; + RECT 11.025 62.53 11.075 62.66 ; + RECT 1.045 62.635 1.175 62.685 ; + RECT 1.34 62.635 1.47 62.685 ; + RECT 4.47 62.635 4.6 62.685 ; + RECT 9.275 62.635 9.405 62.685 ; + RECT 0.9 62.815 0.95 62.865 ; + RECT 2.51 62.815 2.64 62.865 ; + RECT 0.9 62.995 14.055 63.175 ; + RECT 2.18 63.515 2.23 63.645 ; + RECT 8.56 63.515 8.61 63.645 ; + RECT 10.27 63.515 10.32 63.645 ; + RECT 4.035 64.005 4.085 64.135 ; + RECT 3.02 64.47 3.15 64.52 ; + RECT 1.57 64.495 1.62 64.625 ; + RECT 4.87 64.495 4.92 64.625 ; + RECT 6.375 64.495 6.425 64.625 ; + RECT 11.69 64.495 11.74 64.625 ; + RECT 12.79 64.495 12.84 64.625 ; + RECT 12.79 64.495 12.84 64.625 ; + RECT 14.33 64.495 14.38 64.625 ; + RECT 3.02 64.6 3.15 64.65 ; + RECT 4.035 64.955 4.085 65.085 ; + RECT 12.655 64.955 12.705 65.085 ; + RECT 3.02 65.455 3.15 65.505 ; + RECT 1.57 65.48 1.62 65.61 ; + RECT 4.87 65.48 4.92 65.61 ; + RECT 6.375 65.48 6.425 65.61 ; + RECT 11.69 65.48 11.74 65.61 ; + RECT 12.79 65.48 12.84 65.61 ; + RECT 12.79 65.48 12.84 65.61 ; + RECT 14.33 65.48 14.38 65.61 ; + RECT 3.02 65.585 3.15 65.635 ; + RECT 0.9 65.915 14.055 66.095 ; + RECT 1.045 66.455 1.175 66.505 ; + RECT 1.34 66.455 1.47 66.505 ; + RECT 4.47 66.455 4.6 66.505 ; + RECT 9.275 66.455 9.405 66.505 ; + RECT 1.86 66.48 1.91 66.61 ; + RECT 2.01 66.48 2.06 66.61 ; + RECT 3.25 66.48 3.3 66.61 ; + RECT 3.515 66.48 3.565 66.61 ; + RECT 6.22 66.48 6.27 66.61 ; + RECT 7.5 66.48 7.55 66.61 ; + RECT 9.72 66.48 9.77 66.61 ; + RECT 11.025 66.48 11.075 66.61 ; + RECT 1.045 66.585 1.175 66.635 ; + RECT 1.34 66.585 1.47 66.635 ; + RECT 4.47 66.585 4.6 66.635 ; + RECT 9.275 66.585 9.405 66.635 ; + RECT 12.655 66.755 12.705 66.805 ; + RECT 1.045 66.93 1.175 66.98 ; + RECT 1.34 66.93 1.47 66.98 ; + RECT 4.47 66.93 4.6 66.98 ; + RECT 9.275 66.93 9.405 66.98 ; + RECT 1.86 66.955 1.91 67.085 ; + RECT 2.01 66.955 2.06 67.085 ; + RECT 3.25 66.955 3.3 67.085 ; + RECT 3.515 66.955 3.565 67.085 ; + RECT 6.22 66.955 6.27 67.085 ; + RECT 7.5 66.955 7.55 67.085 ; + RECT 9.72 66.955 9.77 67.085 ; + RECT 11.025 66.955 11.075 67.085 ; + RECT 13.675 66.955 13.725 67.085 ; + RECT 1.045 67.06 1.175 67.11 ; + RECT 1.34 67.06 1.47 67.11 ; + RECT 4.47 67.06 4.6 67.11 ; + RECT 9.275 67.06 9.405 67.11 ; + RECT 3.02 67.425 3.15 67.475 ; + RECT 1.57 67.45 1.62 67.58 ; + RECT 4.87 67.45 4.92 67.58 ; + RECT 6.375 67.45 6.425 67.58 ; + RECT 8.975 67.45 9.025 67.58 ; + RECT 11.69 67.45 11.74 67.58 ; + RECT 12.79 67.45 12.84 67.58 ; + RECT 14.33 67.45 14.38 67.58 ; + RECT 3.02 67.555 3.15 67.605 ; + RECT 12.655 67.735 12.705 67.785 ; + RECT 0.9 67.915 14.055 68.095 ; + RECT 1.57 68.435 1.62 68.565 ; + RECT 4.87 68.435 4.92 68.565 ; + RECT 6.375 68.435 6.425 68.565 ; + RECT 8.975 68.435 9.025 68.565 ; + RECT 11.69 68.435 11.74 68.565 ; + RECT 12.79 68.435 12.84 68.565 ; + RECT 14.33 68.435 14.38 68.565 ; + RECT 3.02 68.475 3.15 68.525 ; + RECT 1.045 68.72 1.175 68.77 ; + RECT 1.34 68.72 1.47 68.77 ; + RECT 4.47 68.72 4.6 68.77 ; + RECT 9.275 68.72 9.405 68.77 ; + RECT 1.86 68.745 1.91 68.875 ; + RECT 2.01 68.745 2.06 68.875 ; + RECT 3.25 68.745 3.3 68.875 ; + RECT 3.515 68.745 3.565 68.875 ; + RECT 6.22 68.745 6.27 68.875 ; + RECT 7.5 68.745 7.55 68.875 ; + RECT 9.72 68.745 9.77 68.875 ; + RECT 11.025 68.745 11.075 68.875 ; + RECT 1.045 68.85 1.175 68.9 ; + RECT 1.34 68.85 1.47 68.9 ; + RECT 4.47 68.85 4.6 68.9 ; + RECT 9.275 68.85 9.405 68.9 ; + RECT 13.8 69.225 13.85 69.355 ; + RECT 2.18 69.455 2.23 69.585 ; + RECT 8.56 69.455 8.61 69.585 ; + RECT 10.27 69.455 10.32 69.585 ; + RECT 0.62 69.685 0.67 69.815 ; + RECT 3.65 69.685 3.7 69.815 ; + RECT 7.19 69.685 7.24 69.815 ; + RECT 14.14 69.685 14.19 69.815 ; + RECT 1.085 69.915 1.135 70.045 ; + RECT 1.38 69.915 1.43 70.045 ; + RECT 1.86 69.915 1.91 70.045 ; + RECT 2.01 69.915 2.06 70.045 ; + RECT 3.25 69.915 3.3 70.045 ; + RECT 3.515 69.915 3.565 70.045 ; + RECT 4.51 69.915 4.56 70.045 ; + RECT 6.22 69.915 6.27 70.045 ; + RECT 7.5 69.915 7.55 70.045 ; + RECT 9.315 69.915 9.365 70.045 ; + RECT 9.72 69.915 9.77 70.045 ; + RECT 11.025 69.915 11.075 70.045 ; + RECT 0.435 29.565 0.485 29.695 ; + RECT 0.435 30.545 0.485 30.675 ; + RECT 0.435 32.515 0.485 32.645 ; + RECT 0.435 33.5 0.485 33.63 ; + RECT 0.435 36.455 0.485 36.585 ; + RECT 0.435 37.435 0.485 37.565 ; + RECT 0.435 38.42 0.485 38.55 ; + RECT 0.435 40.39 0.485 40.52 ; + RECT 0.17 41.17 0.22 41.22 ; + RECT 0.435 41.37 0.485 41.5 ; + RECT 0.435 42.355 0.485 42.485 ; + RECT 0.18 43.135 0.23 43.185 ; + RECT 0.435 44.33 0.485 44.46 ; + RECT 0.435 45.31 0.485 45.44 ; + RECT 0.435 48.26 0.485 48.39 ; + RECT 0.435 49.735 0.485 49.865 ; + RECT 0.435 52.685 0.485 52.815 ; + RECT 0.435 53.675 0.485 53.805 ; + RECT 0.18 54.45 0.23 54.5 ; + RECT 0.435 55.64 0.485 55.77 ; + RECT 0.435 56.625 0.485 56.755 ; + RECT 0.17 56.91 0.22 56.96 ; + RECT 0.435 57.61 0.485 57.74 ; + RECT 0.435 59.575 0.485 59.705 ; + RECT 0.435 60.56 0.485 60.69 ; + RECT 0.435 61.545 0.485 61.675 ; + RECT 0.17 62.815 0.22 62.865 ; + RECT 0.435 63.8 0.485 63.85 ; + RECT 0.435 64.29 0.485 64.34 ; + RECT 0.435 64.495 0.485 64.625 ; + RECT 0.435 65.48 0.485 65.61 ; + RECT 0.435 67.45 0.485 67.58 ; + RECT 0.435 68.435 0.485 68.565 ; + RECT 3.06 69.915 3.11 70.045 ; + RECT 4.87 69.915 4.92 70.045 ; + RECT 6.375 69.915 6.425 70.045 ; + RECT 8.975 69.915 9.025 70.045 ; + RECT 12.79 69.915 12.84 70.045 ; + RECT 1.57 28.015 1.62 28.145 ; + RECT 3.06 28.015 3.11 28.145 ; + RECT 4.87 28.015 4.92 28.145 ; + RECT 12.79 28.015 12.84 28.145 ; + RECT 1.57 29.18 1.62 29.31 ; + RECT 3.02 29.155 3.15 29.335 ; + RECT 4.87 29.18 4.92 29.31 ; + RECT 8.955 29.18 9.005 29.31 ; + RECT 12.79 29.18 12.84 29.31 ; + RECT 14.29 29.155 14.42 29.335 ; + RECT 1.045 29.54 1.175 29.72 ; + RECT 1.34 29.54 1.47 29.72 ; + RECT 1.86 29.565 1.91 29.695 ; + RECT 2.01 29.565 2.06 29.695 ; + RECT 3.25 29.565 3.3 29.695 ; + RECT 3.515 29.565 3.565 29.695 ; + RECT 4.47 29.54 4.6 29.72 ; + RECT 5.035 29.565 5.085 29.695 ; + RECT 6.22 29.565 6.27 29.695 ; + RECT 7.5 29.565 7.55 29.695 ; + RECT 9.275 29.54 9.405 29.72 ; + RECT 9.72 29.565 9.77 29.695 ; + RECT 11.025 29.565 11.075 29.695 ; + RECT 1.045 30.52 1.175 30.7 ; + RECT 1.34 30.52 1.47 30.7 ; + RECT 1.86 30.545 1.91 30.675 ; + RECT 2.01 30.545 2.06 30.675 ; + RECT 3.25 30.545 3.3 30.675 ; + RECT 3.515 30.545 3.565 30.675 ; + RECT 4.47 30.52 4.6 30.7 ; + RECT 5.035 30.545 5.085 30.675 ; + RECT 6.22 30.545 6.27 30.675 ; + RECT 7.5 30.545 7.55 30.675 ; + RECT 9.275 30.52 9.405 30.7 ; + RECT 9.72 30.545 9.77 30.675 ; + RECT 11.025 30.545 11.075 30.675 ; + RECT 1.57 31.045 1.62 31.175 ; + RECT 3.02 31.02 3.15 31.2 ; + RECT 4.87 31.045 4.92 31.175 ; + RECT 5.9 31.045 5.95 31.175 ; + RECT 8.955 31.045 9.005 31.175 ; + RECT 1.57 31.515 1.62 31.645 ; + RECT 3.02 31.49 3.15 31.67 ; + RECT 4.87 31.515 4.92 31.645 ; + RECT 5.9 31.515 5.95 31.645 ; + RECT 8.955 31.515 9.005 31.645 ; + RECT 12.79 31.515 12.84 31.645 ; + RECT 1.045 32.49 1.175 32.67 ; + RECT 1.34 32.49 1.47 32.67 ; + RECT 1.86 32.515 1.91 32.645 ; + RECT 2.01 32.515 2.06 32.645 ; + RECT 3.25 32.515 3.3 32.645 ; + RECT 3.515 32.515 3.565 32.645 ; + RECT 4.47 32.49 4.6 32.67 ; + RECT 5.035 32.515 5.085 32.645 ; + RECT 6.22 32.515 6.27 32.645 ; + RECT 7.5 32.515 7.55 32.645 ; + RECT 9.275 32.49 9.405 32.67 ; + RECT 9.72 32.515 9.77 32.645 ; + RECT 11.025 32.515 11.075 32.645 ; + RECT 1.045 33.475 1.175 33.655 ; + RECT 1.34 33.475 1.47 33.655 ; + RECT 1.86 33.5 1.91 33.63 ; + RECT 2.01 33.5 2.06 33.63 ; + RECT 3.25 33.5 3.3 33.63 ; + RECT 3.515 33.5 3.565 33.63 ; + RECT 4.47 33.475 4.6 33.655 ; + RECT 5.035 33.5 5.085 33.63 ; + RECT 6.22 33.5 6.27 33.63 ; + RECT 7.5 33.5 7.55 33.63 ; + RECT 9.72 33.5 9.77 33.63 ; + RECT 11.025 33.5 11.075 33.63 ; + RECT 1.57 35.47 1.62 35.6 ; + RECT 3.02 35.445 3.15 35.625 ; + RECT 4.87 35.47 4.92 35.6 ; + RECT 5.9 35.47 5.95 35.6 ; + RECT 12.79 35.47 12.84 35.6 ; + RECT 14.29 35.445 14.42 35.625 ; + RECT 1.045 36.43 1.175 36.61 ; + RECT 1.34 36.43 1.47 36.61 ; + RECT 1.86 36.455 1.91 36.585 ; + RECT 2.01 36.455 2.06 36.585 ; + RECT 2.32 36.455 2.37 36.585 ; + RECT 3.25 36.455 3.3 36.585 ; + RECT 3.515 36.455 3.565 36.585 ; + RECT 4.47 36.43 4.6 36.61 ; + RECT 5.035 36.455 5.085 36.585 ; + RECT 6.22 36.455 6.27 36.585 ; + RECT 7.5 36.455 7.55 36.585 ; + RECT 9.72 36.455 9.77 36.585 ; + RECT 11.025 36.455 11.075 36.585 ; + RECT 1.045 37.41 1.175 37.59 ; + RECT 1.34 37.41 1.47 37.59 ; + RECT 1.86 37.435 1.91 37.565 ; + RECT 2.01 37.435 2.06 37.565 ; + RECT 2.32 37.435 2.37 37.565 ; + RECT 3.25 37.435 3.3 37.565 ; + RECT 3.515 37.435 3.565 37.565 ; + RECT 4.47 37.41 4.6 37.59 ; + RECT 5.035 37.435 5.085 37.565 ; + RECT 6.22 37.435 6.27 37.565 ; + RECT 7.5 37.435 7.55 37.565 ; + RECT 9.72 37.435 9.77 37.565 ; + RECT 11.025 37.435 11.075 37.565 ; + RECT 1.045 38.395 1.175 38.575 ; + RECT 1.34 38.395 1.47 38.575 ; + RECT 1.86 38.42 1.91 38.55 ; + RECT 2.01 38.42 2.06 38.55 ; + RECT 2.32 38.42 2.37 38.55 ; + RECT 3.25 38.42 3.3 38.55 ; + RECT 3.515 38.42 3.565 38.55 ; + RECT 4.47 38.395 4.6 38.575 ; + RECT 5.035 38.42 5.085 38.55 ; + RECT 6.22 38.42 6.27 38.55 ; + RECT 7.5 38.42 7.55 38.55 ; + RECT 9.72 38.42 9.77 38.55 ; + RECT 11.025 38.42 11.075 38.55 ; + RECT 1.57 39.405 1.62 39.535 ; + RECT 3.02 39.38 3.15 39.56 ; + RECT 4.87 39.405 4.92 39.535 ; + RECT 5.9 39.405 5.95 39.535 ; + RECT 9.43 39.405 9.48 39.535 ; + RECT 10.27 39.405 10.32 39.535 ; + RECT 12.79 39.405 12.84 39.535 ; + RECT 14.29 39.38 14.42 39.56 ; + RECT 1.045 40.365 1.175 40.545 ; + RECT 1.34 40.365 1.47 40.545 ; + RECT 1.86 40.39 1.91 40.52 ; + RECT 2.01 40.39 2.06 40.52 ; + RECT 2.32 40.39 2.37 40.52 ; + RECT 3.25 40.39 3.3 40.52 ; + RECT 3.515 40.39 3.565 40.52 ; + RECT 4.47 40.365 4.6 40.545 ; + RECT 5.035 40.39 5.085 40.52 ; + RECT 6.22 40.39 6.27 40.52 ; + RECT 7.5 40.39 7.55 40.52 ; + RECT 9.72 40.39 9.77 40.52 ; + RECT 11.025 40.39 11.075 40.52 ; + RECT 1.045 41.345 1.175 41.525 ; + RECT 1.34 41.345 1.47 41.525 ; + RECT 1.86 41.37 1.91 41.5 ; + RECT 2.01 41.37 2.06 41.5 ; + RECT 2.32 41.37 2.37 41.5 ; + RECT 3.25 41.37 3.3 41.5 ; + RECT 3.515 41.37 3.565 41.5 ; + RECT 4.47 41.345 4.6 41.525 ; + RECT 5.035 41.37 5.085 41.5 ; + RECT 6.22 41.37 6.27 41.5 ; + RECT 7.5 41.37 7.55 41.5 ; + RECT 9.72 41.37 9.77 41.5 ; + RECT 11.025 41.37 11.075 41.5 ; + RECT 1.045 42.33 1.175 42.51 ; + RECT 1.34 42.33 1.47 42.51 ; + RECT 1.86 42.355 1.91 42.485 ; + RECT 2.01 42.355 2.06 42.485 ; + RECT 2.32 42.355 2.37 42.485 ; + RECT 3.25 42.355 3.3 42.485 ; + RECT 3.515 42.355 3.565 42.485 ; + RECT 4.47 42.33 4.6 42.51 ; + RECT 5.035 42.355 5.085 42.485 ; + RECT 6.22 42.355 6.27 42.485 ; + RECT 7.5 42.355 7.55 42.485 ; + RECT 9.72 42.355 9.77 42.485 ; + RECT 11.025 42.355 11.075 42.485 ; + RECT 1.57 43.34 1.62 43.47 ; + RECT 3.02 43.315 3.15 43.495 ; + RECT 4.87 43.34 4.92 43.47 ; + RECT 5.9 43.34 5.95 43.47 ; + RECT 6.375 43.34 6.425 43.47 ; + RECT 7.015 43.34 7.065 43.47 ; + RECT 10.27 43.34 10.32 43.47 ; + RECT 12.79 43.34 12.84 43.47 ; + RECT 14.29 43.315 14.42 43.495 ; + RECT 1.045 44.305 1.175 44.485 ; + RECT 1.34 44.305 1.47 44.485 ; + RECT 1.86 44.33 1.91 44.46 ; + RECT 2.01 44.33 2.06 44.46 ; + RECT 2.32 44.33 2.37 44.46 ; + RECT 3.25 44.33 3.3 44.46 ; + RECT 3.515 44.33 3.565 44.46 ; + RECT 4.47 44.305 4.6 44.485 ; + RECT 5.035 44.33 5.085 44.46 ; + RECT 6.22 44.33 6.27 44.46 ; + RECT 7.5 44.33 7.55 44.46 ; + RECT 9.72 44.33 9.77 44.46 ; + RECT 11.025 44.33 11.075 44.46 ; + RECT 1.045 45.285 1.175 45.465 ; + RECT 1.34 45.285 1.47 45.465 ; + RECT 1.86 45.31 1.91 45.44 ; + RECT 2.01 45.31 2.06 45.44 ; + RECT 2.32 45.31 2.37 45.44 ; + RECT 3.25 45.31 3.3 45.44 ; + RECT 3.515 45.31 3.565 45.44 ; + RECT 4.47 45.285 4.6 45.465 ; + RECT 5.035 45.31 5.085 45.44 ; + RECT 6.22 45.31 6.27 45.44 ; + RECT 7.5 45.31 7.55 45.44 ; + RECT 9.72 45.31 9.77 45.44 ; + RECT 11.025 45.31 11.075 45.44 ; + RECT 1.57 46.465 1.62 46.595 ; + RECT 3.06 46.465 3.11 46.595 ; + RECT 4.87 46.465 4.92 46.595 ; + RECT 5.9 46.465 5.95 46.595 ; + RECT 6.375 46.465 6.425 46.595 ; + RECT 7.015 46.465 7.065 46.595 ; + RECT 9.11 46.465 9.16 46.595 ; + RECT 10.27 46.465 10.32 46.595 ; + RECT 1.57 47.275 1.62 47.405 ; + RECT 3.02 47.25 3.15 47.43 ; + RECT 4.87 47.275 4.92 47.405 ; + RECT 5.9 47.275 5.95 47.405 ; + RECT 6.375 47.275 6.425 47.405 ; + RECT 7.015 47.275 7.065 47.405 ; + RECT 9.11 47.275 9.16 47.405 ; + RECT 10.27 47.275 10.32 47.405 ; + RECT 12.79 47.275 12.84 47.405 ; + RECT 1.045 48.235 1.175 48.415 ; + RECT 1.34 48.235 1.47 48.415 ; + RECT 1.86 48.26 1.91 48.39 ; + RECT 2.01 48.26 2.06 48.39 ; + RECT 2.32 48.26 2.37 48.39 ; + RECT 3.25 48.26 3.3 48.39 ; + RECT 3.515 48.26 3.565 48.39 ; + RECT 4.47 48.235 4.6 48.415 ; + RECT 5.035 48.26 5.085 48.39 ; + RECT 6.22 48.26 6.27 48.39 ; + RECT 7.5 48.26 7.55 48.39 ; + RECT 9.72 48.26 9.77 48.39 ; + RECT 11.025 48.26 11.075 48.39 ; + RECT 1.045 49.71 1.175 49.89 ; + RECT 1.34 49.71 1.47 49.89 ; + RECT 1.86 49.735 1.91 49.865 ; + RECT 2.01 49.735 2.06 49.865 ; + RECT 2.32 49.735 2.37 49.865 ; + RECT 3.25 49.735 3.3 49.865 ; + RECT 3.515 49.735 3.565 49.865 ; + RECT 4.47 49.71 4.6 49.89 ; + RECT 5.035 49.735 5.085 49.865 ; + RECT 6.22 49.735 6.27 49.865 ; + RECT 7.5 49.735 7.55 49.865 ; + RECT 9.72 49.735 9.77 49.865 ; + RECT 11.025 49.735 11.075 49.865 ; + RECT 1.57 50.72 1.62 50.85 ; + RECT 3.02 50.695 3.15 50.875 ; + RECT 4.87 50.72 4.92 50.85 ; + RECT 6.375 50.72 6.425 50.85 ; + RECT 7.015 50.72 7.065 50.85 ; + RECT 9.11 50.72 9.16 50.85 ; + RECT 10.27 50.72 10.32 50.85 ; + RECT 12.79 50.72 12.84 50.85 ; + RECT 1.57 51.53 1.62 51.66 ; + RECT 3.06 51.53 3.11 51.66 ; + RECT 4.87 51.53 4.92 51.66 ; + RECT 6.375 51.53 6.425 51.66 ; + RECT 7.015 51.53 7.065 51.66 ; + RECT 9.11 51.53 9.16 51.66 ; + RECT 10.27 51.53 10.32 51.66 ; + RECT 1.045 52.66 1.175 52.84 ; + RECT 1.34 52.66 1.47 52.84 ; + RECT 1.86 52.685 1.91 52.815 ; + RECT 2.01 52.685 2.06 52.815 ; + RECT 2.32 52.685 2.37 52.815 ; + RECT 3.25 52.685 3.3 52.815 ; + RECT 3.515 52.685 3.565 52.815 ; + RECT 4.47 52.66 4.6 52.84 ; + RECT 5.035 52.685 5.085 52.815 ; + RECT 6.22 52.685 6.27 52.815 ; + RECT 7.5 52.685 7.55 52.815 ; + RECT 9.72 52.685 9.77 52.815 ; + RECT 11.025 52.685 11.075 52.815 ; + RECT 1.045 53.65 1.175 53.83 ; + RECT 1.34 53.65 1.47 53.83 ; + RECT 1.86 53.675 1.91 53.805 ; + RECT 2.01 53.675 2.06 53.805 ; + RECT 2.32 53.675 2.37 53.805 ; + RECT 3.25 53.675 3.3 53.805 ; + RECT 3.515 53.675 3.565 53.805 ; + RECT 4.47 53.65 4.6 53.83 ; + RECT 5.035 53.675 5.085 53.805 ; + RECT 6.22 53.675 6.27 53.805 ; + RECT 7.5 53.675 7.55 53.805 ; + RECT 9.72 53.675 9.77 53.805 ; + RECT 11.025 53.675 11.075 53.805 ; + RECT 1.57 54.655 1.62 54.785 ; + RECT 3.02 54.63 3.15 54.81 ; + RECT 4.87 54.655 4.92 54.785 ; + RECT 6.375 54.655 6.425 54.785 ; + RECT 7.015 54.655 7.065 54.785 ; + RECT 10.27 54.655 10.32 54.785 ; + RECT 12.79 54.655 12.84 54.785 ; + RECT 14.29 54.63 14.42 54.81 ; + RECT 1.045 55.615 1.175 55.795 ; + RECT 1.34 55.615 1.47 55.795 ; + RECT 1.86 55.64 1.91 55.77 ; + RECT 2.01 55.64 2.06 55.77 ; + RECT 2.32 55.64 2.37 55.77 ; + RECT 3.25 55.64 3.3 55.77 ; + RECT 3.515 55.64 3.565 55.77 ; + RECT 4.47 55.615 4.6 55.795 ; + RECT 5.035 55.64 5.085 55.77 ; + RECT 6.22 55.64 6.27 55.77 ; + RECT 7.5 55.64 7.55 55.77 ; + RECT 9.275 55.615 9.405 55.795 ; + RECT 9.72 55.64 9.77 55.77 ; + RECT 11.025 55.64 11.075 55.77 ; + RECT 1.045 56.6 1.175 56.78 ; + RECT 1.34 56.6 1.47 56.78 ; + RECT 1.86 56.625 1.91 56.755 ; + RECT 2.01 56.625 2.06 56.755 ; + RECT 2.32 56.625 2.37 56.755 ; + RECT 3.25 56.625 3.3 56.755 ; + RECT 3.515 56.625 3.565 56.755 ; + RECT 4.47 56.6 4.6 56.78 ; + RECT 5.035 56.625 5.085 56.755 ; + RECT 6.22 56.625 6.27 56.755 ; + RECT 7.5 56.625 7.55 56.755 ; + RECT 9.275 56.6 9.405 56.78 ; + RECT 9.72 56.625 9.77 56.755 ; + RECT 11.025 56.625 11.075 56.755 ; + RECT 1.045 57.585 1.175 57.765 ; + RECT 1.34 57.585 1.47 57.765 ; + RECT 1.86 57.61 1.91 57.74 ; + RECT 2.01 57.61 2.06 57.74 ; + RECT 2.32 57.61 2.37 57.74 ; + RECT 3.25 57.61 3.3 57.74 ; + RECT 3.515 57.61 3.565 57.74 ; + RECT 4.47 57.585 4.6 57.765 ; + RECT 6.22 57.61 6.27 57.74 ; + RECT 7.5 57.61 7.55 57.74 ; + RECT 9.275 57.585 9.405 57.765 ; + RECT 9.72 57.61 9.77 57.74 ; + RECT 11.025 57.61 11.075 57.74 ; + RECT 1.57 58.595 1.62 58.725 ; + RECT 3.02 58.57 3.15 58.75 ; + RECT 4.87 58.595 4.92 58.725 ; + RECT 6.375 58.595 6.425 58.725 ; + RECT 10 58.595 10.05 58.725 ; + RECT 10.27 58.595 10.32 58.725 ; + RECT 12.79 58.595 12.84 58.725 ; + RECT 14.29 58.57 14.42 58.75 ; + RECT 1.045 59.55 1.175 59.73 ; + RECT 1.34 59.55 1.47 59.73 ; + RECT 1.86 59.575 1.91 59.705 ; + RECT 2.01 59.575 2.06 59.705 ; + RECT 2.32 59.575 2.37 59.705 ; + RECT 3.25 59.575 3.3 59.705 ; + RECT 3.515 59.575 3.565 59.705 ; + RECT 4.47 59.55 4.6 59.73 ; + RECT 6.22 59.575 6.27 59.705 ; + RECT 7.5 59.575 7.55 59.705 ; + RECT 9.275 59.55 9.405 59.73 ; + RECT 9.72 59.575 9.77 59.705 ; + RECT 11.025 59.575 11.075 59.705 ; + RECT 1.045 60.535 1.175 60.715 ; + RECT 1.34 60.535 1.47 60.715 ; + RECT 1.86 60.56 1.91 60.69 ; + RECT 2.01 60.56 2.06 60.69 ; + RECT 2.32 60.56 2.37 60.69 ; + RECT 3.25 60.56 3.3 60.69 ; + RECT 3.515 60.56 3.565 60.69 ; + RECT 4.47 60.535 4.6 60.715 ; + RECT 6.22 60.56 6.27 60.69 ; + RECT 7.5 60.56 7.55 60.69 ; + RECT 9.275 60.535 9.405 60.715 ; + RECT 9.72 60.56 9.77 60.69 ; + RECT 11.025 60.56 11.075 60.69 ; + RECT 1.045 61.52 1.175 61.7 ; + RECT 1.34 61.52 1.47 61.7 ; + RECT 1.86 61.545 1.91 61.675 ; + RECT 2.01 61.545 2.06 61.675 ; + RECT 2.32 61.545 2.37 61.675 ; + RECT 3.25 61.545 3.3 61.675 ; + RECT 3.515 61.545 3.565 61.675 ; + RECT 4.47 61.52 4.6 61.7 ; + RECT 6.22 61.545 6.27 61.675 ; + RECT 7.5 61.545 7.55 61.675 ; + RECT 9.275 61.52 9.405 61.7 ; + RECT 9.72 61.545 9.77 61.675 ; + RECT 11.025 61.545 11.075 61.675 ; + RECT 1.57 62.53 1.62 62.66 ; + RECT 3.02 62.505 3.15 62.685 ; + RECT 4.87 62.53 4.92 62.66 ; + RECT 6.375 62.53 6.425 62.66 ; + RECT 12.79 62.53 12.84 62.66 ; + RECT 14.29 62.505 14.42 62.685 ; + RECT 1.045 64.47 1.175 64.65 ; + RECT 1.34 64.47 1.47 64.65 ; + RECT 1.86 64.495 1.91 64.625 ; + RECT 2.01 64.495 2.06 64.625 ; + RECT 2.32 64.495 2.37 64.625 ; + RECT 3.25 64.495 3.3 64.625 ; + RECT 3.515 64.495 3.565 64.625 ; + RECT 4.47 64.47 4.6 64.65 ; + RECT 6.22 64.495 6.27 64.625 ; + RECT 7.5 64.495 7.55 64.625 ; + RECT 9.275 64.47 9.405 64.65 ; + RECT 9.72 64.495 9.77 64.625 ; + RECT 11.025 64.495 11.075 64.625 ; + RECT 1.045 65.455 1.175 65.635 ; + RECT 1.34 65.455 1.47 65.635 ; + RECT 1.86 65.48 1.91 65.61 ; + RECT 2.01 65.48 2.06 65.61 ; + RECT 2.32 65.48 2.37 65.61 ; + RECT 3.25 65.48 3.3 65.61 ; + RECT 3.515 65.48 3.565 65.61 ; + RECT 4.47 65.455 4.6 65.635 ; + RECT 6.22 65.48 6.27 65.61 ; + RECT 7.5 65.48 7.55 65.61 ; + RECT 9.275 65.455 9.405 65.635 ; + RECT 9.72 65.48 9.77 65.61 ; + RECT 11.025 65.48 11.075 65.61 ; + RECT 1.57 66.48 1.62 66.61 ; + RECT 3.02 66.455 3.15 66.635 ; + RECT 4.87 66.48 4.92 66.61 ; + RECT 6.375 66.48 6.425 66.61 ; + RECT 11.69 66.48 11.74 66.61 ; + RECT 12.79 66.48 12.84 66.61 ; + RECT 1.57 66.955 1.62 67.085 ; + RECT 3.02 66.93 3.15 67.11 ; + RECT 4.87 66.955 4.92 67.085 ; + RECT 6.375 66.955 6.425 67.085 ; + RECT 1.045 67.425 1.175 67.605 ; + RECT 1.34 67.425 1.47 67.605 ; + RECT 1.86 67.45 1.91 67.58 ; + RECT 2.01 67.45 2.06 67.58 ; + RECT 3.25 67.45 3.3 67.58 ; + RECT 3.515 67.45 3.565 67.58 ; + RECT 4.47 67.425 4.6 67.605 ; + RECT 6.22 67.45 6.27 67.58 ; + RECT 7.5 67.45 7.55 67.58 ; + RECT 9.275 67.425 9.405 67.605 ; + RECT 9.72 67.45 9.77 67.58 ; + RECT 11.025 67.45 11.075 67.58 ; + RECT 1.86 68.435 1.91 68.565 ; + RECT 2.01 68.435 2.06 68.565 ; + RECT 3.25 68.435 3.3 68.565 ; + RECT 3.515 68.435 3.565 68.565 ; + RECT 6.22 68.435 6.27 68.565 ; + RECT 7.5 68.435 7.55 68.565 ; + RECT 9.72 68.435 9.77 68.565 ; + RECT 11.025 68.435 11.075 68.565 ; + RECT 1.57 68.745 1.62 68.875 ; + RECT 3.02 68.72 3.15 68.9 ; + RECT 4.87 68.745 4.92 68.875 ; + RECT 6.375 68.745 6.425 68.875 ; + RECT 8.975 68.745 9.025 68.875 ; + RECT 12.79 68.745 12.84 68.875 ; + RECT 14.29 68.72 14.42 68.9 ; + RECT 0.9 28.245 0.95 28.375 ; + RECT 2.485 28.245 2.665 28.375 ; + RECT 3.84 28.245 3.89 28.375 ; + RECT 5.675 28.245 5.725 28.375 ; + RECT 6.065 28.245 6.115 28.375 ; + RECT 6.725 28.245 6.775 28.375 ; + RECT 8.35 28.245 8.4 28.375 ; + RECT 8.77 28.245 8.82 28.375 ; + RECT 11.555 28.245 11.605 28.375 ; + RECT 11.815 28.245 11.865 28.375 ; + RECT 12.52 28.245 12.57 28.375 ; + RECT 14.005 28.245 14.055 28.375 ; + RECT 0.62 30.055 0.67 30.185 ; + RECT 3.65 30.055 3.7 30.185 ; + RECT 7.18 30.055 7.23 30.185 ; + RECT 14.14 30.055 14.19 30.185 ; + RECT 0.62 32.06 0.67 32.19 ; + RECT 3.65 32.06 3.7 32.19 ; + RECT 7.18 32.06 7.23 32.19 ; + RECT 14.14 32.06 14.19 32.19 ; + RECT 0.62 34.975 0.67 35.105 ; + RECT 3.65 34.975 3.7 35.105 ; + RECT 7.18 34.975 7.23 35.105 ; + RECT 14.14 34.975 14.19 35.105 ; + RECT 0.62 35.96 0.67 36.09 ; + RECT 3.65 35.96 3.7 36.09 ; + RECT 7.18 35.96 7.23 36.09 ; + RECT 14.14 35.96 14.19 36.09 ; + RECT 0.62 37.93 0.67 38.06 ; + RECT 3.65 37.93 3.7 38.06 ; + RECT 7.18 37.93 7.23 38.06 ; + RECT 14.14 37.93 14.19 38.06 ; + RECT 0.62 38.91 0.67 39.04 ; + RECT 3.65 38.91 3.7 39.04 ; + RECT 7.18 38.91 7.23 39.04 ; + RECT 14.14 38.91 14.19 39.04 ; + RECT 0.62 39.895 0.67 40.025 ; + RECT 3.65 39.895 3.7 40.025 ; + RECT 7.18 39.895 7.23 40.025 ; + RECT 14.14 39.895 14.19 40.025 ; + RECT 0.62 42.85 0.67 42.98 ; + RECT 3.65 42.85 3.7 42.98 ; + RECT 7.18 42.85 7.23 42.98 ; + RECT 14.14 42.85 14.19 42.98 ; + RECT 0.9 43.835 0.95 43.965 ; + RECT 2.485 43.835 2.665 43.965 ; + RECT 3.8 43.81 3.93 43.99 ; + RECT 5.635 43.81 5.765 43.99 ; + RECT 6.065 43.835 6.115 43.965 ; + RECT 6.675 43.835 6.725 43.965 ; + RECT 8.31 43.81 8.44 43.99 ; + RECT 8.73 43.81 8.86 43.99 ; + RECT 11.555 43.835 11.605 43.965 ; + RECT 11.815 43.835 11.865 43.965 ; + RECT 12.52 43.835 12.57 43.965 ; + RECT 14.005 43.835 14.055 43.965 ; + RECT 0.62 46.785 0.67 46.915 ; + RECT 3.65 46.785 3.7 46.915 ; + RECT 7.18 46.785 7.23 46.915 ; + RECT 14.14 46.785 14.19 46.915 ; + RECT 0.62 47.77 0.67 47.9 ; + RECT 3.65 47.77 3.7 47.9 ; + RECT 7.18 47.77 7.23 47.9 ; + RECT 14.14 47.77 14.19 47.9 ; + RECT 8.31 49.04 8.44 49.09 ; + RECT 8.73 49.04 8.86 49.09 ; + RECT 10.12 49.04 10.17 49.09 ; + RECT 11.555 49.04 11.605 49.09 ; + RECT 11.815 49.04 11.865 49.09 ; + RECT 12.52 49.04 12.57 49.09 ; + RECT 0.62 50.23 0.67 50.36 ; + RECT 3.65 50.23 3.7 50.36 ; + RECT 7.18 50.23 7.23 50.36 ; + RECT 12.655 50.23 12.705 50.36 ; + RECT 14.14 50.23 14.19 50.36 ; + RECT 0.62 51.21 0.67 51.34 ; + RECT 3.65 51.21 3.7 51.34 ; + RECT 7.18 51.21 7.23 51.34 ; + RECT 14.14 51.21 14.19 51.34 ; + RECT 0.9 54.165 0.95 54.295 ; + RECT 2.51 54.14 2.64 54.32 ; + RECT 3.8 54.14 3.93 54.32 ; + RECT 5.635 54.14 5.765 54.32 ; + RECT 6.065 54.165 6.115 54.295 ; + RECT 6.675 54.165 6.725 54.295 ; + RECT 8.31 54.14 8.44 54.32 ; + RECT 8.73 54.14 8.86 54.32 ; + RECT 11.555 54.165 11.605 54.295 ; + RECT 11.815 54.165 11.865 54.295 ; + RECT 12.52 54.165 12.57 54.295 ; + RECT 14.005 54.165 14.055 54.295 ; + RECT 0.62 55.15 0.67 55.28 ; + RECT 3.65 55.15 3.7 55.28 ; + RECT 7.18 55.15 7.23 55.28 ; + RECT 14.14 55.15 14.19 55.28 ; + RECT 0.62 58.1 0.67 58.23 ; + RECT 3.65 58.1 3.7 58.23 ; + RECT 7.18 58.1 7.23 58.23 ; + RECT 14.14 58.1 14.19 58.23 ; + RECT 0.62 59.085 0.67 59.215 ; + RECT 3.65 59.085 3.7 59.215 ; + RECT 7.18 59.085 7.23 59.215 ; + RECT 14.14 59.085 14.19 59.215 ; + RECT 0.62 60.07 0.67 60.2 ; + RECT 3.65 60.07 3.7 60.2 ; + RECT 7.18 60.07 7.23 60.2 ; + RECT 14.14 60.07 14.19 60.2 ; + RECT 0.62 62.035 0.67 62.165 ; + RECT 3.65 62.035 3.7 62.165 ; + RECT 7.18 62.035 7.23 62.165 ; + RECT 14.14 62.035 14.19 62.165 ; + RECT 0.62 62.815 0.67 62.865 ; + RECT 0.62 63.02 0.67 63.15 ; + RECT 3.65 63.02 3.7 63.15 ; + RECT 7.18 63.02 7.23 63.15 ; + RECT 14.14 63.02 14.19 63.15 ; + RECT 0.62 65.94 0.67 66.07 ; + RECT 3.65 65.94 3.7 66.07 ; + RECT 7.18 65.94 7.23 66.07 ; + RECT 14.14 65.94 14.19 66.07 ; + RECT 0.62 67.94 0.67 68.07 ; + RECT 3.65 67.94 3.7 68.07 ; + RECT 7.18 67.94 7.23 68.07 ; + RECT 14.14 67.94 14.19 68.07 ; + RECT 0.9 69.685 0.95 69.815 ; + RECT 2.485 69.685 2.665 69.815 ; + RECT 3.84 69.685 3.89 69.815 ; + RECT 5.675 69.685 5.725 69.815 ; + RECT 6.065 69.685 6.115 69.815 ; + RECT 6.725 69.685 6.775 69.815 ; + RECT 8.35 69.685 8.4 69.815 ; + RECT 8.77 69.685 8.82 69.815 ; + RECT 11.555 69.685 11.605 69.815 ; + RECT 11.815 69.685 11.865 69.815 ; + RECT 12.52 69.685 12.57 69.815 ; + RECT 14.005 69.685 14.055 69.815 ; + RECT 1.57 28.475 1.62 28.605 ; + RECT 3.06 28.475 3.11 28.605 ; + RECT 4.87 28.475 4.92 28.605 ; + RECT 12.79 28.475 12.84 28.605 ; + RECT 14.33 28.475 14.38 28.605 ; + RECT 2.18 29.565 2.23 29.695 ; + RECT 8.56 29.565 8.61 29.695 ; + RECT 10.27 29.565 10.32 29.695 ; + RECT 2.18 30.545 2.23 30.675 ; + RECT 8.56 30.545 8.61 30.675 ; + RECT 10.27 30.545 10.32 30.675 ; + RECT 2.18 32.515 2.23 32.645 ; + RECT 8.56 32.515 8.61 32.645 ; + RECT 10.27 32.515 10.32 32.645 ; + RECT 2.18 33.5 2.23 33.63 ; + RECT 8.56 33.5 8.61 33.63 ; + RECT 10.27 33.5 10.32 33.63 ; + RECT 1.57 34.485 1.62 34.615 ; + RECT 3.02 34.46 3.15 34.64 ; + RECT 4.87 34.485 4.92 34.615 ; + RECT 5.9 34.485 5.95 34.615 ; + RECT 12.79 34.485 12.84 34.615 ; + RECT 14.29 34.46 14.42 34.64 ; + RECT 2.18 36.455 2.23 36.585 ; + RECT 8.56 36.455 8.61 36.585 ; + RECT 2.18 37.435 2.23 37.565 ; + RECT 8.56 37.435 8.61 37.565 ; + RECT 2.18 38.42 2.23 38.55 ; + RECT 8.56 38.42 8.61 38.55 ; + RECT 2.18 40.39 2.23 40.52 ; + RECT 8.56 40.39 8.61 40.52 ; + RECT 2.18 41.37 2.23 41.5 ; + RECT 8.56 41.37 8.61 41.5 ; + RECT 2.18 42.355 2.23 42.485 ; + RECT 8.56 42.355 8.61 42.485 ; + RECT 2.18 44.33 2.23 44.46 ; + RECT 8.56 44.33 8.61 44.46 ; + RECT 2.18 45.31 2.23 45.44 ; + RECT 8.56 45.31 8.61 45.44 ; + RECT 2.18 48.26 2.23 48.39 ; + RECT 8.56 48.26 8.61 48.39 ; + RECT 2.18 49.735 2.23 49.865 ; + RECT 8.56 49.735 8.61 49.865 ; + RECT 2.18 52.685 2.23 52.815 ; + RECT 8.56 52.685 8.61 52.815 ; + RECT 2.18 53.675 2.23 53.805 ; + RECT 8.56 53.675 8.61 53.805 ; + RECT 2.18 55.64 2.23 55.77 ; + RECT 8.56 55.64 8.61 55.77 ; + RECT 2.18 56.625 2.23 56.755 ; + RECT 8.56 56.625 8.61 56.755 ; + RECT 2.18 57.61 2.23 57.74 ; + RECT 8.56 57.61 8.61 57.74 ; + RECT 2.18 59.575 2.23 59.705 ; + RECT 8.56 59.575 8.61 59.705 ; + RECT 2.18 60.56 2.23 60.69 ; + RECT 8.56 60.56 8.61 60.69 ; + RECT 2.18 61.545 2.23 61.675 ; + RECT 8.56 61.545 8.61 61.675 ; + RECT 1.57 63.515 1.62 63.645 ; + RECT 3.02 63.49 3.15 63.67 ; + RECT 4.87 63.515 4.92 63.645 ; + RECT 6.375 63.515 6.425 63.645 ; + RECT 12.79 63.515 12.84 63.645 ; + RECT 14.29 63.49 14.42 63.67 ; + RECT 2.18 64.495 2.23 64.625 ; + RECT 8.56 64.495 8.61 64.625 ; + RECT 10.27 64.495 10.32 64.625 ; + RECT 2.18 65.48 2.23 65.61 ; + RECT 8.56 65.48 8.61 65.61 ; + RECT 10.27 65.48 10.32 65.61 ; + RECT 2.18 67.45 2.23 67.58 ; + RECT 8.56 67.45 8.61 67.58 ; + RECT 10.27 67.45 10.32 67.58 ; + RECT 2.18 68.435 2.23 68.565 ; + RECT 8.56 68.435 8.61 68.565 ; + RECT 10.27 68.435 10.32 68.565 ; + RECT 3.06 69.455 3.11 69.585 ; + RECT 4.87 69.455 4.92 69.585 ; + RECT 6.375 69.455 6.425 69.585 ; + RECT 8.975 69.455 9.025 69.585 ; + RECT 12.79 69.455 12.84 69.585 ; + RECT 14.33 69.455 14.38 69.585 ; + RECT 20.875 0.425 21.055 0.555 ; + RECT 14.965 0.655 15.015 0.785 ; + RECT 19.485 0.655 19.535 0.785 ; + RECT 14.765 0.655 14.815 0.785 ; + RECT 19.685 0.655 19.735 0.785 ; + RECT 20.7 0.425 20.75 0.555 ; + RECT 20.875 100.385 21.055 100.515 ; + RECT 14.965 100.155 15.015 100.285 ; + RECT 19.485 100.155 19.535 100.285 ; + RECT 14.765 100.155 14.815 100.285 ; + RECT 19.685 100.155 19.735 100.285 ; + RECT 20.7 100.385 20.75 100.515 ; + RECT 14.565 3.305 14.615 3.435 ; + RECT 19.885 3.305 19.935 3.435 ; + RECT 14.765 3.535 14.815 3.665 ; + RECT 14.765 1.115 14.815 1.245 ; + RECT 19.685 3.535 19.735 3.665 ; + RECT 19.685 1.115 19.735 1.245 ; + RECT 14.965 3.535 15.015 3.665 ; + RECT 14.965 1.115 15.015 1.245 ; + RECT 19.485 3.535 19.535 3.665 ; + RECT 19.485 1.115 19.535 1.245 ; + RECT 14.565 26.345 14.615 26.475 ; + RECT 19.885 26.345 19.935 26.475 ; + RECT 14.765 26.575 14.815 26.705 ; + RECT 14.765 24.155 14.815 24.285 ; + RECT 19.685 26.575 19.735 26.705 ; + RECT 19.685 24.155 19.735 24.285 ; + RECT 14.965 26.575 15.015 26.705 ; + RECT 14.965 24.155 15.015 24.285 ; + RECT 19.485 26.575 19.535 26.705 ; + RECT 19.485 24.155 19.535 24.285 ; + RECT 14.565 23.465 14.615 23.595 ; + RECT 19.885 23.465 19.935 23.595 ; + RECT 14.765 23.695 14.815 23.825 ; + RECT 14.765 21.275 14.815 21.405 ; + RECT 19.685 23.695 19.735 23.825 ; + RECT 19.685 21.275 19.735 21.405 ; + RECT 14.965 23.695 15.015 23.825 ; + RECT 14.965 21.275 15.015 21.405 ; + RECT 19.485 23.695 19.535 23.825 ; + RECT 19.485 21.275 19.535 21.405 ; + RECT 14.565 20.585 14.615 20.715 ; + RECT 19.885 20.585 19.935 20.715 ; + RECT 14.765 20.815 14.815 20.945 ; + RECT 14.765 18.395 14.815 18.525 ; + RECT 19.685 20.815 19.735 20.945 ; + RECT 19.685 18.395 19.735 18.525 ; + RECT 14.965 20.815 15.015 20.945 ; + RECT 14.965 18.395 15.015 18.525 ; + RECT 19.485 20.815 19.535 20.945 ; + RECT 19.485 18.395 19.535 18.525 ; + RECT 14.565 17.705 14.615 17.835 ; + RECT 19.885 17.705 19.935 17.835 ; + RECT 14.765 17.935 14.815 18.065 ; + RECT 14.765 15.515 14.815 15.645 ; + RECT 19.685 17.935 19.735 18.065 ; + RECT 19.685 15.515 19.735 15.645 ; + RECT 14.965 17.935 15.015 18.065 ; + RECT 14.965 15.515 15.015 15.645 ; + RECT 19.485 17.935 19.535 18.065 ; + RECT 19.485 15.515 19.535 15.645 ; + RECT 14.565 14.825 14.615 14.955 ; + RECT 19.885 14.825 19.935 14.955 ; + RECT 14.765 15.055 14.815 15.185 ; + RECT 14.765 12.635 14.815 12.765 ; + RECT 19.685 15.055 19.735 15.185 ; + RECT 19.685 12.635 19.735 12.765 ; + RECT 14.965 15.055 15.015 15.185 ; + RECT 14.965 12.635 15.015 12.765 ; + RECT 19.485 15.055 19.535 15.185 ; + RECT 19.485 12.635 19.535 12.765 ; + RECT 14.565 11.945 14.615 12.075 ; + RECT 19.885 11.945 19.935 12.075 ; + RECT 14.765 12.175 14.815 12.305 ; + RECT 14.765 9.755 14.815 9.885 ; + RECT 19.685 12.175 19.735 12.305 ; + RECT 19.685 9.755 19.735 9.885 ; + RECT 14.965 12.175 15.015 12.305 ; + RECT 14.965 9.755 15.015 9.885 ; + RECT 19.485 12.175 19.535 12.305 ; + RECT 19.485 9.755 19.535 9.885 ; + RECT 14.565 9.065 14.615 9.195 ; + RECT 19.885 9.065 19.935 9.195 ; + RECT 14.765 9.295 14.815 9.425 ; + RECT 14.765 6.875 14.815 7.005 ; + RECT 19.685 9.295 19.735 9.425 ; + RECT 19.685 6.875 19.735 7.005 ; + RECT 14.965 9.295 15.015 9.425 ; + RECT 14.965 6.875 15.015 7.005 ; + RECT 19.485 9.295 19.535 9.425 ; + RECT 19.485 6.875 19.535 7.005 ; + RECT 14.565 6.185 14.615 6.315 ; + RECT 19.885 6.185 19.935 6.315 ; + RECT 14.765 6.415 14.815 6.545 ; + RECT 14.765 3.995 14.815 4.125 ; + RECT 19.685 6.415 19.735 6.545 ; + RECT 19.685 3.995 19.735 4.125 ; + RECT 14.965 6.415 15.015 6.545 ; + RECT 14.965 3.995 15.015 4.125 ; + RECT 19.485 6.415 19.535 6.545 ; + RECT 19.485 3.995 19.535 4.125 ; + RECT 20.085 23.695 20.265 23.825 ; + RECT 20.875 23.465 21.055 23.595 ; + RECT 20.085 21.275 20.265 21.405 ; + RECT 20.43 21.045 20.48 21.175 ; + RECT 20.085 20.815 20.265 20.945 ; + RECT 20.875 20.585 21.055 20.715 ; + RECT 20.085 18.395 20.265 18.525 ; + RECT 20.43 18.165 20.48 18.295 ; + RECT 20.085 17.935 20.265 18.065 ; + RECT 20.875 17.705 21.055 17.835 ; + RECT 20.085 15.515 20.265 15.645 ; + RECT 20.43 15.285 20.48 15.415 ; + RECT 20.085 15.055 20.265 15.185 ; + RECT 20.875 14.825 21.055 14.955 ; + RECT 20.085 12.635 20.265 12.765 ; + RECT 20.43 12.405 20.48 12.535 ; + RECT 20.085 12.175 20.265 12.305 ; + RECT 20.875 11.945 21.055 12.075 ; + RECT 20.085 9.755 20.265 9.885 ; + RECT 20.43 9.525 20.48 9.655 ; + RECT 20.085 9.295 20.265 9.425 ; + RECT 20.875 9.065 21.055 9.195 ; + RECT 20.085 6.875 20.265 7.005 ; + RECT 20.43 6.645 20.48 6.775 ; + RECT 20.085 6.415 20.265 6.545 ; + RECT 20.875 6.185 21.055 6.315 ; + RECT 20.085 3.995 20.265 4.125 ; + RECT 20.43 3.765 20.48 3.895 ; + RECT 20.085 3.535 20.265 3.665 ; + RECT 20.875 3.305 21.055 3.435 ; + RECT 20.085 1.115 20.265 1.245 ; + RECT 20.43 0.885 20.48 1.015 ; + RECT 20.085 26.575 20.265 26.705 ; + RECT 20.875 26.345 21.055 26.475 ; + RECT 20.085 24.155 20.265 24.285 ; + RECT 20.43 23.925 20.48 24.055 ; + RECT 14.565 97.505 14.615 97.635 ; + RECT 19.885 97.505 19.935 97.635 ; + RECT 14.765 97.275 14.815 97.405 ; + RECT 14.765 99.695 14.815 99.825 ; + RECT 19.685 97.275 19.735 97.405 ; + RECT 19.685 99.695 19.735 99.825 ; + RECT 14.965 97.275 15.015 97.405 ; + RECT 14.965 99.695 15.015 99.825 ; + RECT 19.485 97.275 19.535 97.405 ; + RECT 19.485 99.695 19.535 99.825 ; + RECT 14.565 71.585 14.615 71.715 ; + RECT 19.885 71.585 19.935 71.715 ; + RECT 14.765 71.355 14.815 71.485 ; + RECT 14.765 73.775 14.815 73.905 ; + RECT 19.685 71.355 19.735 71.485 ; + RECT 19.685 73.775 19.735 73.905 ; + RECT 14.965 71.355 15.015 71.485 ; + RECT 14.965 73.775 15.015 73.905 ; + RECT 19.485 71.355 19.535 71.485 ; + RECT 19.485 73.775 19.535 73.905 ; + RECT 14.565 74.465 14.615 74.595 ; + RECT 19.885 74.465 19.935 74.595 ; + RECT 14.765 74.235 14.815 74.365 ; + RECT 14.765 76.655 14.815 76.785 ; + RECT 19.685 74.235 19.735 74.365 ; + RECT 19.685 76.655 19.735 76.785 ; + RECT 14.965 74.235 15.015 74.365 ; + RECT 14.965 76.655 15.015 76.785 ; + RECT 19.485 74.235 19.535 74.365 ; + RECT 19.485 76.655 19.535 76.785 ; + RECT 14.565 77.345 14.615 77.475 ; + RECT 19.885 77.345 19.935 77.475 ; + RECT 14.765 77.115 14.815 77.245 ; + RECT 14.765 79.535 14.815 79.665 ; + RECT 19.685 77.115 19.735 77.245 ; + RECT 19.685 79.535 19.735 79.665 ; + RECT 14.965 77.115 15.015 77.245 ; + RECT 14.965 79.535 15.015 79.665 ; + RECT 19.485 77.115 19.535 77.245 ; + RECT 19.485 79.535 19.535 79.665 ; + RECT 14.565 80.225 14.615 80.355 ; + RECT 19.885 80.225 19.935 80.355 ; + RECT 14.765 79.995 14.815 80.125 ; + RECT 14.765 82.415 14.815 82.545 ; + RECT 19.685 79.995 19.735 80.125 ; + RECT 19.685 82.415 19.735 82.545 ; + RECT 14.965 79.995 15.015 80.125 ; + RECT 14.965 82.415 15.015 82.545 ; + RECT 19.485 79.995 19.535 80.125 ; + RECT 19.485 82.415 19.535 82.545 ; + RECT 14.565 83.105 14.615 83.235 ; + RECT 19.885 83.105 19.935 83.235 ; + RECT 14.765 82.875 14.815 83.005 ; + RECT 14.765 85.295 14.815 85.425 ; + RECT 19.685 82.875 19.735 83.005 ; + RECT 19.685 85.295 19.735 85.425 ; + RECT 14.965 82.875 15.015 83.005 ; + RECT 14.965 85.295 15.015 85.425 ; + RECT 19.485 82.875 19.535 83.005 ; + RECT 19.485 85.295 19.535 85.425 ; + RECT 14.565 85.985 14.615 86.115 ; + RECT 19.885 85.985 19.935 86.115 ; + RECT 14.765 85.755 14.815 85.885 ; + RECT 14.765 88.175 14.815 88.305 ; + RECT 19.685 85.755 19.735 85.885 ; + RECT 19.685 88.175 19.735 88.305 ; + RECT 14.965 85.755 15.015 85.885 ; + RECT 14.965 88.175 15.015 88.305 ; + RECT 19.485 85.755 19.535 85.885 ; + RECT 19.485 88.175 19.535 88.305 ; + RECT 14.565 88.865 14.615 88.995 ; + RECT 19.885 88.865 19.935 88.995 ; + RECT 14.765 88.635 14.815 88.765 ; + RECT 14.765 91.055 14.815 91.185 ; + RECT 19.685 88.635 19.735 88.765 ; + RECT 19.685 91.055 19.735 91.185 ; + RECT 14.965 88.635 15.015 88.765 ; + RECT 14.965 91.055 15.015 91.185 ; + RECT 19.485 88.635 19.535 88.765 ; + RECT 19.485 91.055 19.535 91.185 ; + RECT 14.565 91.745 14.615 91.875 ; + RECT 19.885 91.745 19.935 91.875 ; + RECT 14.765 91.515 14.815 91.645 ; + RECT 14.765 93.935 14.815 94.065 ; + RECT 19.685 91.515 19.735 91.645 ; + RECT 19.685 93.935 19.735 94.065 ; + RECT 14.965 91.515 15.015 91.645 ; + RECT 14.965 93.935 15.015 94.065 ; + RECT 19.485 91.515 19.535 91.645 ; + RECT 19.485 93.935 19.535 94.065 ; + RECT 14.565 94.625 14.615 94.755 ; + RECT 19.885 94.625 19.935 94.755 ; + RECT 14.765 94.395 14.815 94.525 ; + RECT 14.765 96.815 14.815 96.945 ; + RECT 19.685 94.395 19.735 94.525 ; + RECT 19.685 96.815 19.735 96.945 ; + RECT 14.965 94.395 15.015 94.525 ; + RECT 14.965 96.815 15.015 96.945 ; + RECT 19.485 94.395 19.535 94.525 ; + RECT 19.485 96.815 19.535 96.945 ; + RECT 20.085 74.235 20.265 74.365 ; + RECT 20.875 74.465 21.055 74.595 ; + RECT 20.085 76.655 20.265 76.785 ; + RECT 20.43 76.885 20.48 77.015 ; + RECT 20.085 77.115 20.265 77.245 ; + RECT 20.875 77.345 21.055 77.475 ; + RECT 20.085 79.535 20.265 79.665 ; + RECT 20.43 79.765 20.48 79.895 ; + RECT 20.085 79.995 20.265 80.125 ; + RECT 20.875 80.225 21.055 80.355 ; + RECT 20.085 82.415 20.265 82.545 ; + RECT 20.43 82.645 20.48 82.775 ; + RECT 20.085 82.875 20.265 83.005 ; + RECT 20.875 83.105 21.055 83.235 ; + RECT 20.085 85.295 20.265 85.425 ; + RECT 20.43 85.525 20.48 85.655 ; + RECT 20.085 85.755 20.265 85.885 ; + RECT 20.875 85.985 21.055 86.115 ; + RECT 20.085 88.175 20.265 88.305 ; + RECT 20.43 88.405 20.48 88.535 ; + RECT 20.085 88.635 20.265 88.765 ; + RECT 20.875 88.865 21.055 88.995 ; + RECT 20.085 91.055 20.265 91.185 ; + RECT 20.43 91.285 20.48 91.415 ; + RECT 20.085 91.515 20.265 91.645 ; + RECT 20.875 91.745 21.055 91.875 ; + RECT 20.085 93.935 20.265 94.065 ; + RECT 20.43 94.165 20.48 94.295 ; + RECT 20.085 94.395 20.265 94.525 ; + RECT 20.875 94.625 21.055 94.755 ; + RECT 20.085 96.815 20.265 96.945 ; + RECT 20.43 97.045 20.48 97.175 ; + RECT 20.085 97.275 20.265 97.405 ; + RECT 20.875 97.505 21.055 97.635 ; + RECT 20.085 99.695 20.265 99.825 ; + RECT 20.43 99.925 20.48 100.055 ; + RECT 20.085 71.355 20.265 71.485 ; + RECT 20.875 71.585 21.055 71.715 ; + RECT 20.085 73.775 20.265 73.905 ; + RECT 20.43 74.005 20.48 74.135 ; + RECT 6.22 20.815 6.27 20.945 ; + RECT 7.5 20.815 7.55 20.945 ; + RECT 9.04 20.815 9.09 20.945 ; + RECT 9.315 20.815 9.365 20.945 ; + RECT 9.72 20.815 9.77 20.945 ; + RECT 11.025 20.815 11.075 20.945 ; + RECT 12.79 20.815 12.84 20.945 ; + RECT 6.225 18.395 6.275 18.525 ; + RECT 7.5 18.395 7.55 18.525 ; + RECT 9.04 18.395 9.09 18.525 ; + RECT 9.315 18.395 9.365 18.525 ; + RECT 11.025 18.395 11.075 18.525 ; + RECT 12.79 18.395 12.84 18.525 ; + RECT 7.18 18.165 7.23 18.295 ; + RECT 14.14 18.165 14.19 18.295 ; + RECT 8.56 20.815 8.61 20.945 ; + RECT 10.27 20.815 10.32 20.945 ; + RECT 8.56 18.395 8.61 18.525 ; + RECT 10.27 18.395 10.32 18.525 ; + RECT 6.22 17.935 6.27 18.065 ; + RECT 7.5 17.935 7.55 18.065 ; + RECT 9.04 17.935 9.09 18.065 ; + RECT 9.315 17.935 9.365 18.065 ; + RECT 9.72 17.935 9.77 18.065 ; + RECT 11.025 17.935 11.075 18.065 ; + RECT 12.79 17.935 12.84 18.065 ; + RECT 6.225 15.515 6.275 15.645 ; + RECT 7.5 15.515 7.55 15.645 ; + RECT 9.04 15.515 9.09 15.645 ; + RECT 9.315 15.515 9.365 15.645 ; + RECT 11.025 15.515 11.075 15.645 ; + RECT 12.79 15.515 12.84 15.645 ; + RECT 7.18 15.285 7.23 15.415 ; + RECT 14.14 15.285 14.19 15.415 ; + RECT 8.56 17.935 8.61 18.065 ; + RECT 10.27 17.935 10.32 18.065 ; + RECT 8.56 15.515 8.61 15.645 ; + RECT 10.27 15.515 10.32 15.645 ; + RECT 6.22 15.055 6.27 15.185 ; + RECT 7.5 15.055 7.55 15.185 ; + RECT 9.04 15.055 9.09 15.185 ; + RECT 9.315 15.055 9.365 15.185 ; + RECT 9.72 15.055 9.77 15.185 ; + RECT 11.025 15.055 11.075 15.185 ; + RECT 12.79 15.055 12.84 15.185 ; + RECT 6.225 12.635 6.275 12.765 ; + RECT 7.5 12.635 7.55 12.765 ; + RECT 9.04 12.635 9.09 12.765 ; + RECT 9.315 12.635 9.365 12.765 ; + RECT 11.025 12.635 11.075 12.765 ; + RECT 12.79 12.635 12.84 12.765 ; + RECT 7.18 12.405 7.23 12.535 ; + RECT 14.14 12.405 14.19 12.535 ; + RECT 8.56 15.055 8.61 15.185 ; + RECT 10.27 15.055 10.32 15.185 ; + RECT 8.56 12.635 8.61 12.765 ; + RECT 10.27 12.635 10.32 12.765 ; + RECT 6.22 12.175 6.27 12.305 ; + RECT 7.5 12.175 7.55 12.305 ; + RECT 9.04 12.175 9.09 12.305 ; + RECT 9.315 12.175 9.365 12.305 ; + RECT 9.72 12.175 9.77 12.305 ; + RECT 11.025 12.175 11.075 12.305 ; + RECT 12.79 12.175 12.84 12.305 ; + RECT 6.225 9.755 6.275 9.885 ; + RECT 7.5 9.755 7.55 9.885 ; + RECT 9.04 9.755 9.09 9.885 ; + RECT 9.315 9.755 9.365 9.885 ; + RECT 11.025 9.755 11.075 9.885 ; + RECT 12.79 9.755 12.84 9.885 ; + RECT 7.18 9.525 7.23 9.655 ; + RECT 14.14 9.525 14.19 9.655 ; + RECT 8.56 12.175 8.61 12.305 ; + RECT 10.27 12.175 10.32 12.305 ; + RECT 8.56 9.755 8.61 9.885 ; + RECT 10.27 9.755 10.32 9.885 ; + RECT 6.22 9.295 6.27 9.425 ; + RECT 7.5 9.295 7.55 9.425 ; + RECT 9.04 9.295 9.09 9.425 ; + RECT 9.315 9.295 9.365 9.425 ; + RECT 9.72 9.295 9.77 9.425 ; + RECT 11.025 9.295 11.075 9.425 ; + RECT 12.79 9.295 12.84 9.425 ; + RECT 6.225 6.875 6.275 7.005 ; + RECT 7.5 6.875 7.55 7.005 ; + RECT 9.04 6.875 9.09 7.005 ; + RECT 9.315 6.875 9.365 7.005 ; + RECT 11.025 6.875 11.075 7.005 ; + RECT 12.79 6.875 12.84 7.005 ; + RECT 7.18 6.645 7.23 6.775 ; + RECT 14.14 6.645 14.19 6.775 ; + RECT 8.56 9.295 8.61 9.425 ; + RECT 10.27 9.295 10.32 9.425 ; + RECT 8.56 6.875 8.61 7.005 ; + RECT 10.27 6.875 10.32 7.005 ; + RECT 6.22 6.415 6.27 6.545 ; + RECT 7.5 6.415 7.55 6.545 ; + RECT 9.04 6.415 9.09 6.545 ; + RECT 9.315 6.415 9.365 6.545 ; + RECT 9.72 6.415 9.77 6.545 ; + RECT 11.025 6.415 11.075 6.545 ; + RECT 12.79 6.415 12.84 6.545 ; + RECT 6.225 3.995 6.275 4.125 ; + RECT 7.5 3.995 7.55 4.125 ; + RECT 9.04 3.995 9.09 4.125 ; + RECT 9.315 3.995 9.365 4.125 ; + RECT 11.025 3.995 11.075 4.125 ; + RECT 12.79 3.995 12.84 4.125 ; + RECT 7.18 3.765 7.23 3.895 ; + RECT 14.14 3.765 14.19 3.895 ; + RECT 8.56 6.415 8.61 6.545 ; + RECT 10.27 6.415 10.32 6.545 ; + RECT 8.56 3.995 8.61 4.125 ; + RECT 10.27 3.995 10.32 4.125 ; + RECT 6.22 3.535 6.27 3.665 ; + RECT 7.5 3.535 7.55 3.665 ; + RECT 9.04 3.535 9.09 3.665 ; + RECT 9.315 3.535 9.365 3.665 ; + RECT 9.72 3.535 9.77 3.665 ; + RECT 11.025 3.535 11.075 3.665 ; + RECT 12.79 3.535 12.84 3.665 ; + RECT 6.225 1.115 6.275 1.245 ; + RECT 7.5 1.115 7.55 1.245 ; + RECT 9.04 1.115 9.09 1.245 ; + RECT 9.315 1.115 9.365 1.245 ; + RECT 11.025 1.115 11.075 1.245 ; + RECT 12.79 1.115 12.84 1.245 ; + RECT 7.18 0.885 7.23 1.015 ; + RECT 14.14 0.885 14.19 1.015 ; + RECT 8.56 3.535 8.61 3.665 ; + RECT 10.27 3.535 10.32 3.665 ; + RECT 8.56 1.115 8.61 1.245 ; + RECT 10.27 1.115 10.32 1.245 ; + RECT 6.22 26.575 6.27 26.705 ; + RECT 7.5 26.575 7.55 26.705 ; + RECT 9.04 26.575 9.09 26.705 ; + RECT 9.315 26.575 9.365 26.705 ; + RECT 9.72 26.575 9.77 26.705 ; + RECT 11.025 26.575 11.075 26.705 ; + RECT 12.79 26.575 12.84 26.705 ; + RECT 6.225 24.155 6.275 24.285 ; + RECT 7.5 24.155 7.55 24.285 ; + RECT 9.04 24.155 9.09 24.285 ; + RECT 9.315 24.155 9.365 24.285 ; + RECT 11.025 24.155 11.075 24.285 ; + RECT 12.79 24.155 12.84 24.285 ; + RECT 7.18 23.925 7.23 24.055 ; + RECT 14.14 23.925 14.19 24.055 ; + RECT 8.56 26.575 8.61 26.705 ; + RECT 10.27 26.575 10.32 26.705 ; + RECT 8.56 24.155 8.61 24.285 ; + RECT 10.27 24.155 10.32 24.285 ; + RECT 6.22 23.695 6.27 23.825 ; + RECT 7.5 23.695 7.55 23.825 ; + RECT 9.04 23.695 9.09 23.825 ; + RECT 9.315 23.695 9.365 23.825 ; + RECT 9.72 23.695 9.77 23.825 ; + RECT 11.025 23.695 11.075 23.825 ; + RECT 12.79 23.695 12.84 23.825 ; + RECT 6.225 21.275 6.275 21.405 ; + RECT 7.5 21.275 7.55 21.405 ; + RECT 9.04 21.275 9.09 21.405 ; + RECT 9.315 21.275 9.365 21.405 ; + RECT 11.025 21.275 11.075 21.405 ; + RECT 12.79 21.275 12.84 21.405 ; + RECT 7.18 21.045 7.23 21.175 ; + RECT 14.14 21.045 14.19 21.175 ; + RECT 8.56 23.695 8.61 23.825 ; + RECT 10.27 23.695 10.32 23.825 ; + RECT 8.56 21.275 8.61 21.405 ; + RECT 10.27 21.275 10.32 21.405 ; + RECT 14.33 23.695 14.38 23.825 ; + RECT 6.22 23.235 6.27 23.365 ; + RECT 7.5 23.235 7.55 23.365 ; + RECT 9.04 23.235 9.09 23.365 ; + RECT 9.315 23.235 9.365 23.365 ; + RECT 9.72 23.235 9.77 23.365 ; + RECT 11.025 23.235 11.075 23.365 ; + RECT 12.79 23.235 12.84 23.365 ; + RECT 14.33 21.275 14.38 21.405 ; + RECT 5.675 21.045 5.725 21.175 ; + RECT 6.065 21.045 6.115 21.175 ; + RECT 6.725 21.045 6.775 21.175 ; + RECT 8.42 21.045 8.47 21.175 ; + RECT 8.77 21.045 8.82 21.175 ; + RECT 11.555 21.045 11.605 21.175 ; + RECT 11.815 21.045 11.865 21.175 ; + RECT 12.52 21.045 12.57 21.175 ; + RECT 13.98 21.045 14.03 21.175 ; + RECT 14.33 20.815 14.38 20.945 ; + RECT 6.22 20.355 6.27 20.485 ; + RECT 7.5 20.355 7.55 20.485 ; + RECT 9.04 20.355 9.09 20.485 ; + RECT 9.315 20.355 9.365 20.485 ; + RECT 9.72 20.355 9.77 20.485 ; + RECT 11.025 20.355 11.075 20.485 ; + RECT 12.79 20.355 12.84 20.485 ; + RECT 14.33 18.395 14.38 18.525 ; + RECT 5.675 18.165 5.725 18.295 ; + RECT 6.065 18.165 6.115 18.295 ; + RECT 6.725 18.165 6.775 18.295 ; + RECT 8.42 18.165 8.47 18.295 ; + RECT 8.77 18.165 8.82 18.295 ; + RECT 11.555 18.165 11.605 18.295 ; + RECT 11.815 18.165 11.865 18.295 ; + RECT 12.52 18.165 12.57 18.295 ; + RECT 13.98 18.165 14.03 18.295 ; + RECT 14.33 17.935 14.38 18.065 ; + RECT 6.22 17.475 6.27 17.605 ; + RECT 7.5 17.475 7.55 17.605 ; + RECT 9.04 17.475 9.09 17.605 ; + RECT 9.315 17.475 9.365 17.605 ; + RECT 9.72 17.475 9.77 17.605 ; + RECT 11.025 17.475 11.075 17.605 ; + RECT 12.79 17.475 12.84 17.605 ; + RECT 14.33 15.515 14.38 15.645 ; + RECT 5.675 15.285 5.725 15.415 ; + RECT 6.065 15.285 6.115 15.415 ; + RECT 6.725 15.285 6.775 15.415 ; + RECT 8.42 15.285 8.47 15.415 ; + RECT 8.77 15.285 8.82 15.415 ; + RECT 11.555 15.285 11.605 15.415 ; + RECT 11.815 15.285 11.865 15.415 ; + RECT 12.52 15.285 12.57 15.415 ; + RECT 13.98 15.285 14.03 15.415 ; + RECT 14.33 15.055 14.38 15.185 ; + RECT 6.22 14.595 6.27 14.725 ; + RECT 7.5 14.595 7.55 14.725 ; + RECT 9.04 14.595 9.09 14.725 ; + RECT 9.315 14.595 9.365 14.725 ; + RECT 9.72 14.595 9.77 14.725 ; + RECT 11.025 14.595 11.075 14.725 ; + RECT 12.79 14.595 12.84 14.725 ; + RECT 14.33 12.635 14.38 12.765 ; + RECT 5.675 12.405 5.725 12.535 ; + RECT 6.065 12.405 6.115 12.535 ; + RECT 6.725 12.405 6.775 12.535 ; + RECT 8.42 12.405 8.47 12.535 ; + RECT 8.77 12.405 8.82 12.535 ; + RECT 11.555 12.405 11.605 12.535 ; + RECT 11.815 12.405 11.865 12.535 ; + RECT 12.52 12.405 12.57 12.535 ; + RECT 13.98 12.405 14.03 12.535 ; + RECT 14.33 12.175 14.38 12.305 ; + RECT 6.22 11.715 6.27 11.845 ; + RECT 7.5 11.715 7.55 11.845 ; + RECT 9.04 11.715 9.09 11.845 ; + RECT 9.315 11.715 9.365 11.845 ; + RECT 9.72 11.715 9.77 11.845 ; + RECT 11.025 11.715 11.075 11.845 ; + RECT 12.79 11.715 12.84 11.845 ; + RECT 14.33 9.755 14.38 9.885 ; + RECT 5.675 9.525 5.725 9.655 ; + RECT 6.065 9.525 6.115 9.655 ; + RECT 6.725 9.525 6.775 9.655 ; + RECT 8.42 9.525 8.47 9.655 ; + RECT 8.77 9.525 8.82 9.655 ; + RECT 11.555 9.525 11.605 9.655 ; + RECT 11.815 9.525 11.865 9.655 ; + RECT 12.52 9.525 12.57 9.655 ; + RECT 13.98 9.525 14.03 9.655 ; + RECT 14.33 9.295 14.38 9.425 ; + RECT 6.22 8.835 6.27 8.965 ; + RECT 7.5 8.835 7.55 8.965 ; + RECT 9.04 8.835 9.09 8.965 ; + RECT 9.315 8.835 9.365 8.965 ; + RECT 9.72 8.835 9.77 8.965 ; + RECT 11.025 8.835 11.075 8.965 ; + RECT 12.79 8.835 12.84 8.965 ; + RECT 14.33 6.875 14.38 7.005 ; + RECT 5.675 6.645 5.725 6.775 ; + RECT 6.065 6.645 6.115 6.775 ; + RECT 6.725 6.645 6.775 6.775 ; + RECT 8.42 6.645 8.47 6.775 ; + RECT 8.77 6.645 8.82 6.775 ; + RECT 11.555 6.645 11.605 6.775 ; + RECT 11.815 6.645 11.865 6.775 ; + RECT 12.52 6.645 12.57 6.775 ; + RECT 13.98 6.645 14.03 6.775 ; + RECT 14.33 6.415 14.38 6.545 ; + RECT 6.22 5.955 6.27 6.085 ; + RECT 7.5 5.955 7.55 6.085 ; + RECT 9.04 5.955 9.09 6.085 ; + RECT 9.315 5.955 9.365 6.085 ; + RECT 9.72 5.955 9.77 6.085 ; + RECT 11.025 5.955 11.075 6.085 ; + RECT 12.79 5.955 12.84 6.085 ; + RECT 14.33 3.995 14.38 4.125 ; + RECT 5.675 3.765 5.725 3.895 ; + RECT 6.065 3.765 6.115 3.895 ; + RECT 6.725 3.765 6.775 3.895 ; + RECT 8.42 3.765 8.47 3.895 ; + RECT 8.77 3.765 8.82 3.895 ; + RECT 11.555 3.765 11.605 3.895 ; + RECT 11.815 3.765 11.865 3.895 ; + RECT 12.52 3.765 12.57 3.895 ; + RECT 13.98 3.765 14.03 3.895 ; + RECT 14.33 3.535 14.38 3.665 ; + RECT 6.22 3.075 6.27 3.205 ; + RECT 7.5 3.075 7.55 3.205 ; + RECT 9.04 3.075 9.09 3.205 ; + RECT 9.315 3.075 9.365 3.205 ; + RECT 9.72 3.075 9.77 3.205 ; + RECT 11.025 3.075 11.075 3.205 ; + RECT 12.79 3.075 12.84 3.205 ; + RECT 14.33 1.115 14.38 1.245 ; + RECT 5.675 0.885 5.725 1.015 ; + RECT 6.065 0.885 6.115 1.015 ; + RECT 6.725 0.885 6.775 1.015 ; + RECT 8.42 0.885 8.47 1.015 ; + RECT 8.77 0.885 8.82 1.015 ; + RECT 11.555 0.885 11.605 1.015 ; + RECT 11.815 0.885 11.865 1.015 ; + RECT 12.52 0.885 12.57 1.015 ; + RECT 13.98 0.885 14.03 1.015 ; + RECT 14.33 26.575 14.38 26.705 ; + RECT 6.22 26.115 6.27 26.245 ; + RECT 7.5 26.115 7.55 26.245 ; + RECT 9.04 26.115 9.09 26.245 ; + RECT 9.315 26.115 9.365 26.245 ; + RECT 9.72 26.115 9.77 26.245 ; + RECT 11.025 26.115 11.075 26.245 ; + RECT 12.79 26.115 12.84 26.245 ; + RECT 14.33 24.155 14.38 24.285 ; + RECT 5.675 23.925 5.725 24.055 ; + RECT 6.065 23.925 6.115 24.055 ; + RECT 6.725 23.925 6.775 24.055 ; + RECT 8.42 23.925 8.47 24.055 ; + RECT 8.77 23.925 8.82 24.055 ; + RECT 11.555 23.925 11.605 24.055 ; + RECT 11.815 23.925 11.865 24.055 ; + RECT 12.52 23.925 12.57 24.055 ; + RECT 13.98 23.925 14.03 24.055 ; + RECT 13.98 0.195 14.03 0.325 ; + RECT 1.57 0.195 1.62 0.325 ; + RECT 2.485 0.195 2.665 0.325 ; + RECT 3.84 0.195 3.89 0.325 ; + RECT 7.19 0.195 7.24 0.325 ; + RECT 14.14 0.195 14.19 0.325 ; + RECT 13.8 0.425 13.85 0.555 ; + RECT 8.56 0.655 8.61 0.785 ; + RECT 10.27 0.655 10.32 0.785 ; + RECT 0.435 0.655 0.485 0.785 ; + RECT 0.62 0.195 0.67 0.325 ; + RECT 3.65 0.195 3.7 0.325 ; + RECT 2.18 0.655 2.23 0.785 ; + RECT 0.9 21.045 0.95 21.175 ; + RECT 0.9 18.165 0.95 18.295 ; + RECT 0.9 15.285 0.95 15.415 ; + RECT 0.9 12.405 0.95 12.535 ; + RECT 0.9 9.525 0.95 9.655 ; + RECT 0.9 6.645 0.95 6.775 ; + RECT 0.9 3.765 0.95 3.895 ; + RECT 0.9 0.885 0.95 1.015 ; + RECT 0.9 23.925 0.95 24.055 ; + RECT 3.65 23.925 3.7 24.055 ; + RECT 3.65 21.045 3.7 21.175 ; + RECT 3.65 18.165 3.7 18.295 ; + RECT 3.65 15.285 3.7 15.415 ; + RECT 3.65 12.405 3.7 12.535 ; + RECT 3.65 9.525 3.7 9.655 ; + RECT 3.65 6.645 3.7 6.775 ; + RECT 3.65 3.765 3.7 3.895 ; + RECT 3.65 0.885 3.7 1.015 ; + RECT 2.18 26.575 2.23 26.705 ; + RECT 2.18 24.155 2.23 24.285 ; + RECT 2.18 23.695 2.23 23.825 ; + RECT 2.18 21.275 2.23 21.405 ; + RECT 2.18 20.815 2.23 20.945 ; + RECT 2.18 18.395 2.23 18.525 ; + RECT 2.18 17.935 2.23 18.065 ; + RECT 2.18 15.515 2.23 15.645 ; + RECT 2.18 15.055 2.23 15.185 ; + RECT 2.18 12.635 2.23 12.765 ; + RECT 2.18 12.175 2.23 12.305 ; + RECT 2.18 9.755 2.23 9.885 ; + RECT 2.18 9.295 2.23 9.425 ; + RECT 2.18 6.875 2.23 7.005 ; + RECT 2.18 6.415 2.23 6.545 ; + RECT 2.18 3.995 2.23 4.125 ; + RECT 2.18 3.535 2.23 3.665 ; + RECT 2.18 1.115 2.23 1.245 ; + RECT 3.06 23.695 3.11 23.825 ; + RECT 1.085 23.235 1.135 23.365 ; + RECT 1.405 23.275 1.455 23.325 ; + RECT 4.47 23.275 4.6 23.325 ; + RECT 3.06 21.275 3.11 21.405 ; + RECT 1.57 21.045 1.62 21.175 ; + RECT 2.58 21.045 2.63 21.175 ; + RECT 3.84 21.045 3.89 21.175 ; + RECT 5.675 21.045 5.725 21.175 ; + RECT 3.06 20.815 3.11 20.945 ; + RECT 1.085 20.355 1.135 20.485 ; + RECT 1.405 20.395 1.455 20.445 ; + RECT 4.47 20.395 4.6 20.445 ; + RECT 3.06 18.395 3.11 18.525 ; + RECT 1.57 18.165 1.62 18.295 ; + RECT 2.58 18.165 2.63 18.295 ; + RECT 3.84 18.165 3.89 18.295 ; + RECT 5.675 18.165 5.725 18.295 ; + RECT 3.06 17.935 3.11 18.065 ; + RECT 1.085 17.475 1.135 17.605 ; + RECT 1.405 17.515 1.455 17.565 ; + RECT 4.47 17.515 4.6 17.565 ; + RECT 3.06 15.515 3.11 15.645 ; + RECT 1.57 15.285 1.62 15.415 ; + RECT 2.58 15.285 2.63 15.415 ; + RECT 3.84 15.285 3.89 15.415 ; + RECT 5.675 15.285 5.725 15.415 ; + RECT 3.06 15.055 3.11 15.185 ; + RECT 1.085 14.595 1.135 14.725 ; + RECT 1.405 14.635 1.455 14.685 ; + RECT 4.47 14.635 4.6 14.685 ; + RECT 3.06 12.635 3.11 12.765 ; + RECT 1.57 12.405 1.62 12.535 ; + RECT 2.58 12.405 2.63 12.535 ; + RECT 3.84 12.405 3.89 12.535 ; + RECT 5.675 12.405 5.725 12.535 ; + RECT 3.06 12.175 3.11 12.305 ; + RECT 1.085 11.715 1.135 11.845 ; + RECT 1.405 11.755 1.455 11.805 ; + RECT 4.47 11.755 4.6 11.805 ; + RECT 3.06 9.755 3.11 9.885 ; + RECT 1.57 9.525 1.62 9.655 ; + RECT 2.58 9.525 2.63 9.655 ; + RECT 3.84 9.525 3.89 9.655 ; + RECT 5.675 9.525 5.725 9.655 ; + RECT 3.06 9.295 3.11 9.425 ; + RECT 1.085 8.835 1.135 8.965 ; + RECT 1.405 8.875 1.455 8.925 ; + RECT 4.47 8.875 4.6 8.925 ; + RECT 3.06 6.875 3.11 7.005 ; + RECT 1.57 6.645 1.62 6.775 ; + RECT 2.58 6.645 2.63 6.775 ; + RECT 3.84 6.645 3.89 6.775 ; + RECT 5.675 6.645 5.725 6.775 ; + RECT 3.06 6.415 3.11 6.545 ; + RECT 1.085 5.955 1.135 6.085 ; + RECT 1.405 5.995 1.455 6.045 ; + RECT 4.47 5.995 4.6 6.045 ; + RECT 3.06 3.995 3.11 4.125 ; + RECT 1.57 3.765 1.62 3.895 ; + RECT 2.58 3.765 2.63 3.895 ; + RECT 3.84 3.765 3.89 3.895 ; + RECT 5.675 3.765 5.725 3.895 ; + RECT 3.06 3.535 3.11 3.665 ; + RECT 1.085 3.075 1.135 3.205 ; + RECT 1.405 3.115 1.455 3.165 ; + RECT 4.47 3.115 4.6 3.165 ; + RECT 3.06 1.115 3.11 1.245 ; + RECT 1.57 0.885 1.62 1.015 ; + RECT 2.58 0.885 2.63 1.015 ; + RECT 3.84 0.885 3.89 1.015 ; + RECT 5.675 0.885 5.725 1.015 ; + RECT 3.06 26.575 3.11 26.705 ; + RECT 1.085 26.115 1.135 26.245 ; + RECT 1.405 26.155 1.455 26.205 ; + RECT 4.47 26.155 4.6 26.205 ; + RECT 3.06 24.155 3.11 24.285 ; + RECT 1.57 23.925 1.62 24.055 ; + RECT 2.58 23.925 2.63 24.055 ; + RECT 3.84 23.925 3.89 24.055 ; + RECT 5.675 23.925 5.725 24.055 ; + RECT 0.435 26.115 0.485 26.245 ; + RECT 0.435 26.575 0.485 26.705 ; + RECT 0.435 24.155 0.485 24.285 ; + RECT 0.435 23.235 0.485 23.365 ; + RECT 0.435 23.695 0.485 23.825 ; + RECT 0.435 21.275 0.485 21.405 ; + RECT 0.435 20.355 0.485 20.485 ; + RECT 0.435 20.815 0.485 20.945 ; + RECT 0.435 18.395 0.485 18.525 ; + RECT 0.435 17.475 0.485 17.605 ; + RECT 0.435 17.935 0.485 18.065 ; + RECT 0.435 15.515 0.485 15.645 ; + RECT 0.435 14.595 0.485 14.725 ; + RECT 0.435 15.055 0.485 15.185 ; + RECT 0.435 12.635 0.485 12.765 ; + RECT 0.435 11.715 0.485 11.845 ; + RECT 0.435 12.175 0.485 12.305 ; + RECT 0.435 9.755 0.485 9.885 ; + RECT 0.435 8.835 0.485 8.965 ; + RECT 0.435 9.295 0.485 9.425 ; + RECT 0.435 6.875 0.485 7.005 ; + RECT 0.435 5.955 0.485 6.085 ; + RECT 0.435 6.415 0.485 6.545 ; + RECT 0.435 3.995 0.485 4.125 ; + RECT 0.435 3.075 0.485 3.205 ; + RECT 0.435 3.535 0.485 3.665 ; + RECT 0.435 1.115 0.485 1.245 ; + RECT 6.22 71.355 6.27 71.485 ; + RECT 7.5 71.355 7.55 71.485 ; + RECT 9.04 71.355 9.09 71.485 ; + RECT 9.315 71.355 9.365 71.485 ; + RECT 9.72 71.355 9.77 71.485 ; + RECT 11.025 71.355 11.075 71.485 ; + RECT 12.79 71.355 12.84 71.485 ; + RECT 6.225 73.775 6.275 73.905 ; + RECT 7.5 73.775 7.55 73.905 ; + RECT 9.04 73.775 9.09 73.905 ; + RECT 9.315 73.775 9.365 73.905 ; + RECT 11.025 73.775 11.075 73.905 ; + RECT 12.79 73.775 12.84 73.905 ; + RECT 7.18 74.005 7.23 74.135 ; + RECT 14.14 74.005 14.19 74.135 ; + RECT 8.56 71.355 8.61 71.485 ; + RECT 10.27 71.355 10.32 71.485 ; + RECT 8.56 73.775 8.61 73.905 ; + RECT 10.27 73.775 10.32 73.905 ; + RECT 6.22 74.235 6.27 74.365 ; + RECT 7.5 74.235 7.55 74.365 ; + RECT 9.04 74.235 9.09 74.365 ; + RECT 9.315 74.235 9.365 74.365 ; + RECT 9.72 74.235 9.77 74.365 ; + RECT 11.025 74.235 11.075 74.365 ; + RECT 12.79 74.235 12.84 74.365 ; + RECT 6.225 76.655 6.275 76.785 ; + RECT 7.5 76.655 7.55 76.785 ; + RECT 9.04 76.655 9.09 76.785 ; + RECT 9.315 76.655 9.365 76.785 ; + RECT 11.025 76.655 11.075 76.785 ; + RECT 12.79 76.655 12.84 76.785 ; + RECT 7.18 76.885 7.23 77.015 ; + RECT 14.14 76.885 14.19 77.015 ; + RECT 8.56 74.235 8.61 74.365 ; + RECT 10.27 74.235 10.32 74.365 ; + RECT 8.56 76.655 8.61 76.785 ; + RECT 10.27 76.655 10.32 76.785 ; + RECT 6.22 77.115 6.27 77.245 ; + RECT 7.5 77.115 7.55 77.245 ; + RECT 9.04 77.115 9.09 77.245 ; + RECT 9.315 77.115 9.365 77.245 ; + RECT 9.72 77.115 9.77 77.245 ; + RECT 11.025 77.115 11.075 77.245 ; + RECT 12.79 77.115 12.84 77.245 ; + RECT 6.225 79.535 6.275 79.665 ; + RECT 7.5 79.535 7.55 79.665 ; + RECT 9.04 79.535 9.09 79.665 ; + RECT 9.315 79.535 9.365 79.665 ; + RECT 11.025 79.535 11.075 79.665 ; + RECT 12.79 79.535 12.84 79.665 ; + RECT 7.18 79.765 7.23 79.895 ; + RECT 14.14 79.765 14.19 79.895 ; + RECT 8.56 77.115 8.61 77.245 ; + RECT 10.27 77.115 10.32 77.245 ; + RECT 8.56 79.535 8.61 79.665 ; + RECT 10.27 79.535 10.32 79.665 ; + RECT 6.22 79.995 6.27 80.125 ; + RECT 7.5 79.995 7.55 80.125 ; + RECT 9.04 79.995 9.09 80.125 ; + RECT 9.315 79.995 9.365 80.125 ; + RECT 9.72 79.995 9.77 80.125 ; + RECT 11.025 79.995 11.075 80.125 ; + RECT 12.79 79.995 12.84 80.125 ; + RECT 6.225 82.415 6.275 82.545 ; + RECT 7.5 82.415 7.55 82.545 ; + RECT 9.04 82.415 9.09 82.545 ; + RECT 9.315 82.415 9.365 82.545 ; + RECT 11.025 82.415 11.075 82.545 ; + RECT 12.79 82.415 12.84 82.545 ; + RECT 7.18 82.645 7.23 82.775 ; + RECT 14.14 82.645 14.19 82.775 ; + RECT 8.56 79.995 8.61 80.125 ; + RECT 10.27 79.995 10.32 80.125 ; + RECT 8.56 82.415 8.61 82.545 ; + RECT 10.27 82.415 10.32 82.545 ; + RECT 6.22 82.875 6.27 83.005 ; + RECT 7.5 82.875 7.55 83.005 ; + RECT 9.04 82.875 9.09 83.005 ; + RECT 9.315 82.875 9.365 83.005 ; + RECT 9.72 82.875 9.77 83.005 ; + RECT 11.025 82.875 11.075 83.005 ; + RECT 12.79 82.875 12.84 83.005 ; + RECT 6.225 85.295 6.275 85.425 ; + RECT 7.5 85.295 7.55 85.425 ; + RECT 9.04 85.295 9.09 85.425 ; + RECT 9.315 85.295 9.365 85.425 ; + RECT 11.025 85.295 11.075 85.425 ; + RECT 12.79 85.295 12.84 85.425 ; + RECT 7.18 85.525 7.23 85.655 ; + RECT 14.14 85.525 14.19 85.655 ; + RECT 8.56 82.875 8.61 83.005 ; + RECT 10.27 82.875 10.32 83.005 ; + RECT 8.56 85.295 8.61 85.425 ; + RECT 10.27 85.295 10.32 85.425 ; + RECT 6.22 85.755 6.27 85.885 ; + RECT 7.5 85.755 7.55 85.885 ; + RECT 9.04 85.755 9.09 85.885 ; + RECT 9.315 85.755 9.365 85.885 ; + RECT 9.72 85.755 9.77 85.885 ; + RECT 11.025 85.755 11.075 85.885 ; + RECT 12.79 85.755 12.84 85.885 ; + RECT 6.225 88.175 6.275 88.305 ; + RECT 7.5 88.175 7.55 88.305 ; + RECT 9.04 88.175 9.09 88.305 ; + RECT 9.315 88.175 9.365 88.305 ; + RECT 11.025 88.175 11.075 88.305 ; + RECT 12.79 88.175 12.84 88.305 ; + RECT 7.18 88.405 7.23 88.535 ; + RECT 14.14 88.405 14.19 88.535 ; + RECT 8.56 85.755 8.61 85.885 ; + RECT 10.27 85.755 10.32 85.885 ; + RECT 8.56 88.175 8.61 88.305 ; + RECT 10.27 88.175 10.32 88.305 ; + RECT 6.22 88.635 6.27 88.765 ; + RECT 7.5 88.635 7.55 88.765 ; + RECT 9.04 88.635 9.09 88.765 ; + RECT 9.315 88.635 9.365 88.765 ; + RECT 9.72 88.635 9.77 88.765 ; + RECT 11.025 88.635 11.075 88.765 ; + RECT 12.79 88.635 12.84 88.765 ; + RECT 6.225 91.055 6.275 91.185 ; + RECT 7.5 91.055 7.55 91.185 ; + RECT 9.04 91.055 9.09 91.185 ; + RECT 9.315 91.055 9.365 91.185 ; + RECT 11.025 91.055 11.075 91.185 ; + RECT 12.79 91.055 12.84 91.185 ; + RECT 7.18 91.285 7.23 91.415 ; + RECT 14.14 91.285 14.19 91.415 ; + RECT 8.56 88.635 8.61 88.765 ; + RECT 10.27 88.635 10.32 88.765 ; + RECT 8.56 91.055 8.61 91.185 ; + RECT 10.27 91.055 10.32 91.185 ; + RECT 6.22 91.515 6.27 91.645 ; + RECT 7.5 91.515 7.55 91.645 ; + RECT 9.04 91.515 9.09 91.645 ; + RECT 9.315 91.515 9.365 91.645 ; + RECT 9.72 91.515 9.77 91.645 ; + RECT 11.025 91.515 11.075 91.645 ; + RECT 12.79 91.515 12.84 91.645 ; + RECT 6.225 93.935 6.275 94.065 ; + RECT 7.5 93.935 7.55 94.065 ; + RECT 9.04 93.935 9.09 94.065 ; + RECT 9.315 93.935 9.365 94.065 ; + RECT 11.025 93.935 11.075 94.065 ; + RECT 12.79 93.935 12.84 94.065 ; + RECT 7.18 94.165 7.23 94.295 ; + RECT 14.14 94.165 14.19 94.295 ; + RECT 8.56 91.515 8.61 91.645 ; + RECT 10.27 91.515 10.32 91.645 ; + RECT 8.56 93.935 8.61 94.065 ; + RECT 10.27 93.935 10.32 94.065 ; + RECT 6.22 94.395 6.27 94.525 ; + RECT 7.5 94.395 7.55 94.525 ; + RECT 9.04 94.395 9.09 94.525 ; + RECT 9.315 94.395 9.365 94.525 ; + RECT 9.72 94.395 9.77 94.525 ; + RECT 11.025 94.395 11.075 94.525 ; + RECT 12.79 94.395 12.84 94.525 ; + RECT 6.225 96.815 6.275 96.945 ; + RECT 7.5 96.815 7.55 96.945 ; + RECT 9.04 96.815 9.09 96.945 ; + RECT 9.315 96.815 9.365 96.945 ; + RECT 11.025 96.815 11.075 96.945 ; + RECT 12.79 96.815 12.84 96.945 ; + RECT 7.18 97.045 7.23 97.175 ; + RECT 14.14 97.045 14.19 97.175 ; + RECT 8.56 94.395 8.61 94.525 ; + RECT 10.27 94.395 10.32 94.525 ; + RECT 8.56 96.815 8.61 96.945 ; + RECT 10.27 96.815 10.32 96.945 ; + RECT 6.22 97.275 6.27 97.405 ; + RECT 7.5 97.275 7.55 97.405 ; + RECT 9.04 97.275 9.09 97.405 ; + RECT 9.315 97.275 9.365 97.405 ; + RECT 9.72 97.275 9.77 97.405 ; + RECT 11.025 97.275 11.075 97.405 ; + RECT 12.79 97.275 12.84 97.405 ; + RECT 6.225 99.695 6.275 99.825 ; + RECT 7.5 99.695 7.55 99.825 ; + RECT 9.04 99.695 9.09 99.825 ; + RECT 9.315 99.695 9.365 99.825 ; + RECT 11.025 99.695 11.075 99.825 ; + RECT 12.79 99.695 12.84 99.825 ; + RECT 7.18 99.925 7.23 100.055 ; + RECT 14.14 99.925 14.19 100.055 ; + RECT 8.56 97.275 8.61 97.405 ; + RECT 10.27 97.275 10.32 97.405 ; + RECT 8.56 99.695 8.61 99.825 ; + RECT 10.27 99.695 10.32 99.825 ; + RECT 14.33 74.235 14.38 74.365 ; + RECT 6.22 74.695 6.27 74.825 ; + RECT 7.5 74.695 7.55 74.825 ; + RECT 9.04 74.695 9.09 74.825 ; + RECT 9.315 74.695 9.365 74.825 ; + RECT 9.72 74.695 9.77 74.825 ; + RECT 11.025 74.695 11.075 74.825 ; + RECT 12.79 74.695 12.84 74.825 ; + RECT 14.33 76.655 14.38 76.785 ; + RECT 5.675 76.885 5.725 77.015 ; + RECT 6.065 76.885 6.115 77.015 ; + RECT 6.725 76.885 6.775 77.015 ; + RECT 8.42 76.885 8.47 77.015 ; + RECT 8.77 76.885 8.82 77.015 ; + RECT 11.555 76.885 11.605 77.015 ; + RECT 11.815 76.885 11.865 77.015 ; + RECT 12.52 76.885 12.57 77.015 ; + RECT 13.98 76.885 14.03 77.015 ; + RECT 14.33 77.115 14.38 77.245 ; + RECT 6.22 77.575 6.27 77.705 ; + RECT 7.5 77.575 7.55 77.705 ; + RECT 9.04 77.575 9.09 77.705 ; + RECT 9.315 77.575 9.365 77.705 ; + RECT 9.72 77.575 9.77 77.705 ; + RECT 11.025 77.575 11.075 77.705 ; + RECT 12.79 77.575 12.84 77.705 ; + RECT 14.33 79.535 14.38 79.665 ; + RECT 5.675 79.765 5.725 79.895 ; + RECT 6.065 79.765 6.115 79.895 ; + RECT 6.725 79.765 6.775 79.895 ; + RECT 8.42 79.765 8.47 79.895 ; + RECT 8.77 79.765 8.82 79.895 ; + RECT 11.555 79.765 11.605 79.895 ; + RECT 11.815 79.765 11.865 79.895 ; + RECT 12.52 79.765 12.57 79.895 ; + RECT 13.98 79.765 14.03 79.895 ; + RECT 14.33 79.995 14.38 80.125 ; + RECT 6.22 80.455 6.27 80.585 ; + RECT 7.5 80.455 7.55 80.585 ; + RECT 9.04 80.455 9.09 80.585 ; + RECT 9.315 80.455 9.365 80.585 ; + RECT 9.72 80.455 9.77 80.585 ; + RECT 11.025 80.455 11.075 80.585 ; + RECT 12.79 80.455 12.84 80.585 ; + RECT 14.33 82.415 14.38 82.545 ; + RECT 5.675 82.645 5.725 82.775 ; + RECT 6.065 82.645 6.115 82.775 ; + RECT 6.725 82.645 6.775 82.775 ; + RECT 8.42 82.645 8.47 82.775 ; + RECT 8.77 82.645 8.82 82.775 ; + RECT 11.555 82.645 11.605 82.775 ; + RECT 11.815 82.645 11.865 82.775 ; + RECT 12.52 82.645 12.57 82.775 ; + RECT 13.98 82.645 14.03 82.775 ; + RECT 14.33 82.875 14.38 83.005 ; + RECT 6.22 83.335 6.27 83.465 ; + RECT 7.5 83.335 7.55 83.465 ; + RECT 9.04 83.335 9.09 83.465 ; + RECT 9.315 83.335 9.365 83.465 ; + RECT 9.72 83.335 9.77 83.465 ; + RECT 11.025 83.335 11.075 83.465 ; + RECT 12.79 83.335 12.84 83.465 ; + RECT 14.33 85.295 14.38 85.425 ; + RECT 5.675 85.525 5.725 85.655 ; + RECT 6.065 85.525 6.115 85.655 ; + RECT 6.725 85.525 6.775 85.655 ; + RECT 8.42 85.525 8.47 85.655 ; + RECT 8.77 85.525 8.82 85.655 ; + RECT 11.555 85.525 11.605 85.655 ; + RECT 11.815 85.525 11.865 85.655 ; + RECT 12.52 85.525 12.57 85.655 ; + RECT 13.98 85.525 14.03 85.655 ; + RECT 14.33 85.755 14.38 85.885 ; + RECT 6.22 86.215 6.27 86.345 ; + RECT 7.5 86.215 7.55 86.345 ; + RECT 9.04 86.215 9.09 86.345 ; + RECT 9.315 86.215 9.365 86.345 ; + RECT 9.72 86.215 9.77 86.345 ; + RECT 11.025 86.215 11.075 86.345 ; + RECT 12.79 86.215 12.84 86.345 ; + RECT 14.33 88.175 14.38 88.305 ; + RECT 5.675 88.405 5.725 88.535 ; + RECT 6.065 88.405 6.115 88.535 ; + RECT 6.725 88.405 6.775 88.535 ; + RECT 8.42 88.405 8.47 88.535 ; + RECT 8.77 88.405 8.82 88.535 ; + RECT 11.555 88.405 11.605 88.535 ; + RECT 11.815 88.405 11.865 88.535 ; + RECT 12.52 88.405 12.57 88.535 ; + RECT 13.98 88.405 14.03 88.535 ; + RECT 14.33 88.635 14.38 88.765 ; + RECT 6.22 89.095 6.27 89.225 ; + RECT 7.5 89.095 7.55 89.225 ; + RECT 9.04 89.095 9.09 89.225 ; + RECT 9.315 89.095 9.365 89.225 ; + RECT 9.72 89.095 9.77 89.225 ; + RECT 11.025 89.095 11.075 89.225 ; + RECT 12.79 89.095 12.84 89.225 ; + RECT 14.33 91.055 14.38 91.185 ; + RECT 5.675 91.285 5.725 91.415 ; + RECT 6.065 91.285 6.115 91.415 ; + RECT 6.725 91.285 6.775 91.415 ; + RECT 8.42 91.285 8.47 91.415 ; + RECT 8.77 91.285 8.82 91.415 ; + RECT 11.555 91.285 11.605 91.415 ; + RECT 11.815 91.285 11.865 91.415 ; + RECT 12.52 91.285 12.57 91.415 ; + RECT 13.98 91.285 14.03 91.415 ; + RECT 14.33 91.515 14.38 91.645 ; + RECT 6.22 91.975 6.27 92.105 ; + RECT 7.5 91.975 7.55 92.105 ; + RECT 9.04 91.975 9.09 92.105 ; + RECT 9.315 91.975 9.365 92.105 ; + RECT 9.72 91.975 9.77 92.105 ; + RECT 11.025 91.975 11.075 92.105 ; + RECT 12.79 91.975 12.84 92.105 ; + RECT 14.33 93.935 14.38 94.065 ; + RECT 5.675 94.165 5.725 94.295 ; + RECT 6.065 94.165 6.115 94.295 ; + RECT 6.725 94.165 6.775 94.295 ; + RECT 8.42 94.165 8.47 94.295 ; + RECT 8.77 94.165 8.82 94.295 ; + RECT 11.555 94.165 11.605 94.295 ; + RECT 11.815 94.165 11.865 94.295 ; + RECT 12.52 94.165 12.57 94.295 ; + RECT 13.98 94.165 14.03 94.295 ; + RECT 14.33 94.395 14.38 94.525 ; + RECT 6.22 94.855 6.27 94.985 ; + RECT 7.5 94.855 7.55 94.985 ; + RECT 9.04 94.855 9.09 94.985 ; + RECT 9.315 94.855 9.365 94.985 ; + RECT 9.72 94.855 9.77 94.985 ; + RECT 11.025 94.855 11.075 94.985 ; + RECT 12.79 94.855 12.84 94.985 ; + RECT 14.33 96.815 14.38 96.945 ; + RECT 5.675 97.045 5.725 97.175 ; + RECT 6.065 97.045 6.115 97.175 ; + RECT 6.725 97.045 6.775 97.175 ; + RECT 8.42 97.045 8.47 97.175 ; + RECT 8.77 97.045 8.82 97.175 ; + RECT 11.555 97.045 11.605 97.175 ; + RECT 11.815 97.045 11.865 97.175 ; + RECT 12.52 97.045 12.57 97.175 ; + RECT 13.98 97.045 14.03 97.175 ; + RECT 14.33 97.275 14.38 97.405 ; + RECT 6.22 97.735 6.27 97.865 ; + RECT 7.5 97.735 7.55 97.865 ; + RECT 9.04 97.735 9.09 97.865 ; + RECT 9.315 97.735 9.365 97.865 ; + RECT 9.72 97.735 9.77 97.865 ; + RECT 11.025 97.735 11.075 97.865 ; + RECT 12.79 97.735 12.84 97.865 ; + RECT 14.33 99.695 14.38 99.825 ; + RECT 5.675 99.925 5.725 100.055 ; + RECT 6.065 99.925 6.115 100.055 ; + RECT 6.725 99.925 6.775 100.055 ; + RECT 8.42 99.925 8.47 100.055 ; + RECT 8.77 99.925 8.82 100.055 ; + RECT 11.555 99.925 11.605 100.055 ; + RECT 11.815 99.925 11.865 100.055 ; + RECT 12.52 99.925 12.57 100.055 ; + RECT 13.98 99.925 14.03 100.055 ; + RECT 14.33 71.355 14.38 71.485 ; + RECT 6.22 71.815 6.27 71.945 ; + RECT 7.5 71.815 7.55 71.945 ; + RECT 9.04 71.815 9.09 71.945 ; + RECT 9.315 71.815 9.365 71.945 ; + RECT 9.72 71.815 9.77 71.945 ; + RECT 11.025 71.815 11.075 71.945 ; + RECT 12.79 71.815 12.84 71.945 ; + RECT 14.33 73.775 14.38 73.905 ; + RECT 5.675 74.005 5.725 74.135 ; + RECT 6.065 74.005 6.115 74.135 ; + RECT 6.725 74.005 6.775 74.135 ; + RECT 8.42 74.005 8.47 74.135 ; + RECT 8.77 74.005 8.82 74.135 ; + RECT 11.555 74.005 11.605 74.135 ; + RECT 11.815 74.005 11.865 74.135 ; + RECT 12.52 74.005 12.57 74.135 ; + RECT 13.98 74.005 14.03 74.135 ; + RECT 13.98 100.615 14.03 100.745 ; + RECT 1.57 100.615 1.62 100.745 ; + RECT 2.485 100.615 2.665 100.745 ; + RECT 3.84 100.615 3.89 100.745 ; + RECT 7.19 100.615 7.24 100.745 ; + RECT 14.14 100.615 14.19 100.745 ; + RECT 13.8 100.385 13.85 100.515 ; + RECT 8.56 100.155 8.61 100.285 ; + RECT 10.27 100.155 10.32 100.285 ; + RECT 0.435 100.155 0.485 100.285 ; + RECT 0.62 100.615 0.67 100.745 ; + RECT 3.65 100.615 3.7 100.745 ; + RECT 2.18 100.155 2.23 100.285 ; + RECT 0.9 76.885 0.95 77.015 ; + RECT 0.9 79.765 0.95 79.895 ; + RECT 0.9 82.645 0.95 82.775 ; + RECT 0.9 85.525 0.95 85.655 ; + RECT 0.9 88.405 0.95 88.535 ; + RECT 0.9 91.285 0.95 91.415 ; + RECT 0.9 94.165 0.95 94.295 ; + RECT 0.9 97.045 0.95 97.175 ; + RECT 0.9 99.925 0.95 100.055 ; + RECT 0.9 74.005 0.95 74.135 ; + RECT 3.65 74.005 3.7 74.135 ; + RECT 3.65 76.885 3.7 77.015 ; + RECT 3.65 79.765 3.7 79.895 ; + RECT 3.65 82.645 3.7 82.775 ; + RECT 3.65 85.525 3.7 85.655 ; + RECT 3.65 88.405 3.7 88.535 ; + RECT 3.65 91.285 3.7 91.415 ; + RECT 3.65 94.165 3.7 94.295 ; + RECT 3.65 97.045 3.7 97.175 ; + RECT 3.65 99.925 3.7 100.055 ; + RECT 2.18 71.355 2.23 71.485 ; + RECT 2.18 73.775 2.23 73.905 ; + RECT 2.18 74.235 2.23 74.365 ; + RECT 2.18 76.655 2.23 76.785 ; + RECT 2.18 77.115 2.23 77.245 ; + RECT 2.18 79.535 2.23 79.665 ; + RECT 2.18 79.995 2.23 80.125 ; + RECT 2.18 82.415 2.23 82.545 ; + RECT 2.18 82.875 2.23 83.005 ; + RECT 2.18 85.295 2.23 85.425 ; + RECT 2.18 85.755 2.23 85.885 ; + RECT 2.18 88.175 2.23 88.305 ; + RECT 2.18 88.635 2.23 88.765 ; + RECT 2.18 91.055 2.23 91.185 ; + RECT 2.18 91.515 2.23 91.645 ; + RECT 2.18 93.935 2.23 94.065 ; + RECT 2.18 94.395 2.23 94.525 ; + RECT 2.18 96.815 2.23 96.945 ; + RECT 2.18 97.275 2.23 97.405 ; + RECT 2.18 99.695 2.23 99.825 ; + RECT 3.06 74.235 3.11 74.365 ; + RECT 1.085 74.695 1.135 74.825 ; + RECT 1.405 74.735 1.455 74.785 ; + RECT 4.47 74.735 4.6 74.785 ; + RECT 3.06 76.655 3.11 76.785 ; + RECT 1.57 76.885 1.62 77.015 ; + RECT 2.58 76.885 2.63 77.015 ; + RECT 3.84 76.885 3.89 77.015 ; + RECT 5.675 76.885 5.725 77.015 ; + RECT 3.06 77.115 3.11 77.245 ; + RECT 1.085 77.575 1.135 77.705 ; + RECT 1.405 77.615 1.455 77.665 ; + RECT 4.47 77.615 4.6 77.665 ; + RECT 3.06 79.535 3.11 79.665 ; + RECT 1.57 79.765 1.62 79.895 ; + RECT 2.58 79.765 2.63 79.895 ; + RECT 3.84 79.765 3.89 79.895 ; + RECT 5.675 79.765 5.725 79.895 ; + RECT 3.06 79.995 3.11 80.125 ; + RECT 1.085 80.455 1.135 80.585 ; + RECT 1.405 80.495 1.455 80.545 ; + RECT 4.47 80.495 4.6 80.545 ; + RECT 3.06 82.415 3.11 82.545 ; + RECT 1.57 82.645 1.62 82.775 ; + RECT 2.58 82.645 2.63 82.775 ; + RECT 3.84 82.645 3.89 82.775 ; + RECT 5.675 82.645 5.725 82.775 ; + RECT 3.06 82.875 3.11 83.005 ; + RECT 1.085 83.335 1.135 83.465 ; + RECT 1.405 83.375 1.455 83.425 ; + RECT 4.47 83.375 4.6 83.425 ; + RECT 3.06 85.295 3.11 85.425 ; + RECT 1.57 85.525 1.62 85.655 ; + RECT 2.58 85.525 2.63 85.655 ; + RECT 3.84 85.525 3.89 85.655 ; + RECT 5.675 85.525 5.725 85.655 ; + RECT 3.06 85.755 3.11 85.885 ; + RECT 1.085 86.215 1.135 86.345 ; + RECT 1.405 86.255 1.455 86.305 ; + RECT 4.47 86.255 4.6 86.305 ; + RECT 3.06 88.175 3.11 88.305 ; + RECT 1.57 88.405 1.62 88.535 ; + RECT 2.58 88.405 2.63 88.535 ; + RECT 3.84 88.405 3.89 88.535 ; + RECT 5.675 88.405 5.725 88.535 ; + RECT 3.06 88.635 3.11 88.765 ; + RECT 1.085 89.095 1.135 89.225 ; + RECT 1.405 89.135 1.455 89.185 ; + RECT 4.47 89.135 4.6 89.185 ; + RECT 3.06 91.055 3.11 91.185 ; + RECT 1.57 91.285 1.62 91.415 ; + RECT 2.58 91.285 2.63 91.415 ; + RECT 3.84 91.285 3.89 91.415 ; + RECT 5.675 91.285 5.725 91.415 ; + RECT 3.06 91.515 3.11 91.645 ; + RECT 1.085 91.975 1.135 92.105 ; + RECT 1.405 92.015 1.455 92.065 ; + RECT 4.47 92.015 4.6 92.065 ; + RECT 3.06 93.935 3.11 94.065 ; + RECT 1.57 94.165 1.62 94.295 ; + RECT 2.58 94.165 2.63 94.295 ; + RECT 3.84 94.165 3.89 94.295 ; + RECT 5.675 94.165 5.725 94.295 ; + RECT 3.06 94.395 3.11 94.525 ; + RECT 1.085 94.855 1.135 94.985 ; + RECT 1.405 94.895 1.455 94.945 ; + RECT 4.47 94.895 4.6 94.945 ; + RECT 3.06 96.815 3.11 96.945 ; + RECT 1.57 97.045 1.62 97.175 ; + RECT 2.58 97.045 2.63 97.175 ; + RECT 3.84 97.045 3.89 97.175 ; + RECT 5.675 97.045 5.725 97.175 ; + RECT 3.06 97.275 3.11 97.405 ; + RECT 1.085 97.735 1.135 97.865 ; + RECT 1.405 97.775 1.455 97.825 ; + RECT 4.47 97.775 4.6 97.825 ; + RECT 3.06 99.695 3.11 99.825 ; + RECT 1.57 99.925 1.62 100.055 ; + RECT 2.58 99.925 2.63 100.055 ; + RECT 3.84 99.925 3.89 100.055 ; + RECT 5.675 99.925 5.725 100.055 ; + RECT 3.06 71.355 3.11 71.485 ; + RECT 1.085 71.815 1.135 71.945 ; + RECT 1.405 71.855 1.455 71.905 ; + RECT 4.47 71.855 4.6 71.905 ; + RECT 3.06 73.775 3.11 73.905 ; + RECT 1.57 74.005 1.62 74.135 ; + RECT 2.58 74.005 2.63 74.135 ; + RECT 3.84 74.005 3.89 74.135 ; + RECT 5.675 74.005 5.725 74.135 ; + RECT 0.435 71.815 0.485 71.945 ; + RECT 0.435 71.355 0.485 71.485 ; + RECT 0.435 73.775 0.485 73.905 ; + RECT 0.435 74.695 0.485 74.825 ; + RECT 0.435 74.235 0.485 74.365 ; + RECT 0.435 76.655 0.485 76.785 ; + RECT 0.435 77.575 0.485 77.705 ; + RECT 0.435 77.115 0.485 77.245 ; + RECT 0.435 79.535 0.485 79.665 ; + RECT 0.435 80.455 0.485 80.585 ; + RECT 0.435 79.995 0.485 80.125 ; + RECT 0.435 82.415 0.485 82.545 ; + RECT 0.435 83.335 0.485 83.465 ; + RECT 0.435 82.875 0.485 83.005 ; + RECT 0.435 85.295 0.485 85.425 ; + RECT 0.435 86.215 0.485 86.345 ; + RECT 0.435 85.755 0.485 85.885 ; + RECT 0.435 88.175 0.485 88.305 ; + RECT 0.435 89.095 0.485 89.225 ; + RECT 0.435 88.635 0.485 88.765 ; + RECT 0.435 91.055 0.485 91.185 ; + RECT 0.435 91.975 0.485 92.105 ; + RECT 0.435 91.515 0.485 91.645 ; + RECT 0.435 93.935 0.485 94.065 ; + RECT 0.435 94.855 0.485 94.985 ; + RECT 0.435 94.395 0.485 94.525 ; + RECT 0.435 96.815 0.485 96.945 ; + RECT 0.435 97.735 0.485 97.865 ; + RECT 0.435 97.275 0.485 97.405 ; + RECT 0.435 99.695 0.485 99.825 ; + RECT 20.085 28.475 20.265 28.605 ; + RECT 20.08 34.46 20.21 34.64 ; + RECT 20.08 63.49 20.21 63.67 ; + RECT 20.085 69.455 20.265 69.585 ; + RECT 20.395 30.055 20.575 30.185 ; + RECT 20.53 32.06 20.58 32.19 ; + RECT 20.53 34.975 20.58 35.105 ; + RECT 20.53 35.96 20.58 36.09 ; + RECT 20.53 37.93 20.58 38.06 ; + RECT 20.53 38.91 20.58 39.04 ; + RECT 20.53 39.895 20.58 40.025 ; + RECT 20.53 42.85 20.58 42.98 ; + RECT 20.53 50.23 20.58 50.36 ; + RECT 20.53 51.21 20.58 51.34 ; + RECT 20.53 55.15 20.58 55.28 ; + RECT 20.53 58.1 20.58 58.23 ; + RECT 20.53 59.085 20.58 59.215 ; + RECT 20.53 60.07 20.58 60.2 ; + RECT 20.53 62.035 20.58 62.165 ; + RECT 20.53 63.02 20.58 63.15 ; + RECT 20.53 65.94 20.58 66.07 ; + RECT 20.395 67.94 20.575 68.07 ; + RECT 20.875 28.705 21.055 28.835 ; + RECT 20.875 69.225 21.055 69.355 ; + RECT 20.085 29.18 20.265 29.31 ; + RECT 20.11 68.72 20.24 68.9 ; + RECT 20.12 31.515 20.17 31.645 ; + RECT 20.12 35.47 20.17 35.6 ; + RECT 20.12 39.405 20.17 39.535 ; + RECT 20.12 43.34 20.17 43.47 ; + RECT 20.12 47.275 20.17 47.405 ; + RECT 20.12 50.72 20.17 50.85 ; + RECT 20.12 54.655 20.17 54.785 ; + RECT 20.12 58.595 20.17 58.725 ; + RECT 20.12 62.53 20.17 62.66 ; + RECT 20.12 66.48 20.17 66.61 ; + RECT 14.965 28.475 15.015 28.605 ; + RECT 19.485 28.475 19.535 28.605 ; + RECT 14.765 28.475 14.815 28.605 ; + RECT 19.685 28.475 19.735 28.605 ; + RECT 14.965 69.455 15.015 69.585 ; + RECT 19.485 69.455 19.535 69.585 ; + RECT 14.765 69.455 14.815 69.585 ; + RECT 19.685 69.455 19.735 69.585 ; + RECT 20.395 28.245 20.575 28.375 ; + RECT 20.7 28.705 20.75 28.835 ; + RECT 20.085 29.565 20.265 29.695 ; + RECT 20.9 30.34 21.03 30.39 ; + RECT 20.085 30.545 20.265 30.675 ; + RECT 20.39 31.04 20.44 31.17 ; + RECT 20.9 31.32 21.03 31.37 ; + RECT 20.685 31.79 20.735 31.92 ; + RECT 20.335 31.79 20.385 31.92 ; + RECT 20.12 32.515 20.17 32.645 ; + RECT 20.875 33.01 21.055 33.14 ; + RECT 20.12 33.5 20.17 33.63 ; + RECT 20.08 33.785 20.21 33.835 ; + RECT 20.875 33.99 21.055 34.12 ; + RECT 20.12 36.455 20.17 36.585 ; + RECT 20.875 36.945 21.055 37.075 ; + RECT 20.12 37.435 20.17 37.565 ; + RECT 20.12 38.42 20.17 38.55 ; + RECT 20.12 40.39 20.17 40.52 ; + RECT 20.875 40.88 21.055 41.01 ; + RECT 20.12 41.37 20.17 41.5 ; + RECT 20.875 41.865 21.055 41.995 ; + RECT 20.12 42.355 20.17 42.485 ; + RECT 20.53 43.835 20.58 43.965 ; + RECT 20.12 44.33 20.17 44.46 ; + RECT 20.875 44.815 21.055 44.945 ; + RECT 20.12 45.31 20.17 45.44 ; + RECT 20.505 45.785 20.555 45.915 ; + RECT 20.685 46.095 20.735 46.225 ; + RECT 20.335 46.095 20.385 46.225 ; + RECT 20.345 46.41 20.395 46.54 ; + RECT 20.9 47.07 21.03 47.12 ; + RECT 20.9 47.565 21.03 47.615 ; + RECT 20.12 48.26 20.17 48.39 ; + RECT 20.875 48.75 21.055 48.88 ; + RECT 20.875 49.245 21.055 49.375 ; + RECT 20.12 49.735 20.17 49.865 ; + RECT 20.9 50.515 21.03 50.565 ; + RECT 20.9 51.005 21.03 51.055 ; + RECT 20.345 51.525 20.395 51.655 ; + RECT 20.685 51.87 20.735 52 ; + RECT 20.335 51.87 20.385 52 ; + RECT 20.12 52.685 20.17 52.815 ; + RECT 20.875 53.18 21.055 53.31 ; + RECT 20.12 53.675 20.17 53.805 ; + RECT 20.53 54.165 20.58 54.295 ; + RECT 20.12 55.64 20.17 55.77 ; + RECT 20.875 56.135 21.055 56.265 ; + RECT 20.12 56.625 20.17 56.755 ; + RECT 20.875 57.115 21.055 57.245 ; + RECT 20.12 57.61 20.17 57.74 ; + RECT 20.12 59.575 20.17 59.705 ; + RECT 20.12 60.56 20.17 60.69 ; + RECT 20.875 61.055 21.055 61.185 ; + RECT 20.12 61.545 20.17 61.675 ; + RECT 20.08 62.32 20.21 62.37 ; + RECT 20.08 63.8 20.21 63.85 ; + RECT 20.875 64.005 21.055 64.135 ; + RECT 20.08 64.29 20.21 64.34 ; + RECT 20.12 64.495 20.17 64.625 ; + RECT 20.875 64.955 21.055 65.085 ; + RECT 20.12 65.48 20.17 65.61 ; + RECT 20.685 66.21 20.735 66.34 ; + RECT 20.335 66.21 20.385 66.34 ; + RECT 20.9 66.755 21.03 66.805 ; + RECT 20.39 66.955 20.44 67.085 ; + RECT 20.085 67.45 20.265 67.58 ; + RECT 20.9 67.735 21.03 67.785 ; + RECT 20.085 68.435 20.265 68.565 ; + RECT 20.7 69.225 20.75 69.355 ; + RECT 20.395 69.685 20.575 69.815 ; + RECT 14.965 29.18 15.015 29.31 ; + RECT 14.99 32.515 15.04 32.645 ; + RECT 14.99 33.5 15.04 33.63 ; + RECT 14.99 33.785 15.04 33.835 ; + RECT 14.99 36.455 15.04 36.585 ; + RECT 14.99 37.435 15.04 37.565 ; + RECT 14.99 38.42 15.04 38.55 ; + RECT 14.99 40.39 15.04 40.52 ; + RECT 14.99 41.37 15.04 41.5 ; + RECT 14.99 42.355 15.04 42.485 ; + RECT 14.99 44.33 15.04 44.46 ; + RECT 14.99 45.31 15.04 45.44 ; + RECT 14.965 48.26 15.015 48.39 ; + RECT 14.965 49.735 15.015 49.865 ; + RECT 14.99 52.685 15.04 52.815 ; + RECT 14.99 53.675 15.04 53.805 ; + RECT 14.99 55.64 15.04 55.77 ; + RECT 14.99 56.625 15.04 56.755 ; + RECT 14.99 57.61 15.04 57.74 ; + RECT 14.99 59.575 15.04 59.705 ; + RECT 14.99 60.56 15.04 60.69 ; + RECT 14.99 61.545 15.04 61.675 ; + RECT 14.99 62.32 15.04 62.37 ; + RECT 14.99 64.495 15.04 64.625 ; + RECT 14.99 65.48 15.04 65.61 ; + RECT 14.965 68.745 15.015 68.875 ; + RECT 19.485 29.18 19.535 29.31 ; + RECT 19.465 43.315 19.595 43.495 ; + RECT 19.465 54.63 19.595 54.81 ; + RECT 19.465 62.505 19.595 62.685 ; + RECT 19.485 68.745 19.535 68.875 ; + RECT 19.875 45.785 19.925 45.915 ; + RECT 19.875 52.21 19.925 52.34 ; + RECT 19.7 29.565 19.75 29.695 ; + RECT 19.7 30.545 19.75 30.675 ; + RECT 19.7 32.515 19.75 32.645 ; + RECT 19.7 33.5 19.75 33.63 ; + RECT 19.7 33.785 19.75 33.835 ; + RECT 19.7 36.455 19.75 36.585 ; + RECT 19.7 37.435 19.75 37.565 ; + RECT 19.7 38.42 19.75 38.55 ; + RECT 19.7 40.39 19.75 40.52 ; + RECT 19.7 41.37 19.75 41.5 ; + RECT 19.7 42.355 19.75 42.485 ; + RECT 19.7 44.33 19.75 44.46 ; + RECT 19.7 45.31 19.75 45.44 ; + RECT 19.7 48.26 19.75 48.39 ; + RECT 19.7 49.735 19.75 49.865 ; + RECT 19.7 52.685 19.75 52.815 ; + RECT 19.7 53.675 19.75 53.805 ; + RECT 19.7 55.64 19.75 55.77 ; + RECT 19.7 56.625 19.75 56.755 ; + RECT 19.7 57.61 19.75 57.74 ; + RECT 19.7 59.575 19.75 59.705 ; + RECT 19.7 60.56 19.75 60.69 ; + RECT 19.7 61.545 19.75 61.675 ; + RECT 19.7 62.32 19.75 62.37 ; + RECT 19.465 63.49 19.595 63.67 ; + RECT 19.7 64.495 19.75 64.625 ; + RECT 19.7 65.48 19.75 65.61 ; + RECT 19.7 67.45 19.75 67.58 ; + RECT 19.7 68.435 19.75 68.565 ; + RECT 14.765 29.565 14.815 29.695 ; + RECT 14.765 30.545 14.815 30.675 ; + RECT 14.74 32.515 14.79 32.645 ; + RECT 14.74 33.5 14.79 33.63 ; + RECT 14.74 33.785 14.79 33.835 ; + RECT 14.74 36.455 14.79 36.585 ; + RECT 14.74 37.435 14.79 37.565 ; + RECT 14.74 38.42 14.79 38.55 ; + RECT 14.74 40.39 14.79 40.52 ; + RECT 14.74 41.37 14.79 41.5 ; + RECT 14.74 42.355 14.79 42.485 ; + RECT 14.74 44.33 14.79 44.46 ; + RECT 14.74 45.31 14.79 45.44 ; + RECT 14.765 48.26 14.815 48.39 ; + RECT 14.765 49.735 14.815 49.865 ; + RECT 14.74 52.685 14.79 52.815 ; + RECT 14.74 53.675 14.79 53.805 ; + RECT 14.74 55.64 14.79 55.77 ; + RECT 14.74 56.625 14.79 56.755 ; + RECT 14.74 57.61 14.79 57.74 ; + RECT 14.74 59.575 14.79 59.705 ; + RECT 14.74 60.56 14.79 60.69 ; + RECT 14.74 61.545 14.79 61.675 ; + RECT 14.74 62.32 14.79 62.37 ; + RECT 14.74 64.495 14.79 64.625 ; + RECT 14.74 65.48 14.79 65.61 ; + RECT 14.765 67.45 14.815 67.58 ; + RECT 14.765 68.435 14.815 68.565 ; + RECT 14.565 45.785 14.615 45.915 ; + RECT 14.565 52.21 14.615 52.34 ; + RECT 14.965 29.565 15.015 29.695 ; + RECT 15.335 29.565 15.385 29.695 ; + RECT 15.875 29.565 15.925 29.695 ; + RECT 16.415 29.565 16.465 29.695 ; + RECT 16.955 29.565 17.005 29.695 ; + RECT 17.495 29.565 17.545 29.695 ; + RECT 18.035 29.565 18.085 29.695 ; + RECT 18.575 29.565 18.625 29.695 ; + RECT 19.115 29.565 19.165 29.695 ; + RECT 14.565 30.34 14.615 30.39 ; + RECT 14.965 30.545 15.015 30.675 ; + RECT 15.335 31.04 15.385 31.17 ; + RECT 15.875 31.04 15.925 31.17 ; + RECT 16.415 31.04 16.465 31.17 ; + RECT 16.955 31.04 17.005 31.17 ; + RECT 17.495 31.04 17.545 31.17 ; + RECT 18.035 31.04 18.085 31.17 ; + RECT 18.575 31.04 18.625 31.17 ; + RECT 19.115 31.04 19.165 31.17 ; + RECT 14.565 31.32 14.615 31.37 ; + RECT 14.99 31.515 15.04 31.645 ; + RECT 14.865 31.79 14.915 31.92 ; + RECT 15.335 31.79 15.385 31.92 ; + RECT 15.875 31.79 15.925 31.92 ; + RECT 16.415 31.79 16.465 31.92 ; + RECT 16.955 31.79 17.005 31.92 ; + RECT 17.495 31.79 17.545 31.92 ; + RECT 18.035 31.79 18.085 31.92 ; + RECT 18.575 31.79 18.625 31.92 ; + RECT 19.115 31.79 19.165 31.92 ; + RECT 14.565 33.01 14.615 33.14 ; + RECT 14.565 33.99 14.615 34.12 ; + RECT 14.745 34.485 14.795 34.615 ; + RECT 14.99 35.47 15.04 35.6 ; + RECT 14.565 36.945 14.615 37.075 ; + RECT 14.99 39.405 15.04 39.535 ; + RECT 14.565 40.855 14.615 41.035 ; + RECT 14.565 41.84 14.615 42.025 ; + RECT 14.99 43.315 15.04 43.495 ; + RECT 14.565 44.79 14.615 44.97 ; + RECT 13.8 45.785 13.85 45.915 ; + RECT 14.865 46.095 14.915 46.225 ; + RECT 15.335 46.095 15.385 46.225 ; + RECT 15.875 46.095 15.925 46.225 ; + RECT 16.415 46.095 16.465 46.225 ; + RECT 16.955 46.095 17.005 46.225 ; + RECT 17.495 46.095 17.545 46.225 ; + RECT 18.035 46.095 18.085 46.225 ; + RECT 18.575 46.095 18.625 46.225 ; + RECT 19.115 46.095 19.165 46.225 ; + RECT 15.335 46.41 15.385 46.54 ; + RECT 15.875 46.41 15.925 46.54 ; + RECT 16.415 46.41 16.465 46.54 ; + RECT 16.955 46.41 17.005 46.54 ; + RECT 17.495 46.41 17.545 46.54 ; + RECT 18.035 46.41 18.085 46.54 ; + RECT 18.575 46.41 18.625 46.54 ; + RECT 19.115 46.41 19.165 46.54 ; + RECT 14.565 47.07 14.615 47.12 ; + RECT 14.965 47.275 15.015 47.405 ; + RECT 14.565 47.565 14.615 47.615 ; + RECT 15.335 48.26 15.385 48.39 ; + RECT 15.875 48.26 15.925 48.39 ; + RECT 16.415 48.26 16.465 48.39 ; + RECT 16.955 48.26 17.005 48.39 ; + RECT 17.495 48.26 17.545 48.39 ; + RECT 18.035 48.26 18.085 48.39 ; + RECT 18.575 48.26 18.625 48.39 ; + RECT 19.115 48.26 19.165 48.39 ; + RECT 14.565 48.72 14.615 48.91 ; + RECT 14.565 49.215 14.615 49.405 ; + RECT 15.335 49.735 15.385 49.865 ; + RECT 15.875 49.735 15.925 49.865 ; + RECT 16.415 49.735 16.465 49.865 ; + RECT 16.955 49.735 17.005 49.865 ; + RECT 17.495 49.735 17.545 49.865 ; + RECT 18.035 49.735 18.085 49.865 ; + RECT 18.575 49.735 18.625 49.865 ; + RECT 19.115 49.735 19.165 49.865 ; + RECT 14.565 50.515 14.615 50.565 ; + RECT 14.965 50.72 15.015 50.85 ; + RECT 14.565 51.005 14.615 51.055 ; + RECT 15.335 51.525 15.385 51.655 ; + RECT 15.875 51.525 15.925 51.655 ; + RECT 16.415 51.525 16.465 51.655 ; + RECT 16.955 51.525 17.005 51.655 ; + RECT 17.495 51.525 17.545 51.655 ; + RECT 18.035 51.525 18.085 51.655 ; + RECT 18.575 51.525 18.625 51.655 ; + RECT 19.115 51.525 19.165 51.655 ; + RECT 14.865 51.87 14.915 52 ; + RECT 15.335 51.87 15.385 52 ; + RECT 15.875 51.87 15.925 52 ; + RECT 16.415 51.87 16.465 52 ; + RECT 16.955 51.87 17.005 52 ; + RECT 17.495 51.87 17.545 52 ; + RECT 18.035 51.87 18.085 52 ; + RECT 18.575 51.87 18.625 52 ; + RECT 19.115 51.87 19.165 52 ; + RECT 13.8 52.21 13.85 52.34 ; + RECT 14.565 53.155 14.615 53.335 ; + RECT 14.99 54.63 15.04 54.81 ; + RECT 14.565 56.105 14.615 56.29 ; + RECT 14.565 57.09 14.615 57.27 ; + RECT 14.99 58.57 15.04 58.75 ; + RECT 14.565 61.03 14.615 61.21 ; + RECT 14.99 62.53 15.04 62.66 ; + RECT 14.745 63.515 14.795 63.645 ; + RECT 14.565 64.005 14.615 64.135 ; + RECT 14.565 64.93 14.615 65.11 ; + RECT 14.865 66.21 14.915 66.34 ; + RECT 15.335 66.21 15.385 66.34 ; + RECT 15.875 66.21 15.925 66.34 ; + RECT 16.415 66.21 16.465 66.34 ; + RECT 16.955 66.21 17.005 66.34 ; + RECT 17.495 66.21 17.545 66.34 ; + RECT 18.035 66.21 18.085 66.34 ; + RECT 18.575 66.21 18.625 66.34 ; + RECT 19.115 66.21 19.165 66.34 ; + RECT 14.99 66.48 15.04 66.61 ; + RECT 14.565 66.755 14.615 66.805 ; + RECT 15.335 66.955 15.385 67.085 ; + RECT 15.875 66.955 15.925 67.085 ; + RECT 16.415 66.955 16.465 67.085 ; + RECT 16.955 66.955 17.005 67.085 ; + RECT 17.495 66.955 17.545 67.085 ; + RECT 18.035 66.955 18.085 67.085 ; + RECT 18.575 66.955 18.625 67.085 ; + RECT 19.115 66.955 19.165 67.085 ; + RECT 14.965 67.45 15.015 67.58 ; + RECT 14.565 67.735 14.615 67.785 ; + RECT 14.965 68.435 15.015 68.565 ; + RECT 15.335 68.435 15.385 68.565 ; + RECT 15.875 68.435 15.925 68.565 ; + RECT 16.415 68.435 16.465 68.565 ; + RECT 16.955 68.435 17.005 68.565 ; + RECT 17.495 68.435 17.545 68.565 ; + RECT 18.035 68.435 18.085 68.565 ; + RECT 18.575 68.435 18.625 68.565 ; + RECT 19.115 68.435 19.165 68.565 ; + RECT 19.465 29.54 19.595 29.72 ; + RECT 19.85 30.34 19.98 30.39 ; + RECT 19.465 30.585 19.595 30.635 ; + RECT 19.85 31.32 19.98 31.37 ; + RECT 19.465 32.49 19.595 32.67 ; + RECT 19.885 33.01 19.935 33.14 ; + RECT 19.465 33.54 19.595 33.59 ; + RECT 19.465 33.785 19.595 33.835 ; + RECT 19.885 33.99 19.935 34.12 ; + RECT 19.7 34.485 19.75 34.615 ; + RECT 19.465 36.43 19.595 36.61 ; + RECT 19.885 36.945 19.935 37.075 ; + RECT 19.465 37.41 19.595 37.59 ; + RECT 19.465 38.395 19.595 38.575 ; + RECT 19.465 40.365 19.595 40.545 ; + RECT 19.885 40.88 19.935 41.01 ; + RECT 19.465 41.345 19.595 41.525 ; + RECT 19.885 41.865 19.935 41.995 ; + RECT 19.465 42.33 19.595 42.51 ; + RECT 19.465 44.305 19.595 44.485 ; + RECT 19.885 44.815 19.935 44.945 ; + RECT 19.465 45.285 19.595 45.465 ; + RECT 19.85 47.07 19.98 47.12 ; + RECT 19.85 47.565 19.98 47.615 ; + RECT 19.465 48.235 19.595 48.415 ; + RECT 19.885 48.75 19.935 48.88 ; + RECT 19.885 49.245 19.935 49.375 ; + RECT 19.465 49.71 19.595 49.89 ; + RECT 19.85 50.515 19.98 50.565 ; + RECT 19.85 51.005 19.98 51.055 ; + RECT 19.465 52.66 19.595 52.84 ; + RECT 19.885 53.18 19.935 53.31 ; + RECT 19.465 53.65 19.595 53.83 ; + RECT 19.465 55.615 19.595 55.795 ; + RECT 19.885 56.135 19.935 56.265 ; + RECT 19.465 56.6 19.595 56.78 ; + RECT 19.885 57.115 19.935 57.245 ; + RECT 19.465 57.585 19.595 57.765 ; + RECT 19.465 59.55 19.595 59.73 ; + RECT 19.465 60.535 19.595 60.715 ; + RECT 19.885 61.055 19.935 61.185 ; + RECT 19.465 61.52 19.595 61.7 ; + RECT 19.465 62.32 19.595 62.37 ; + RECT 19.7 63.515 19.75 63.645 ; + RECT 19.885 64.005 19.935 64.135 ; + RECT 19.465 64.47 19.595 64.65 ; + RECT 19.885 64.955 19.935 65.085 ; + RECT 19.465 65.455 19.595 65.635 ; + RECT 19.85 66.755 19.98 66.805 ; + RECT 19.465 67.49 19.595 67.54 ; + RECT 19.885 67.735 19.935 67.785 ; + RECT 19.465 68.475 19.595 68.525 ; + END + +END rf2_32x19_wm0 + +END LIBRARY + diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.mdt b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.mdt new file mode 100644 index 00000000..5908706b --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.mdt @@ -0,0 +1,612 @@ +// fastscan_memcomp Version: 4.0.5-EAC10 +// common_memcomp Version: 4.0.5.2-amci +// lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Fastscan model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0 +// Words: 32 +// Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Mon Nov 11 11:59:53 2019 +// Version: r4p0 +// Modeling Assumptions: This is Sequential Synchronous Mentor model +// with Mentor ATPG primitives used to test UTI and generate test +// vectors. +// +// Modeling Limitations: None. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +model rf2_32x19_wm0_scanflop (Q, SI, D, SE, CLK, Xout) ( + input (SI) () + input (D) () + input (SE) () + input (CLK) () + input (Xout) () + output (Q) ( + primitive = _tiex mx_tiex (mx); + primitive = _tie0 m0_tie0 (m0_0); + primitive = _tie0 m1_tie0 (m0_1); + primitive = _mux m1 (D, SI, SE, n1); + primitive = _mux m2 (n1, mx, Xout, n2); + primitive = _dff r1 ( m0_0, m0_1, CLK, n2, Q, ); + ) +) +model rf2_32x19_wm0_bitcell (CLK, WRITE, READ, WA, RA, D, Xout, Q) ( + intern (WA_ram, RA_ram) (array = 4:0;) + input (CLK) () + intern (READ_ram) () + input (WRITE) () + input (READ) () + input (D) () + input (WA, RA) (array = 4:0;) + input (Xout) () + output (Q) ( + + + primitive = _tiex mx_tiex ( mx ); + primitive = _mux WRITE_MUX ( WRITE, mx, Xout, WRITE_ram ); + primitive = _mux D_mux ( D, mx, Xout, D_ram ); + primitive = _mux AA0_mux ( WA[0], mx, Xout, WA_ram[0] ); + primitive = _mux AA1_mux ( WA[1], mx, Xout, WA_ram[1] ); + primitive = _mux AA2_mux ( WA[2], mx, Xout, WA_ram[2] ); + primitive = _mux AA3_mux ( WA[3], mx, Xout, WA_ram[3] ); + primitive = _mux AA4_mux ( WA[4], mx, Xout, WA_ram[4] ); + primitive = _mux READ_MUX ( READ, mx, Xout, READ_ram ); + primitive = _mux RA0_mux ( RA[0], mx, Xout, RA_ram[0] ); + primitive = _mux RA1_mux ( RA[1], mx, Xout, RA_ram[1] ); + primitive = _mux RA2_mux ( RA[2], mx, Xout, RA_ram[2] ); + primitive = _mux RA3_mux ( RA[3], mx, Xout, RA_ram[3] ); + primitive = _mux RA4_mux ( RA[4], mx, Xout, RA_ram[4] ); + data_size = 1; + address_size = 5; + min_address = 0; + max_address = 31; + edge_trigger = w; + read_write_conflict = XW; + // Verilog RAM has no Set or Reset pin : + primitive = _cram mem ( , , + // Following write port will Hold in-memory data when not writing. + _write { , , } (CLK, WRITE_ram, WA_ram, D_ram), + // Following read port will Hold output data after reading. + _read { , , ,} ( , READ_ram, , RA_ram, Q) + ); + ) +) +model rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN) ( + input (CLKA) () + input (CENA) () + input (AA) (array = 4 : 0; ) + input (CLKB) () + input (CENB) () + input (AB) (array = 4 : 0; ) + input (DB) (array = 18 : 0; ) + input (EMAA) (array = 2 : 0; used=false;fault=none;) + input (EMASA) (used=false;fault=none;) + input (EMAB) (array = 2 : 0; used=false;fault=none;) + input (TENA) () + input (TCENA) () + input (TAA) (array = 4 : 0; ) + input (TENB) () + input (TCENB) () + input (TAB) (array = 4 : 0; ) + input (TDB) (array = 18 : 0; ) + input (RET1N) (used=false;fault=none;) + input (SIA) (array = 1 : 0; ) + input (SEA) () + input (DFTRAMBYP) () + input (SIB) (array = 1 : 0; ) + input (SEB) () + input (COLLDISN) (used=false;fault=none;) + intern (mtie_sel0) (primitive = _tie0 m0_sel0 ( mtie_sel0 );) + intern (tiex_readq) (primitive = _tiex mtiex_readq(tiex_readq);) + intern (mlc_bmuxsel) (primitive = _tie0 m0_bmuxsel ( mlc_bmuxsel );) + intern (BUS_SIA) (array = 1 : 0; + primitive = _buf wbSIA0 (SIA[0], BUS_SIA[0]); + primitive = _buf wbSIA1 (SIA[1], BUS_SIA[1]); + ) + intern (BUS_AA) (array = 4 : 0; + primitive = _buf bBUS_AA0 ( AA[0], BUS_AA[0]); + primitive = _buf bBUS_AA1 ( AA[1], BUS_AA[1]); + primitive = _buf bBUS_AA2 ( AA[2], BUS_AA[2]); + primitive = _buf bBUS_AA3 ( AA[3], BUS_AA[3]); + primitive = _buf bBUS_AA4 ( AA[4], BUS_AA[4]); + ) + intern (BMUX_AA) ( array = 4 : 0; + primitive = _mux maA0(TAA[0], BUS_AA[0], TENA, BMUX_AA[0]); + primitive = _mux maA1(TAA[1], BUS_AA[1], TENA, BMUX_AA[1]); + primitive = _mux maA2(TAA[2], BUS_AA[2], TENA, BMUX_AA[2]); + primitive = _mux maA3(TAA[3], BUS_AA[3], TENA, BMUX_AA[3]); + primitive = _mux maA4(TAA[4], BUS_AA[4], TENA, BMUX_AA[4]); + ) + intern (BMUXSEL_AA) ( array = 4 : 0; + primitive = _mux mBMUXSEL_AA0(mlc_bmuxsel, BMUX_AA[0], DFTRAMBYP, BMUXSEL_AA[0]); + primitive = _mux mBMUXSEL_AA1(mlc_bmuxsel, BMUX_AA[1], DFTRAMBYP, BMUXSEL_AA[1]); + primitive = _mux mBMUXSEL_AA2(mlc_bmuxsel, BMUX_AA[2], DFTRAMBYP, BMUXSEL_AA[2]); + primitive = _mux mBMUXSEL_AA3(mlc_bmuxsel, BMUX_AA[3], DFTRAMBYP, BMUXSEL_AA[3]); + primitive = _mux mBMUXSEL_AA4(mlc_bmuxsel, BMUX_AA[4], DFTRAMBYP, BMUXSEL_AA[4]); + ) + output (AYA) ( array = 4 : 0; + primitive = _buf bAYA0(BMUXSEL_AA[0], AYA[0]); + primitive = _buf bAYA1(BMUXSEL_AA[1], AYA[1]); + primitive = _buf bAYA2(BMUXSEL_AA[2], AYA[2]); + primitive = _buf bAYA3(BMUXSEL_AA[3], AYA[3]); + primitive = _buf bAYA4(BMUXSEL_AA[4], AYA[4]); + ) + + intern (BMUX_CENA) (primitive = _mux mBMUX_CENA(TCENA, CENA, TENA, BMUX_CENA);) + intern (BMUXSEL_CENA) (primitive = _mux mBMUXSEL_CENA(mlc_bmuxsel, BMUX_CENA, DFTRAMBYP, BMUXSEL_CENA);) + output (CENYA) (primitive = _buf bCENYA(BMUXSEL_CENA, CENYA);) + intern (BMUX_AA_n) (array = 4 : 1; + primitive = _inv iBMUX_AA_n1 ( BMUX_AA[1], BMUX_AA_n[1] ); + primitive = _inv iBMUX_AA_n2 ( BMUX_AA[2], BMUX_AA_n[2] ); + primitive = _inv iBMUX_AA_n3 ( BMUX_AA[3], BMUX_AA_n[3] ); + primitive = _inv iBMUX_AA_n4 ( BMUX_AA[4], BMUX_AA_n[4] ); + ) + + intern (A_max) (array = 4 : 0; + primitive = _tie1 bA_max0 ( A_max[0] ); + primitive = _tie1 bA_max1 ( A_max[1] ); + primitive = _tie1 bA_max2 ( A_max[2] ); + primitive = _tie1 bA_max3 ( A_max[3] ); + primitive = _tie1 bA_max4 ( A_max[4] ); + ) + + intern (A_max_n) (array = 4 : 0; + primitive = _inv bA_max_n0( A_max[0], A_max_n[0] ); + primitive = _inv bA_max_n1( A_max[1], A_max_n[1] ); + primitive = _inv bA_max_n2( A_max[2], A_max_n[2] ); + primitive = _inv bA_max_n3( A_max[3], A_max_n[3] ); + primitive = _inv bA_max_n4( A_max[4], A_max_n[4] ); + ) + + intern (AA_m) (array = 4 : 0; + primitive = _and aAA_m0(BMUX_AA[0], A_max_n[0], AA_m[0] ); + primitive = _and aAA_m1(BMUX_AA[1], A_max_n[1], AA_m[1] ); + primitive = _and aAA_m2(BMUX_AA[2], A_max_n[2], AA_m[2] ); + primitive = _and aAA_m3(BMUX_AA[3], A_max_n[3], AA_m[3] ); + primitive = _and aAA_m4(BMUX_AA[4], A_max_n[4], AA_m[4] ); + ) + + intern (m_AA) (array = 4 : 1; + primitive = _and am_AA1(BMUX_AA_n[1], A_max[1], m_AA[1] ); + primitive = _and am_AA2(BMUX_AA_n[2], A_max[2], m_AA[2] ); + primitive = _and am_AA3(BMUX_AA_n[3], A_max[3], m_AA[3] ); + primitive = _and am_AA4(BMUX_AA_n[4], A_max[4], m_AA[4] ); + ) + + intern (EQ_A) (array = 4 : 1; + primitive = _nor nEQ_A1(m_AA[1], AA_m[1], EQ_A[1] ); + primitive = _nor nEQ_A2(m_AA[2], AA_m[2], EQ_A[2] ); + primitive = _nor nEQ_A3(m_AA[3], AA_m[3], EQ_A[3] ); + primitive = _nor nEQ_A4(m_AA[4], AA_m[4], EQ_A[4] ); + ) + + intern (XoutAi) (array = 3 : 0; + primitive = _and aXoutAi0(AA_m[0], EQ_A[4], EQ_A[3], EQ_A[2], EQ_A[1], XoutAi[0]); + primitive = _and aXoutAi1(AA_m[1], EQ_A[4], EQ_A[3], EQ_A[2], XoutAi[1]); + primitive = _and aXoutAi2(AA_m[2], EQ_A[4], EQ_A[3], XoutAi[2]); + primitive = _and aXoutAi3(AA_m[3], EQ_A[4], XoutAi[3]); + ) + intern (XoutAifTemp) (primitive = _or oXoutAifTemp (AA_m[4], XoutAi[0], XoutAi[1], XoutAi[2], XoutAi[3], XoutAifTemp);) + intern (XoutAif) (primitive = _and oXoutAif (XoutAifTemp, NOT_CENA, XoutAif);) + + intern (nscanshiftA) ( + primitive = _nor nnscanshiftA (DFTRAMBYP, SEA, nscanshiftA);) + intern (XoutaddrA) ( + primitive = _and aXoutaddrA (nscanshiftA, XoutAif, XoutaddrA);) + intern (XoutAiff) ( + primitive = _or oXoutAiff (XoutaddrA, XoutA, XoutAiff);) + + intern (NOT_CENA) (primitive = _inv iNOT_CENA(BMUX_CENA, NOT_CENA);) + intern (NOT_DFTRAMBYP) (primitive = _inv iNOT_DFTRAMBYP(DFTRAMBYP, NOT_DFTRAMBYP);) + intern (READA) (array = 18:0; + primitive = _buf bREADA0(NOT_CENA, READA[0]); + primitive = _buf bREADA1(NOT_CENA, READA[1]); + primitive = _buf bREADA2(NOT_CENA, READA[2]); + primitive = _buf bREADA3(NOT_CENA, READA[3]); + primitive = _buf bREADA4(NOT_CENA, READA[4]); + primitive = _buf bREADA5(NOT_CENA, READA[5]); + primitive = _buf bREADA6(NOT_CENA, READA[6]); + primitive = _buf bREADA7(NOT_CENA, READA[7]); + primitive = _buf bREADA8(NOT_CENA, READA[8]); + primitive = _buf bREADA9(NOT_CENA, READA[9]); + primitive = _buf bREADA10(NOT_CENA, READA[10]); + primitive = _buf bREADA11(NOT_CENA, READA[11]); + primitive = _buf bREADA12(NOT_CENA, READA[12]); + primitive = _buf bREADA13(NOT_CENA, READA[13]); + primitive = _buf bREADA14(NOT_CENA, READA[14]); + primitive = _buf bREADA15(NOT_CENA, READA[15]); + primitive = _buf bREADA16(NOT_CENA, READA[16]); + primitive = _buf bREADA17(NOT_CENA, READA[17]); + primitive = _buf bREADA18(NOT_CENA, READA[18]); + ) + intern (x_detection_CENA) (primitive = _xor xx_detection_CENA(BMUX_CENA, BMUX_CENA, x_detection_CENA);) + intern (x_detection_CLKA) (primitive = _xor xx_detection_CLKA(CLKA, CLKA, x_detection_CLKA);) + intern (aSEA) (primitive = _and a1SEA ( SEA, DFTRAMBYPinv, aSEA );) + intern (acendftA) (primitive = _and a1cendft[A] (x_detection_CENA, DFTRAMBYPinv, acendftA );) + intern (acendftCA) (primitive = _and a1cendftCA ( x_detection_CLKA, DFTRAMBYPinv, acendftCA );) + intern (XoutA) (primitive = _or oXoutA ( aSEA, acendftA, XoutA );) + intern (READ_QA) (array = 18:0; + primitive = _mux mREAD_QA0(QA[0], INT_QA[0], READA[0], READ_QA[0]); + primitive = _mux mREAD_QA1(QA[1], INT_QA[1], READA[1], READ_QA[1]); + primitive = _mux mREAD_QA2(QA[2], INT_QA[2], READA[2], READ_QA[2]); + primitive = _mux mREAD_QA3(QA[3], INT_QA[3], READA[3], READ_QA[3]); + primitive = _mux mREAD_QA4(QA[4], INT_QA[4], READA[4], READ_QA[4]); + primitive = _mux mREAD_QA5(QA[5], INT_QA[5], READA[5], READ_QA[5]); + primitive = _mux mREAD_QA6(QA[6], INT_QA[6], READA[6], READ_QA[6]); + primitive = _mux mREAD_QA7(QA[7], INT_QA[7], READA[7], READ_QA[7]); + primitive = _mux mREAD_QA8(QA[8], INT_QA[8], READA[8], READ_QA[8]); + primitive = _mux mREAD_QA9(QA[9], INT_QA[9], READA[9], READ_QA[9]); + primitive = _mux mREAD_QA10(QA[10], INT_QA[10], READA[10], READ_QA[10]); + primitive = _mux mREAD_QA11(QA[11], INT_QA[11], READA[11], READ_QA[11]); + primitive = _mux mREAD_QA12(QA[12], INT_QA[12], READA[12], READ_QA[12]); + primitive = _mux mREAD_QA13(QA[13], INT_QA[13], READA[13], READ_QA[13]); + primitive = _mux mREAD_QA14(QA[14], INT_QA[14], READA[14], READ_QA[14]); + primitive = _mux mREAD_QA15(QA[15], INT_QA[15], READA[15], READ_QA[15]); + primitive = _mux mREAD_QA16(QA[16], INT_QA[16], READA[16], READ_QA[16]); + primitive = _mux mREAD_QA17(QA[17], INT_QA[17], READA[17], READ_QA[17]); + primitive = _mux mREAD_QA18(QA[18], INT_QA[18], READA[18], READ_QA[18]); + ) + intern (AAXOR) (array = 4 : 0; + primitive = _xor xAAXOR0(BMUX_AA[0], BMUX_AA[0], AAXOR[0]); + primitive = _xor xAAXOR1(BMUX_AA[1], BMUX_AA[1], AAXOR[1]); + primitive = _xor xAAXOR2(BMUX_AA[2], BMUX_AA[2], AAXOR[2]); + primitive = _xor xAAXOR3(BMUX_AA[3], BMUX_AA[3], AAXOR[3]); + primitive = _xor xAAXOR4(BMUX_AA[4], BMUX_AA[4], AAXOR[4]); + ) + intern (xA_addr_temp) (primitive = _or oxA_addr_temp( AAXOR[0], AAXOR[1], AAXOR[2], AAXOR[3], AAXOR[4], xA_addr_temp);) + intern (xA_addr) (primitive = _and oxA_addr(NOT_CENA,xA_addr_temp,xA_addr);) + intern (READ_QAX) (array = 18 : 0; + primitive = _mux mREAD_QAX0 (READ_QA[0], tiex_readq, xA_addr, READ_QAX[0]); + primitive = _mux mREAD_QAX1 (READ_QA[1], tiex_readq, xA_addr, READ_QAX[1]); + primitive = _mux mREAD_QAX2 (READ_QA[2], tiex_readq, xA_addr, READ_QAX[2]); + primitive = _mux mREAD_QAX3 (READ_QA[3], tiex_readq, xA_addr, READ_QAX[3]); + primitive = _mux mREAD_QAX4 (READ_QA[4], tiex_readq, xA_addr, READ_QAX[4]); + primitive = _mux mREAD_QAX5 (READ_QA[5], tiex_readq, xA_addr, READ_QAX[5]); + primitive = _mux mREAD_QAX6 (READ_QA[6], tiex_readq, xA_addr, READ_QAX[6]); + primitive = _mux mREAD_QAX7 (READ_QA[7], tiex_readq, xA_addr, READ_QAX[7]); + primitive = _mux mREAD_QAX8 (READ_QA[8], tiex_readq, xA_addr, READ_QAX[8]); + primitive = _mux mREAD_QAX9 (READ_QA[9], tiex_readq, xA_addr, READ_QAX[9]); + primitive = _mux mREAD_QAX10 (READ_QA[10], tiex_readq, xA_addr, READ_QAX[10]); + primitive = _mux mREAD_QAX11 (READ_QA[11], tiex_readq, xA_addr, READ_QAX[11]); + primitive = _mux mREAD_QAX12 (READ_QA[12], tiex_readq, xA_addr, READ_QAX[12]); + primitive = _mux mREAD_QAX13 (READ_QA[13], tiex_readq, xA_addr, READ_QAX[13]); + primitive = _mux mREAD_QAX14 (READ_QA[14], tiex_readq, xA_addr, READ_QAX[14]); + primitive = _mux mREAD_QAX15 (READ_QA[15], tiex_readq, xA_addr, READ_QAX[15]); + primitive = _mux mREAD_QAX16 (READ_QA[16], tiex_readq, xA_addr, READ_QAX[16]); + primitive = _mux mREAD_QAX17 (READ_QA[17], tiex_readq, xA_addr, READ_QAX[17]); + primitive = _mux mREAD_QAX18 (READ_QA[18], tiex_readq, xA_addr, READ_QAX[18]); + ) + intern (DA_scan) (array = 18 : 0; + primitive = _mux mDA_scan0(READ_QAX[0], QA[1], DFTRAMBYP, DA_scan[0]); + primitive = _mux mDA_scan1(READ_QAX[1], QA[2], DFTRAMBYP, DA_scan[1]); + primitive = _mux mDA_scan2(READ_QAX[2], QA[3], DFTRAMBYP, DA_scan[2]); + primitive = _mux mDA_scan3(READ_QAX[3], QA[4], DFTRAMBYP, DA_scan[3]); + primitive = _mux mDA_scan4(READ_QAX[4], QA[5], DFTRAMBYP, DA_scan[4]); + primitive = _mux mDA_scan5(READ_QAX[5], QA[6], DFTRAMBYP, DA_scan[5]); + primitive = _mux mDA_scan6(READ_QAX[6], QA[7], DFTRAMBYP, DA_scan[6]); + primitive = _mux mDA_scan7(READ_QAX[7], QA[8], DFTRAMBYP, DA_scan[7]); + primitive = _mux mDA_scan8(READ_QAX[8], mtie_sel0, DFTRAMBYP, DA_scan[8]); + primitive = _mux mDA_scan9(READ_QAX[9], mtie_sel0, DFTRAMBYP, DA_scan[9]); + primitive = _mux mDA_scan10(READ_QAX[10], QA[9], DFTRAMBYP, DA_scan[10]); + primitive = _mux mDA_scan11(READ_QAX[11], QA[10], DFTRAMBYP, DA_scan[11]); + primitive = _mux mDA_scan12(READ_QAX[12], QA[11], DFTRAMBYP, DA_scan[12]); + primitive = _mux mDA_scan13(READ_QAX[13], QA[12], DFTRAMBYP, DA_scan[13]); + primitive = _mux mDA_scan14(READ_QAX[14], QA[13], DFTRAMBYP, DA_scan[14]); + primitive = _mux mDA_scan15(READ_QAX[15], QA[14], DFTRAMBYP, DA_scan[15]); + primitive = _mux mDA_scan16(READ_QAX[16], QA[15], DFTRAMBYP, DA_scan[16]); + primitive = _mux mDA_scan17(READ_QAX[17], QA[16], DFTRAMBYP, DA_scan[17]); + primitive = _mux mDA_scan18(READ_QAX[18], QA[17], DFTRAMBYP, DA_scan[18]); + ) + output (QA) ( array = 18 : 0; + instance = rf2_32x19_wm0_scanflop uDQA0 (.CLK(CLKA), .SE(SEA), .SI(QA[1]), .D(DA_scan[0]), .Q(QA[0]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA1 (.CLK(CLKA), .SE(SEA), .SI(QA[2]), .D(DA_scan[1]), .Q(QA[1]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA2 (.CLK(CLKA), .SE(SEA), .SI(QA[3]), .D(DA_scan[2]), .Q(QA[2]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA3 (.CLK(CLKA), .SE(SEA), .SI(QA[4]), .D(DA_scan[3]), .Q(QA[3]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA4 (.CLK(CLKA), .SE(SEA), .SI(QA[5]), .D(DA_scan[4]), .Q(QA[4]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA5 (.CLK(CLKA), .SE(SEA), .SI(QA[6]), .D(DA_scan[5]), .Q(QA[5]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA6 (.CLK(CLKA), .SE(SEA), .SI(QA[7]), .D(DA_scan[6]), .Q(QA[6]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA7 (.CLK(CLKA), .SE(SEA), .SI(QA[8]), .D(DA_scan[7]), .Q(QA[7]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA8 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[0]), .D(DA_scan[8]), .Q(QA[8]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA9 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[1]), .D(DA_scan[9]), .Q(QA[9]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA10 (.CLK(CLKA), .SE(SEA), .SI(QA[9]), .D(DA_scan[10]), .Q(QA[10]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA11 (.CLK(CLKA), .SE(SEA), .SI(QA[10]), .D(DA_scan[11]), .Q(QA[11]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA12 (.CLK(CLKA), .SE(SEA), .SI(QA[11]), .D(DA_scan[12]), .Q(QA[12]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA13 (.CLK(CLKA), .SE(SEA), .SI(QA[12]), .D(DA_scan[13]), .Q(QA[13]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA14 (.CLK(CLKA), .SE(SEA), .SI(QA[13]), .D(DA_scan[14]), .Q(QA[14]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA15 (.CLK(CLKA), .SE(SEA), .SI(QA[14]), .D(DA_scan[15]), .Q(QA[15]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA16 (.CLK(CLKA), .SE(SEA), .SI(QA[15]), .D(DA_scan[16]), .Q(QA[16]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA17 (.CLK(CLKA), .SE(SEA), .SI(QA[16]), .D(DA_scan[17]), .Q(QA[17]), .Xout(XoutAiff)); + instance = rf2_32x19_wm0_scanflop uDQA18 (.CLK(CLKA), .SE(SEA), .SI(QA[17]), .D(DA_scan[18]), .Q(QA[18]), .Xout(XoutAiff)); + ) + output (SOA) ( array = 1 : 0; + primitive = _buf bSOA0 ( QA[0], SOA[0] ); + primitive = _buf bSOA1 ( QA[18], SOA[1] ); + ) + intern (BUS_SIB) (array = 1 : 0; + primitive = _buf wbSIB0 (SIB[0], BUS_SIB[0]); + primitive = _buf wbSIB1 (SIB[1], BUS_SIB[1]); + ) + intern (BUS_AB) (array = 4 : 0; + primitive = _buf bBUS_AB0 ( AB[0], BUS_AB[0]); + primitive = _buf bBUS_AB1 ( AB[1], BUS_AB[1]); + primitive = _buf bBUS_AB2 ( AB[2], BUS_AB[2]); + primitive = _buf bBUS_AB3 ( AB[3], BUS_AB[3]); + primitive = _buf bBUS_AB4 ( AB[4], BUS_AB[4]); + ) + intern (BUS_DB) (array = 18 : 0; + primitive = _buf bBUS_DB0( DB[0], BUS_DB[0] ); + primitive = _buf bBUS_DB1( DB[1], BUS_DB[1] ); + primitive = _buf bBUS_DB2( DB[2], BUS_DB[2] ); + primitive = _buf bBUS_DB3( DB[3], BUS_DB[3] ); + primitive = _buf bBUS_DB4( DB[4], BUS_DB[4] ); + primitive = _buf bBUS_DB5( DB[5], BUS_DB[5] ); + primitive = _buf bBUS_DB6( DB[6], BUS_DB[6] ); + primitive = _buf bBUS_DB7( DB[7], BUS_DB[7] ); + primitive = _buf bBUS_DB8( DB[8], BUS_DB[8] ); + primitive = _buf bBUS_DB9( DB[9], BUS_DB[9] ); + primitive = _buf bBUS_DB10( DB[10], BUS_DB[10] ); + primitive = _buf bBUS_DB11( DB[11], BUS_DB[11] ); + primitive = _buf bBUS_DB12( DB[12], BUS_DB[12] ); + primitive = _buf bBUS_DB13( DB[13], BUS_DB[13] ); + primitive = _buf bBUS_DB14( DB[14], BUS_DB[14] ); + primitive = _buf bBUS_DB15( DB[15], BUS_DB[15] ); + primitive = _buf bBUS_DB16( DB[16], BUS_DB[16] ); + primitive = _buf bBUS_DB17( DB[17], BUS_DB[17] ); + primitive = _buf bBUS_DB18( DB[18], BUS_DB[18] ); + ) + intern (BMUX_AB) ( array = 4 : 0; + primitive = _mux maB0(TAB[0], BUS_AB[0], TENB, BMUX_AB[0]); + primitive = _mux maB1(TAB[1], BUS_AB[1], TENB, BMUX_AB[1]); + primitive = _mux maB2(TAB[2], BUS_AB[2], TENB, BMUX_AB[2]); + primitive = _mux maB3(TAB[3], BUS_AB[3], TENB, BMUX_AB[3]); + primitive = _mux maB4(TAB[4], BUS_AB[4], TENB, BMUX_AB[4]); + ) + intern (BMUXSEL_AB) ( array = 4 : 0; + primitive = _mux mBMUXSEL_AB0(mlc_bmuxsel, BMUX_AB[0], DFTRAMBYP, BMUXSEL_AB[0]); + primitive = _mux mBMUXSEL_AB1(mlc_bmuxsel, BMUX_AB[1], DFTRAMBYP, BMUXSEL_AB[1]); + primitive = _mux mBMUXSEL_AB2(mlc_bmuxsel, BMUX_AB[2], DFTRAMBYP, BMUXSEL_AB[2]); + primitive = _mux mBMUXSEL_AB3(mlc_bmuxsel, BMUX_AB[3], DFTRAMBYP, BMUXSEL_AB[3]); + primitive = _mux mBMUXSEL_AB4(mlc_bmuxsel, BMUX_AB[4], DFTRAMBYP, BMUXSEL_AB[4]); + ) + output (AYB) ( array = 4 : 0; + primitive = _buf bAYB0(BMUXSEL_AB[0], AYB[0]); + primitive = _buf bAYB1(BMUXSEL_AB[1], AYB[1]); + primitive = _buf bAYB2(BMUXSEL_AB[2], AYB[2]); + primitive = _buf bAYB3(BMUXSEL_AB[3], AYB[3]); + primitive = _buf bAYB4(BMUXSEL_AB[4], AYB[4]); + ) + + intern (BMUX_DB) ( array = 18 : 0; + primitive = _mux mBMUX_DB0(TDB[0], BUS_DB[0], TENB, BMUX_DB[0]); + primitive = _mux mBMUX_DB1(TDB[1], BUS_DB[1], TENB, BMUX_DB[1]); + primitive = _mux mBMUX_DB2(TDB[2], BUS_DB[2], TENB, BMUX_DB[2]); + primitive = _mux mBMUX_DB3(TDB[3], BUS_DB[3], TENB, BMUX_DB[3]); + primitive = _mux mBMUX_DB4(TDB[4], BUS_DB[4], TENB, BMUX_DB[4]); + primitive = _mux mBMUX_DB5(TDB[5], BUS_DB[5], TENB, BMUX_DB[5]); + primitive = _mux mBMUX_DB6(TDB[6], BUS_DB[6], TENB, BMUX_DB[6]); + primitive = _mux mBMUX_DB7(TDB[7], BUS_DB[7], TENB, BMUX_DB[7]); + primitive = _mux mBMUX_DB8(TDB[8], BUS_DB[8], TENB, BMUX_DB[8]); + primitive = _mux mBMUX_DB9(TDB[9], BUS_DB[9], TENB, BMUX_DB[9]); + primitive = _mux mBMUX_DB10(TDB[10], BUS_DB[10], TENB, BMUX_DB[10]); + primitive = _mux mBMUX_DB11(TDB[11], BUS_DB[11], TENB, BMUX_DB[11]); + primitive = _mux mBMUX_DB12(TDB[12], BUS_DB[12], TENB, BMUX_DB[12]); + primitive = _mux mBMUX_DB13(TDB[13], BUS_DB[13], TENB, BMUX_DB[13]); + primitive = _mux mBMUX_DB14(TDB[14], BUS_DB[14], TENB, BMUX_DB[14]); + primitive = _mux mBMUX_DB15(TDB[15], BUS_DB[15], TENB, BMUX_DB[15]); + primitive = _mux mBMUX_DB16(TDB[16], BUS_DB[16], TENB, BMUX_DB[16]); + primitive = _mux mBMUX_DB17(TDB[17], BUS_DB[17], TENB, BMUX_DB[17]); + primitive = _mux mBMUX_DB18(TDB[18], BUS_DB[18], TENB, BMUX_DB[18]); + ) + + intern (BMUX_CENB) (primitive = _mux mBMUX_CENB(TCENB, CENB, TENB, BMUX_CENB);) + intern (BMUXSEL_CENB) (primitive = _mux mBMUXSEL_CENB(mlc_bmuxsel, BMUX_CENB, DFTRAMBYP, BMUXSEL_CENB);) + output (CENYB) (primitive = _buf bCENYB(BMUXSEL_CENB, CENYB);) + intern (BMUX_AB_n) (array = 4 : 1; + primitive = _inv iBMUX_AB_n1 ( BMUX_AB[1], BMUX_AB_n[1] ); + primitive = _inv iBMUX_AB_n2 ( BMUX_AB[2], BMUX_AB_n[2] ); + primitive = _inv iBMUX_AB_n3 ( BMUX_AB[3], BMUX_AB_n[3] ); + primitive = _inv iBMUX_AB_n4 ( BMUX_AB[4], BMUX_AB_n[4] ); + ) + + intern (B_max) (array = 4 : 0; + primitive = _tie1 bB_max0 ( B_max[0] ); + primitive = _tie1 bB_max1 ( B_max[1] ); + primitive = _tie1 bB_max2 ( B_max[2] ); + primitive = _tie1 bB_max3 ( B_max[3] ); + primitive = _tie1 bB_max4 ( B_max[4] ); + ) + + intern (B_max_n) (array = 4 : 0; + primitive = _inv bB_max_n0( B_max[0], B_max_n[0] ); + primitive = _inv bB_max_n1( B_max[1], B_max_n[1] ); + primitive = _inv bB_max_n2( B_max[2], B_max_n[2] ); + primitive = _inv bB_max_n3( B_max[3], B_max_n[3] ); + primitive = _inv bB_max_n4( B_max[4], B_max_n[4] ); + ) + + intern (AB_m) (array = 4 : 0; + primitive = _and aAB_m0(BMUX_AB[0], B_max_n[0], AB_m[0] ); + primitive = _and aAB_m1(BMUX_AB[1], B_max_n[1], AB_m[1] ); + primitive = _and aAB_m2(BMUX_AB[2], B_max_n[2], AB_m[2] ); + primitive = _and aAB_m3(BMUX_AB[3], B_max_n[3], AB_m[3] ); + primitive = _and aAB_m4(BMUX_AB[4], B_max_n[4], AB_m[4] ); + ) + + intern (m_AB) (array = 4 : 1; + primitive = _and am_AB1(BMUX_AB_n[1], B_max[1], m_AB[1] ); + primitive = _and am_AB2(BMUX_AB_n[2], B_max[2], m_AB[2] ); + primitive = _and am_AB3(BMUX_AB_n[3], B_max[3], m_AB[3] ); + primitive = _and am_AB4(BMUX_AB_n[4], B_max[4], m_AB[4] ); + ) + + intern (EQ_B) (array = 4 : 1; + primitive = _nor nEQ_B1(m_AB[1], AB_m[1], EQ_B[1] ); + primitive = _nor nEQ_B2(m_AB[2], AB_m[2], EQ_B[2] ); + primitive = _nor nEQ_B3(m_AB[3], AB_m[3], EQ_B[3] ); + primitive = _nor nEQ_B4(m_AB[4], AB_m[4], EQ_B[4] ); + ) + + intern (XoutBi) (array = 3 : 0; + primitive = _and aXoutBi0(AB_m[0], EQ_B[4], EQ_B[3], EQ_B[2], EQ_B[1], XoutBi[0]); + primitive = _and aXoutBi1(AB_m[1], EQ_B[4], EQ_B[3], EQ_B[2], XoutBi[1]); + primitive = _and aXoutBi2(AB_m[2], EQ_B[4], EQ_B[3], XoutBi[2]); + primitive = _and aXoutBi3(AB_m[3], EQ_B[4], XoutBi[3]); + ) + intern (XoutBifTemp) (primitive = _or oXoutBifTemp (AB_m[4], XoutBi[0], XoutBi[1], XoutBi[2], XoutBi[3], XoutBifTemp);) + intern (XoutBif) (primitive = _and oXoutBif (XoutBifTemp, NOT_CENB, XoutBif);) + + intern (nscanshiftB) ( + primitive = _nor nnscanshiftB (DFTRAMBYP, SEB, nscanshiftB);) + intern (XoutaddrB) ( + primitive = _and aXoutaddrB (nscanshiftB, XoutBif, XoutaddrB);) + intern (XoutBiff) ( + primitive = _or oXoutBiff (XoutaddrB, XoutB, XoutBiff);) + + intern (NOT_CENB) (primitive = _inv iNOT_CENB(BMUX_CENB, NOT_CENB);) + intern (WRITEB) (array = 18 : 0; + primitive = _and aWRITEB0(NOT_DFTRAMBYP, NOT_CENB, WRITEB[0]); + primitive = _and aWRITEB1(NOT_DFTRAMBYP, NOT_CENB, WRITEB[1]); + primitive = _and aWRITEB2(NOT_DFTRAMBYP, NOT_CENB, WRITEB[2]); + primitive = _and aWRITEB3(NOT_DFTRAMBYP, NOT_CENB, WRITEB[3]); + primitive = _and aWRITEB4(NOT_DFTRAMBYP, NOT_CENB, WRITEB[4]); + primitive = _and aWRITEB5(NOT_DFTRAMBYP, NOT_CENB, WRITEB[5]); + primitive = _and aWRITEB6(NOT_DFTRAMBYP, NOT_CENB, WRITEB[6]); + primitive = _and aWRITEB7(NOT_DFTRAMBYP, NOT_CENB, WRITEB[7]); + primitive = _and aWRITEB8(NOT_DFTRAMBYP, NOT_CENB, WRITEB[8]); + primitive = _and aWRITEB9(NOT_DFTRAMBYP, NOT_CENB, WRITEB[9]); + primitive = _and aWRITEB10(NOT_DFTRAMBYP, NOT_CENB, WRITEB[10]); + primitive = _and aWRITEB11(NOT_DFTRAMBYP, NOT_CENB, WRITEB[11]); + primitive = _and aWRITEB12(NOT_DFTRAMBYP, NOT_CENB, WRITEB[12]); + primitive = _and aWRITEB13(NOT_DFTRAMBYP, NOT_CENB, WRITEB[13]); + primitive = _and aWRITEB14(NOT_DFTRAMBYP, NOT_CENB, WRITEB[14]); + primitive = _and aWRITEB15(NOT_DFTRAMBYP, NOT_CENB, WRITEB[15]); + primitive = _and aWRITEB16(NOT_DFTRAMBYP, NOT_CENB, WRITEB[16]); + primitive = _and aWRITEB17(NOT_DFTRAMBYP, NOT_CENB, WRITEB[17]); + primitive = _and aWRITEB18(NOT_DFTRAMBYP, NOT_CENB, WRITEB[18]); + ) +intern (INT_QA) (array = 18 : 0; + instance = rf2_32x19_wm0_bitcell memB0 (.CLK(CLKB), .WRITE(WRITEB[0]), .READ(READA[0]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[0]), .Xout(XoutBiff), .Q(INT_QA[0])); + instance = rf2_32x19_wm0_bitcell memB1 (.CLK(CLKB), .WRITE(WRITEB[1]), .READ(READA[1]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[1]), .Xout(XoutBiff), .Q(INT_QA[1])); + instance = rf2_32x19_wm0_bitcell memB2 (.CLK(CLKB), .WRITE(WRITEB[2]), .READ(READA[2]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[2]), .Xout(XoutBiff), .Q(INT_QA[2])); + instance = rf2_32x19_wm0_bitcell memB3 (.CLK(CLKB), .WRITE(WRITEB[3]), .READ(READA[3]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[3]), .Xout(XoutBiff), .Q(INT_QA[3])); + instance = rf2_32x19_wm0_bitcell memB4 (.CLK(CLKB), .WRITE(WRITEB[4]), .READ(READA[4]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[4]), .Xout(XoutBiff), .Q(INT_QA[4])); + instance = rf2_32x19_wm0_bitcell memB5 (.CLK(CLKB), .WRITE(WRITEB[5]), .READ(READA[5]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[5]), .Xout(XoutBiff), .Q(INT_QA[5])); + instance = rf2_32x19_wm0_bitcell memB6 (.CLK(CLKB), .WRITE(WRITEB[6]), .READ(READA[6]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[6]), .Xout(XoutBiff), .Q(INT_QA[6])); + instance = rf2_32x19_wm0_bitcell memB7 (.CLK(CLKB), .WRITE(WRITEB[7]), .READ(READA[7]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[7]), .Xout(XoutBiff), .Q(INT_QA[7])); + instance = rf2_32x19_wm0_bitcell memB8 (.CLK(CLKB), .WRITE(WRITEB[8]), .READ(READA[8]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[8]), .Xout(XoutBiff), .Q(INT_QA[8])); + instance = rf2_32x19_wm0_bitcell memB9 (.CLK(CLKB), .WRITE(WRITEB[9]), .READ(READA[9]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[9]), .Xout(XoutBiff), .Q(INT_QA[9])); + instance = rf2_32x19_wm0_bitcell memB10 (.CLK(CLKB), .WRITE(WRITEB[10]), .READ(READA[10]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[10]), .Xout(XoutBiff), .Q(INT_QA[10])); + instance = rf2_32x19_wm0_bitcell memB11 (.CLK(CLKB), .WRITE(WRITEB[11]), .READ(READA[11]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[11]), .Xout(XoutBiff), .Q(INT_QA[11])); + instance = rf2_32x19_wm0_bitcell memB12 (.CLK(CLKB), .WRITE(WRITEB[12]), .READ(READA[12]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[12]), .Xout(XoutBiff), .Q(INT_QA[12])); + instance = rf2_32x19_wm0_bitcell memB13 (.CLK(CLKB), .WRITE(WRITEB[13]), .READ(READA[13]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[13]), .Xout(XoutBiff), .Q(INT_QA[13])); + instance = rf2_32x19_wm0_bitcell memB14 (.CLK(CLKB), .WRITE(WRITEB[14]), .READ(READA[14]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[14]), .Xout(XoutBiff), .Q(INT_QA[14])); + instance = rf2_32x19_wm0_bitcell memB15 (.CLK(CLKB), .WRITE(WRITEB[15]), .READ(READA[15]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[15]), .Xout(XoutBiff), .Q(INT_QA[15])); + instance = rf2_32x19_wm0_bitcell memB16 (.CLK(CLKB), .WRITE(WRITEB[16]), .READ(READA[16]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[16]), .Xout(XoutBiff), .Q(INT_QA[16])); + instance = rf2_32x19_wm0_bitcell memB17 (.CLK(CLKB), .WRITE(WRITEB[17]), .READ(READA[17]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[17]), .Xout(XoutBiff), .Q(INT_QA[17])); + instance = rf2_32x19_wm0_bitcell memB18 (.CLK(CLKB), .WRITE(WRITEB[18]), .READ(READA[18]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[18]), .Xout(XoutBiff), .Q(INT_QA[18])); + ) + intern (x_detection_CENB) (primitive = _xor xx_detection_CENB(BMUX_CENB, BMUX_CENB, x_detection_CENB);) + intern (x_detection_CLKB) (primitive = _xor xx_detection_CLKB(CLKB, CLKB, x_detection_CLKB);) + intern (aSEB) (primitive = _and a1SEB ( SEB, DFTRAMBYPinv, aSEB );) + intern (acendftB) (primitive = _and a1cendft[B] (x_detection_CENB, DFTRAMBYPinv, acendftB );) + intern (acendftCB) (primitive = _and a1cendftCB ( x_detection_CLKB, DFTRAMBYPinv, acendftCB );) + intern (XoutB) (primitive = _or oXoutB ( aSEB, acendftB, acendftCA, acendftCB, XoutB );) + intern (DFTRAMBYPinv) (primitive = _inv imDFTRAMBYP ( DFTRAMBYP, DFTRAMBYPinv );) + intern (DB_hold) (array = 18:0; + primitive = _mux mDB_hold0 (BMUX_DB[0], QB_int[0], BMUX_CENB, DB_hold[0] ); + primitive = _mux mDB_hold1 (BMUX_DB[1], QB_int[1], BMUX_CENB, DB_hold[1] ); + primitive = _mux mDB_hold2 (BMUX_DB[2], QB_int[2], BMUX_CENB, DB_hold[2] ); + primitive = _mux mDB_hold3 (BMUX_DB[3], QB_int[3], BMUX_CENB, DB_hold[3] ); + primitive = _mux mDB_hold4 (BMUX_DB[4], QB_int[4], BMUX_CENB, DB_hold[4] ); + primitive = _mux mDB_hold5 (BMUX_DB[5], QB_int[5], BMUX_CENB, DB_hold[5] ); + primitive = _mux mDB_hold6 (BMUX_DB[6], QB_int[6], BMUX_CENB, DB_hold[6] ); + primitive = _mux mDB_hold7 (BMUX_DB[7], QB_int[7], BMUX_CENB, DB_hold[7] ); + primitive = _mux mDB_hold8 (BMUX_DB[8], QB_int[8], BMUX_CENB, DB_hold[8] ); + primitive = _mux mDB_hold9 (BMUX_DB[9], QB_int[9], BMUX_CENB, DB_hold[9] ); + primitive = _mux mDB_hold10 (BMUX_DB[10], QB_int[10], BMUX_CENB, DB_hold[10] ); + primitive = _mux mDB_hold11 (BMUX_DB[11], QB_int[11], BMUX_CENB, DB_hold[11] ); + primitive = _mux mDB_hold12 (BMUX_DB[12], QB_int[12], BMUX_CENB, DB_hold[12] ); + primitive = _mux mDB_hold13 (BMUX_DB[13], QB_int[13], BMUX_CENB, DB_hold[13] ); + primitive = _mux mDB_hold14 (BMUX_DB[14], QB_int[14], BMUX_CENB, DB_hold[14] ); + primitive = _mux mDB_hold15 (BMUX_DB[15], QB_int[15], BMUX_CENB, DB_hold[15] ); + primitive = _mux mDB_hold16 (BMUX_DB[16], QB_int[16], BMUX_CENB, DB_hold[16] ); + primitive = _mux mDB_hold17 (BMUX_DB[17], QB_int[17], BMUX_CENB, DB_hold[17] ); + primitive = _mux mDB_hold18 (BMUX_DB[18], QB_int[18], BMUX_CENB, DB_hold[18] ); + ) + intern (DB_scan) (array = 18:0; + primitive = _mux mDB_scan0 (DB_hold[0], BMUX_DB[0], DFTRAMBYP, DB_scan[0] ); + primitive = _mux mDB_scan1 (DB_hold[1], BMUX_DB[1], DFTRAMBYP, DB_scan[1] ); + primitive = _mux mDB_scan2 (DB_hold[2], BMUX_DB[2], DFTRAMBYP, DB_scan[2] ); + primitive = _mux mDB_scan3 (DB_hold[3], BMUX_DB[3], DFTRAMBYP, DB_scan[3] ); + primitive = _mux mDB_scan4 (DB_hold[4], BMUX_DB[4], DFTRAMBYP, DB_scan[4] ); + primitive = _mux mDB_scan5 (DB_hold[5], BMUX_DB[5], DFTRAMBYP, DB_scan[5] ); + primitive = _mux mDB_scan6 (DB_hold[6], BMUX_DB[6], DFTRAMBYP, DB_scan[6] ); + primitive = _mux mDB_scan7 (DB_hold[7], BMUX_DB[7], DFTRAMBYP, DB_scan[7] ); + primitive = _mux mDB_scan8 (DB_hold[8], BMUX_DB[8], DFTRAMBYP, DB_scan[8] ); + primitive = _mux mDB_scan9 (DB_hold[9], BMUX_DB[9], DFTRAMBYP, DB_scan[9] ); + primitive = _mux mDB_scan10 (DB_hold[10], BMUX_DB[10], DFTRAMBYP, DB_scan[10] ); + primitive = _mux mDB_scan11 (DB_hold[11], BMUX_DB[11], DFTRAMBYP, DB_scan[11] ); + primitive = _mux mDB_scan12 (DB_hold[12], BMUX_DB[12], DFTRAMBYP, DB_scan[12] ); + primitive = _mux mDB_scan13 (DB_hold[13], BMUX_DB[13], DFTRAMBYP, DB_scan[13] ); + primitive = _mux mDB_scan14 (DB_hold[14], BMUX_DB[14], DFTRAMBYP, DB_scan[14] ); + primitive = _mux mDB_scan15 (DB_hold[15], BMUX_DB[15], DFTRAMBYP, DB_scan[15] ); + primitive = _mux mDB_scan16 (DB_hold[16], BMUX_DB[16], DFTRAMBYP, DB_scan[16] ); + primitive = _mux mDB_scan17 (DB_hold[17], BMUX_DB[17], DFTRAMBYP, DB_scan[17] ); + primitive = _mux mDB_scan18 (DB_hold[18], BMUX_DB[18], DFTRAMBYP, DB_scan[18] ); + ) + intern (QB_int) (array = 18 : 0; + instance = rf2_32x19_wm0_scanflop uDQB0 (.CLK(CLKB), .SE(SEB), .SI(QB_int[1]), .D(DB_scan[0]), .Q(QB_int[0]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB1 (.CLK(CLKB), .SE(SEB), .SI(QB_int[2]), .D(DB_scan[1]), .Q(QB_int[1]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB2 (.CLK(CLKB), .SE(SEB), .SI(QB_int[3]), .D(DB_scan[2]), .Q(QB_int[2]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB3 (.CLK(CLKB), .SE(SEB), .SI(QB_int[4]), .D(DB_scan[3]), .Q(QB_int[3]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB4 (.CLK(CLKB), .SE(SEB), .SI(QB_int[5]), .D(DB_scan[4]), .Q(QB_int[4]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB5 (.CLK(CLKB), .SE(SEB), .SI(QB_int[6]), .D(DB_scan[5]), .Q(QB_int[5]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB6 (.CLK(CLKB), .SE(SEB), .SI(QB_int[7]), .D(DB_scan[6]), .Q(QB_int[6]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB7 (.CLK(CLKB), .SE(SEB), .SI(QB_int[8]), .D(DB_scan[7]), .Q(QB_int[7]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB8 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[0]), .D(DB_scan[8]), .Q(QB_int[8]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB9 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[1]), .D(DB_scan[9]), .Q(QB_int[9]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB10 (.CLK(CLKB), .SE(SEB), .SI(QB_int[9]), .D(DB_scan[10]), .Q(QB_int[10]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB11 (.CLK(CLKB), .SE(SEB), .SI(QB_int[10]), .D(DB_scan[11]), .Q(QB_int[11]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB12 (.CLK(CLKB), .SE(SEB), .SI(QB_int[11]), .D(DB_scan[12]), .Q(QB_int[12]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB13 (.CLK(CLKB), .SE(SEB), .SI(QB_int[12]), .D(DB_scan[13]), .Q(QB_int[13]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB14 (.CLK(CLKB), .SE(SEB), .SI(QB_int[13]), .D(DB_scan[14]), .Q(QB_int[14]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB15 (.CLK(CLKB), .SE(SEB), .SI(QB_int[14]), .D(DB_scan[15]), .Q(QB_int[15]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB16 (.CLK(CLKB), .SE(SEB), .SI(QB_int[15]), .D(DB_scan[16]), .Q(QB_int[16]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB17 (.CLK(CLKB), .SE(SEB), .SI(QB_int[16]), .D(DB_scan[17]), .Q(QB_int[17]), .Xout(XoutBiff)); + instance = rf2_32x19_wm0_scanflop uDQB18 (.CLK(CLKB), .SE(SEB), .SI(QB_int[17]), .D(DB_scan[18]), .Q(QB_int[18]), .Xout(XoutBiff)); + ) + output (SOB) ( array = 1 : 0; + primitive = _buf bSOB0 (QB_int[0], SOB[0] ); + primitive = _buf bSOB1 (QB_int[18], SOB[1] ); + ) + ) diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.memlib b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.memlib new file mode 100644 index 00000000..a9efb967 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.memlib @@ -0,0 +1,238 @@ +/* logicvision_memcomp Version: c0.1.2-beta */ +/* common_memcomp Version: c0.1.0-EAC */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// logicvision model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0 +// Words: 32 +// Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Extra Margin Adjustment: On +// Redundant Rows: 0 +// Redundant Columns: 2 +// Test Muxes On +// +// Creation Date: Mon Nov 11 12:00:43 2019 +// Version: r4p0 +// +// Modeling Assumptions: +// +// Modeling Limitations: None +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +MemoryTemplate (rf2_32x19_wm0) { + Algorithm : SmarchChkbvcd; + DataOutStage : None; + LogicalPorts : 1R1W; + BitGrouping : 1; + MemoryType : SRAM; + MinHold : 0.5; + OperationSet : SyncWRvcd; + SelectDuringWriteThru : Off; + ShadowRead : On; + ShadowWrite : On; + TransparentMode : None; + ObservationLogic: On; + InternalScanLogic: On; + CellName : rf2_32x19_wm0; + NumberOfWords : 32; + AddressCounter{ + Function (Address) { + LogicalAddressMap{ + ColumnAddress[0] : Address[0]; + RowAddress[3:0] : Address[4:1]; + } + } + Function (ColumnAddress) { + CountRange [0:1]; + } + Function (RowAddress) { + CountRange [0:15]; + } + } + PhysicalAddressMap{ + ColumnAddress[0] : c[0]; + RowAddress[0] : r[0]; + RowAddress[1] : r[1]; + RowAddress[2] : r[2]; + RowAddress[3] : r[3]; + } + PhysicalDataMap{ + Data[0] : NOT d[0]; + Data[1] : NOT d[1]; + Data[2] : NOT d[2]; + Data[3] : NOT d[3]; + Data[4] : NOT d[4]; + Data[5] : NOT d[5]; + Data[6] : NOT d[6]; + Data[7] : NOT d[7]; + Data[8] : NOT d[8]; + Data[9] : d[9]; + Data[10] : d[10]; + Data[11] : d[11]; + Data[12] : d[12]; + Data[13] : d[13]; + Data[14] : d[14]; + Data[15] : d[15]; + Data[16] : d[16]; + Data[17] : d[17]; + Data[18] : d[18]; + } + Port (AA[4:0]) { + Function : Address; + LogicalPort : A; + EmbeddedTestLogic { + TestInput : TAA[4:0]; + TestOutput : AYA[4:0]; + } + } + Port (QA[18:0]) { + Function : Data; + Direction : output; + LogicalPort : A; + } + Port (CENA) { + Function : ReadEnable; + LogicalPort : A; + Polarity : ActiveLow; + EmbeddedTestLogic { + TestInput : TCENA; + TestOutput : CENYA; + } + } + Port (TENA) { + Function : BISTOn; + Direction : Input; + LogicalPort : A; + Polarity : ActiveLow; + } + Port (CLKA) { + Function : Clock; + LogicalPort : A; + Polarity : ActiveHigh; + } + Port (EMAA[2:0]) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : A; + Polarity : ActiveHigh; + } + Port (EMASA) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : A; + Polarity : ActiveHigh; + } + port (SEA){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SIA[1:0]){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SOA[1:0]){ + Function : None; + Direction : Output; + } + port (DFTRAMBYP){ + Function : ScanTest; + Direction : Input; + Polarity : ActiveHigh; + } + Port (AB[4:0]) { + Function : Address; + LogicalPort : B; + EmbeddedTestLogic { + TestInput : TAB[4:0]; + TestOutput : AYB[4:0]; + } + } + Port (DB[18:0]) { + Function : Data; + Direction : input; + LogicalPort : B; + EmbeddedTestLogic { + TestInput : TDB[18:0]; + } + } + Port (CENB) { + Function : WriteEnable; + LogicalPort : B; + Polarity : ActiveLow; + EmbeddedTestLogic { + TestInput : TCENB; + TestOutput : CENYB; + } + } + Port (TENB) { + Function : BISTOn; + Direction : Input; + LogicalPort : B; + Polarity : ActiveLow; + } + Port (CLKB) { + Function : Clock; + LogicalPort : B; + Polarity : ActiveHigh; + } + Port (EMAB[2:0]) { + Function : None; + SafeValue : 0; + Direction : Input; + LogicalPort : B; + Polarity : ActiveHigh; + } + Port (COLLDISN) { + Function : None; + SafeValue : 1; + Direction : Input; + Polarity : ActiveLow; + } + port (SEB){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SIB[1:0]){ + Function : None; + Direction : Input; + SafeValue : 0; + Polarity : ActiveHigh; + } + port (SOB[1:0]){ + Function : None; + Direction : Output; + } + port (RET1N){ + Function : None; + Direction : Input; + SafeValue : 1; + Polarity : Activelow; + } +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.tv b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.tv new file mode 100644 index 00000000..52c432e3 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.tv @@ -0,0 +1,562 @@ +/* tetramax_memcomp Version: 4.0.5-EAC3 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Tetramax model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0 +// Words: 32 +// Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Write Thru: Off +// Extra Margin Adjustment: On +// Redundant Columns: 2 +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Mon Nov 11 12:01:06 2019 +// Version: r4p0 +// +// Verified +// +// Modeling Assumptions: +// This model is for use by only TetraMax ATPG tool. +// It is not intended to be used by any Verilog Simulator. +// +// Modeling Limitations: These models have limited functionality as +// defined by the TetraMax modelling guidelines. These models are +// developed on Verilog syntax but they don't fully represent the +// functionality of the memory model as they are restricted by +// the ATPG tool. We have used fast sequential ATPG engine for verification +// of all the memories on recommendation from Synopsys Tetramax expert. +// The models have been tested by generating the ATPG vectors and simulating them +// as well as running functional vectors through tetramax logical simulation engine. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// + + +`timescale 1ns/1ps +`define read_write readx +`celldefine +module rf2_32x19_wm0_scanflop (Q, SI, D, SE, CLK, Xout); + output Q; + input SI, D, SE, CLK, Xout; + _MUX m1 (SE, D, SI, n1); + _MUX m2 (Xout, n1, 1'bX, n2); + _DFF r1 (1'b0, 1'b0, CLK, n2, Q); +endmodule +`endcelldefine +`celldefine +module rf2_32x19_wm0_bitcell (CLK, WRITE, WA, RA, D, Xout, Q); + input CLK, WRITE, D, Xout; + input [4:0] WA, RA; + output Q; + + reg Q; + reg mem [31:0]; + wire WRITE_ram, D_ram; + wire [4:0] WA_ram; + + _MUX WRITE_MUX (Xout, WRITE, 1'bX, WRITE_ram); + _MUX D_mux (Xout, D, 1'bX, D_ram); + _MUX A0_mux (Xout, WA[0], 1'bX, WA_ram[0]); + _MUX A1_mux (Xout, WA[1], 1'bX, WA_ram[1]); + _MUX A2_mux (Xout, WA[2], 1'bX, WA_ram[2]); + _MUX A3_mux (Xout, WA[3], 1'bX, WA_ram[3]); + _MUX A4_mux (Xout, WA[4], 1'bX, WA_ram[4]); + + event WRITE_OP; + always @ (posedge CLK) if(WRITE_ram) begin + mem[WA_ram]=D_ram; + #0; -> WRITE_OP; + end + + wire TIE1; + assign TIE1 = 1'b1; + always @ (TIE1 or RA or WRITE_OP) if(TIE1) Q=mem[RA]; +endmodule +`endcelldefine +`suppress_faults +`enable_portfaults +`ifdef POWER_PINS +module rf2_32x19_wm0 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, + CENA, AA, CLKB, CENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + wire [1:0] BUS_SIA; + assign BUS_SIA[0] = SIA[0]; + assign BUS_SIA[1] = SIA[1]; + wire [4:0] BUS_AA; + assign BUS_AA = AA; + wire [4:0] BMUX_AA; + wire [4:0] BMUXSEL_AA; + wire BMUX_CENA; + wire BMUXSEL_CENA; + wire [18:0] INT_QA; + wire [18:0] READ_QA; + _MUX maA0 (TENA, TAA[0], BUS_AA[0], BMUX_AA[0]); + _MUX maselA0 (DFTRAMBYP, 1'b0, BMUX_AA[0], BMUXSEL_AA[0]); + buf bufmaA0(AYA[0],BMUXSEL_AA[0]); + _MUX maA1 (TENA, TAA[1], BUS_AA[1], BMUX_AA[1]); + _MUX maselA1 (DFTRAMBYP, 1'b0, BMUX_AA[1], BMUXSEL_AA[1]); + buf bufmaA1(AYA[1],BMUXSEL_AA[1]); + _MUX maA2 (TENA, TAA[2], BUS_AA[2], BMUX_AA[2]); + _MUX maselA2 (DFTRAMBYP, 1'b0, BMUX_AA[2], BMUXSEL_AA[2]); + buf bufmaA2(AYA[2],BMUXSEL_AA[2]); + _MUX maA3 (TENA, TAA[3], BUS_AA[3], BMUX_AA[3]); + _MUX maselA3 (DFTRAMBYP, 1'b0, BMUX_AA[3], BMUXSEL_AA[3]); + buf bufmaA3(AYA[3],BMUXSEL_AA[3]); + _MUX maA4 (TENA, TAA[4], BUS_AA[4], BMUX_AA[4]); + _MUX maselA4 (DFTRAMBYP, 1'b0, BMUX_AA[4], BMUXSEL_AA[4]); + buf bufmaA4(AYA[4],BMUXSEL_AA[4]); + + _MUX mcenA (TENA, TCENA, CENA, BMUX_CENA); + _MUX mcenselA (DFTRAMBYP, 1'b0,BMUX_CENA, BMUXSEL_CENA); + buf bufmcenA (CENYA, BMUXSEL_CENA); + wire [4:0] A_max, A_max_n, AA_m; + wire XoutAif, XoutAiff; + wire [4:1] BMUX_AA_n, EQ_A, m_AA; + wire [3:0] XoutAi; + not BMUX_AA1_n (BMUX_AA_n[1], BMUX_AA[1]); + not BMUX_AA2_n (BMUX_AA_n[2], BMUX_AA[2]); + not BMUX_AA3_n (BMUX_AA_n[3], BMUX_AA[3]); + not BMUX_AA4_n (BMUX_AA_n[4], BMUX_AA[4]); + + assign A_max[0] = 1; + assign A_max[1] = 1; + assign A_max[2] = 1; + assign A_max[3] = 1; + assign A_max[4] = 1; + + not Amax0_n (A_max_n[0], A_max[0]); + not Amax1_n (A_max_n[1], A_max[1]); + not Amax2_n (A_max_n[2], A_max[2]); + not Amax3_n (A_max_n[3], A_max[3]); + not Amax4_n (A_max_n[4], A_max[4]); + + and andBMUXAAAmax0 (AA_m[0], BMUX_AA[0], A_max_n[0]); + and andBMUXAAAmax1 (AA_m[1], BMUX_AA[1], A_max_n[1]); + and andBMUXAAAmax2 (AA_m[2], BMUX_AA[2], A_max_n[2]); + and andBMUXAAAmax3 (AA_m[3], BMUX_AA[3], A_max_n[3]); + and andBMUXAAAmax4 (AA_m[4], BMUX_AA[4], A_max_n[4]); + + and andBMUXAAAmax1_n (m_AA[1], BMUX_AA_n[1], A_max[1]); + and andBMUXAAAmax2_n (m_AA[2], BMUX_AA_n[2], A_max[2]); + and andBMUXAAAmax3_n (m_AA[3], BMUX_AA_n[3], A_max[3]); + and andBMUXAAAmax4_n (m_AA[4], BMUX_AA_n[4], A_max[4]); + + nor norAAAmax1 (EQ_A[1], m_AA[1], AA_m[1]); + nor norAAAmax2 (EQ_A[2], m_AA[2], AA_m[2]); + nor norAAAmax3 (EQ_A[3], m_AA[3], AA_m[3]); + nor norAAAmax4 (EQ_A[4], m_AA[4], AA_m[4]); + + and XfAAAmax0 (XoutAi[0], AA_m[0], EQ_A[4], EQ_A[3], EQ_A[2], EQ_A[1]); + and XfAAAmax1 (XoutAi[1], AA_m[1], EQ_A[4], EQ_A[3], EQ_A[2]); + and XfAAAmax2 (XoutAi[2], AA_m[2], EQ_A[4], EQ_A[3]); + and XfAAAmax3 (XoutAi[3], AA_m[3], EQ_A[4]); + or orXfAAAmax4 (XoutAif, AA_m[4], XoutAi[0], XoutAi[1], XoutAi[2], XoutAi[3]); + + wire [4:0] xDetectionAddrBusA; + xor addrHandleA0 (xDetectionAddrBusA[0], BMUX_AA[0], BMUX_AA[0]); + xor addrHandleA1 (xDetectionAddrBusA[1], BMUX_AA[1], BMUX_AA[1]); + xor addrHandleA2 (xDetectionAddrBusA[2], BMUX_AA[2], BMUX_AA[2]); + xor addrHandleA3 (xDetectionAddrBusA[3], BMUX_AA[3], BMUX_AA[3]); + xor addrHandleA4 (xDetectionAddrBusA[4], BMUX_AA[4], BMUX_AA[4]); + or addrFinalA (xAddrA,xDetectionAddrBusA[0],xDetectionAddrBusA[1],xDetectionAddrBusA[2],xDetectionAddrBusA[3],xDetectionAddrBusA[4]); + or xBoundA (XoutAFinal, XoutAif, xAddrA); + nor scanshiftA (nscanshiftA, DFTRAMBYP, SEA); + and XoutaddrA (XoutaddrA, nscanshiftA, XoutAFinal); + or XoutAFF0 (XoutAiff, XoutaddrA, XoutA); + + wire NOT_CENA; + not (NOT_CENA, BMUX_CENA); + wire NOT_DFTRAMBYP; + not (NOT_DFTRAMBYP, DFTRAMBYP); + wire [18:0] READA; + buf (READA[0], NOT_CENA); + buf (READA[1], NOT_CENA); + buf (READA[2], NOT_CENA); + buf (READA[3], NOT_CENA); + buf (READA[4], NOT_CENA); + buf (READA[5], NOT_CENA); + buf (READA[6], NOT_CENA); + buf (READA[7], NOT_CENA); + buf (READA[8], NOT_CENA); + buf (READA[9], NOT_CENA); + buf (READA[10], NOT_CENA); + buf (READA[11], NOT_CENA); + buf (READA[12], NOT_CENA); + buf (READA[13], NOT_CENA); + buf (READA[14], NOT_CENA); + buf (READA[15], NOT_CENA); + buf (READA[16], NOT_CENA); + buf (READA[17], NOT_CENA); + buf (READA[18], NOT_CENA); + xor (x_detection_CENA, BMUX_CENA, BMUX_CENA); + and (acendftA, x_detection_CENA, NOT_DFTRAMBYP); + assign XoutA = (SEA & ~DFTRAMBYP) | acendftA; + _MUX reA0 (READA[0], QA[0], INT_QA[0], READ_QA[0]); + _MUX reA1 (READA[1], QA[1], INT_QA[1], READ_QA[1]); + _MUX reA2 (READA[2], QA[2], INT_QA[2], READ_QA[2]); + _MUX reA3 (READA[3], QA[3], INT_QA[3], READ_QA[3]); + _MUX reA4 (READA[4], QA[4], INT_QA[4], READ_QA[4]); + _MUX reA5 (READA[5], QA[5], INT_QA[5], READ_QA[5]); + _MUX reA6 (READA[6], QA[6], INT_QA[6], READ_QA[6]); + _MUX reA7 (READA[7], QA[7], INT_QA[7], READ_QA[7]); + _MUX reA8 (READA[8], QA[8], INT_QA[8], READ_QA[8]); + _MUX reA9 (READA[9], QA[9], INT_QA[9], READ_QA[9]); + _MUX reA10 (READA[10], QA[10], INT_QA[10], READ_QA[10]); + _MUX reA11 (READA[11], QA[11], INT_QA[11], READ_QA[11]); + _MUX reA12 (READA[12], QA[12], INT_QA[12], READ_QA[12]); + _MUX reA13 (READA[13], QA[13], INT_QA[13], READ_QA[13]); + _MUX reA14 (READA[14], QA[14], INT_QA[14], READ_QA[14]); + _MUX reA15 (READA[15], QA[15], INT_QA[15], READ_QA[15]); + _MUX reA16 (READA[16], QA[16], INT_QA[16], READ_QA[16]); + _MUX reA17 (READA[17], QA[17], INT_QA[17], READ_QA[17]); + _MUX reA18 (READA[18], QA[18], INT_QA[18], READ_QA[18]); + wire [4:0] AAXOR; + xor (AAXOR[0], BMUX_AA[0], BMUX_AA[0]); + xor (AAXOR[1], BMUX_AA[1], BMUX_AA[1]); + xor (AAXOR[2], BMUX_AA[2], BMUX_AA[2]); + xor (AAXOR[3], BMUX_AA[3], BMUX_AA[3]); + xor (AAXOR[4], BMUX_AA[4], BMUX_AA[4]); + wire xA_addr; + or (xA_addr, AAXOR[0], AAXOR[1], AAXOR[2], AAXOR[3], AAXOR[4]); + _MUX rxA0 (xA_addr, READ_QA[0], 1'bX, READ_QAX[0]); + _MUX rxA1 (xA_addr, READ_QA[1], 1'bX, READ_QAX[1]); + _MUX rxA2 (xA_addr, READ_QA[2], 1'bX, READ_QAX[2]); + _MUX rxA3 (xA_addr, READ_QA[3], 1'bX, READ_QAX[3]); + _MUX rxA4 (xA_addr, READ_QA[4], 1'bX, READ_QAX[4]); + _MUX rxA5 (xA_addr, READ_QA[5], 1'bX, READ_QAX[5]); + _MUX rxA6 (xA_addr, READ_QA[6], 1'bX, READ_QAX[6]); + _MUX rxA7 (xA_addr, READ_QA[7], 1'bX, READ_QAX[7]); + _MUX rxA8 (xA_addr, READ_QA[8], 1'bX, READ_QAX[8]); + _MUX rxA9 (xA_addr, READ_QA[9], 1'bX, READ_QAX[9]); + _MUX rxA10 (xA_addr, READ_QA[10], 1'bX, READ_QAX[10]); + _MUX rxA11 (xA_addr, READ_QA[11], 1'bX, READ_QAX[11]); + _MUX rxA12 (xA_addr, READ_QA[12], 1'bX, READ_QAX[12]); + _MUX rxA13 (xA_addr, READ_QA[13], 1'bX, READ_QAX[13]); + _MUX rxA14 (xA_addr, READ_QA[14], 1'bX, READ_QAX[14]); + _MUX rxA15 (xA_addr, READ_QA[15], 1'bX, READ_QAX[15]); + _MUX rxA16 (xA_addr, READ_QA[16], 1'bX, READ_QAX[16]); + _MUX rxA17 (xA_addr, READ_QA[17], 1'bX, READ_QAX[17]); + _MUX rxA18 (xA_addr, READ_QA[18], 1'bX, READ_QAX[18]); + _MUX mqA0 (DFTRAMBYP, READ_QAX[0], QA[1], DA_scan[0]); + _MUX mqA1 (DFTRAMBYP, READ_QAX[1], QA[2], DA_scan[1]); + _MUX mqA2 (DFTRAMBYP, READ_QAX[2], QA[3], DA_scan[2]); + _MUX mqA3 (DFTRAMBYP, READ_QAX[3], QA[4], DA_scan[3]); + _MUX mqA4 (DFTRAMBYP, READ_QAX[4], QA[5], DA_scan[4]); + _MUX mqA5 (DFTRAMBYP, READ_QAX[5], QA[6], DA_scan[5]); + _MUX mqA6 (DFTRAMBYP, READ_QAX[6], QA[7], DA_scan[6]); + _MUX mqA7 (DFTRAMBYP, READ_QAX[7], QA[8], DA_scan[7]); + _MUX mqA8 (DFTRAMBYP, READ_QAX[8], 1'b0, DA_scan[8]); + _MUX mqA9 (DFTRAMBYP, READ_QAX[9], 1'b0, DA_scan[9]); + _MUX mqA10 (DFTRAMBYP, READ_QAX[10], QA[9], DA_scan[10]); + _MUX mqA11 (DFTRAMBYP, READ_QAX[11], QA[10], DA_scan[11]); + _MUX mqA12 (DFTRAMBYP, READ_QAX[12], QA[11], DA_scan[12]); + _MUX mqA13 (DFTRAMBYP, READ_QAX[13], QA[12], DA_scan[13]); + _MUX mqA14 (DFTRAMBYP, READ_QAX[14], QA[13], DA_scan[14]); + _MUX mqA15 (DFTRAMBYP, READ_QAX[15], QA[14], DA_scan[15]); + _MUX mqA16 (DFTRAMBYP, READ_QAX[16], QA[15], DA_scan[16]); + _MUX mqA17 (DFTRAMBYP, READ_QAX[17], QA[16], DA_scan[17]); + _MUX mqA18 (DFTRAMBYP, READ_QAX[18], QA[17], DA_scan[18]); + rf2_32x19_wm0_scanflop uDQA0 (.CLK(CLKA), .SE(SEA), .SI(QA[1]), .D(DA_scan[0]), .Q(QA[0]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA1 (.CLK(CLKA), .SE(SEA), .SI(QA[2]), .D(DA_scan[1]), .Q(QA[1]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA2 (.CLK(CLKA), .SE(SEA), .SI(QA[3]), .D(DA_scan[2]), .Q(QA[2]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA3 (.CLK(CLKA), .SE(SEA), .SI(QA[4]), .D(DA_scan[3]), .Q(QA[3]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA4 (.CLK(CLKA), .SE(SEA), .SI(QA[5]), .D(DA_scan[4]), .Q(QA[4]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA5 (.CLK(CLKA), .SE(SEA), .SI(QA[6]), .D(DA_scan[5]), .Q(QA[5]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA6 (.CLK(CLKA), .SE(SEA), .SI(QA[7]), .D(DA_scan[6]), .Q(QA[6]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA7 (.CLK(CLKA), .SE(SEA), .SI(QA[8]), .D(DA_scan[7]), .Q(QA[7]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA8 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[0]), .D(DA_scan[8]), .Q(QA[8]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA9 (.CLK(CLKA), .SE(SEA), .SI(BUS_SIA[1]), .D(DA_scan[9]), .Q(QA[9]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA10 (.CLK(CLKA), .SE(SEA), .SI(QA[9]), .D(DA_scan[10]), .Q(QA[10]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA11 (.CLK(CLKA), .SE(SEA), .SI(QA[10]), .D(DA_scan[11]), .Q(QA[11]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA12 (.CLK(CLKA), .SE(SEA), .SI(QA[11]), .D(DA_scan[12]), .Q(QA[12]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA13 (.CLK(CLKA), .SE(SEA), .SI(QA[12]), .D(DA_scan[13]), .Q(QA[13]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA14 (.CLK(CLKA), .SE(SEA), .SI(QA[13]), .D(DA_scan[14]), .Q(QA[14]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA15 (.CLK(CLKA), .SE(SEA), .SI(QA[14]), .D(DA_scan[15]), .Q(QA[15]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA16 (.CLK(CLKA), .SE(SEA), .SI(QA[15]), .D(DA_scan[16]), .Q(QA[16]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA17 (.CLK(CLKA), .SE(SEA), .SI(QA[16]), .D(DA_scan[17]), .Q(QA[17]), .Xout(XoutAiff)); + rf2_32x19_wm0_scanflop uDQA18 (.CLK(CLKA), .SE(SEA), .SI(QA[17]), .D(DA_scan[18]), .Q(QA[18]), .Xout(XoutAiff)); + assign SOA[0] = QA[0]; + assign SOA[1] = QA[18]; + wire [1:0] BUS_SIB; + assign BUS_SIB[0] = SIB[0]; + assign BUS_SIB[1] = SIB[1]; + wire [4:0] BUS_AB; + assign BUS_AB = AB; + wire [18:0] BUS_DB; + assign BUS_DB = DB; + wire [18:0] DB_scan; + wire [4:0] BMUX_AB; + wire [4:0] BMUXSEL_AB; + wire [18:0] BMUX_DB; + wire BMUX_CENB; + wire BMUXSEL_CENB; + _MUX maB0 (TENB, TAB[0], BUS_AB[0], BMUX_AB[0]); + _MUX maselB0 (DFTRAMBYP, 1'b0, BMUX_AB[0], BMUXSEL_AB[0]); + buf bufmaB0(AYB[0],BMUXSEL_AB[0]); + _MUX maB1 (TENB, TAB[1], BUS_AB[1], BMUX_AB[1]); + _MUX maselB1 (DFTRAMBYP, 1'b0, BMUX_AB[1], BMUXSEL_AB[1]); + buf bufmaB1(AYB[1],BMUXSEL_AB[1]); + _MUX maB2 (TENB, TAB[2], BUS_AB[2], BMUX_AB[2]); + _MUX maselB2 (DFTRAMBYP, 1'b0, BMUX_AB[2], BMUXSEL_AB[2]); + buf bufmaB2(AYB[2],BMUXSEL_AB[2]); + _MUX maB3 (TENB, TAB[3], BUS_AB[3], BMUX_AB[3]); + _MUX maselB3 (DFTRAMBYP, 1'b0, BMUX_AB[3], BMUXSEL_AB[3]); + buf bufmaB3(AYB[3],BMUXSEL_AB[3]); + _MUX maB4 (TENB, TAB[4], BUS_AB[4], BMUX_AB[4]); + _MUX maselB4 (DFTRAMBYP, 1'b0, BMUX_AB[4], BMUXSEL_AB[4]); + buf bufmaB4(AYB[4],BMUXSEL_AB[4]); + + _MUX mdB0 (TENB, TDB[0], BUS_DB[0], BMUX_DB[0]); + _MUX mdB1 (TENB, TDB[1], BUS_DB[1], BMUX_DB[1]); + _MUX mdB2 (TENB, TDB[2], BUS_DB[2], BMUX_DB[2]); + _MUX mdB3 (TENB, TDB[3], BUS_DB[3], BMUX_DB[3]); + _MUX mdB4 (TENB, TDB[4], BUS_DB[4], BMUX_DB[4]); + _MUX mdB5 (TENB, TDB[5], BUS_DB[5], BMUX_DB[5]); + _MUX mdB6 (TENB, TDB[6], BUS_DB[6], BMUX_DB[6]); + _MUX mdB7 (TENB, TDB[7], BUS_DB[7], BMUX_DB[7]); + _MUX mdB8 (TENB, TDB[8], BUS_DB[8], BMUX_DB[8]); + _MUX mdB9 (TENB, TDB[9], BUS_DB[9], BMUX_DB[9]); + _MUX mdB10 (TENB, TDB[10], BUS_DB[10], BMUX_DB[10]); + _MUX mdB11 (TENB, TDB[11], BUS_DB[11], BMUX_DB[11]); + _MUX mdB12 (TENB, TDB[12], BUS_DB[12], BMUX_DB[12]); + _MUX mdB13 (TENB, TDB[13], BUS_DB[13], BMUX_DB[13]); + _MUX mdB14 (TENB, TDB[14], BUS_DB[14], BMUX_DB[14]); + _MUX mdB15 (TENB, TDB[15], BUS_DB[15], BMUX_DB[15]); + _MUX mdB16 (TENB, TDB[16], BUS_DB[16], BMUX_DB[16]); + _MUX mdB17 (TENB, TDB[17], BUS_DB[17], BMUX_DB[17]); + _MUX mdB18 (TENB, TDB[18], BUS_DB[18], BMUX_DB[18]); + + _MUX mcenB (TENB, TCENB, CENB, BMUX_CENB); + _MUX mcenselB (DFTRAMBYP, 1'b0,BMUX_CENB, BMUXSEL_CENB); + buf bufmcenB (CENYB, BMUXSEL_CENB); + wire [4:0] B_max, B_max_n, AB_m; + wire XoutBif, XoutBiff; + wire [4:1] BMUX_AB_n, EQ_B, m_AB; + wire [3:0] XoutBi; + not BMUX_AB1_n (BMUX_AB_n[1], BMUX_AB[1]); + not BMUX_AB2_n (BMUX_AB_n[2], BMUX_AB[2]); + not BMUX_AB3_n (BMUX_AB_n[3], BMUX_AB[3]); + not BMUX_AB4_n (BMUX_AB_n[4], BMUX_AB[4]); + + assign B_max[0] = 1; + assign B_max[1] = 1; + assign B_max[2] = 1; + assign B_max[3] = 1; + assign B_max[4] = 1; + + not Bmax0_n (B_max_n[0], B_max[0]); + not Bmax1_n (B_max_n[1], B_max[1]); + not Bmax2_n (B_max_n[2], B_max[2]); + not Bmax3_n (B_max_n[3], B_max[3]); + not Bmax4_n (B_max_n[4], B_max[4]); + + and andBMUXABAmax0 (AB_m[0], BMUX_AB[0], B_max_n[0]); + and andBMUXABAmax1 (AB_m[1], BMUX_AB[1], B_max_n[1]); + and andBMUXABAmax2 (AB_m[2], BMUX_AB[2], B_max_n[2]); + and andBMUXABAmax3 (AB_m[3], BMUX_AB[3], B_max_n[3]); + and andBMUXABAmax4 (AB_m[4], BMUX_AB[4], B_max_n[4]); + + and andBMUXABAmax1_n (m_AB[1], BMUX_AB_n[1], B_max[1]); + and andBMUXABAmax2_n (m_AB[2], BMUX_AB_n[2], B_max[2]); + and andBMUXABAmax3_n (m_AB[3], BMUX_AB_n[3], B_max[3]); + and andBMUXABAmax4_n (m_AB[4], BMUX_AB_n[4], B_max[4]); + + nor norABAmax1 (EQ_B[1], m_AB[1], AB_m[1]); + nor norABAmax2 (EQ_B[2], m_AB[2], AB_m[2]); + nor norABAmax3 (EQ_B[3], m_AB[3], AB_m[3]); + nor norABAmax4 (EQ_B[4], m_AB[4], AB_m[4]); + + and XfABAmax0 (XoutBi[0], AB_m[0], EQ_B[4], EQ_B[3], EQ_B[2], EQ_B[1]); + and XfABAmax1 (XoutBi[1], AB_m[1], EQ_B[4], EQ_B[3], EQ_B[2]); + and XfABAmax2 (XoutBi[2], AB_m[2], EQ_B[4], EQ_B[3]); + and XfABAmax3 (XoutBi[3], AB_m[3], EQ_B[4]); + or orXfABAmax4 (XoutBif, AB_m[4], XoutBi[0], XoutBi[1], XoutBi[2], XoutBi[3]); + + wire [4:0] xDetectionAddrBusB; + xor addrHandleB0 (xDetectionAddrBusB[0], BMUX_AB[0], BMUX_AB[0]); + xor addrHandleB1 (xDetectionAddrBusB[1], BMUX_AB[1], BMUX_AB[1]); + xor addrHandleB2 (xDetectionAddrBusB[2], BMUX_AB[2], BMUX_AB[2]); + xor addrHandleB3 (xDetectionAddrBusB[3], BMUX_AB[3], BMUX_AB[3]); + xor addrHandleB4 (xDetectionAddrBusB[4], BMUX_AB[4], BMUX_AB[4]); + or addrFinalB (xAddrB,xDetectionAddrBusB[0],xDetectionAddrBusB[1],xDetectionAddrBusB[2],xDetectionAddrBusB[3],xDetectionAddrBusB[4]); + or xBoundB (XoutBFinal, XoutBif, xAddrB); + nor scanshiftB (nscanshiftB, DFTRAMBYP, SEB); + and XoutaddrB (XoutaddrB, nscanshiftB, XoutBFinal); + or XoutBFF0 (XoutBiff, XoutaddrB, XoutB); + + wire NOT_CENB; + not (NOT_CENB, BMUX_CENB); + wire NOT_DFTRAMBYP; + not (NOT_DFTRAMBYP, DFTRAMBYP); + wire [18:0] WRITEB; + and (WRITEB[0], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[1], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[2], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[3], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[4], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[5], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[6], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[7], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[8], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[9], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[10], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[11], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[12], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[13], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[14], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[15], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[16], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[17], NOT_DFTRAMBYP, NOT_CENB); + and (WRITEB[18], NOT_DFTRAMBYP, NOT_CENB); + rf2_32x19_wm0_bitcell memB0 (.CLK(CLKB), .WRITE(WRITEB[0]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[0]), .Xout(XoutBiff), .Q(INT_QA[0])); + rf2_32x19_wm0_bitcell memB1 (.CLK(CLKB), .WRITE(WRITEB[1]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[1]), .Xout(XoutBiff), .Q(INT_QA[1])); + rf2_32x19_wm0_bitcell memB2 (.CLK(CLKB), .WRITE(WRITEB[2]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[2]), .Xout(XoutBiff), .Q(INT_QA[2])); + rf2_32x19_wm0_bitcell memB3 (.CLK(CLKB), .WRITE(WRITEB[3]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[3]), .Xout(XoutBiff), .Q(INT_QA[3])); + rf2_32x19_wm0_bitcell memB4 (.CLK(CLKB), .WRITE(WRITEB[4]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[4]), .Xout(XoutBiff), .Q(INT_QA[4])); + rf2_32x19_wm0_bitcell memB5 (.CLK(CLKB), .WRITE(WRITEB[5]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[5]), .Xout(XoutBiff), .Q(INT_QA[5])); + rf2_32x19_wm0_bitcell memB6 (.CLK(CLKB), .WRITE(WRITEB[6]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[6]), .Xout(XoutBiff), .Q(INT_QA[6])); + rf2_32x19_wm0_bitcell memB7 (.CLK(CLKB), .WRITE(WRITEB[7]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[7]), .Xout(XoutBiff), .Q(INT_QA[7])); + rf2_32x19_wm0_bitcell memB8 (.CLK(CLKB), .WRITE(WRITEB[8]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[8]), .Xout(XoutBiff), .Q(INT_QA[8])); + rf2_32x19_wm0_bitcell memB9 (.CLK(CLKB), .WRITE(WRITEB[9]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[9]), .Xout(XoutBiff), .Q(INT_QA[9])); + rf2_32x19_wm0_bitcell memB10 (.CLK(CLKB), .WRITE(WRITEB[10]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[10]), .Xout(XoutBiff), .Q(INT_QA[10])); + rf2_32x19_wm0_bitcell memB11 (.CLK(CLKB), .WRITE(WRITEB[11]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[11]), .Xout(XoutBiff), .Q(INT_QA[11])); + rf2_32x19_wm0_bitcell memB12 (.CLK(CLKB), .WRITE(WRITEB[12]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[12]), .Xout(XoutBiff), .Q(INT_QA[12])); + rf2_32x19_wm0_bitcell memB13 (.CLK(CLKB), .WRITE(WRITEB[13]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[13]), .Xout(XoutBiff), .Q(INT_QA[13])); + rf2_32x19_wm0_bitcell memB14 (.CLK(CLKB), .WRITE(WRITEB[14]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[14]), .Xout(XoutBiff), .Q(INT_QA[14])); + rf2_32x19_wm0_bitcell memB15 (.CLK(CLKB), .WRITE(WRITEB[15]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[15]), .Xout(XoutBiff), .Q(INT_QA[15])); + rf2_32x19_wm0_bitcell memB16 (.CLK(CLKB), .WRITE(WRITEB[16]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[16]), .Xout(XoutBiff), .Q(INT_QA[16])); + rf2_32x19_wm0_bitcell memB17 (.CLK(CLKB), .WRITE(WRITEB[17]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[17]), .Xout(XoutBiff), .Q(INT_QA[17])); + rf2_32x19_wm0_bitcell memB18 (.CLK(CLKB), .WRITE(WRITEB[18]), .WA(BMUX_AB), .RA(BMUX_AA), .D(BMUX_DB[18]), .Xout(XoutBiff), .Q(INT_QA[18])); + xor (x_detection_CENB, BMUX_CENB, BMUX_CENB); + and (acendftB, x_detection_CENB, NOT_DFTRAMBYP); + assign XoutB = (SEB & ~DFTRAMBYP) | acendftB; + wire [18:0] QB_int; + wire [18:0] DB_hold; + _MUX mhB0 (BMUX_CENB, BMUX_DB[0], QB_int[0], DB_hold[0]); + _MUX mhB1 (BMUX_CENB, BMUX_DB[1], QB_int[1], DB_hold[1]); + _MUX mhB2 (BMUX_CENB, BMUX_DB[2], QB_int[2], DB_hold[2]); + _MUX mhB3 (BMUX_CENB, BMUX_DB[3], QB_int[3], DB_hold[3]); + _MUX mhB4 (BMUX_CENB, BMUX_DB[4], QB_int[4], DB_hold[4]); + _MUX mhB5 (BMUX_CENB, BMUX_DB[5], QB_int[5], DB_hold[5]); + _MUX mhB6 (BMUX_CENB, BMUX_DB[6], QB_int[6], DB_hold[6]); + _MUX mhB7 (BMUX_CENB, BMUX_DB[7], QB_int[7], DB_hold[7]); + _MUX mhB8 (BMUX_CENB, BMUX_DB[8], QB_int[8], DB_hold[8]); + _MUX mhB9 (BMUX_CENB, BMUX_DB[9], QB_int[9], DB_hold[9]); + _MUX mhB10 (BMUX_CENB, BMUX_DB[10], QB_int[10], DB_hold[10]); + _MUX mhB11 (BMUX_CENB, BMUX_DB[11], QB_int[11], DB_hold[11]); + _MUX mhB12 (BMUX_CENB, BMUX_DB[12], QB_int[12], DB_hold[12]); + _MUX mhB13 (BMUX_CENB, BMUX_DB[13], QB_int[13], DB_hold[13]); + _MUX mhB14 (BMUX_CENB, BMUX_DB[14], QB_int[14], DB_hold[14]); + _MUX mhB15 (BMUX_CENB, BMUX_DB[15], QB_int[15], DB_hold[15]); + _MUX mhB16 (BMUX_CENB, BMUX_DB[16], QB_int[16], DB_hold[16]); + _MUX mhB17 (BMUX_CENB, BMUX_DB[17], QB_int[17], DB_hold[17]); + _MUX mhB18 (BMUX_CENB, BMUX_DB[18], QB_int[18], DB_hold[18]); + _MUX mqB0 (DFTRAMBYP, DB_hold[0], BMUX_DB[0], DB_scan[0]); + _MUX mqB1 (DFTRAMBYP, DB_hold[1], BMUX_DB[1], DB_scan[1]); + _MUX mqB2 (DFTRAMBYP, DB_hold[2], BMUX_DB[2], DB_scan[2]); + _MUX mqB3 (DFTRAMBYP, DB_hold[3], BMUX_DB[3], DB_scan[3]); + _MUX mqB4 (DFTRAMBYP, DB_hold[4], BMUX_DB[4], DB_scan[4]); + _MUX mqB5 (DFTRAMBYP, DB_hold[5], BMUX_DB[5], DB_scan[5]); + _MUX mqB6 (DFTRAMBYP, DB_hold[6], BMUX_DB[6], DB_scan[6]); + _MUX mqB7 (DFTRAMBYP, DB_hold[7], BMUX_DB[7], DB_scan[7]); + _MUX mqB8 (DFTRAMBYP, DB_hold[8], BMUX_DB[8], DB_scan[8]); + _MUX mqB9 (DFTRAMBYP, DB_hold[9], BMUX_DB[9], DB_scan[9]); + _MUX mqB10 (DFTRAMBYP, DB_hold[10], BMUX_DB[10], DB_scan[10]); + _MUX mqB11 (DFTRAMBYP, DB_hold[11], BMUX_DB[11], DB_scan[11]); + _MUX mqB12 (DFTRAMBYP, DB_hold[12], BMUX_DB[12], DB_scan[12]); + _MUX mqB13 (DFTRAMBYP, DB_hold[13], BMUX_DB[13], DB_scan[13]); + _MUX mqB14 (DFTRAMBYP, DB_hold[14], BMUX_DB[14], DB_scan[14]); + _MUX mqB15 (DFTRAMBYP, DB_hold[15], BMUX_DB[15], DB_scan[15]); + _MUX mqB16 (DFTRAMBYP, DB_hold[16], BMUX_DB[16], DB_scan[16]); + _MUX mqB17 (DFTRAMBYP, DB_hold[17], BMUX_DB[17], DB_scan[17]); + _MUX mqB18 (DFTRAMBYP, DB_hold[18], BMUX_DB[18], DB_scan[18]); + rf2_32x19_wm0_scanflop uDQB0 (.CLK(CLKB), .SE(SEB), .SI(QB_int[1]), .D(DB_scan[0]), .Q(QB_int[0]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB1 (.CLK(CLKB), .SE(SEB), .SI(QB_int[2]), .D(DB_scan[1]), .Q(QB_int[1]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB2 (.CLK(CLKB), .SE(SEB), .SI(QB_int[3]), .D(DB_scan[2]), .Q(QB_int[2]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB3 (.CLK(CLKB), .SE(SEB), .SI(QB_int[4]), .D(DB_scan[3]), .Q(QB_int[3]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB4 (.CLK(CLKB), .SE(SEB), .SI(QB_int[5]), .D(DB_scan[4]), .Q(QB_int[4]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB5 (.CLK(CLKB), .SE(SEB), .SI(QB_int[6]), .D(DB_scan[5]), .Q(QB_int[5]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB6 (.CLK(CLKB), .SE(SEB), .SI(QB_int[7]), .D(DB_scan[6]), .Q(QB_int[6]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB7 (.CLK(CLKB), .SE(SEB), .SI(QB_int[8]), .D(DB_scan[7]), .Q(QB_int[7]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB8 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[0]), .D(DB_scan[8]), .Q(QB_int[8]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB9 (.CLK(CLKB), .SE(SEB), .SI(BUS_SIB[1]), .D(DB_scan[9]), .Q(QB_int[9]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB10 (.CLK(CLKB), .SE(SEB), .SI(QB_int[9]), .D(DB_scan[10]), .Q(QB_int[10]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB11 (.CLK(CLKB), .SE(SEB), .SI(QB_int[10]), .D(DB_scan[11]), .Q(QB_int[11]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB12 (.CLK(CLKB), .SE(SEB), .SI(QB_int[11]), .D(DB_scan[12]), .Q(QB_int[12]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB13 (.CLK(CLKB), .SE(SEB), .SI(QB_int[12]), .D(DB_scan[13]), .Q(QB_int[13]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB14 (.CLK(CLKB), .SE(SEB), .SI(QB_int[13]), .D(DB_scan[14]), .Q(QB_int[14]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB15 (.CLK(CLKB), .SE(SEB), .SI(QB_int[14]), .D(DB_scan[15]), .Q(QB_int[15]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB16 (.CLK(CLKB), .SE(SEB), .SI(QB_int[15]), .D(DB_scan[16]), .Q(QB_int[16]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB17 (.CLK(CLKB), .SE(SEB), .SI(QB_int[16]), .D(DB_scan[17]), .Q(QB_int[17]), .Xout(XoutBiff)); + rf2_32x19_wm0_scanflop uDQB18 (.CLK(CLKB), .SE(SEB), .SI(QB_int[17]), .D(DB_scan[18]), .Q(QB_int[18]), .Xout(XoutBiff)); + assign SOB[0] = QB_int[0]; + assign SOB[1] = QB_int[18]; +endmodule +`undef read_write +`disable_portfaults +`nosuppress_faults diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v new file mode 100644 index 00000000..9cf98bf5 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0.v @@ -0,0 +1,8309 @@ +/* verilog_memcomp Version: c0.4.0-EAC */ +/* common_memcomp Version: c0.1.0-EAC */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Verilog model for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0 +// Words: 32 +// Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Write Thru: Off +// Extra Margin Adjustment: On +// Test Muxes On +// Power Gating: Off +// Retention: On +// Pipeline: Off +// Read Disturb Test: Off +// +// Creation Date: Mon Nov 11 12:01:08 2019 +// Version: r4p0 +// +// Modeling Assumptions: This model supports full gate level simulation +// including proper x-handling and timing check behavior. Unit +// delay timing is included in the model. Back-annotation of SDF +// (v3.0 or v2.1) is supported. SDF can be created utilyzing the delay +// calculation views provided with this generator and supported +// delay calculators. All buses are modeled [MSB:LSB]. All +// ports are padded with Verilog primitives. +// +// Modeling Limitations: None. +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +`timescale 1 ns/1 ps +`define ARM_MEM_PROP 1.000 +`define ARM_MEM_RETAIN 1.000 +`define ARM_MEM_PERIOD 3.000 +`define ARM_MEM_WIDTH 1.000 +`define ARM_MEM_SETUP 1.000 +`define ARM_MEM_HOLD 0.500 +`define ARM_MEM_COLLISION 3.000 +// If ARM_HVM_MODEL is defined at Simulator Command Line, it Selects the Hierarchical Verilog Model +`ifdef ARM_HVM_MODEL + + +module datapath_latch_rf2_32x19_wm0 (CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ,Q); + input CLK,Q_update,SE,SI,D,DFTRAMBYP,mem_path,XQ; + output Q; + + reg D_int; + reg Q; + + // Model PHI2 portion + always @(CLK or SE or SI or D) begin + if (CLK === 1'b0) begin + if (SE===1'b1) + D_int=SI; + else if (SE===1'bx) + D_int=1'bx; + else + D_int=D; + end + end + + // model output side of RAM latch + always @(posedge Q_update or posedge XQ) begin + #0; + if (XQ===1'b0) begin + if (DFTRAMBYP===1'b1) + Q=D_int; + else + Q=mem_path; + end + else + Q=1'bx; + end +endmodule // datapath_latch_rf2_32x19_wm0 + +// If ARM_UD_MODEL is defined at Simulator Command Line, it Selects the Fast Functional Model +`ifdef ARM_UD_MODEL + +// Following parameter Values can be overridden at Simulator Command Line. + +// ARM_UD_DP Defines the delay through Data Paths, for Memory Models it represents BIST MUX output delays. +`ifdef ARM_UD_DP +`else +`define ARM_UD_DP #0.001 +`endif +// ARM_UD_CP Defines the delay through Clock Path Cells, for Memory Models it is not used. +`ifdef ARM_UD_CP +`else +`define ARM_UD_CP +`endif +// ARM_UD_SEQ Defines the delay through the Memory, for Memory Models it is used for CLK->Q delays. +`ifdef ARM_UD_SEQ +`else +`define ARM_UD_SEQ #0.01 +`endif + +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x19_wm0 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, + CENA, AA, CLKB, CENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 19; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 38; // redun block size 2, 18 on left, 20 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 19 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [37:0] mem [0:15]; + reg [37:0] row, row_t; + reg LAST_CLKA; + reg [37:0] row_mask; + reg [37:0] new_data; + reg [37:0] data_out; + reg [18:0] readLatch0; + reg [18:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [18:0] readLatch1; + reg [18:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + wire [18:0] QA_int; + reg XQA, QA_update; + reg [18:0] mem_path; + reg XDB_sh, DB_sh_update; + wire [18:0] DB_int_bmux; + reg [18:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [4:0] AYB_; + wire [18:0] QA_; + wire [1:0] SOA_; + wire [1:0] SOB_; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [18:0] DB_; + reg [18:0] DB_int; + wire [18:0] DB_int_sh; + reg [18:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [18:0] TDB_; + reg [18:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + wire [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + assign CENYA = CENYA_; + assign AYA[0] = AYA_[0]; + assign AYA[1] = AYA_[1]; + assign AYA[2] = AYA_[2]; + assign AYA[3] = AYA_[3]; + assign AYA[4] = AYA_[4]; + assign CENYB = CENYB_; + assign AYB[0] = AYB_[0]; + assign AYB[1] = AYB_[1]; + assign AYB[2] = AYB_[2]; + assign AYB[3] = AYB_[3]; + assign AYB[4] = AYB_[4]; + assign QA[0] = QA_[0]; + assign QA[1] = QA_[1]; + assign QA[2] = QA_[2]; + assign QA[3] = QA_[3]; + assign QA[4] = QA_[4]; + assign QA[5] = QA_[5]; + assign QA[6] = QA_[6]; + assign QA[7] = QA_[7]; + assign QA[8] = QA_[8]; + assign QA[9] = QA_[9]; + assign QA[10] = QA_[10]; + assign QA[11] = QA_[11]; + assign QA[12] = QA_[12]; + assign QA[13] = QA_[13]; + assign QA[14] = QA_[14]; + assign QA[15] = QA_[15]; + assign QA[16] = QA_[16]; + assign QA[17] = QA_[17]; + assign QA[18] = QA_[18]; + assign SOA[0] = SOA_[0]; + assign SOA[1] = SOA_[1]; + assign SOB[0] = SOB_[0]; + assign SOB[1] = SOB_[1]; + assign CLKA_ = CLKA; + assign CENA_ = CENA; + assign AA_[0] = AA[0]; + assign AA_[1] = AA[1]; + assign AA_[2] = AA[2]; + assign AA_[3] = AA[3]; + assign AA_[4] = AA[4]; + assign CLKB_ = CLKB; + assign CENB_ = CENB; + assign AB_[0] = AB[0]; + assign AB_[1] = AB[1]; + assign AB_[2] = AB[2]; + assign AB_[3] = AB[3]; + assign AB_[4] = AB[4]; + assign DB_[0] = DB[0]; + assign DB_[1] = DB[1]; + assign DB_[2] = DB[2]; + assign DB_[3] = DB[3]; + assign DB_[4] = DB[4]; + assign DB_[5] = DB[5]; + assign DB_[6] = DB[6]; + assign DB_[7] = DB[7]; + assign DB_[8] = DB[8]; + assign DB_[9] = DB[9]; + assign DB_[10] = DB[10]; + assign DB_[11] = DB[11]; + assign DB_[12] = DB[12]; + assign DB_[13] = DB[13]; + assign DB_[14] = DB[14]; + assign DB_[15] = DB[15]; + assign DB_[16] = DB[16]; + assign DB_[17] = DB[17]; + assign DB_[18] = DB[18]; + assign EMAA_[0] = EMAA[0]; + assign EMAA_[1] = EMAA[1]; + assign EMAA_[2] = EMAA[2]; + assign EMASA_ = EMASA; + assign EMAB_[0] = EMAB[0]; + assign EMAB_[1] = EMAB[1]; + assign EMAB_[2] = EMAB[2]; + assign TENA_ = TENA; + assign TCENA_ = TCENA; + assign TAA_[0] = TAA[0]; + assign TAA_[1] = TAA[1]; + assign TAA_[2] = TAA[2]; + assign TAA_[3] = TAA[3]; + assign TAA_[4] = TAA[4]; + assign TENB_ = TENB; + assign TCENB_ = TCENB; + assign TAB_[0] = TAB[0]; + assign TAB_[1] = TAB[1]; + assign TAB_[2] = TAB[2]; + assign TAB_[3] = TAB[3]; + assign TAB_[4] = TAB[4]; + assign TDB_[0] = TDB[0]; + assign TDB_[1] = TDB[1]; + assign TDB_[2] = TDB[2]; + assign TDB_[3] = TDB[3]; + assign TDB_[4] = TDB[4]; + assign TDB_[5] = TDB[5]; + assign TDB_[6] = TDB[6]; + assign TDB_[7] = TDB[7]; + assign TDB_[8] = TDB[8]; + assign TDB_[9] = TDB[9]; + assign TDB_[10] = TDB[10]; + assign TDB_[11] = TDB[11]; + assign TDB_[12] = TDB[12]; + assign TDB_[13] = TDB[13]; + assign TDB_[14] = TDB[14]; + assign TDB_[15] = TDB[15]; + assign TDB_[16] = TDB[16]; + assign TDB_[17] = TDB[17]; + assign TDB_[18] = TDB[18]; + assign RET1N_ = RET1N; + assign SIA_[0] = SIA[0]; + assign SIA_[1] = SIA[1]; + assign SEA_ = SEA; + assign DFTRAMBYP_ = DFTRAMBYP; + assign SIB_[0] = SIB[0]; + assign SIB_[1] = SIB[1]; + assign SEB_ = SEB; + assign COLLDISN_ = COLLDISN; + + assign `ARM_UD_DP CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign `ARM_UD_DP AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign `ARM_UD_DP CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign `ARM_UD_DP AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign `ARM_UD_SEQ QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {19{1'bx}}; + assign `ARM_UD_DP SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[18], QA_[0]}) : {2{1'bx}}; + assign `ARM_UD_DP SOB_ = (RET1N_ | pre_charge_st) ? ({DB_int_sh[18], DB_int_sh[0]}) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [18:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [18:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(DFTRAMBYP_int) ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(SEA_int) && DFTRAMBYP_int === 1'b1 ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if(isBitX(DFTRAMBYP_int)) begin + XQA = 1'b1; QA_update = 1'b1; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {19{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {19{1'bx}}; + DB_int = {19{1'bx}}; + end else + writeEnable = ~ {19{CENB_int}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + end + + always @ (CLKB_ or DFTRAMBYP_p2) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + DB_sh_update = 1'b1; + end + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin + XQA = 1'b0; QA_update = 1'b0; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + QA_update = 1'b0; + XQA = 1'b0; + end + end + LAST_CLKA = CLKA_; + end + + assign SIA_int = SEA_ ? SIA_ : {2{1'b0}}; + + datapath_latch_rf2_32x19_wm0 uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0])); + datapath_latch_rf2_32x19_wm0 uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1])); + datapath_latch_rf2_32x19_wm0 uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2])); + datapath_latch_rf2_32x19_wm0 uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3])); + datapath_latch_rf2_32x19_wm0 uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4])); + datapath_latch_rf2_32x19_wm0 uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5])); + datapath_latch_rf2_32x19_wm0 uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6])); + datapath_latch_rf2_32x19_wm0 uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7])); + datapath_latch_rf2_32x19_wm0 uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[0]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8])); + datapath_latch_rf2_32x19_wm0 uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[1]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9])); + datapath_latch_rf2_32x19_wm0 uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10])); + datapath_latch_rf2_32x19_wm0 uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11])); + datapath_latch_rf2_32x19_wm0 uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12])); + datapath_latch_rf2_32x19_wm0 uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13])); + datapath_latch_rf2_32x19_wm0 uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14])); + datapath_latch_rf2_32x19_wm0 uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15])); + datapath_latch_rf2_32x19_wm0 uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16])); + datapath_latch_rf2_32x19_wm0 uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17])); + datapath_latch_rf2_32x19_wm0 uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18])); + + + + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + DB_sh_update = 1'b0; + end + + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + XDB_sh = 1'b0; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end + end + LAST_CLKB = CLKB_; + end + + assign DB_int_bmux = TENB_ ? DB_ : TDB_; + + datapath_latch_rf2_32x19_wm0 uDQB0 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[1]), .D(DB_int_bmux[0]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[0]), .XQ(XDB_sh), .Q(DB_int_sh[0])); + datapath_latch_rf2_32x19_wm0 uDQB1 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[2]), .D(DB_int_bmux[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[1]), .XQ(XDB_sh), .Q(DB_int_sh[1])); + datapath_latch_rf2_32x19_wm0 uDQB2 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[3]), .D(DB_int_bmux[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[2]), .XQ(XDB_sh), .Q(DB_int_sh[2])); + datapath_latch_rf2_32x19_wm0 uDQB3 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[4]), .D(DB_int_bmux[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[3]), .XQ(XDB_sh), .Q(DB_int_sh[3])); + datapath_latch_rf2_32x19_wm0 uDQB4 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[5]), .D(DB_int_bmux[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[4]), .XQ(XDB_sh), .Q(DB_int_sh[4])); + datapath_latch_rf2_32x19_wm0 uDQB5 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[6]), .D(DB_int_bmux[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[5]), .XQ(XDB_sh), .Q(DB_int_sh[5])); + datapath_latch_rf2_32x19_wm0 uDQB6 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[7]), .D(DB_int_bmux[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[6]), .XQ(XDB_sh), .Q(DB_int_sh[6])); + datapath_latch_rf2_32x19_wm0 uDQB7 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[8]), .D(DB_int_bmux[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[7]), .XQ(XDB_sh), .Q(DB_int_sh[7])); + datapath_latch_rf2_32x19_wm0 uDQB8 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[0]), .D(DB_int_bmux[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[8]), .XQ(XDB_sh), .Q(DB_int_sh[8])); + datapath_latch_rf2_32x19_wm0 uDQB9 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[1]), .D(DB_int_bmux[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[9]), .XQ(XDB_sh), .Q(DB_int_sh[9])); + datapath_latch_rf2_32x19_wm0 uDQB10 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[9]), .D(DB_int_bmux[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[10]), .XQ(XDB_sh), .Q(DB_int_sh[10])); + datapath_latch_rf2_32x19_wm0 uDQB11 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[10]), .D(DB_int_bmux[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[11]), .XQ(XDB_sh), .Q(DB_int_sh[11])); + datapath_latch_rf2_32x19_wm0 uDQB12 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[11]), .D(DB_int_bmux[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[12]), .XQ(XDB_sh), .Q(DB_int_sh[12])); + datapath_latch_rf2_32x19_wm0 uDQB13 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[12]), .D(DB_int_bmux[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[13]), .XQ(XDB_sh), .Q(DB_int_sh[13])); + datapath_latch_rf2_32x19_wm0 uDQB14 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[13]), .D(DB_int_bmux[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[14]), .XQ(XDB_sh), .Q(DB_int_sh[14])); + datapath_latch_rf2_32x19_wm0 uDQB15 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[14]), .D(DB_int_bmux[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[15]), .XQ(XDB_sh), .Q(DB_int_sh[15])); + datapath_latch_rf2_32x19_wm0 uDQB16 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[15]), .D(DB_int_bmux[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[16]), .XQ(XDB_sh), .Q(DB_int_sh[16])); + datapath_latch_rf2_32x19_wm0 uDQB17 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[16]), .D(DB_int_bmux[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[17]), .XQ(XDB_sh), .Q(DB_int_sh[17])); + datapath_latch_rf2_32x19_wm0 uDQB18 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[17]), .D(DB_int_bmux[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[18]), .XQ(XDB_sh), .Q(DB_int_sh[18])); + + + +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + +endmodule +`endcelldefine +`else +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x19_wm0 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, + CENA, AA, CLKB, CENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 19; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 38; // redun block size 2, 18 on left, 20 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 19 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [37:0] mem [0:15]; + reg [37:0] row, row_t; + reg LAST_CLKA; + reg [37:0] row_mask; + reg [37:0] new_data; + reg [37:0] data_out; + reg [18:0] readLatch0; + reg [18:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [18:0] readLatch1; + reg [18:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + wire [18:0] QA_int; + reg XQA, QA_update; + reg [18:0] mem_path; + reg XDB_sh, DB_sh_update; + wire [18:0] DB_int_bmux; + reg [18:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + + reg NOT_CENA, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0, NOT_CENB, NOT_AB4, NOT_AB3; + reg NOT_AB2, NOT_AB1, NOT_AB0, NOT_DB18, NOT_DB17, NOT_DB16, NOT_DB15, NOT_DB14; + reg NOT_DB13, NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8, NOT_DB7, NOT_DB6, NOT_DB5; + reg NOT_DB4, NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_EMAA2, NOT_EMAA1, NOT_EMAA0; + reg NOT_EMASA, NOT_EMAB2, NOT_EMAB1, NOT_EMAB0, NOT_TENA, NOT_TCENA, NOT_TAA4, NOT_TAA3; + reg NOT_TAA2, NOT_TAA1, NOT_TAA0, NOT_TENB, NOT_TCENB, NOT_TAB4, NOT_TAB3, NOT_TAB2; + reg NOT_TAB1, NOT_TAB0, NOT_TDB18, NOT_TDB17, NOT_TDB16, NOT_TDB15, NOT_TDB14, NOT_TDB13; + reg NOT_TDB12, NOT_TDB11, NOT_TDB10, NOT_TDB9, NOT_TDB8, NOT_TDB7, NOT_TDB6, NOT_TDB5; + reg NOT_TDB4, NOT_TDB3, NOT_TDB2, NOT_TDB1, NOT_TDB0, NOT_SIA1, NOT_SIA0, NOT_SEA; + reg NOT_DFTRAMBYP_CLKA, NOT_DFTRAMBYP_CLKB, NOT_RET1N, NOT_SIB1, NOT_SIB0, NOT_SEB; + reg NOT_COLLDISN; + reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER; + reg NOT_CLKB_MINH, NOT_CLKB_MINL; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [4:0] AYB_; + wire [18:0] QA_; + wire [1:0] SOA_; + wire [1:0] SOB_; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [18:0] DB_; + reg [18:0] DB_int; + wire [18:0] DB_int_sh; + reg [18:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [18:0] TDB_; + reg [18:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + wire [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + buf B0(CENYA, CENYA_); + buf B1(AYA[0], AYA_[0]); + buf B2(AYA[1], AYA_[1]); + buf B3(AYA[2], AYA_[2]); + buf B4(AYA[3], AYA_[3]); + buf B5(AYA[4], AYA_[4]); + buf B6(CENYB, CENYB_); + buf B7(AYB[0], AYB_[0]); + buf B8(AYB[1], AYB_[1]); + buf B9(AYB[2], AYB_[2]); + buf B10(AYB[3], AYB_[3]); + buf B11(AYB[4], AYB_[4]); + buf B12(QA[0], QA_[0]); + buf B13(QA[1], QA_[1]); + buf B14(QA[2], QA_[2]); + buf B15(QA[3], QA_[3]); + buf B16(QA[4], QA_[4]); + buf B17(QA[5], QA_[5]); + buf B18(QA[6], QA_[6]); + buf B19(QA[7], QA_[7]); + buf B20(QA[8], QA_[8]); + buf B21(QA[9], QA_[9]); + buf B22(QA[10], QA_[10]); + buf B23(QA[11], QA_[11]); + buf B24(QA[12], QA_[12]); + buf B25(QA[13], QA_[13]); + buf B26(QA[14], QA_[14]); + buf B27(QA[15], QA_[15]); + buf B28(QA[16], QA_[16]); + buf B29(QA[17], QA_[17]); + buf B30(QA[18], QA_[18]); + buf B31(SOA[0], SOA_[0]); + buf B32(SOA[1], SOA_[1]); + buf B33(SOB[0], SOB_[0]); + buf B34(SOB[1], SOB_[1]); + buf B35(CLKA_, CLKA); + buf B36(CENA_, CENA); + buf B37(AA_[0], AA[0]); + buf B38(AA_[1], AA[1]); + buf B39(AA_[2], AA[2]); + buf B40(AA_[3], AA[3]); + buf B41(AA_[4], AA[4]); + buf B42(CLKB_, CLKB); + buf B43(CENB_, CENB); + buf B44(AB_[0], AB[0]); + buf B45(AB_[1], AB[1]); + buf B46(AB_[2], AB[2]); + buf B47(AB_[3], AB[3]); + buf B48(AB_[4], AB[4]); + buf B49(DB_[0], DB[0]); + buf B50(DB_[1], DB[1]); + buf B51(DB_[2], DB[2]); + buf B52(DB_[3], DB[3]); + buf B53(DB_[4], DB[4]); + buf B54(DB_[5], DB[5]); + buf B55(DB_[6], DB[6]); + buf B56(DB_[7], DB[7]); + buf B57(DB_[8], DB[8]); + buf B58(DB_[9], DB[9]); + buf B59(DB_[10], DB[10]); + buf B60(DB_[11], DB[11]); + buf B61(DB_[12], DB[12]); + buf B62(DB_[13], DB[13]); + buf B63(DB_[14], DB[14]); + buf B64(DB_[15], DB[15]); + buf B65(DB_[16], DB[16]); + buf B66(DB_[17], DB[17]); + buf B67(DB_[18], DB[18]); + buf B68(EMAA_[0], EMAA[0]); + buf B69(EMAA_[1], EMAA[1]); + buf B70(EMAA_[2], EMAA[2]); + buf B71(EMASA_, EMASA); + buf B72(EMAB_[0], EMAB[0]); + buf B73(EMAB_[1], EMAB[1]); + buf B74(EMAB_[2], EMAB[2]); + buf B75(TENA_, TENA); + buf B76(TCENA_, TCENA); + buf B77(TAA_[0], TAA[0]); + buf B78(TAA_[1], TAA[1]); + buf B79(TAA_[2], TAA[2]); + buf B80(TAA_[3], TAA[3]); + buf B81(TAA_[4], TAA[4]); + buf B82(TENB_, TENB); + buf B83(TCENB_, TCENB); + buf B84(TAB_[0], TAB[0]); + buf B85(TAB_[1], TAB[1]); + buf B86(TAB_[2], TAB[2]); + buf B87(TAB_[3], TAB[3]); + buf B88(TAB_[4], TAB[4]); + buf B89(TDB_[0], TDB[0]); + buf B90(TDB_[1], TDB[1]); + buf B91(TDB_[2], TDB[2]); + buf B92(TDB_[3], TDB[3]); + buf B93(TDB_[4], TDB[4]); + buf B94(TDB_[5], TDB[5]); + buf B95(TDB_[6], TDB[6]); + buf B96(TDB_[7], TDB[7]); + buf B97(TDB_[8], TDB[8]); + buf B98(TDB_[9], TDB[9]); + buf B99(TDB_[10], TDB[10]); + buf B100(TDB_[11], TDB[11]); + buf B101(TDB_[12], TDB[12]); + buf B102(TDB_[13], TDB[13]); + buf B103(TDB_[14], TDB[14]); + buf B104(TDB_[15], TDB[15]); + buf B105(TDB_[16], TDB[16]); + buf B106(TDB_[17], TDB[17]); + buf B107(TDB_[18], TDB[18]); + buf B108(RET1N_, RET1N); + buf B109(SIA_[0], SIA[0]); + buf B110(SIA_[1], SIA[1]); + buf B111(SEA_, SEA); + buf B112(DFTRAMBYP_, DFTRAMBYP); + buf B113(SIB_[0], SIB[0]); + buf B114(SIB_[1], SIB[1]); + buf B115(SEB_, SEB); + buf B116(COLLDISN_, COLLDISN); + + assign CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {19{1'bx}}; + assign SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[18], QA_[0]}) : {2{1'bx}}; + assign SOB_ = (RET1N_ | pre_charge_st) ? ({DB_int_sh[18], DB_int_sh[0]}) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [18:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [18:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + XQA = 0 ? 1'b0 : 1'b1; QA_update = 0 ? 1'b0 : 1'b1; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + mem_path = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + XQA = 1'b0; QA_update = 1'b1; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(DFTRAMBYP_int) ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if( isBitX(SEA_int) && DFTRAMBYP_int === 1'b1 ) begin + XQA = 1'b1; QA_update = 1'b1; + end + if(isBitX(DFTRAMBYP_int)) begin + XQA = 1'b1; QA_update = 1'b1; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {19{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {19{1'bx}}; + DB_int = {19{1'bx}}; + end else + writeEnable = ~ {19{CENB_int}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + XQA = 1'b1; QA_update = 1'b1; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + end + + always @ (CLKB_ or DFTRAMBYP_p2) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + DB_sh_update = 1'b1; + end + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + XQA = 1'b1; QA_update = 1'b1; + end else if ((CLKA_ === 1'b1 || CLKA_ === 1'b0) && LAST_CLKA === 1'bx) begin + XQA = 1'b0; QA_update = 1'b0; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + XQA = 1'b0; QA_update = 1'b1; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + QA_update = 1'b0; + XQA = 1'b0; + end + end + LAST_CLKA = CLKA_; + end + + reg globalNotifier0; + initial globalNotifier0 = 1'b0; + initial cont_flag0_int = 1'b0; + + always @ globalNotifier0 begin + if ($realtime == 0) begin + end else if ((EMAA_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAA_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAA_int[2] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMASA_int === 1'bx & DFTRAMBYP_int === 1'b1) + ) begin + XQA = 1'b1; QA_update = 1'b1; + end else if ((CENA_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAA_int[0] === 1'bx || + EMAA_int[1] === 1'bx || EMAA_int[2] === 1'bx || EMASA_int === 1'bx || RET1N_int === 1'bx + || clk0_int === 1'bx) begin + XQA = 1'b1; QA_update = 1'b1; + end else if (TENA_int === 1'bx) begin + if(((CENA_ === 1'b1 & TCENA_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEA_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + XQA = 1'b1; QA_update = 1'b1; + end + end + end else if (cont_flag0_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag0_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + ReadA; + end + #0; + QA_update = 1'b0; + globalNotifier0 = 1'b0; + end + + assign SIA_int = SEA_ ? SIA_ : {2{1'b0}}; + + datapath_latch_rf2_32x19_wm0 uDQA0 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[1]), .D(QA_int[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[0]), .XQ(XQA), .Q(QA_int[0])); + datapath_latch_rf2_32x19_wm0 uDQA1 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[2]), .D(QA_int[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[1]), .XQ(XQA), .Q(QA_int[1])); + datapath_latch_rf2_32x19_wm0 uDQA2 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[3]), .D(QA_int[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[2]), .XQ(XQA), .Q(QA_int[2])); + datapath_latch_rf2_32x19_wm0 uDQA3 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[4]), .D(QA_int[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[3]), .XQ(XQA), .Q(QA_int[3])); + datapath_latch_rf2_32x19_wm0 uDQA4 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[5]), .D(QA_int[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[4]), .XQ(XQA), .Q(QA_int[4])); + datapath_latch_rf2_32x19_wm0 uDQA5 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[6]), .D(QA_int[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[5]), .XQ(XQA), .Q(QA_int[5])); + datapath_latch_rf2_32x19_wm0 uDQA6 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[7]), .D(QA_int[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[6]), .XQ(XQA), .Q(QA_int[6])); + datapath_latch_rf2_32x19_wm0 uDQA7 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[8]), .D(QA_int[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[7]), .XQ(XQA), .Q(QA_int[7])); + datapath_latch_rf2_32x19_wm0 uDQA8 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[0]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[8]), .XQ(XQA), .Q(QA_int[8])); + datapath_latch_rf2_32x19_wm0 uDQA9 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(SIA_int[1]), .D(1'b0), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[9]), .XQ(XQA), .Q(QA_int[9])); + datapath_latch_rf2_32x19_wm0 uDQA10 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[9]), .D(QA_int[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[10]), .XQ(XQA), .Q(QA_int[10])); + datapath_latch_rf2_32x19_wm0 uDQA11 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[10]), .D(QA_int[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[11]), .XQ(XQA), .Q(QA_int[11])); + datapath_latch_rf2_32x19_wm0 uDQA12 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[11]), .D(QA_int[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[12]), .XQ(XQA), .Q(QA_int[12])); + datapath_latch_rf2_32x19_wm0 uDQA13 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[12]), .D(QA_int[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[13]), .XQ(XQA), .Q(QA_int[13])); + datapath_latch_rf2_32x19_wm0 uDQA14 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[13]), .D(QA_int[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[14]), .XQ(XQA), .Q(QA_int[14])); + datapath_latch_rf2_32x19_wm0 uDQA15 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[14]), .D(QA_int[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[15]), .XQ(XQA), .Q(QA_int[15])); + datapath_latch_rf2_32x19_wm0 uDQA16 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[15]), .D(QA_int[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[16]), .XQ(XQA), .Q(QA_int[16])); + datapath_latch_rf2_32x19_wm0 uDQA17 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[16]), .D(QA_int[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[17]), .XQ(XQA), .Q(QA_int[17])); + datapath_latch_rf2_32x19_wm0 uDQA18 (.CLK(CLKA), .Q_update(QA_update), .SE(SEA_), .SI(QA_int[17]), .D(QA_int[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(mem_path[18]), .XQ(XQA), .Q(QA_int[18])); + + + + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + XQA = 1'b1; QA_update = 1'b1; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + #0; + QA_update = 1'b0; + DB_sh_update = 1'b0; + end + + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if ((CLKB_ === 1'b1 || CLKB_ === 1'b0) && LAST_CLKB === 1'bx) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + XDB_sh = 1'b0; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + XDB_sh = 1'b0; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKB_ === 1'b0 && LAST_CLKB === 1'b1) begin + DB_sh_update = 1'b0; XDB_sh = 1'b0; + end + end + LAST_CLKB = CLKB_; + end + + reg globalNotifier1; + initial globalNotifier1 = 1'b0; + initial cont_flag1_int = 1'b0; + + always @ globalNotifier1 begin + if ($realtime == 0) begin + end else if ((EMAB_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAB_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAB_int[2] === 1'bx & DFTRAMBYP_int === 1'b1)) begin + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if ((CENB_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAB_int[0] === 1'bx || + EMAB_int[1] === 1'bx || EMAB_int[2] === 1'bx || RET1N_int === 1'bx || clk1_int === 1'bx) begin + failedWrite(1); + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end else if (TENB_int === 1'bx) begin + if(((CENB_ === 1'b1 & TCENB_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEB_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end + XDB_sh = 1'b1; + DB_sh_update = 1'b1; + end + end else if (cont_flag1_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag1_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + XQA = 1'b1; QA_update = 1'b1; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + WriteB; + end + #0; + DB_sh_update = 1'b0; + globalNotifier1 = 1'b0; + end + + assign DB_int_bmux = TENB_ ? DB_ : TDB_; + + datapath_latch_rf2_32x19_wm0 uDQB0 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[1]), .D(DB_int_bmux[0]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[0]), .XQ(XDB_sh), .Q(DB_int_sh[0])); + datapath_latch_rf2_32x19_wm0 uDQB1 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[2]), .D(DB_int_bmux[1]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[1]), .XQ(XDB_sh), .Q(DB_int_sh[1])); + datapath_latch_rf2_32x19_wm0 uDQB2 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[3]), .D(DB_int_bmux[2]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[2]), .XQ(XDB_sh), .Q(DB_int_sh[2])); + datapath_latch_rf2_32x19_wm0 uDQB3 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[4]), .D(DB_int_bmux[3]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[3]), .XQ(XDB_sh), .Q(DB_int_sh[3])); + datapath_latch_rf2_32x19_wm0 uDQB4 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[5]), .D(DB_int_bmux[4]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[4]), .XQ(XDB_sh), .Q(DB_int_sh[4])); + datapath_latch_rf2_32x19_wm0 uDQB5 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[6]), .D(DB_int_bmux[5]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[5]), .XQ(XDB_sh), .Q(DB_int_sh[5])); + datapath_latch_rf2_32x19_wm0 uDQB6 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[7]), .D(DB_int_bmux[6]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[6]), .XQ(XDB_sh), .Q(DB_int_sh[6])); + datapath_latch_rf2_32x19_wm0 uDQB7 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[8]), .D(DB_int_bmux[7]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[7]), .XQ(XDB_sh), .Q(DB_int_sh[7])); + datapath_latch_rf2_32x19_wm0 uDQB8 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[0]), .D(DB_int_bmux[8]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[8]), .XQ(XDB_sh), .Q(DB_int_sh[8])); + datapath_latch_rf2_32x19_wm0 uDQB9 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(SIB_[1]), .D(DB_int_bmux[9]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[9]), .XQ(XDB_sh), .Q(DB_int_sh[9])); + datapath_latch_rf2_32x19_wm0 uDQB10 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[9]), .D(DB_int_bmux[10]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[10]), .XQ(XDB_sh), .Q(DB_int_sh[10])); + datapath_latch_rf2_32x19_wm0 uDQB11 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[10]), .D(DB_int_bmux[11]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[11]), .XQ(XDB_sh), .Q(DB_int_sh[11])); + datapath_latch_rf2_32x19_wm0 uDQB12 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[11]), .D(DB_int_bmux[12]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[12]), .XQ(XDB_sh), .Q(DB_int_sh[12])); + datapath_latch_rf2_32x19_wm0 uDQB13 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[12]), .D(DB_int_bmux[13]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[13]), .XQ(XDB_sh), .Q(DB_int_sh[13])); + datapath_latch_rf2_32x19_wm0 uDQB14 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[13]), .D(DB_int_bmux[14]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[14]), .XQ(XDB_sh), .Q(DB_int_sh[14])); + datapath_latch_rf2_32x19_wm0 uDQB15 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[14]), .D(DB_int_bmux[15]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[15]), .XQ(XDB_sh), .Q(DB_int_sh[15])); + datapath_latch_rf2_32x19_wm0 uDQB16 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[15]), .D(DB_int_bmux[16]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[16]), .XQ(XDB_sh), .Q(DB_int_sh[16])); + datapath_latch_rf2_32x19_wm0 uDQB17 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[16]), .D(DB_int_bmux[17]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[17]), .XQ(XDB_sh), .Q(DB_int_sh[17])); + datapath_latch_rf2_32x19_wm0 uDQB18 (.CLK(CLKB), .Q_update(DB_sh_update), .SE(SEB_), .SI(DB_int_sh[17]), .D(DB_int_bmux[18]), .DFTRAMBYP(DFTRAMBYP_), .mem_path(DB_int_bmux[18]), .XQ(XDB_sh), .Q(DB_int_sh[18])); + + + +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + wire contA_flag = (CENA_int !== 1'b1 && ((TENB_ ? CENB_ : TCENB_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1))); + wire contB_flag = (CENB_int !== 1'b1 && ((TENA_ ? CENA_ : TCENA_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0))); + + always @ NOT_CENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAA2 begin + EMAA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA1 begin + EMAA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA0 begin + EMAA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMASA begin + EMASA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAB2 begin + EMAB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB1 begin + EMAB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB0 begin + EMAB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TENA begin + TENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TCENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TENB begin + TENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TCENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIA1 begin + XQA = 1'b1; QA_update = 1'b1; + end + always @ NOT_SIA0 begin + XQA = 1'b1; QA_update = 1'b1; + end + always @ NOT_SEA begin + XQA = 1'b1; QA_update = 1'b1; + SEA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKA begin + XQA = 1'b1; QA_update = 1'b1; + DFTRAMBYP_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKB begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + DFTRAMBYP_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_RET1N begin + RET1N_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB1 begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + end + always @ NOT_SIB0 begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + end + always @ NOT_SEB begin + XDB_sh = 1'b1; DB_sh_update = 1'b1; + XDB_sh = 1'b1; DB_sh_update = 1'b1; + SEB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_COLLDISN begin + COLLDISN_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + always @ NOT_CONTA begin + cont_flag0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_PER begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINH begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINL begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CONTB begin + cont_flag1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_PER begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINH begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINL begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp; + + wire RET1Neq1aTENAeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, RET1Neq1aTENAeq0; + wire RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq0, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0; + wire RET1Neq1aSEAeq1, RET1Neq1aSEBeq1, RET1Neq1, RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp; + wire RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp; + + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB)); + assign RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENA&&!CENA&&!DFTRAMBYP)||(!TENA&&!TCENA&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP)); + + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1 = RET1N&&TENA&&!CENA&&COLLDISN; + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0 = RET1N&&TENA&&!CENA&&!COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1 = RET1N&&TENB&&!CENB&&COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0 = RET1N&&TENB&&!CENB&&!COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1 = RET1N&&!TENA&&!TCENA&&COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0 = RET1N&&!TENA&&!TCENA&&!COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1 = RET1N&&!TENB&&!TCENB&&COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0 = RET1N&&!TENB&&!TCENB&&!COLLDISN; + assign RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp = RET1N&&((TENA&&!CENA)||(!TENA&&!TCENA)); + assign RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp = RET1N&&((TENB&&!CENB)||(!TENB&&!TCENB)); + + + assign RET1Neq1aTENAeq1 = RET1N&&TENA; + assign RET1Neq1aTENBeq1 = RET1N&&TENB; + assign RET1Neq1aTENAeq0 = RET1N&&!TENA; + assign RET1Neq1aTENBeq0 = RET1N&&!TENB; + assign RET1Neq1aSEAeq1 = RET1N&&SEA; + assign RET1Neq1aSEBeq1 = RET1N&&SEB; + assign RET1Neq1 = RET1N; + + specify + + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (CENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TCENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1) + (TENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0) + (TENA -=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1) + (TENA +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1) + (TENA +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1) + (TENA +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1) + (TENA +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1) + (TENA +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0) + (TENA -=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0) + (TENA -=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0) + (TENA -=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0) + (TENA -=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0) + (TENA -=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (CENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TCENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1) + (TENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0) + (TENB -=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1) + (TENB +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1) + (TENB +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1) + (TENB +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1) + (TENB +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1) + (TENB +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0) + (TENB -=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0) + (TENB -=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0) + (TENB -=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0) + (TENB -=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0) + (TENB -=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `else + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `else + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `endif + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `else + $width(posedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `else + $width(posedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `endif + + + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, posedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, negedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, posedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, negedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKB &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + endspecify + + +endmodule +`endcelldefine + `endif + `else +// If ARM_UD_MODEL is defined at Simulator Command Line, it Selects the Fast Functional Model +`ifdef ARM_UD_MODEL + +// Following parameter Values can be overridden at Simulator Command Line. + +// ARM_UD_DP Defines the delay through Data Paths, for Memory Models it represents BIST MUX output delays. +`ifdef ARM_UD_DP +`else +`define ARM_UD_DP #0.001 +`endif +// ARM_UD_CP Defines the delay through Clock Path Cells, for Memory Models it is not used. +`ifdef ARM_UD_CP +`else +`define ARM_UD_CP +`endif +// ARM_UD_SEQ Defines the delay through the Memory, for Memory Models it is used for CLK->Q delays. +`ifdef ARM_UD_SEQ +`else +`define ARM_UD_SEQ #0.01 +`endif + +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x19_wm0 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, + CENA, AA, CLKB, CENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 19; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 38; // redun block size 2, 18 on left, 20 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 19 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [37:0] mem [0:15]; + reg [37:0] row, row_t; + reg LAST_CLKA; + reg [37:0] row_mask; + reg [37:0] new_data; + reg [37:0] data_out; + reg [18:0] readLatch0; + reg [18:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [18:0] readLatch1; + reg [18:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + reg [18:0] QA_int; + reg [18:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [4:0] AYB_; + wire [18:0] QA_; + wire [1:0] SOA_; + reg [1:0] SOA_int; + wire [1:0] SOB_; + reg [1:0] SOB_int; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [18:0] DB_; + reg [18:0] DB_int; + reg [18:0] DB_int_sh; + reg [18:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [18:0] TDB_; + reg [18:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + reg [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + assign CENYA = CENYA_; + assign AYA[0] = AYA_[0]; + assign AYA[1] = AYA_[1]; + assign AYA[2] = AYA_[2]; + assign AYA[3] = AYA_[3]; + assign AYA[4] = AYA_[4]; + assign CENYB = CENYB_; + assign AYB[0] = AYB_[0]; + assign AYB[1] = AYB_[1]; + assign AYB[2] = AYB_[2]; + assign AYB[3] = AYB_[3]; + assign AYB[4] = AYB_[4]; + assign QA[0] = QA_[0]; + assign QA[1] = QA_[1]; + assign QA[2] = QA_[2]; + assign QA[3] = QA_[3]; + assign QA[4] = QA_[4]; + assign QA[5] = QA_[5]; + assign QA[6] = QA_[6]; + assign QA[7] = QA_[7]; + assign QA[8] = QA_[8]; + assign QA[9] = QA_[9]; + assign QA[10] = QA_[10]; + assign QA[11] = QA_[11]; + assign QA[12] = QA_[12]; + assign QA[13] = QA_[13]; + assign QA[14] = QA_[14]; + assign QA[15] = QA_[15]; + assign QA[16] = QA_[16]; + assign QA[17] = QA_[17]; + assign QA[18] = QA_[18]; + assign SOA[0] = SOA_[0]; + assign SOA[1] = SOA_[1]; + assign SOB[0] = SOB_[0]; + assign SOB[1] = SOB_[1]; + assign CLKA_ = CLKA; + assign CENA_ = CENA; + assign AA_[0] = AA[0]; + assign AA_[1] = AA[1]; + assign AA_[2] = AA[2]; + assign AA_[3] = AA[3]; + assign AA_[4] = AA[4]; + assign CLKB_ = CLKB; + assign CENB_ = CENB; + assign AB_[0] = AB[0]; + assign AB_[1] = AB[1]; + assign AB_[2] = AB[2]; + assign AB_[3] = AB[3]; + assign AB_[4] = AB[4]; + assign DB_[0] = DB[0]; + assign DB_[1] = DB[1]; + assign DB_[2] = DB[2]; + assign DB_[3] = DB[3]; + assign DB_[4] = DB[4]; + assign DB_[5] = DB[5]; + assign DB_[6] = DB[6]; + assign DB_[7] = DB[7]; + assign DB_[8] = DB[8]; + assign DB_[9] = DB[9]; + assign DB_[10] = DB[10]; + assign DB_[11] = DB[11]; + assign DB_[12] = DB[12]; + assign DB_[13] = DB[13]; + assign DB_[14] = DB[14]; + assign DB_[15] = DB[15]; + assign DB_[16] = DB[16]; + assign DB_[17] = DB[17]; + assign DB_[18] = DB[18]; + assign EMAA_[0] = EMAA[0]; + assign EMAA_[1] = EMAA[1]; + assign EMAA_[2] = EMAA[2]; + assign EMASA_ = EMASA; + assign EMAB_[0] = EMAB[0]; + assign EMAB_[1] = EMAB[1]; + assign EMAB_[2] = EMAB[2]; + assign TENA_ = TENA; + assign TCENA_ = TCENA; + assign TAA_[0] = TAA[0]; + assign TAA_[1] = TAA[1]; + assign TAA_[2] = TAA[2]; + assign TAA_[3] = TAA[3]; + assign TAA_[4] = TAA[4]; + assign TENB_ = TENB; + assign TCENB_ = TCENB; + assign TAB_[0] = TAB[0]; + assign TAB_[1] = TAB[1]; + assign TAB_[2] = TAB[2]; + assign TAB_[3] = TAB[3]; + assign TAB_[4] = TAB[4]; + assign TDB_[0] = TDB[0]; + assign TDB_[1] = TDB[1]; + assign TDB_[2] = TDB[2]; + assign TDB_[3] = TDB[3]; + assign TDB_[4] = TDB[4]; + assign TDB_[5] = TDB[5]; + assign TDB_[6] = TDB[6]; + assign TDB_[7] = TDB[7]; + assign TDB_[8] = TDB[8]; + assign TDB_[9] = TDB[9]; + assign TDB_[10] = TDB[10]; + assign TDB_[11] = TDB[11]; + assign TDB_[12] = TDB[12]; + assign TDB_[13] = TDB[13]; + assign TDB_[14] = TDB[14]; + assign TDB_[15] = TDB[15]; + assign TDB_[16] = TDB[16]; + assign TDB_[17] = TDB[17]; + assign TDB_[18] = TDB[18]; + assign RET1N_ = RET1N; + assign SIA_[0] = SIA[0]; + assign SIA_[1] = SIA[1]; + assign SEA_ = SEA; + assign DFTRAMBYP_ = DFTRAMBYP; + assign SIB_[0] = SIB[0]; + assign SIB_[1] = SIB[1]; + assign SEB_ = SEB; + assign COLLDISN_ = COLLDISN; + + assign `ARM_UD_DP CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign `ARM_UD_DP AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign `ARM_UD_DP CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign `ARM_UD_DP AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + assign `ARM_UD_SEQ QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {19{1'bx}}; + assign `ARM_UD_DP SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[18], QA_[0]}) : {2{1'bx}}; + assign `ARM_UD_DP SOB_ = (RET1N_ | pre_charge_st) ? (SOB_int) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [18:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [18:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + QA_int = {19{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + QA_int = {19{1'bx}}; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + QA_int = {19{1'bx}}; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + QA_int = 0 ? QA_int : {19{1'bx}}; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + QA_int = {19{1'bx}}; + end + if( isBitX(DFTRAMBYP_int) ) + QA_int = {19{1'bx}}; + if(isBitX(DFTRAMBYP_int)) begin + QA_int = {19{1'bx}}; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {19{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {19{1'bx}}; + DB_int = {19{1'bx}}; + end else + writeEnable = ~ {19{CENB_int}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + QA_int = {19{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + QA_int = {19{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (CLKB_ or DFTRAMBYP_) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + SOB_int = ({DB_int_sh[18], DB_int_sh[0]}); + DB_int_sh_int = DB_int_sh; + end + end + end + always @ (SIA_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1 && ^SIA_int === 1'bx) begin + QA_int[9] = SIA_int[1]; + QA_int[8] = SIA_int[0]; + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + QA_int[18:9] = {QA_int[17:9], SIA_[1]}; + QA_int[8:0] = {SIA_[0], QA_int[8:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + QA_int[18:9] = {QA_int[17:9], 1'b0}; + QA_int[8:0] = {1'b0, QA_int[8:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + end + end + LAST_CLKA = CLKA_; + end + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (SIB_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1 && ^SIB_int === 1'bx) begin + DB_int_sh_int[9] = SIB_int[1]; + DB_int_sh_int[8] = SIB_int[0]; + end + end + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + DB_int_sh[18:9] = {DB_int_sh_int[17:9], SIB_[1]}; + DB_int_sh[8:0] = {SIB_[0], DB_int_sh_int[8:1]}; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh_int = DB_int_sh; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end + end + LAST_CLKB = CLKB_; + end +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + +endmodule +`endcelldefine +`else +`celldefine +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS +module rf2_32x19_wm0 (VDDCE, VDDPE, VSSE, CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, + CENA, AA, CLKB, CENB, AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, + TAB, TDB, RET1N, SIA, SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`else +module rf2_32x19_wm0 (CENYA, AYA, CENYB, AYB, QA, SOA, SOB, CLKA, CENA, AA, CLKB, CENB, + AB, DB, EMAA, EMASA, EMAB, TENA, TCENA, TAA, TENB, TCENB, TAB, TDB, RET1N, SIA, + SEA, DFTRAMBYP, SIB, SEB, COLLDISN); +`endif + + parameter ASSERT_PREFIX = ""; + parameter BITS = 19; + parameter WORDS = 32; + parameter MUX = 2; + parameter MEM_WIDTH = 38; // redun block size 2, 18 on left, 20 on right + parameter MEM_HEIGHT = 16; + parameter WP_SIZE = 19 ; + parameter UPM_WIDTH = 3; + parameter UPMW_WIDTH = 0; + parameter UPMS_WIDTH = 1; + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; +`ifdef POWER_PINS + inout VDDCE; + inout VDDPE; + inout VSSE; +`endif + + reg pre_charge_st; + reg pre_charge_st_a; + reg pre_charge_st_b; + integer row_address; + integer mux_address; + initial row_address = 0; + initial mux_address = 0; + reg [37:0] mem [0:15]; + reg [37:0] row, row_t; + reg LAST_CLKA; + reg [37:0] row_mask; + reg [37:0] new_data; + reg [37:0] data_out; + reg [18:0] readLatch0; + reg [18:0] shifted_readLatch0; + reg read_mux_sel0_p2; + reg [18:0] readLatch1; + reg [18:0] shifted_readLatch1; + reg read_mux_sel1_p2; + reg LAST_CLKB; + reg [18:0] QA_int; + reg [18:0] writeEnable; + real previous_CLKA; + real previous_CLKB; + initial previous_CLKA = 0; + initial previous_CLKB = 0; + reg READ_WRITE, WRITE_WRITE, READ_READ, ROW_CC, COL_CC; + reg READ_WRITE_1, WRITE_WRITE_1, READ_READ_1; + reg cont_flag0_int; + reg cont_flag1_int; + initial cont_flag0_int = 1'b0; + initial cont_flag1_int = 1'b0; + + reg NOT_CENA, NOT_AA4, NOT_AA3, NOT_AA2, NOT_AA1, NOT_AA0, NOT_CENB, NOT_AB4, NOT_AB3; + reg NOT_AB2, NOT_AB1, NOT_AB0, NOT_DB18, NOT_DB17, NOT_DB16, NOT_DB15, NOT_DB14; + reg NOT_DB13, NOT_DB12, NOT_DB11, NOT_DB10, NOT_DB9, NOT_DB8, NOT_DB7, NOT_DB6, NOT_DB5; + reg NOT_DB4, NOT_DB3, NOT_DB2, NOT_DB1, NOT_DB0, NOT_EMAA2, NOT_EMAA1, NOT_EMAA0; + reg NOT_EMASA, NOT_EMAB2, NOT_EMAB1, NOT_EMAB0, NOT_TENA, NOT_TCENA, NOT_TAA4, NOT_TAA3; + reg NOT_TAA2, NOT_TAA1, NOT_TAA0, NOT_TENB, NOT_TCENB, NOT_TAB4, NOT_TAB3, NOT_TAB2; + reg NOT_TAB1, NOT_TAB0, NOT_TDB18, NOT_TDB17, NOT_TDB16, NOT_TDB15, NOT_TDB14, NOT_TDB13; + reg NOT_TDB12, NOT_TDB11, NOT_TDB10, NOT_TDB9, NOT_TDB8, NOT_TDB7, NOT_TDB6, NOT_TDB5; + reg NOT_TDB4, NOT_TDB3, NOT_TDB2, NOT_TDB1, NOT_TDB0, NOT_SIA1, NOT_SIA0, NOT_SEA; + reg NOT_DFTRAMBYP_CLKA, NOT_DFTRAMBYP_CLKB, NOT_RET1N, NOT_SIB1, NOT_SIB0, NOT_SEB; + reg NOT_COLLDISN; + reg NOT_CONTA, NOT_CLKA_PER, NOT_CLKA_MINH, NOT_CLKA_MINL, NOT_CONTB, NOT_CLKB_PER; + reg NOT_CLKB_MINH, NOT_CLKB_MINL; + reg clk0_int; + reg clk1_int; + + wire CENYA_; + wire [4:0] AYA_; + wire CENYB_; + wire [4:0] AYB_; + wire [18:0] QA_; + wire [1:0] SOA_; + reg [1:0] SOA_int; + wire [1:0] SOB_; + reg [1:0] SOB_int; + wire CLKA_; + wire CENA_; + reg CENA_int; + reg CENA_p2; + wire [4:0] AA_; + reg [4:0] AA_int; + wire CLKB_; + wire CENB_; + reg CENB_int; + reg CENB_p2; + wire [4:0] AB_; + reg [4:0] AB_int; + wire [18:0] DB_; + reg [18:0] DB_int; + reg [18:0] DB_int_sh; + reg [18:0] DB_int_sh_int; + wire [2:0] EMAA_; + reg [2:0] EMAA_int; + wire EMASA_; + reg EMASA_int; + wire [2:0] EMAB_; + reg [2:0] EMAB_int; + wire TENA_; + reg TENA_int; + wire TCENA_; + reg TCENA_int; + reg TCENA_p2; + wire [4:0] TAA_; + reg [4:0] TAA_int; + wire TENB_; + reg TENB_int; + wire TCENB_; + reg TCENB_int; + reg TCENB_p2; + wire [4:0] TAB_; + reg [4:0] TAB_int; + wire [18:0] TDB_; + reg [18:0] TDB_int; + wire RET1N_; + reg RET1N_int; + wire [1:0] SIA_; + reg [1:0] SIA_int; + wire SEA_; + reg SEA_int; + wire DFTRAMBYP_; + reg DFTRAMBYP_int; + reg DFTRAMBYP_p2; + wire [1:0] SIB_; + reg [1:0] SIB_int; + wire SEB_; + reg SEB_int; + wire COLLDISN_; + reg COLLDISN_int; + + buf B117(CENYA, CENYA_); + buf B118(AYA[0], AYA_[0]); + buf B119(AYA[1], AYA_[1]); + buf B120(AYA[2], AYA_[2]); + buf B121(AYA[3], AYA_[3]); + buf B122(AYA[4], AYA_[4]); + buf B123(CENYB, CENYB_); + buf B124(AYB[0], AYB_[0]); + buf B125(AYB[1], AYB_[1]); + buf B126(AYB[2], AYB_[2]); + buf B127(AYB[3], AYB_[3]); + buf B128(AYB[4], AYB_[4]); + buf B129(QA[0], QA_[0]); + buf B130(QA[1], QA_[1]); + buf B131(QA[2], QA_[2]); + buf B132(QA[3], QA_[3]); + buf B133(QA[4], QA_[4]); + buf B134(QA[5], QA_[5]); + buf B135(QA[6], QA_[6]); + buf B136(QA[7], QA_[7]); + buf B137(QA[8], QA_[8]); + buf B138(QA[9], QA_[9]); + buf B139(QA[10], QA_[10]); + buf B140(QA[11], QA_[11]); + buf B141(QA[12], QA_[12]); + buf B142(QA[13], QA_[13]); + buf B143(QA[14], QA_[14]); + buf B144(QA[15], QA_[15]); + buf B145(QA[16], QA_[16]); + buf B146(QA[17], QA_[17]); + buf B147(QA[18], QA_[18]); + buf B148(SOA[0], SOA_[0]); + buf B149(SOA[1], SOA_[1]); + buf B150(SOB[0], SOB_[0]); + buf B151(SOB[1], SOB_[1]); + buf B152(CLKA_, CLKA); + buf B153(CENA_, CENA); + buf B154(AA_[0], AA[0]); + buf B155(AA_[1], AA[1]); + buf B156(AA_[2], AA[2]); + buf B157(AA_[3], AA[3]); + buf B158(AA_[4], AA[4]); + buf B159(CLKB_, CLKB); + buf B160(CENB_, CENB); + buf B161(AB_[0], AB[0]); + buf B162(AB_[1], AB[1]); + buf B163(AB_[2], AB[2]); + buf B164(AB_[3], AB[3]); + buf B165(AB_[4], AB[4]); + buf B166(DB_[0], DB[0]); + buf B167(DB_[1], DB[1]); + buf B168(DB_[2], DB[2]); + buf B169(DB_[3], DB[3]); + buf B170(DB_[4], DB[4]); + buf B171(DB_[5], DB[5]); + buf B172(DB_[6], DB[6]); + buf B173(DB_[7], DB[7]); + buf B174(DB_[8], DB[8]); + buf B175(DB_[9], DB[9]); + buf B176(DB_[10], DB[10]); + buf B177(DB_[11], DB[11]); + buf B178(DB_[12], DB[12]); + buf B179(DB_[13], DB[13]); + buf B180(DB_[14], DB[14]); + buf B181(DB_[15], DB[15]); + buf B182(DB_[16], DB[16]); + buf B183(DB_[17], DB[17]); + buf B184(DB_[18], DB[18]); + buf B185(EMAA_[0], EMAA[0]); + buf B186(EMAA_[1], EMAA[1]); + buf B187(EMAA_[2], EMAA[2]); + buf B188(EMASA_, EMASA); + buf B189(EMAB_[0], EMAB[0]); + buf B190(EMAB_[1], EMAB[1]); + buf B191(EMAB_[2], EMAB[2]); + buf B192(TENA_, TENA); + buf B193(TCENA_, TCENA); + buf B194(TAA_[0], TAA[0]); + buf B195(TAA_[1], TAA[1]); + buf B196(TAA_[2], TAA[2]); + buf B197(TAA_[3], TAA[3]); + buf B198(TAA_[4], TAA[4]); + buf B199(TENB_, TENB); + buf B200(TCENB_, TCENB); + buf B201(TAB_[0], TAB[0]); + buf B202(TAB_[1], TAB[1]); + buf B203(TAB_[2], TAB[2]); + buf B204(TAB_[3], TAB[3]); + buf B205(TAB_[4], TAB[4]); + buf B206(TDB_[0], TDB[0]); + buf B207(TDB_[1], TDB[1]); + buf B208(TDB_[2], TDB[2]); + buf B209(TDB_[3], TDB[3]); + buf B210(TDB_[4], TDB[4]); + buf B211(TDB_[5], TDB[5]); + buf B212(TDB_[6], TDB[6]); + buf B213(TDB_[7], TDB[7]); + buf B214(TDB_[8], TDB[8]); + buf B215(TDB_[9], TDB[9]); + buf B216(TDB_[10], TDB[10]); + buf B217(TDB_[11], TDB[11]); + buf B218(TDB_[12], TDB[12]); + buf B219(TDB_[13], TDB[13]); + buf B220(TDB_[14], TDB[14]); + buf B221(TDB_[15], TDB[15]); + buf B222(TDB_[16], TDB[16]); + buf B223(TDB_[17], TDB[17]); + buf B224(TDB_[18], TDB[18]); + buf B225(RET1N_, RET1N); + buf B226(SIA_[0], SIA[0]); + buf B227(SIA_[1], SIA[1]); + buf B228(SEA_, SEA); + buf B229(DFTRAMBYP_, DFTRAMBYP); + buf B230(SIB_[0], SIB[0]); + buf B231(SIB_[1], SIB[1]); + buf B232(SEB_, SEB); + buf B233(COLLDISN_, COLLDISN); + + assign CENYA_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENA_ ? CENA_ : TCENA_)) : 1'bx; + assign AYA_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENA_ ? AA_ : TAA_)) : {5{1'bx}}; + assign CENYB_ = (RET1N_ | pre_charge_st) ? (DFTRAMBYP_ & (TENB_ ? CENB_ : TCENB_)) : 1'bx; + assign AYB_ = (RET1N_ | pre_charge_st) ? ({5{DFTRAMBYP_}} & (TENB_ ? AB_ : TAB_)) : {5{1'bx}}; + `ifdef ARM_FAULT_MODELING + rf2_32x19_wm0_error_injection u1(.CLK(CLKA_), .Q_out(QA_), .A(AA_int), .CEN(CENA_int), .DFTRAMBYP(DFTRAMBYP_int), .SE(SEA_int), .Q_in(QA_int)); + `else + assign QA_ = (RET1N_ | pre_charge_st) ? ((QA_int)) : {19{1'bx}}; + `endif + assign SOA_ = (RET1N_ | pre_charge_st) ? ({QA_[18], QA_[0]}) : {2{1'bx}}; + assign SOB_ = (RET1N_ | pre_charge_st) ? (SOB_int) : {2{1'bx}}; + +// If INITIALIZE_MEMORY is defined at Simulator Command Line, it Initializes the Memory with all ZEROS. +`ifdef INITIALIZE_MEMORY + integer i; + initial begin + #0; + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'b0}}; + end +`endif + always @ (EMAA_) begin + if(EMAA_ < 3) + $display("Warning: Set Value for EMAA doesn't match Default value 3 in %m at %0t", $time); + end + always @ (EMASA_) begin + if(EMASA_ < 0) + $display("Warning: Set Value for EMASA doesn't match Default value 0 in %m at %0t", $time); + end + always @ (EMAB_) begin + if(EMAB_ < 3) + $display("Warning: Set Value for EMAB doesn't match Default value 3 in %m at %0t", $time); + end + + task failedWrite; + input port_f; + integer i; + begin + for (i = 0; i < MEM_HEIGHT; i = i + 1) + mem[i] = {MEM_WIDTH{1'bx}}; + end + endtask + + function isBitX; + input bitval; + begin + isBitX = ( bitval===1'bx || bitval===1'bz ) ? 1'b1 : 1'b0; + end + endfunction + + function isBit1; + input bitval; + begin + isBit1 = ( bitval===1'b1 ) ? 1'b1 : 1'b0; + end + endfunction + + +task loadmem; + input [1000*8-1:0] filename; + reg [BITS-1:0] memld [0:WORDS-1]; + integer i; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + $readmemb(filename, memld); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + end + endtask + +task dumpmem; + input [1000*8-1:0] filename_dump; + integer i, dump_file_desc; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + dump_file_desc = $fopen(filename_dump); + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + for (i=0;i> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + $fdisplay(dump_file_desc, "%b", QA_int); + end + end + $fclose(dump_file_desc); + end + endtask + +task loadaddr; + input [4:0] load_addr; + input [18:0] load_data; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + wordtemp = load_data; + Atemp = load_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, wordtemp[18], 1'b0, wordtemp[17], 1'b0, wordtemp[16], + 1'b0, wordtemp[15], 1'b0, wordtemp[14], 1'b0, wordtemp[13], 1'b0, wordtemp[12], + 1'b0, wordtemp[11], 1'b0, wordtemp[10], 1'b0, wordtemp[9], 1'b0, wordtemp[8], + 1'b0, wordtemp[7], 1'b0, wordtemp[6], 1'b0, wordtemp[5], 1'b0, wordtemp[4], + 1'b0, wordtemp[3], 1'b0, wordtemp[2], 1'b0, wordtemp[1], 1'b0, wordtemp[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + mem[row_address] = row; + end + end + endtask + +task dumpaddr; + output [18:0] dump_data; + input [4:0] dump_addr; + reg [BITS-1:0] wordtemp; + reg [4:0] Atemp; + begin + if (CENA_ === 1'b1 && CENB_ === 1'b1) begin + Atemp = dump_addr; + mux_address = (Atemp & 1'b1); + row_address = (Atemp >> 1); + row = mem[row_address]; + writeEnable = {19{1'b1}}; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + dump_data = QA_int; + end + end + endtask + + + task ReadA; + begin + if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'bx) begin + QA_int = {19{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEA_int === 1'b1) begin + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAA_int & isBit1(DFTRAMBYP_int)), (EMASA_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + QA_int = {19{1'bx}}; + end else if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) begin + QA_int = {19{1'bx}}; + end else if ((AA_int >= WORDS) && (CENA_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + QA_int = 0 ? QA_int : {19{1'bx}}; + end else if (CENA_int === 1'b0 && (^AA_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (CENA_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if (DFTRAMBYP_int !== 1'b1) begin + mux_address = (AA_int & 1'b1); + row_address = (AA_int >> 1); + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + data_out = (row >> mux_address); + QA_int = {data_out[36], data_out[34], data_out[32], data_out[30], data_out[28], + data_out[26], data_out[24], data_out[22], data_out[20], data_out[18], data_out[16], + data_out[14], data_out[12], data_out[10], data_out[8], data_out[6], data_out[4], + data_out[2], data_out[0]}; + end + if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'b0) begin + end else if (DFTRAMBYP_int === 1'b1 && SEA_int === 1'bx) begin + QA_int = {19{1'bx}}; + end + if( isBitX(DFTRAMBYP_int) ) + QA_int = {19{1'bx}}; + if(isBitX(DFTRAMBYP_int)) begin + QA_int = {19{1'bx}}; + failedWrite(0); + end + end + end + endtask + + task WriteB; + begin + if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (DFTRAMBYP_int=== 1'b0 && SEB_int === 1'b1) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (RET1N_int === 1'bx || RET1N_int === 1'bz) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0 && (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_int === 1'b0) begin + // no cycle in retention mode + end else if (^{(EMAB_int & isBit1(DFTRAMBYP_int))} === 1'bx) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if ((AB_int >= WORDS) && (CENB_int === 1'b0) && DFTRAMBYP_int === 1'b0) begin + end else if (CENB_int === 1'b0 && (^AB_int) === 1'bx && DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end else if (CENB_int === 1'b0 || DFTRAMBYP_int === 1'b1) begin + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) + DB_int = {19{1'bx}}; + + if(isBitX(DFTRAMBYP_int) || isBitX(SEB_int)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end + mux_address = (AB_int & 1'b1); + row_address = (AB_int >> 1); + if (DFTRAMBYP_int !== 1'b1) begin + if (row_address > 15) + row = {38{1'bx}}; + else + row = mem[row_address]; + end + if(isBitX(DFTRAMBYP_int)) begin + writeEnable = {19{1'bx}}; + DB_int = {19{1'bx}}; + end else + writeEnable = ~ {19{CENB_int}}; + row_mask = ( {1'b0, writeEnable[18], 1'b0, writeEnable[17], 1'b0, writeEnable[16], + 1'b0, writeEnable[15], 1'b0, writeEnable[14], 1'b0, writeEnable[13], 1'b0, writeEnable[12], + 1'b0, writeEnable[11], 1'b0, writeEnable[10], 1'b0, writeEnable[9], 1'b0, writeEnable[8], + 1'b0, writeEnable[7], 1'b0, writeEnable[6], 1'b0, writeEnable[5], 1'b0, writeEnable[4], + 1'b0, writeEnable[3], 1'b0, writeEnable[2], 1'b0, writeEnable[1], 1'b0, writeEnable[0]} << mux_address); + new_data = ( {1'b0, DB_int[18], 1'b0, DB_int[17], 1'b0, DB_int[16], 1'b0, DB_int[15], + 1'b0, DB_int[14], 1'b0, DB_int[13], 1'b0, DB_int[12], 1'b0, DB_int[11], 1'b0, DB_int[10], + 1'b0, DB_int[9], 1'b0, DB_int[8], 1'b0, DB_int[7], 1'b0, DB_int[6], 1'b0, DB_int[5], + 1'b0, DB_int[4], 1'b0, DB_int[3], 1'b0, DB_int[2], 1'b0, DB_int[1], 1'b0, DB_int[0]} << mux_address); + row = (row & ~row_mask) | (row_mask & (~row_mask | new_data)); + if (DFTRAMBYP_int === 1'b1 && (SEB_int === 1'b0 || SEB_int === 1'bx)) begin + end else begin + mem[row_address] = row; + end + end + end + endtask + always @ (CENA_ or TCENA_ or TENA_ or DFTRAMBYP_ or CLKA_) begin + if(CLKA_ == 1'b0) begin + CENA_p2 = CENA_; + TCENA_p2 = TCENA_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (VDDCE) begin + if (VDDCE != 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDCE should be powered down after VDDPE, Illegal power down sequencing in %m at %0t", $time); + end + $display("In PowerDown Mode in %m at %0t", $time); + failedWrite(0); + end + if (VDDCE == 1'b1) begin + if (VDDPE == 1'b1) begin + $display("VDDPE should be powered up after VDDCE in %m at %0t", $time); + $display("Illegal power up sequencing in %m at %0t", $time); + end + failedWrite(0); + end + end +`endif +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1 && (CENA_ === 1'bx || TCENA_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKA_ === 1'bx)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_a = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENA_p2 === 1'b0 || TCENA_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_a = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(0); + end +`else + if (RET1N_ == 1'b0) begin +`endif + QA_int = {19{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_a == 1'b1) begin + pre_charge_st_a = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_a = 0; + pre_charge_st = 0; +`else + end else begin +`endif + QA_int = {19{1'bx}}; + CENA_int = 1'bx; + AA_int = {5{1'bx}}; + EMAA_int = {3{1'bx}}; + EMASA_int = 1'bx; + TENA_int = 1'bx; + TCENA_int = 1'bx; + TAA_int = {5{1'bx}}; + RET1N_int = 1'bx; + SIA_int = {2{1'bx}}; + SEA_int = 1'bx; + DFTRAMBYP_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (CLKB_ or DFTRAMBYP_) begin + #0; + if(CLKB_ == 1'b1 && (DFTRAMBYP_int === 1'b1 || CENB_int != 1'b1)) begin + if (RET1N_ == 1'b1) begin + SOB_int = ({DB_int_sh[18], DB_int_sh[0]}); + DB_int_sh_int = DB_int_sh; + end + end + end + always @ (SIA_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1 && ^SIA_int === 1'bx) begin + QA_int[9] = SIA_int[1]; + QA_int[8] = SIA_int[0]; + end + end + + always @ CLKA_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKA_ === 1'bx || CLKA_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + QA_int = {19{1'bx}}; + end else if (CLKA_ === 1'b1 && LAST_CLKA === 1'b0) begin +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + end else begin + SIA_int = SIA_; + SEA_int = SEA_; + DFTRAMBYP_int = DFTRAMBYP_; + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (RET1N_ == 1'b1) begin + QA_int[18:9] = {QA_int[17:9], SIA_[1]}; + QA_int[8:0] = {SIA_[0], QA_int[8:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else if (DFTRAMBYP_=== 1'b1 && SEA_ === 1'b0) begin + if (RET1N_ == 1'b1) begin + QA_int[18:9] = {QA_int[17:9], 1'b0}; + QA_int[8:0] = {1'b0, QA_int[8:1]}; + if (^{(CENA_int & !isBit1(DFTRAMBYP_int)), EMAA_int, EMASA_int, RET1N_int} === 1'bx) + ReadA; + end + end else begin + CENA_int = TENA_ ? CENA_ : TCENA_; + EMAA_int = EMAA_; + EMASA_int = EMASA_; + TENA_int = TENA_; + RET1N_int = RET1N_; + SIA_int = SIA_; + COLLDISN_int = COLLDISN_; + if (DFTRAMBYP_=== 1'b1 || CENA_int != 1'b1) begin + AA_int = TENA_ ? AA_ : TAA_; + TCENA_int = TCENA_; + TAA_int = TAA_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk0_int = 1'b0; + ReadA; + if (CENA_int === 1'b0) previous_CLKA = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && COLLDISN_int === 1'b1 && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int, 1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end else if (CLKA_ === 1'b0 && LAST_CLKA === 1'b1) begin + end + end + LAST_CLKA = CLKA_; + end + + reg globalNotifier0; + initial globalNotifier0 = 1'b0; + initial cont_flag0_int = 1'b0; + + always @ globalNotifier0 begin + if ($realtime == 0) begin + end else if ((EMAA_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAA_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAA_int[2] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMASA_int === 1'bx & DFTRAMBYP_int === 1'b1) + ) begin + QA_int = {19{1'bx}}; + end else if ((CENA_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAA_int[0] === 1'bx || + EMAA_int[1] === 1'bx || EMAA_int[2] === 1'bx || EMASA_int === 1'bx || RET1N_int === 1'bx + || clk0_int === 1'bx) begin + QA_int = {19{1'bx}}; + end else if (TENA_int === 1'bx) begin + if(((CENA_ === 1'b1 & TCENA_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEA_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + QA_int = {19{1'bx}}; + end + end + end else if (^SIA_int === 1'bx && DFTRAMBYP_int === 1'b1) begin + end else if (cont_flag0_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag0_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag0_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + ReadA; + end + globalNotifier0 = 1'b0; + end + always @ (CENB_ or TCENB_ or TENB_ or DFTRAMBYP_ or CLKB_) begin + if(CLKB_ == 1'b0) begin + CENB_p2 = CENB_; + TCENB_p2 = TCENB_; + DFTRAMBYP_p2 = DFTRAMBYP_; + end + end + +`ifdef POWER_PINS + always @ (RET1N_ or VDDPE or VDDCE) begin +`else + always @ RET1N_ begin +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b1 && RET1N_int == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1 && (CENB_ === 1'bx || TCENB_ === 1'bx || DFTRAMBYP_ === 1'bx || CLKB_ === 1'bx)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end +`else +`endif +`ifdef POWER_PINS +`else + pre_charge_st_b = 0; + pre_charge_st = 0; +`endif + if (RET1N_ === 1'bx || RET1N_ === 1'bz) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b0 && RET1N_int === 1'b1 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end else if (RET1N_ === 1'b1 && RET1N_int === 1'b0 && (CENB_p2 === 1'b0 || TCENB_p2 === 1'b0 || DFTRAMBYP_p2 === 1'b1)) begin + failedWrite(1); + QA_int = {19{1'bx}}; + end +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDCE == 1'b1 && VDDPE == 1'b1) begin + pre_charge_st_b = 1; + pre_charge_st = 1; + end else if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + if (VDDCE != 1'b1) begin + failedWrite(1); + end +`else + if (RET1N_ == 1'b0) begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; +`ifdef POWER_PINS + end else if (RET1N_ == 1'b1 && VDDCE == 1'b1 && VDDPE == 1'b1 && pre_charge_st_b == 1'b1) begin + pre_charge_st_b = 0; + pre_charge_st = 0; + end else begin + pre_charge_st_b = 0; + pre_charge_st = 0; +`else + end else begin +`endif + CENB_int = 1'bx; + AB_int = {5{1'bx}}; + DB_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + SOB_int = {2{1'bx}}; + EMAB_int = {3{1'bx}}; + TENB_int = 1'bx; + TCENB_int = 1'bx; + TAB_int = {5{1'bx}}; + TDB_int = {19{1'bx}}; + RET1N_int = 1'bx; + SIB_int = {2{1'bx}}; + SEB_int = 1'bx; + COLLDISN_int = 1'bx; + end + RET1N_int = RET1N_; + end + + always @ (SIB_int) begin + #0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1 && ^SIB_int === 1'bx) begin + DB_int_sh_int[9] = SIB_int[1]; + DB_int_sh_int[8] = SIB_int[0]; + end + end + always @ CLKB_ begin +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); +`endif +`ifdef POWER_PINS + if (RET1N_ == 1'b0 && VDDPE == 1'b0) begin +`else + if (RET1N_ == 1'b0) begin +`endif + // no cycle in retention mode + end else begin + if ((CLKB_ === 1'bx || CLKB_ === 1'bz) && RET1N_ !== 1'b0) begin + failedWrite(0); + end else if (CLKB_ === 1'b1 && LAST_CLKB === 1'b0) begin + if (RET1N_ == 1'b0) begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + end else begin + DFTRAMBYP_int = DFTRAMBYP_; + SIB_int = SIB_; + SEB_int = SEB_; + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b1) begin + DFTRAMBYP_int = DFTRAMBYP_; + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + DB_int_sh[18:9] = {DB_int_sh_int[17:9], SIB_[1]}; + DB_int_sh[8:0] = {SIB_[0], DB_int_sh_int[8:1]}; + end else begin + CENB_int = TENB_ ? CENB_ : TCENB_; + EMAB_int = EMAB_; + TENB_int = TENB_; + RET1N_int = RET1N_; + SIB_int = SIB_; + COLLDISN_int = COLLDISN_; + DFTRAMBYP_int = DFTRAMBYP_; + if (DFTRAMBYP_=== 1'b1 || CENB_int != 1'b1) begin + AB_int = TENB_ ? AB_ : TAB_; + DB_int = TENB_ ? DB_ : TDB_; + DB_int_sh_int = DB_int_sh; + DB_int_sh = TENB_ ? DB_ : TDB_; + TCENB_int = TCENB_; + TAB_int = TAB_; + TDB_int = TDB_; + DFTRAMBYP_int = DFTRAMBYP_; + end + clk1_int = 1'b0; + if (DFTRAMBYP_=== 1'b1 && SEB_ === 1'b0) begin + if (^{(CENB_int & !isBit1(DFTRAMBYP_int)), EMAB_int, RET1N_int} === 1'bx) + WriteB; + end else begin + WriteB; + end + if (CENB_int === 1'b0) previous_CLKB = $realtime; + #0; + if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if (((previous_CLKA == previous_CLKB)) && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && row_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin +`ifdef ARM_MESSAGES + $display("%s row contention: in %m at %0t",ASSERT_PREFIX, $time); +`endif + ROW_CC = 1; +`ifdef ARM_MESSAGES + $display("%s contention: write B succeeds, read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end else if (((previous_CLKA == previous_CLKB)) && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && (COLLDISN_int === 1'b0 || COLLDISN_int + === 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end + end + end + end + end + LAST_CLKB = CLKB_; + end + + reg globalNotifier1; + initial globalNotifier1 = 1'b0; + initial cont_flag1_int = 1'b0; + + always @ globalNotifier1 begin + if ($realtime == 0) begin + end else if ((EMAB_int[0] === 1'bx & DFTRAMBYP_int === 1'b1) || (EMAB_int[1] === 1'bx & DFTRAMBYP_int === 1'b1) || + (EMAB_int[2] === 1'bx & DFTRAMBYP_int === 1'b1)) begin + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if ((CENB_int === 1'bx & DFTRAMBYP_int === 1'b0) || EMAB_int[0] === 1'bx || + EMAB_int[1] === 1'bx || EMAB_int[2] === 1'bx || RET1N_int === 1'bx || clk1_int === 1'bx) begin + failedWrite(1); + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end else if (TENB_int === 1'bx) begin + if(((CENB_ === 1'b1 & TCENB_ === 1'b1) & DFTRAMBYP_int === 1'b0) | (DFTRAMBYP_int === 1'b1 & SEB_int === 1'b1)) begin + end else begin + if (DFTRAMBYP_int === 1'b0) begin + failedWrite(1); + end + #0; + SOB_int = {2{1'bx}}; + DB_int_sh_int = {19{1'bx}}; + DB_int_sh = {19{1'bx}}; + end + end else if (^SIB_int === 1'bx && DFTRAMBYP_int === 1'b1) begin + end else if (cont_flag1_int === 1'bx && COLLDISN_int === 1'b1 && (CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && is_contention(AA_int, + AB_int, 1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + $display("%s contention: write B succeeds, read A fails in %m at %0t",ASSERT_PREFIX, $time); + ROW_CC = 1; + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else if ((CENA_int !== 1'b1 && CENB_int !== 1'b1 && DFTRAMBYP_ !== 1'b1) && cont_flag1_int === 1'bx && (COLLDISN_int === 1'b0 || COLLDISN_int === + 1'bx) && row_contention(AA_int, AB_int,1'b1, 1'b0)) begin + cont_flag1_int = 1'b0; + ROW_CC = 1; + $display("%s contention: write B fails in %m at %0t",ASSERT_PREFIX, $time); + READ_WRITE = 1; + DB_int = {19{1'bx}}; + WriteB; + if (col_contention(AA_int,AB_int)) begin + $display("%s contention: read A fails in %m at %0t",ASSERT_PREFIX, $time); + COL_CC = 1; + READ_WRITE = 1; + QA_int = {19{1'bx}}; + end else begin +`ifdef ARM_MESSAGES + $display("%s contention: read A succeeds in %m at %0t",ASSERT_PREFIX, $time); +`endif + READ_WRITE = 1; + end + end else begin + #0; + WriteB; + end + globalNotifier1 = 1'b0; + end +// If POWER_PINS is defined at Simulator Command Line, it selects the module definition with Power Ports +`ifdef POWER_PINS + always @ (VDDCE or VDDPE or VSSE) begin + if (VDDCE === 1'bx || VDDCE === 1'bz) + $display("Warning: Unknown value for VDDCE %b in %m at %0t", VDDCE, $time); + if (VDDPE === 1'bx || VDDPE === 1'bz) + $display("Warning: Unknown value for VDDPE %b in %m at %0t", VDDPE, $time); + if (VSSE === 1'bx || VSSE === 1'bz) + $display("Warning: Unknown value for VSSE %b in %m at %0t", VSSE, $time); + end +`endif + + function row_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + reg sameRow; + reg sameMux; + reg anyWrite; + begin + anyWrite = ((& wena) === 1'b1 && (& wenb) === 1'b1) ? 1'b0 : 1'b1; + sameMux = (aa[0:0] == ab[0:0]) ? 1'b1 : 1'b0; + if (aa[4:1] == ab[4:1]) begin + sameRow = 1'b1; + end else begin + sameRow = 1'b0; + end + if (sameRow == 1'b1 && anyWrite == 1'b1) + row_contention = 1'b1; + else if (sameRow == 1'b1 && sameMux == 1'b1) + row_contention = 1'b1; + else + row_contention = 1'b0; + end + endfunction + + function col_contention; + input [4:0] aa; + input [4:0] ab; + begin + if (aa[0:0] == ab[0:0]) + col_contention = 1'b1; + else + col_contention = 1'b0; + end + endfunction + + function is_contention; + input [4:0] aa; + input [4:0] ab; + input wena; + input wenb; + reg result; + begin + if ((& wena) === 1'b1 && (& wenb) === 1'b1) begin + result = 1'b0; + end else if (aa == ab) begin + result = 1'b1; + end else begin + result = 1'b0; + end + is_contention = result; + end + endfunction + + wire contA_flag = (CENA_int !== 1'b1 && ((TENB_ ? CENB_ : TCENB_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENB_ ? AB_ : TAB_, AA_int, 1'b0, 1'b1))); + wire contB_flag = (CENB_int !== 1'b1 && ((TENA_ ? CENA_ : TCENA_) !== 1'b1)) && ((COLLDISN_int === 1'b1 && is_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0)) || + ((COLLDISN_int === 1'b0 || COLLDISN_int === 1'bx) && row_contention(TENA_ ? AA_ : TAA_, AB_int, 1'b1, 1'b0))); + + always @ NOT_CENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_AA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_AB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_DB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAA2 begin + EMAA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA1 begin + EMAA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAA0 begin + EMAA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMASA begin + EMASA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_EMAB2 begin + EMAB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB1 begin + EMAB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_EMAB0 begin + EMAB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TENA begin + TENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TCENA begin + CENA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA4 begin + AA_int[4] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA3 begin + AA_int[3] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA2 begin + AA_int[2] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA1 begin + AA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TAA0 begin + AA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_TENB begin + TENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TCENB begin + CENB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB4 begin + AB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB3 begin + AB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB2 begin + AB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB1 begin + AB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TAB0 begin + AB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB18 begin + DB_int[18] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB17 begin + DB_int[17] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB16 begin + DB_int[16] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB15 begin + DB_int[15] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB14 begin + DB_int[14] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB13 begin + DB_int[13] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB12 begin + DB_int[12] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB11 begin + DB_int[11] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB10 begin + DB_int[10] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB9 begin + DB_int[9] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB8 begin + DB_int[8] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB7 begin + DB_int[7] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB6 begin + DB_int[6] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB5 begin + DB_int[5] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB4 begin + DB_int[4] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB3 begin + DB_int[3] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB2 begin + DB_int[2] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB1 begin + DB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_TDB0 begin + DB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIA1 begin + SIA_int[1] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_SIA0 begin + SIA_int[0] = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_SEA begin + SEA_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKA begin + DFTRAMBYP_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_DFTRAMBYP_CLKB begin + DFTRAMBYP_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_RET1N begin + RET1N_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB1 begin + SIB_int[1] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SIB0 begin + SIB_int[0] = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_SEB begin + SEB_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_COLLDISN begin + COLLDISN_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + always @ NOT_CONTA begin + cont_flag0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_PER begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINH begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CLKA_MINL begin + clk0_int = 1'bx; + if ( globalNotifier0 === 1'b0 ) globalNotifier0 = 1'bx; + end + always @ NOT_CONTB begin + cont_flag1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_PER begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINH begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + always @ NOT_CLKB_MINL begin + clk1_int = 1'bx; + if ( globalNotifier1 === 1'b0 ) globalNotifier1 = 1'bx; + end + + + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0; + wire contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1; + wire RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1; + wire RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp; + wire RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp; + + wire RET1Neq1aTENAeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, RET1Neq1aTENAeq0; + wire RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0; + wire RET1Neq1aTENBeq0, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0; + wire RET1Neq1aSEAeq1, RET1Neq1aSEBeq1, RET1Neq1, RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp; + wire RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp; + + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&!EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&!EMAA[1]&&EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&!EMAA[0] && contA_flag; + assign contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1 = + RET1N&&!DFTRAMBYP&&((TENA&&!CENA)||(!TENA&&!TCENA))&&EMAA[2]&&EMAA[1]&&EMAA[0] && contA_flag; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&!EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&!EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&!EMAA[1]&&EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&!EMAA[0]&&EMASA; + assign RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1 = + RET1N&&((((TENA&&!CENA)||(!TENA&&!TCENA))&&!DFTRAMBYP)||DFTRAMBYP)&&EMAA[2]&&EMAA[1]&&EMAA[0]&&EMASA; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&!EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&!EMAB[1]&&EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&!EMAB[0] && contB_flag; + assign contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&!DFTRAMBYP&&((TENB&&!CENB)||(!TENB&&!TCENB))&&EMAB[2]&&EMAB[1]&&EMAB[0] && contB_flag; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&!EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&!EMAB[1]&&EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&!EMAB[0]; + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1 = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP)&&EMAB[2]&&EMAB[1]&&EMAB[0]; + assign RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp = + RET1N&&TENB&&((DFTRAMBYP&&!SEB)||(!DFTRAMBYP&&!CENB)); + assign RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENA&&!CENA&&!DFTRAMBYP)||(!TENA&&!TCENA&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp = + RET1N&&(((TENB&&!CENB&&!DFTRAMBYP)||(!TENB&&!TCENB&&!DFTRAMBYP))||DFTRAMBYP); + assign RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp = + RET1N&&!TENB&&((DFTRAMBYP&&!SEB)||(!TCENB&&!DFTRAMBYP)); + + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1 = RET1N&&TENA&&!CENA&&COLLDISN; + assign RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0 = RET1N&&TENA&&!CENA&&!COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1 = RET1N&&TENB&&!CENB&&COLLDISN; + assign RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0 = RET1N&&TENB&&!CENB&&!COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1 = RET1N&&!TENA&&!TCENA&&COLLDISN; + assign RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0 = RET1N&&!TENA&&!TCENA&&!COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1 = RET1N&&!TENB&&!TCENB&&COLLDISN; + assign RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0 = RET1N&&!TENB&&!TCENB&&!COLLDISN; + assign RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp = RET1N&&((TENA&&!CENA)||(!TENA&&!TCENA)); + assign RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp = RET1N&&((TENB&&!CENB)||(!TENB&&!TCENB)); + + + assign RET1Neq1aTENAeq1 = RET1N&&TENA; + assign RET1Neq1aTENBeq1 = RET1N&&TENB; + assign RET1Neq1aTENAeq0 = RET1N&&!TENA; + assign RET1Neq1aTENBeq0 = RET1N&&!TENB; + assign RET1Neq1aSEAeq1 = RET1N&&SEA; + assign RET1Neq1aSEBeq1 = RET1N&&SEB; + assign RET1Neq1 = RET1N; + + specify + + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (CENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TCENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1) + (TENA +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0) + (TENA -=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYA) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b1) + (AA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[4] +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[3] +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[2] +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[1] +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENA == 1'b0) + (TAA[0] +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1) + (TENA +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1) + (TENA +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1) + (TENA +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1) + (TENA +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1) + (TENA +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0) + (TENA -=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0) + (TENA -=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0) + (TENA -=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0) + (TENA -=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0) + (TENA -=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYA[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (CENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TCENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1) + (TENB +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0) + (TENB -=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> CENYB) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b1) + (AB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[4] +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[3] +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[2] +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[1] +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TENB == 1'b0) + (TAB[0] +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1) + (TENB +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1) + (TENB +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1) + (TENB +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1) + (TENB +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1) + (TENB +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0) + (TENB -=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0) + (TENB -=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0) + (TENB -=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0) + (TENB -=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0) + (TENB -=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[4]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[3]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[2]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[1]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (DFTRAMBYP +=> AYB[0]) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[18] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[17] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[16] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[15] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[14] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[13] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[12] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[11] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[10] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[9] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[8] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[7] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[6] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[5] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[4] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[3] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[2] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (QA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b0) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && EMAA[0] == 1'b1) + (posedge CLKA => (SOA[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[1] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + if (RET1N == 1'b1) + (posedge CLKB => (SOB[0] : 1'b0)) = (`ARM_MEM_PROP, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP, `ARM_MEM_RETAIN, `ARM_MEM_PROP); + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKA, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `else + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + $period(posedge CLKA &&& RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1, `ARM_MEM_PERIOD, NOT_CLKA_PER); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $period(posedge CLKB, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `else + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0, `ARM_MEM_PERIOD, NOT_CLKB_PER); + $period(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1, `ARM_MEM_PERIOD, NOT_CLKB_PER); + `endif + + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `else + $width(posedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINH); + $width(negedge CLKA &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKA_MINL); + `endif + + // Define SDTC only if back-annotating SDF file generated by Design Compiler + `ifdef NO_SDTC + $width(posedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `else + $width(posedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINH); + $width(negedge CLKB &&& RET1Neq1, `ARM_MEM_WIDTH, 0, NOT_CLKB_MINL); + `endif + + + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + $setuphold(posedge CLKB &&& contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1, posedge CLKA, + `ARM_MEM_COLLISION, 0.000, NOT_CONTA); + + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + $setuphold(posedge CLKA &&& contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1, posedge CLKB, + `ARM_MEM_COLLISION, 0.000, NOT_CONTB); + + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, posedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1, negedge CENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, posedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0, negedge AA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AA0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, posedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1, negedge CENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_CENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, posedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0, negedge AB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_AB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, posedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp, negedge DB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DB0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA2); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA1); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAA0); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKA &&& RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMASA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMASA); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, posedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB2); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB1); + $setuphold(posedge CLKB &&& RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp, negedge EMAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_EMAB0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge TENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, posedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0, negedge TCENA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENA); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, posedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA4); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA3); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA2); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA1); + $setuphold(posedge CLKA &&& RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0, negedge TAA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAA0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge TENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, posedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0, negedge TCENB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TCENB); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, posedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0, negedge TAB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TAB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, posedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[18], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB18); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[17], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB17); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[16], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB16); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[15], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB15); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[14], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB14); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[13], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB13); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[12], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB12); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[11], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB11); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[10], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB10); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[9], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB9); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[8], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB8); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[7], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB7); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[6], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB6); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[5], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB5); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[4], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB4); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[3], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB3); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[2], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB2); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB1); + $setuphold(posedge CLKB &&& RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp, negedge TDB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_TDB0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, posedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA1); + $setuphold(posedge CLKA &&& RET1Neq1aSEAeq1, negedge SIA[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIA0); + $setuphold(posedge CLKA &&& RET1Neq1, posedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge SEA, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEA); + $setuphold(posedge CLKA &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKA &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKA); + $setuphold(posedge CLKB &&& RET1Neq1, posedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge DFTRAMBYP, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_DFTRAMBYP_CLKB); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, posedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[1], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB1); + $setuphold(posedge CLKB &&& RET1Neq1aSEBeq1, negedge SIB[0], `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SIB0); + $setuphold(posedge CLKB &&& RET1Neq1, posedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKB &&& RET1Neq1, negedge SEB, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_SEB); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKA &&& RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, posedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(posedge CLKB &&& RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp, negedge COLLDISN, `ARM_MEM_SETUP, `ARM_MEM_HOLD, NOT_COLLDISN); + $setuphold(negedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge CENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENA, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, negedge TCENB, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge DFTRAMBYP, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, negedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge TCENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENB, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge CENA, posedge RET1N, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(negedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + $setuphold(posedge RET1N, posedge DFTRAMBYP, 0.000, `ARM_MEM_HOLD, NOT_RET1N); + endspecify + + +endmodule +`endcelldefine + `endif +`endif +`timescale 1ns/1ps +module rf2_32x19_wm0_error_injection (Q_out, Q_in, CLK, A, CEN, DFTRAMBYP, SE); + output [18:0] Q_out; + input [18:0] Q_in; + input CLK; + input [4:0] A; + input CEN; + input DFTRAMBYP; + input SE; + parameter LEFT_RED_COLUMN_FAULT = 2'd1; + parameter RIGHT_RED_COLUMN_FAULT = 2'd2; + parameter NO_RED_FAULT = 2'd0; + reg [18:0] Q_out; + reg entry_found; + reg list_complete; + reg [14:0] fault_table [15:0]; + reg [14:0] fault_entry; +initial +begin + `ifdef DUT + `define pre_pend_path TB.DUT_inst.CHIP + `else + `define pre_pend_path TB.CHIP + `endif + `ifdef ARM_NONREPAIRABLE_FAULT + `pre_pend_path.SMARCHCHKBVCD_LVISION_MBISTPG_ASSEMBLY_UNDER_TEST_INST.MEM0_MEM_INST.u1.add_fault(5'd10,5'd15,2'd1,2'd0); + `endif +end + task add_fault; + //This task injects fault in memory + input [4:0] address; + input [4:0] bitPlace; + input [1:0] fault_type; + input [1:0] red_fault; + + integer i; + reg done; + begin + done = 1'b0; + i = 0; + while ((!done) && i < 15) + begin + fault_entry = fault_table[i]; + if (fault_entry[0] === 1'b0 || fault_entry[0] === 1'bx) + begin + fault_entry[0] = 1'b1; + fault_entry[2:1] = red_fault; + fault_entry[4:3] = fault_type; + fault_entry[9:5] = bitPlace; + fault_entry[14:10] = address; + fault_table[i] = fault_entry; + done = 1'b1; + end + i = i+1; + end + end + endtask +//This task removes all fault entries injected by user +task remove_all_faults; + integer i; +begin + for (i = 0; i < 16; i=i+1) + begin + fault_entry = fault_table[i]; + fault_entry[0] = 1'b0; + fault_table[i] = fault_entry; + end +end +endtask +task bit_error; +// This task is used to inject error in memory and should be called +// only from current module. +// +// This task injects error depending upon fault type to particular bit +// of the output + inout [18:0] q_int; + input [1:0] fault_type; + input [4:0] bitLoc; +begin + if (fault_type === 2'd0) + q_int[bitLoc] = 1'b0; + else if (fault_type === 2'd1) + q_int[bitLoc] = 1'b1; + else + q_int[bitLoc] = ~q_int[bitLoc]; +end +endtask +task error_injection_on_output; +// This function goes through error injection table for every +// read cycle and corrupts Q output if fault for the particular +// address is present in fault table +// +// If fault is redundant column is detected, this task corrupts +// Q output in read cycle +// +// If fault is repaired using repair bus, this task does not +// courrpt Q output in read cycle +// + output [18:0] Q_output; + reg list_complete; + integer i; + reg [3:0] row_address; + reg [0:0] column_address; + reg [4:0] bitPlace; + reg [1:0] fault_type; + reg [1:0] red_fault; + reg valid; + reg [3:0] msb_bit_calc; +begin + entry_found = 1'b0; + list_complete = 1'b0; + i = 0; + Q_output = Q_in; + while(!list_complete) + begin + fault_entry = fault_table[i]; + {row_address, column_address, bitPlace, fault_type, red_fault, valid} = fault_entry; + i = i + 1; + if (valid == 1'b1) + begin + if (red_fault === NO_RED_FAULT) + begin + if (row_address == A[4:1] && column_address == A[0:0]) + begin + if (bitPlace < 9) + bit_error(Q_output,fault_type, bitPlace); + else if (bitPlace >= 9 ) + bit_error(Q_output,fault_type, bitPlace); + end + end + end + else + list_complete = 1'b1; + end + end + endtask + always @ (Q_in or CLK or A or CEN) + begin + if (CEN === 1'b0 && DFTRAMBYP === 1'b0 && SE === 1'b0) + error_injection_on_output(Q_out); + else + Q_out = Q_in; + end +endmodule diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_antenna.clf b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_antenna.clf new file mode 100644 index 00000000..8a55572f --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_antenna.clf @@ -0,0 +1,173 @@ +# Copyright (c) 1993 - 2019 ARM Limited. All Rights Reserved. +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Limited. + +# PhyVGen V 8.3.0 +# ARM Version r4p0 +# Creation Date: Mon Nov 11 12:00:01 2019 + + +defineGateSize "rf2_32x19_wm0" "AA[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AA[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AA[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AA[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AA[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AA[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AA[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AA[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AA[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AA[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AB[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AB[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AB[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AB[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "AB[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "AB[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "CENA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "CENA" '(0.018) +defineGateSize "rf2_32x19_wm0" "CENB" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "CENB" '(0.018) +defineGateSize "rf2_32x19_wm0" "CLKA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "CLKA" '(0.018) +defineGateSize "rf2_32x19_wm0" "CLKB" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "CLKB" '(0.018) +defineGateSize "rf2_32x19_wm0" "COLLDISN" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "COLLDISN" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[10]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[10]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[11]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[11]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[12]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[12]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[13]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[13]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[14]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[14]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[15]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[15]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[16]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[16]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[17]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[17]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[18]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[18]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[5]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[5]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[6]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[6]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[7]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[7]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[8]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[8]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DB[9]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DB[9]" '(0.018) +defineGateSize "rf2_32x19_wm0" "DFTRAMBYP" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "DFTRAMBYP" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAA[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAA[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAA[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAA[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAA[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAA[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMAB[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMAB[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "EMASA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "EMASA" '(0.018) +defineGateSize "rf2_32x19_wm0" "RET1N" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "RET1N" '(0.018) +defineGateSize "rf2_32x19_wm0" "SEA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SEA" '(0.018) +defineGateSize "rf2_32x19_wm0" "SEB" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SEB" '(0.018) +defineGateSize "rf2_32x19_wm0" "SIA[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SIA[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "SIA[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SIA[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "SIB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SIB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "SIB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "SIB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAA[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAA[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAA[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAA[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAA[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAA[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAA[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAA[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAA[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAA[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAB[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAB[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAB[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAB[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TAB[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TAB[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TCENA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TCENA" '(0.018) +defineGateSize "rf2_32x19_wm0" "TCENB" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TCENB" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[0]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[0]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[10]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[10]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[11]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[11]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[12]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[12]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[13]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[13]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[14]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[14]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[15]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[15]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[16]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[16]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[17]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[17]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[18]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[18]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[1]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[1]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[2]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[2]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[3]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[3]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[4]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[4]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[5]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[5]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[6]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[6]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[7]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[7]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[8]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[8]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TDB[9]" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TDB[9]" '(0.018) +defineGateSize "rf2_32x19_wm0" "TENA" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TENA" '(0.018) +defineGateSize "rf2_32x19_wm0" "TENB" 0.014 +defineDiodeProtection "rf2_32x19_wm0" "TENB" '(0.018) diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.avm b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.avm new file mode 100644 index 00000000..7f97f928 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:11 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x19_wm0 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 669 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS FF, CORNER FF_0P99V_0P99V_125C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.99 0.99 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 6.46914e-05nF + VDDPE VSSE 1.34730e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 2.37238mA + VDDPE VSSE 2.99422mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 7.11605e-05nF + VDDPE VSSE 7.17701e-04nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 2.60961mA + VDDPE VSSE 12.10194mA + } + Cpd avm_read_write { + VDDCE VSSE 8.47271e-05nF + VDDPE VSSE 1.61911e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 3.46982mA + VDDPE VSSE 17.44105mA + } + Cpd avm_read_desel { + VDDCE VSSE 3.73601e-05nF + VDDPE VSSE 8.02541e-04nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 1.73316mA + VDDPE VSSE 11.37893mA + } + Cpd avm_desel_write { + VDDCE VSSE 4.73670e-05nF + VDDPE VSSE 8.16567e-04nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 1.75233mA + VDDPE VSSE 12.18938mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.27046e-06nF + VDDPE VSSE 2.20337e-03nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.42769mA + VDDPE VSSE 11.39868mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.27046e-06nF + VDDPE VSSE 2.20337e-03nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.42769mA + VDDPE VSSE 11.39868mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.95501e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 2.17223e-05nF + } + LEAKAGE_I { + VDDCE VSSE 4.74690e-02mA + VDDPE VSSE 0.31536mA + } + tsu 0.092778ns + ck2q_delay 0.272935ns + tr_q 0.013428ns + tf_q 0.0155257ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.dat b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.dat new file mode 100644 index 00000000..c6991cce --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.dat @@ -0,0 +1,322 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:34 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name ff_0p99v_0p99v_125c +S N +geomx 21.1650 +geomy 100.9400 +volt 0.9900 +temp 125.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.0917 +ttcenacenya 0.0905 +ttenacenyapu 0.1191 +ttenacenyanu 0.1399 +tdftrambypcenya 0.0912 +taaaya 0.0751 +ttaaaya 0.0751 +ttenaayapu 0.1377 +ttenaayanu 0.1335 +tdftrambypaya 0.0823 +tcenbcenyb 0.0947 +ttcenbcenyb 0.0939 +ttenbcenybpu 0.1240 +ttenbcenybnu 0.1515 +tdftrambypcenyb 0.0907 +tabayb 0.0753 +ttabayb 0.0779 +ttenbaybpu 0.1447 +ttenbaybnu 0.1398 +tdftrambypayb 0.0822 +taccqa_rd0 0.2718 +taccqa_rd1 0.2724 +taccqa_rd2 0.2724 +taccqa_rd3 0.2729 +taccqa_rd4 0.3149 +taccqa_rd5 0.3516 +taccqa_rd6 0.3900 +taccqa_rd7 0.4267 +taccqa_scan0 0.2718 +taccqa_scan1 0.2724 +taccqa_scan2 0.2724 +taccqa_scan3 0.2729 +taccqa_scan4 0.3149 +taccqa_scan5 0.3516 +taccqa_scan6 0.3900 +taccqa_scan7 0.4267 +tclkasoa_rd0 0.2903 +tclkasoa_rd1 0.2908 +tclkasoa_rd2 0.2909 +tclkasoa_rd3 0.2914 +tclkasoa_rd4 0.3334 +tclkasoa_rd5 0.3700 +tclkasoa_rd6 0.4085 +tclkasoa_rd7 0.4452 +tclkasoa_scan0 0.2903 +tclkasoa_scan1 0.2908 +tclkasoa_scan2 0.2909 +tclkasoa_scan3 0.2914 +tclkasoa_scan4 0.3334 +tclkasoa_scan5 0.3700 +tclkasoa_scan6 0.4085 +tclkasoa_scan7 0.4452 +tclkbsob 0.1594 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 1.7116 +kload_aya 1.4236 +kload_cenyb 1.6712 +kload_ayb 1.4006 +kload_qa 0.5053 +kload_soa 1.3720 +kload_sob 1.4400 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 0.3800 +tcyca_ema1 0.3806 +tcyca_ema2 0.3806 +tcyca_ema3 0.3812 +tcyca_ema4 0.4238 +tcyca_ema5 0.4610 +tcyca_ema6 0.5000 +tcyca_ema7 0.5373 +tcycb_ema0 0.4062 +tcycb_ema1 0.4106 +tcycb_ema2 0.4143 +tcycb_ema3 0.4208 +tcycb_ema4 0.4729 +tcycb_ema5 0.5088 +tcycb_ema6 0.5566 +tcycb_ema7 0.5917 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.1913 +tcracwb_rd1 0.1919 +tcracwb_rd2 0.1920 +tcracwb_rd3 0.1925 +tcracwb_rd4 0.2344 +tcracwb_rd5 0.2711 +tcracwb_rd6 0.3096 +tcracwb_rd7 0.3463 +tcwbcra_wr0 0.2458 +tcwbcra_wr1 0.2501 +tcwbcra_wr2 0.2538 +tcwbcra_wr3 0.2603 +tcwbcra_wr4 0.3115 +tcwbcra_wr5 0.3469 +tcwbcra_wr6 0.3940 +tcwbcra_wr7 0.4286 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.0926 +tckal 0.0897 +tckbh 0.0958 +tckbl 0.0907 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.0902 +taas 0.0928 +tcenbs 0.0960 +tabs 0.0993 +tdbs 0.0373 +temaas 0.4065 +temasas 0.4065 +temabs 0.4461 +ttenas 0.1737 +ttcenas 0.0905 +ttaas 0.0948 +ttenbs 0.2348 +ttcenbs 0.0965 +ttabs 0.1030 +ttdbs 0.0382 +tsias 0.1911 +tseas 0.1911 +tdftrambypas 0.1493 +tdftrambypbs 0.1493 +tsibs 0.0373 +tsebs 0.2348 +tcolldisnas 0.4065 +tcolldisnbs 0.4461 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0398 +tcenaf_ret1nfh 0.4558 +tcenaf_ret1nrh 0.2536 +taah 0.0695 +tcenbh 0.0422 +tcenbf_ret1nfh 0.4558 +tcenbf_ret1nrh 0.2536 +tabh 0.0637 +tdbh 0.0950 +temaah 0.6293 +temasah 0.6293 +temabh 0.6267 +ttenah 0.0764 +ttcenah 0.0410 +ttcenaf_ret1nfh 0.4558 +ttcenaf_ret1nrh 0.2536 +ttaah 0.0695 +ttenbh 0.1045 +ttcenbh 0.0435 +ttcenbf_ret1nfh 0.4558 +ttcenbf_ret1nrh 0.2536 +ttabh 0.0637 +ttdbh 0.0950 +tret1nf_dftrambypfh 0.0241 +tret1nr_dftrambypfh 0.4558 +tret1nf_cenbrh 0.0241 +tret1nf_cenarh 0.0226 +tret1nf_tcenarh 0.0226 +tret1nf_tcenbrh 0.0241 +tret1nr_tcenbrh 0.4558 +tret1nr_tcenarh 0.4162 +tret1nr_cenbrh 0.4558 +tret1nr_cenarh 0.4162 +tsiah 0.0756 +tseah 0.6293 +tdftrambypah 0.6293 +tdftrambypbh 0.4558 +tdftrambypr_ret1nfh 0.4558 +tdftrambypr_ret1nrh 0.2536 +tsibh 0.0950 +tsebh 0.1045 +tcolldisnah 0.6293 +tcolldisnbh 0.6267 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0105 +icap_cena 0.0018 +icap_aa 0.0012 +icap_clkb 0.0106 +icap_cenb 0.0015 +icap_ab 0.0012 +icap_db 0.0019 +icap_emaa 0.0059 +icap_emasa 0.0021 +icap_emab 0.0057 +icap_tena 0.0010 +icap_tcena 0.0016 +icap_taa 0.0014 +icap_tenb 0.0012 +icap_tcenb 0.0016 +icap_tab 0.0014 +icap_tdb 0.0016 +icap_sia 0.0015 +icap_sea 0.0019 +icap_dftrambyp 0.0021 +icap_sib 0.0056 +icap_seb 0.0019 +icap_colldisn 0.0024 +icap_ret1n 0.0035 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 0.047469 +icc_standby_p_chipdisable 0.315359 +icc_standby_c_ret1 0.049704 +icc_standby_p_ret1 0.029192 +icc_standby_c_selective_precharge 0.043909 +icc_standby_p_selective_precharge 0.300193 +icc_c_rd0_a 3.684e-05 +icc_c_rd1_a 3.686e-05 +icc_c_rd2_a 3.688e-05 +icc_c_rd3_a 3.699e-05 +icc_c_rd4_a 3.716e-05 +icc_c_rd5_a 3.721e-05 +icc_c_rd6_a 3.740e-05 +icc_c_rd7_a 3.740e-05 +icc_p_rd0_a 7.939e-04 +icc_p_rd1_a 7.939e-04 +icc_p_rd2_a 7.945e-04 +icc_p_rd3_a 7.945e-04 +icc_p_rd4_a 7.945e-04 +icc_p_rd5_a 7.973e-04 +icc_p_rd6_a 7.989e-04 +icc_p_rd7_a 7.991e-04 +icc_c_wr0_b 4.675e-05 +icc_c_wr1_b 4.677e-05 +icc_c_wr2_b 4.678e-05 +icc_c_wr3_b 4.689e-05 +icc_c_wr4_b 4.706e-05 +icc_c_wr5_b 4.712e-05 +icc_c_wr6_b 4.731e-05 +icc_c_wr7_b 4.731e-05 +icc_p_wr0_b 8.078e-04 +icc_p_wr1_b 8.078e-04 +icc_p_wr2_b 8.084e-04 +icc_p_wr3_b 8.084e-04 +icc_p_wr4_b 8.084e-04 +icc_p_wr5_b 8.112e-04 +icc_p_wr6_b 8.128e-04 +icc_p_wr7_b 8.130e-04 +icc_c_desela 0.000e+00 +icc_p_desela 6.071e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 1.273e-04 +icc_c_peak 3.469816 +icc_p_peak 17.441054 +icc_c_inrush 2.619715 +icc_p_inrush 12.101938 diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.lib b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.lib new file mode 100644 index 00000000..0ea64d53 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.lib @@ -0,0 +1,13667 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Mon Nov 11 12:00:11 2019 + * + * Instance Options: + * Instance Name: rf2_32x19_wm0 + * Number of Words: 32 + * Number of Bits: 19 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: off + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_ff_0p99v_0p99v_125c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Mon Nov 11 12:00:11 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : 125; + nom_voltage : 0.99; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x19_wm0_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x19_wm0_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_QA) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_DB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.99); + voltage_map (VDDPE, 0.99); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(ff_0p99v_0p99v_125c) { + process : 1; + temperature : 125; + voltage : 0.99; + tree_type : balanced_tree; + } + default_operating_conditions : ff_0p99v_0p99v_125c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x19_wm0) { + area : 2136.395100; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 20.910869; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 14.721653; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 0.078896; + memory() { + type : ram; + address_width : 5; + word_width : 19; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.051836, 0.054638, 0.057189, 0.063491, 0.079276, 0.103875, 0.156245", \ + "0.052200, 0.055480, 0.058323, 0.063994, 0.079775, 0.105271, 0.158528", \ + "0.054084, 0.056892, 0.059593, 0.065761, 0.081427, 0.107020, 0.158302", \ + "0.056717, 0.059817, 0.062587, 0.068432, 0.084150, 0.109659, 0.160336", \ + "0.068053, 0.070796, 0.073683, 0.079740, 0.095366, 0.121859, 0.172302", \ + "0.070713, 0.073718, 0.076272, 0.082184, 0.098196, 0.123181, 0.175557", \ + "0.079224, 0.082328, 0.085053, 0.090953, 0.106599, 0.130922, 0.180958" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045001, 0.047704, 0.050165, 0.056244, 0.071470, 0.095198, 0.145714", \ + "0.045352, 0.048516, 0.051258, 0.056729, 0.071951, 0.096544, 0.147916", \ + "0.047169, 0.049878, 0.052483, 0.058433, 0.073544, 0.098232, 0.147698", \ + "0.049709, 0.052699, 0.055372, 0.061009, 0.076171, 0.100777, 0.149660", \ + "0.060644, 0.063289, 0.066074, 0.071917, 0.086990, 0.112545, 0.161203", \ + "0.063210, 0.066108, 0.068572, 0.074274, 0.089720, 0.113821, 0.164342", \ + "0.071420, 0.074414, 0.077042, 0.082733, 0.097825, 0.121287, 0.169552" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.057050, 0.061333, 0.064739, 0.073219, 0.097329, 0.138131, 0.216564", \ + "0.058142, 0.062578, 0.066123, 0.074091, 0.098021, 0.139758, 0.220294", \ + "0.059806, 0.063900, 0.067336, 0.075578, 0.099798, 0.141047, 0.222949", \ + "0.063503, 0.067837, 0.071354, 0.079708, 0.103380, 0.145363, 0.225627", \ + "0.075769, 0.079821, 0.083108, 0.091666, 0.115170, 0.157341, 0.240950", \ + "0.080355, 0.084214, 0.087878, 0.096287, 0.120243, 0.161330, 0.238859", \ + "0.094962, 0.098990, 0.102680, 0.111035, 0.136188, 0.175489, 0.255425" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.049528, 0.053659, 0.056944, 0.065125, 0.088381, 0.127739, 0.203395", \ + "0.050581, 0.054860, 0.058279, 0.065965, 0.089048, 0.129308, 0.206992", \ + "0.052186, 0.056135, 0.059449, 0.067399, 0.090762, 0.130551, 0.209554", \ + "0.055752, 0.059933, 0.063325, 0.071383, 0.094218, 0.134715, 0.212137", \ + "0.067584, 0.071492, 0.074663, 0.082918, 0.105590, 0.146269, 0.226918", \ + "0.072008, 0.075730, 0.079264, 0.087376, 0.110484, 0.150116, 0.224901", \ + "0.086097, 0.089983, 0.093542, 0.101601, 0.125864, 0.163774, 0.240881" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052413, 0.055124, 0.057589, 0.063970, 0.079665, 0.103987, 0.155511", \ + "0.052495, 0.055558, 0.058158, 0.064108, 0.080112, 0.105092, 0.158607", \ + "0.053967, 0.057044, 0.059991, 0.066176, 0.081601, 0.106483, 0.159059", \ + "0.056920, 0.060191, 0.062829, 0.068758, 0.084314, 0.109161, 0.161759", \ + "0.067251, 0.070496, 0.073957, 0.078982, 0.095347, 0.120029, 0.171692", \ + "0.070590, 0.073617, 0.076337, 0.082149, 0.098294, 0.122933, 0.172370", \ + "0.079578, 0.082593, 0.085358, 0.091166, 0.106654, 0.131430, 0.181207" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045502, 0.048117, 0.050495, 0.056650, 0.071789, 0.095250, 0.144950", \ + "0.045581, 0.048535, 0.051043, 0.056783, 0.072221, 0.096316, 0.147937", \ + "0.047000, 0.049969, 0.052811, 0.058778, 0.073656, 0.097658, 0.148373", \ + "0.049850, 0.053004, 0.055549, 0.061269, 0.076274, 0.100242, 0.150978", \ + "0.059815, 0.062945, 0.066284, 0.071131, 0.086916, 0.110724, 0.160559", \ + "0.063035, 0.065956, 0.068579, 0.074185, 0.089759, 0.113525, 0.161213", \ + "0.071705, 0.074613, 0.077281, 0.082883, 0.097823, 0.121722, 0.169737" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056125, 0.059841, 0.063386, 0.071692, 0.095552, 0.136414, 0.214237", \ + "0.057036, 0.061460, 0.065004, 0.072973, 0.096903, 0.138640, 0.218395", \ + "0.058722, 0.062744, 0.066256, 0.074491, 0.098713, 0.139950, 0.221864", \ + "0.062503, 0.066823, 0.070323, 0.078481, 0.102262, 0.144030, 0.223932", \ + "0.074322, 0.078638, 0.082158, 0.090497, 0.114130, 0.156222, 0.237967", \ + "0.079219, 0.083041, 0.086602, 0.094932, 0.119113, 0.160324, 0.239300", \ + "0.094373, 0.098366, 0.101891, 0.110385, 0.134368, 0.173579, 0.253583" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048724, 0.052309, 0.055729, 0.063740, 0.086755, 0.126171, 0.201239", \ + "0.049603, 0.053870, 0.057290, 0.064976, 0.088059, 0.128318, 0.205250", \ + "0.051229, 0.055110, 0.058497, 0.066440, 0.089805, 0.129583, 0.208597", \ + "0.054876, 0.059043, 0.062420, 0.070289, 0.093228, 0.133518, 0.210591", \ + "0.066278, 0.070440, 0.073836, 0.081880, 0.104676, 0.145279, 0.224129", \ + "0.071001, 0.074688, 0.078123, 0.086158, 0.109483, 0.149235, 0.225415", \ + "0.085619, 0.089471, 0.092870, 0.101064, 0.124198, 0.162021, 0.239193" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080281, 0.083133, 0.085619, 0.091219, 0.105974, 0.129453, 0.176203", \ + "0.080599, 0.083451, 0.085937, 0.091537, 0.106292, 0.129771, 0.176521", \ + "0.081617, 0.084469, 0.086955, 0.092555, 0.107310, 0.130789, 0.177539", \ + "0.083132, 0.085984, 0.088470, 0.094070, 0.108825, 0.132304, 0.179054", \ + "0.086142, 0.088994, 0.091480, 0.097080, 0.111835, 0.135314, 0.182064", \ + "0.086347, 0.089199, 0.091685, 0.097285, 0.112040, 0.135519, 0.182269", \ + "0.088163, 0.091015, 0.093501, 0.099101, 0.113856, 0.137335, 0.184085" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069256, 0.072108, 0.074594, 0.080194, 0.094949, 0.118428, 0.165178", \ + "0.069574, 0.072426, 0.074912, 0.080512, 0.095267, 0.118746, 0.165496", \ + "0.070592, 0.073444, 0.075930, 0.081530, 0.096285, 0.119764, 0.166514", \ + "0.072107, 0.074959, 0.077445, 0.083045, 0.097800, 0.121279, 0.168029", \ + "0.075117, 0.077969, 0.080455, 0.086055, 0.100810, 0.124289, 0.171039", \ + "0.075322, 0.078174, 0.080660, 0.086260, 0.101015, 0.124494, 0.171244", \ + "0.077138, 0.079990, 0.082476, 0.088076, 0.102831, 0.126310, 0.173060" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889", \ + "0.011459, 0.014480, 0.017602, 0.025593, 0.049062, 0.091106, 0.177889" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090645, 0.094406, 0.097743, 0.105494, 0.127858, 0.164928, 0.239008", \ + "0.091221, 0.094982, 0.098319, 0.106070, 0.128434, 0.165504, 0.239584", \ + "0.092588, 0.096349, 0.099686, 0.107437, 0.129801, 0.166871, 0.240951", \ + "0.095163, 0.098924, 0.102261, 0.110012, 0.132376, 0.169446, 0.243526", \ + "0.104275, 0.108036, 0.111373, 0.119124, 0.141488, 0.178558, 0.252638", \ + "0.108117, 0.111878, 0.115215, 0.122966, 0.145330, 0.182400, 0.256480", \ + "0.117348, 0.121109, 0.124446, 0.132197, 0.154561, 0.191631, 0.265711" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.078076, 0.081837, 0.085174, 0.092925, 0.115289, 0.152359, 0.226439", \ + "0.078652, 0.082413, 0.085750, 0.093501, 0.115865, 0.152935, 0.227015", \ + "0.080019, 0.083780, 0.087117, 0.094868, 0.117232, 0.154302, 0.228382", \ + "0.082594, 0.086355, 0.089692, 0.097443, 0.119807, 0.156877, 0.230957", \ + "0.091706, 0.095467, 0.098804, 0.106555, 0.128919, 0.165989, 0.240069", \ + "0.095548, 0.099309, 0.102646, 0.110397, 0.132761, 0.169831, 0.243911", \ + "0.104779, 0.108540, 0.111877, 0.119628, 0.141992, 0.179062, 0.253142" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325", \ + "0.012583, 0.017070, 0.021832, 0.034052, 0.073626, 0.141267, 0.276325" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119512, 0.123272, 0.126642, 0.134422, 0.156802, 0.193872, 0.268112", \ + "0.120012, 0.123772, 0.127142, 0.134922, 0.157302, 0.194372, 0.268612", \ + "0.120992, 0.124752, 0.128122, 0.135902, 0.158282, 0.195352, 0.269592", \ + "0.123002, 0.126762, 0.130132, 0.137912, 0.160292, 0.197362, 0.271602", \ + "0.124952, 0.128712, 0.132082, 0.139862, 0.162242, 0.199312, 0.273552", \ + "0.125962, 0.129722, 0.133092, 0.140872, 0.163252, 0.200322, 0.274562", \ + "0.125012, 0.128772, 0.132142, 0.139922, 0.162302, 0.199372, 0.273612" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.103167, 0.106927, 0.110297, 0.118077, 0.140457, 0.177527, 0.251767", \ + "0.103667, 0.107427, 0.110797, 0.118577, 0.140957, 0.178027, 0.252267", \ + "0.104647, 0.108407, 0.111777, 0.119557, 0.141937, 0.179007, 0.253247", \ + "0.106657, 0.110417, 0.113787, 0.121567, 0.143947, 0.181017, 0.255257", \ + "0.108607, 0.112367, 0.115737, 0.123517, 0.145897, 0.182967, 0.257207", \ + "0.109617, 0.113377, 0.116747, 0.124527, 0.146907, 0.183977, 0.258217", \ + "0.108667, 0.112427, 0.115797, 0.123577, 0.145957, 0.183027, 0.257267" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285", \ + "0.012399, 0.017064, 0.021736, 0.034147, 0.073724, 0.141061, 0.276285" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109614, 0.112390, 0.114910, 0.120530, 0.135280, 0.158780, 0.205510", \ + "0.110456, 0.113232, 0.115752, 0.121372, 0.136122, 0.159622, 0.206352", \ + "0.111328, 0.114104, 0.116624, 0.122244, 0.136994, 0.160494, 0.207224", \ + "0.113460, 0.116236, 0.118756, 0.124376, 0.139126, 0.162626, 0.209356", \ + "0.123350, 0.126126, 0.128646, 0.134266, 0.149016, 0.172516, 0.219246", \ + "0.127030, 0.129806, 0.132326, 0.137946, 0.152696, 0.176196, 0.222926", \ + "0.139850, 0.142626, 0.145146, 0.150766, 0.165516, 0.189016, 0.235746" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.094690, 0.097466, 0.099986, 0.105606, 0.120356, 0.143856, 0.190586", \ + "0.095532, 0.098308, 0.100828, 0.106448, 0.121198, 0.144698, 0.191428", \ + "0.096404, 0.099180, 0.101700, 0.107320, 0.122070, 0.145570, 0.192300", \ + "0.098536, 0.101312, 0.103832, 0.109452, 0.124202, 0.147702, 0.194432", \ + "0.108426, 0.111202, 0.113722, 0.119342, 0.134092, 0.157592, 0.204322", \ + "0.112106, 0.114882, 0.117402, 0.123022, 0.137772, 0.161272, 0.208002", \ + "0.124926, 0.127702, 0.130222, 0.135842, 0.150592, 0.174092, 0.220822" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429", \ + "0.011300, 0.014561, 0.017561, 0.025070, 0.048960, 0.090678, 0.175429" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.057451, 0.060756, 0.062867, 0.068325, 0.083683, 0.106955, 0.153316", \ + "0.058138, 0.061443, 0.063554, 0.069012, 0.084370, 0.107642, 0.154003", \ + "0.060051, 0.063356, 0.065467, 0.070925, 0.086283, 0.109555, 0.155916", \ + "0.062193, 0.065498, 0.067609, 0.073067, 0.088425, 0.111697, 0.158058", \ + "0.069651, 0.072956, 0.075067, 0.080525, 0.095883, 0.119155, 0.165516", \ + "0.072380, 0.075685, 0.077796, 0.083254, 0.098612, 0.121884, 0.168245", \ + "0.076754, 0.080059, 0.082170, 0.087628, 0.102986, 0.126258, 0.172619" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.049378, 0.052683, 0.054794, 0.060252, 0.075610, 0.098882, 0.145243", \ + "0.050065, 0.053370, 0.055481, 0.060939, 0.076297, 0.099569, 0.145930", \ + "0.051978, 0.055283, 0.057394, 0.062852, 0.078210, 0.101482, 0.147843", \ + "0.054120, 0.057425, 0.059536, 0.064994, 0.080352, 0.103624, 0.149985", \ + "0.061578, 0.064883, 0.066994, 0.072452, 0.087810, 0.111082, 0.157443", \ + "0.064307, 0.067612, 0.069723, 0.075181, 0.090539, 0.113811, 0.160172", \ + "0.068681, 0.071986, 0.074097, 0.079555, 0.094913, 0.118185, 0.164546" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419", \ + "0.011424, 0.014620, 0.017449, 0.025035, 0.049457, 0.090995, 0.176419" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.063732, 0.067453, 0.070823, 0.078403, 0.100636, 0.137668, 0.211618", \ + "0.064540, 0.068261, 0.071631, 0.079211, 0.101444, 0.138476, 0.212426", \ + "0.065780, 0.069501, 0.072871, 0.080451, 0.102684, 0.139716, 0.213666", \ + "0.068610, 0.072331, 0.075701, 0.083281, 0.105514, 0.142546, 0.216496", \ + "0.076513, 0.080234, 0.083604, 0.091184, 0.113417, 0.150449, 0.224399", \ + "0.078127, 0.081848, 0.085218, 0.092798, 0.115031, 0.152063, 0.226013", \ + "0.085399, 0.089120, 0.092490, 0.100070, 0.122303, 0.159335, 0.233285" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.054706, 0.058427, 0.061797, 0.069377, 0.091610, 0.128642, 0.202592", \ + "0.055514, 0.059235, 0.062605, 0.070185, 0.092418, 0.129450, 0.203400", \ + "0.056754, 0.060475, 0.063845, 0.071425, 0.093658, 0.130690, 0.204640", \ + "0.059584, 0.063305, 0.066675, 0.074255, 0.096488, 0.133520, 0.207470", \ + "0.067487, 0.071208, 0.074578, 0.082158, 0.104391, 0.141423, 0.215373", \ + "0.069101, 0.072822, 0.076192, 0.083772, 0.106005, 0.143037, 0.216987", \ + "0.076373, 0.080094, 0.083464, 0.091044, 0.113277, 0.150309, 0.224259" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574", \ + "0.012084, 0.016621, 0.021190, 0.033614, 0.073318, 0.140649, 0.274574" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007036, 0.007043, 0.007050, 0.007057, 0.007064, 0.007071, 0.007078", \ + "0.007078, 0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120", \ + "0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128", \ + "0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128, 0.007135", \ + "0.007168, 0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211", \ + "0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218", \ + "0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218, 0.007226" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007205, 0.007212, 0.007219, 0.007226, 0.007233, 0.007241, 0.007248", \ + "0.007889, 0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937", \ + "0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945", \ + "0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953", \ + "0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961", \ + "0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961, 0.007969", \ + "0.009026, 0.009035, 0.009044, 0.009053, 0.009062, 0.009071, 0.009081" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x19_wm0_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047701, 0.050578, 0.052816, 0.058001, 0.071459, 0.092957, 0.136425", \ + "0.048671, 0.051455, 0.053728, 0.058720, 0.072546, 0.094169, 0.140120", \ + "0.050875, 0.053600, 0.056014, 0.061023, 0.074770, 0.096471, 0.142640", \ + "0.053520, 0.056170, 0.058494, 0.063654, 0.077208, 0.098580, 0.142199", \ + "0.064189, 0.066841, 0.068912, 0.074160, 0.087818, 0.108987, 0.152143", \ + "0.069784, 0.072530, 0.074841, 0.080070, 0.093409, 0.115000, 0.157771", \ + "0.081937, 0.084591, 0.087025, 0.092165, 0.105370, 0.125498, 0.168155" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.041411, 0.044186, 0.046345, 0.051346, 0.064328, 0.085065, 0.126994", \ + "0.042347, 0.045032, 0.047225, 0.052041, 0.065377, 0.086234, 0.130559", \ + "0.044473, 0.047102, 0.049430, 0.054262, 0.067522, 0.088455, 0.132989", \ + "0.047024, 0.049581, 0.051823, 0.056800, 0.069874, 0.090489, 0.132564", \ + "0.057315, 0.059873, 0.061871, 0.066933, 0.080108, 0.100528, 0.142156", \ + "0.062713, 0.065362, 0.067591, 0.072634, 0.085501, 0.106328, 0.147585", \ + "0.074436, 0.076995, 0.079343, 0.084301, 0.097039, 0.116454, 0.157602" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043233, 0.046824, 0.049824, 0.056934, 0.077248, 0.111569, 0.178461", \ + "0.043706, 0.047280, 0.050130, 0.057297, 0.076932, 0.111609, 0.178924", \ + "0.045686, 0.049200, 0.052155, 0.059265, 0.079074, 0.114571, 0.184653", \ + "0.048938, 0.052518, 0.055515, 0.062617, 0.082937, 0.117192, 0.182970", \ + "0.061669, 0.065117, 0.068171, 0.075078, 0.095018, 0.129577, 0.200044", \ + "0.067174, 0.070619, 0.073631, 0.080562, 0.100849, 0.134413, 0.204304", \ + "0.083687, 0.087046, 0.090266, 0.096996, 0.117147, 0.149917, 0.216158" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.037532, 0.040996, 0.043890, 0.050748, 0.070343, 0.103450, 0.167973", \ + "0.037989, 0.041436, 0.044185, 0.051098, 0.070038, 0.103488, 0.168420", \ + "0.039898, 0.043288, 0.046139, 0.052997, 0.072105, 0.106345, 0.173947", \ + "0.043035, 0.046489, 0.049379, 0.056230, 0.075831, 0.108874, 0.172323", \ + "0.055315, 0.058642, 0.061587, 0.068250, 0.087485, 0.120820, 0.188792", \ + "0.060626, 0.063949, 0.066854, 0.073540, 0.093109, 0.125485, 0.192902", \ + "0.076554, 0.079795, 0.082900, 0.089392, 0.108830, 0.140440, 0.204336" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.049688, 0.052318, 0.054521, 0.059653, 0.072909, 0.094732, 0.140617", \ + "0.050514, 0.053360, 0.055912, 0.060939, 0.074322, 0.096000, 0.141340", \ + "0.052459, 0.055203, 0.057522, 0.062687, 0.076243, 0.097426, 0.143578", \ + "0.055256, 0.057906, 0.060227, 0.065264, 0.079158, 0.100133, 0.144787", \ + "0.065104, 0.067748, 0.070142, 0.075082, 0.088997, 0.109894, 0.154855", \ + "0.071825, 0.074504, 0.076833, 0.082297, 0.095521, 0.117407, 0.161974", \ + "0.084692, 0.087350, 0.089705, 0.094832, 0.108459, 0.127984, 0.170743" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043137, 0.045673, 0.047798, 0.052748, 0.065535, 0.086586, 0.130847", \ + "0.043933, 0.046678, 0.049140, 0.053989, 0.066899, 0.087809, 0.131544", \ + "0.045809, 0.048456, 0.050692, 0.055675, 0.068752, 0.089185, 0.133702", \ + "0.048507, 0.051063, 0.053302, 0.058161, 0.071563, 0.091795, 0.134869", \ + "0.058006, 0.060557, 0.062867, 0.067631, 0.081053, 0.101211, 0.144581", \ + "0.064490, 0.067074, 0.069321, 0.074591, 0.087347, 0.108458, 0.151448", \ + "0.076901, 0.079465, 0.081737, 0.086682, 0.099826, 0.118660, 0.159906" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.044794, 0.048135, 0.051187, 0.058293, 0.077898, 0.112194, 0.179297", \ + "0.045757, 0.048995, 0.052220, 0.059053, 0.079169, 0.113169, 0.180167", \ + "0.047878, 0.051232, 0.054301, 0.061204, 0.080898, 0.115949, 0.183828", \ + "0.050937, 0.054617, 0.057535, 0.064673, 0.084478, 0.119859, 0.190620", \ + "0.061245, 0.064618, 0.067559, 0.074677, 0.094897, 0.130266, 0.197128", \ + "0.068428, 0.071863, 0.074878, 0.081823, 0.102276, 0.136063, 0.206813", \ + "0.084810, 0.088264, 0.091271, 0.098386, 0.118300, 0.151126, 0.217841" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.038888, 0.042110, 0.045054, 0.051909, 0.070819, 0.103902, 0.168629", \ + "0.039817, 0.042939, 0.046050, 0.052641, 0.072046, 0.104843, 0.169469", \ + "0.041862, 0.045098, 0.048058, 0.054717, 0.073713, 0.107524, 0.173000", \ + "0.044813, 0.048363, 0.051178, 0.058063, 0.077166, 0.111295, 0.179551", \ + "0.054756, 0.058010, 0.060847, 0.067713, 0.087217, 0.121334, 0.185830", \ + "0.061685, 0.064999, 0.067907, 0.074606, 0.094335, 0.126926, 0.195171", \ + "0.077487, 0.080819, 0.083720, 0.090582, 0.109791, 0.141456, 0.205809" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052404, 0.055482, 0.057375, 0.062256, 0.075881, 0.096512, 0.137530", \ + "0.053063, 0.056141, 0.058034, 0.062915, 0.076540, 0.097171, 0.138189", \ + "0.054957, 0.058035, 0.059928, 0.064809, 0.078434, 0.099065, 0.140083", \ + "0.057077, 0.060155, 0.062048, 0.066929, 0.080554, 0.101185, 0.142203", \ + "0.064393, 0.067471, 0.069364, 0.074245, 0.087870, 0.108501, 0.149519", \ + "0.067284, 0.070362, 0.072255, 0.077136, 0.090761, 0.111392, 0.152410", \ + "0.071163, 0.074241, 0.076134, 0.081015, 0.094640, 0.115271, 0.156289" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.044502, 0.047539, 0.049307, 0.053961, 0.066827, 0.086197, 0.124715", \ + "0.045185, 0.048222, 0.049990, 0.054644, 0.067510, 0.086880, 0.125398", \ + "0.047080, 0.050117, 0.051885, 0.056539, 0.069405, 0.088775, 0.127293", \ + "0.049206, 0.052243, 0.054011, 0.058665, 0.071531, 0.090901, 0.129419", \ + "0.056590, 0.059627, 0.061395, 0.066049, 0.078915, 0.098285, 0.136803", \ + "0.059408, 0.062445, 0.064213, 0.068867, 0.081733, 0.101103, 0.139621", \ + "0.063419, 0.066456, 0.068224, 0.072878, 0.085744, 0.105114, 0.143632" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855", \ + "0.010311, 0.013172, 0.015725, 0.022304, 0.043804, 0.081166, 0.156855" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056986, 0.060198, 0.063118, 0.069447, 0.088060, 0.119155, 0.181355", \ + "0.057796, 0.061008, 0.063928, 0.070257, 0.088870, 0.119965, 0.182165", \ + "0.059137, 0.062349, 0.065269, 0.071598, 0.090211, 0.121306, 0.183506", \ + "0.061961, 0.065173, 0.068093, 0.074422, 0.093035, 0.124130, 0.186330", \ + "0.069867, 0.073079, 0.075999, 0.082328, 0.100941, 0.132036, 0.194236", \ + "0.071267, 0.074479, 0.077399, 0.083728, 0.102341, 0.133436, 0.195636", \ + "0.078624, 0.081836, 0.084756, 0.091085, 0.109698, 0.140793, 0.202993" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047898, 0.051072, 0.053852, 0.060083, 0.078249, 0.108714, 0.169724", \ + "0.048733, 0.051907, 0.054687, 0.060918, 0.079084, 0.109549, 0.170559", \ + "0.049966, 0.053140, 0.055920, 0.062151, 0.080317, 0.110782, 0.171792", \ + "0.052764, 0.055938, 0.058718, 0.064949, 0.083115, 0.113580, 0.174590", \ + "0.060769, 0.063943, 0.066723, 0.072954, 0.091120, 0.121585, 0.182595", \ + "0.062060, 0.065234, 0.068014, 0.074245, 0.092411, 0.122876, 0.183886", \ + "0.069351, 0.072525, 0.075305, 0.081536, 0.099702, 0.130167, 0.191177" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993", \ + "0.010162, 0.013868, 0.017757, 0.028201, 0.061936, 0.118905, 0.233993" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007036, 0.007043, 0.007050, 0.007057, 0.007064, 0.007071, 0.007078", \ + "0.007078, 0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120", \ + "0.007085, 0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128", \ + "0.007092, 0.007099, 0.007106, 0.007113, 0.007120, 0.007128, 0.007135", \ + "0.007168, 0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211", \ + "0.007175, 0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218", \ + "0.007182, 0.007190, 0.007197, 0.007204, 0.007211, 0.007218, 0.007226" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007205, 0.007212, 0.007219, 0.007226, 0.007233, 0.007241, 0.007248", \ + "0.007889, 0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937", \ + "0.007897, 0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945", \ + "0.007905, 0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953", \ + "0.007913, 0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961", \ + "0.007921, 0.007929, 0.007937, 0.007945, 0.007953, 0.007961, 0.007969", \ + "0.009026, 0.009035, 0.009044, 0.009053, 0.009062, 0.009071, 0.009081" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116536, 0.119106, 0.121366, 0.126396, 0.139536, 0.160356, 0.201756", \ + "0.117056, 0.119626, 0.121886, 0.126916, 0.140056, 0.160876, 0.202276", \ + "0.117836, 0.120406, 0.122666, 0.127696, 0.140836, 0.161656, 0.203056", \ + "0.119686, 0.122256, 0.124516, 0.129546, 0.142686, 0.163506, 0.204906", \ + "0.122396, 0.124966, 0.127226, 0.132256, 0.145396, 0.166216, 0.207616", \ + "0.122586, 0.125156, 0.127416, 0.132446, 0.145586, 0.166406, 0.207806", \ + "0.124686, 0.127256, 0.129516, 0.134546, 0.147686, 0.168506, 0.209906" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099168, 0.101608, 0.103718, 0.108458, 0.120828, 0.140448, 0.179298", \ + "0.099588, 0.102028, 0.104138, 0.108878, 0.121248, 0.140868, 0.179718", \ + "0.100468, 0.102908, 0.105018, 0.109758, 0.122128, 0.141748, 0.180598", \ + "0.102208, 0.104648, 0.106758, 0.111498, 0.123868, 0.143488, 0.182338", \ + "0.104868, 0.107308, 0.109418, 0.114158, 0.126528, 0.146148, 0.184998", \ + "0.105138, 0.107578, 0.109688, 0.114428, 0.126798, 0.146418, 0.185268", \ + "0.107188, 0.109628, 0.111738, 0.116478, 0.128848, 0.148468, 0.187318" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111070, 0.114215, 0.117025, 0.123565, 0.142325, 0.173465, 0.235835", \ + "0.111654, 0.114799, 0.117609, 0.124149, 0.142909, 0.174049, 0.236419", \ + "0.113075, 0.116220, 0.119030, 0.125570, 0.144330, 0.175470, 0.237840", \ + "0.115765, 0.118910, 0.121720, 0.128260, 0.147020, 0.178160, 0.240530", \ + "0.125195, 0.128340, 0.131150, 0.137690, 0.156450, 0.187590, 0.249960", \ + "0.128945, 0.132090, 0.134900, 0.141440, 0.160200, 0.191340, 0.253710", \ + "0.138445, 0.141590, 0.144400, 0.150940, 0.169700, 0.200840, 0.263210" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093620, 0.096695, 0.099442, 0.105762, 0.124102, 0.154652, 0.215852", \ + "0.094068, 0.097143, 0.099890, 0.106210, 0.124550, 0.155100, 0.216300", \ + "0.095655, 0.098730, 0.101477, 0.107797, 0.126137, 0.156687, 0.217887", \ + "0.098262, 0.101337, 0.104084, 0.110404, 0.128744, 0.159294, 0.220494", \ + "0.107722, 0.110797, 0.113544, 0.119864, 0.138204, 0.168754, 0.229954", \ + "0.111442, 0.114517, 0.117264, 0.123584, 0.141924, 0.172474, 0.233674", \ + "0.120912, 0.123987, 0.126734, 0.133054, 0.151394, 0.181944, 0.243144" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107836, 0.110990, 0.113811, 0.120341, 0.139071, 0.170191, 0.232581", \ + "0.108413, 0.111567, 0.114388, 0.120918, 0.139648, 0.170768, 0.233158", \ + "0.109178, 0.112332, 0.115153, 0.121683, 0.140413, 0.171533, 0.233923", \ + "0.111351, 0.114505, 0.117326, 0.123856, 0.142586, 0.173706, 0.236096", \ + "0.113411, 0.116565, 0.119386, 0.125916, 0.144646, 0.175766, 0.238156", \ + "0.114261, 0.117415, 0.120236, 0.126766, 0.145496, 0.176616, 0.239006", \ + "0.113661, 0.116815, 0.119636, 0.126166, 0.144896, 0.176016, 0.238406" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090730, 0.093792, 0.096542, 0.102853, 0.121173, 0.151703, 0.212803", \ + "0.091275, 0.094337, 0.097087, 0.103398, 0.121718, 0.152248, 0.213348", \ + "0.092234, 0.095296, 0.098046, 0.104357, 0.122677, 0.153207, 0.214307", \ + "0.094086, 0.097148, 0.099898, 0.106209, 0.124529, 0.155059, 0.216159", \ + "0.096364, 0.099426, 0.102176, 0.108487, 0.126807, 0.157337, 0.218437", \ + "0.097260, 0.100322, 0.103072, 0.109383, 0.127703, 0.158233, 0.219333", \ + "0.096557, 0.099619, 0.102369, 0.108680, 0.127000, 0.157530, 0.218630" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109883, 0.112455, 0.114745, 0.119795, 0.132925, 0.153785, 0.195115", \ + "0.110705, 0.113277, 0.115567, 0.120617, 0.133747, 0.154607, 0.195937", \ + "0.111515, 0.114087, 0.116377, 0.121427, 0.134557, 0.155417, 0.196747", \ + "0.113635, 0.116207, 0.118497, 0.123547, 0.136677, 0.157537, 0.198867", \ + "0.123555, 0.126127, 0.128417, 0.133467, 0.146597, 0.167457, 0.208787", \ + "0.127105, 0.129677, 0.131967, 0.137017, 0.150147, 0.171007, 0.212337", \ + "0.139945, 0.142517, 0.144807, 0.149857, 0.162987, 0.183847, 0.225177" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093466, 0.095912, 0.098045, 0.102795, 0.115175, 0.134715, 0.173625", \ + "0.094154, 0.096600, 0.098733, 0.103483, 0.115863, 0.135403, 0.174313", \ + "0.095058, 0.097504, 0.099637, 0.104387, 0.116767, 0.136307, 0.175217", \ + "0.097085, 0.099531, 0.101664, 0.106414, 0.118794, 0.138334, 0.177244", \ + "0.107055, 0.109501, 0.111634, 0.116384, 0.128764, 0.148304, 0.187214", \ + "0.110605, 0.113051, 0.115184, 0.119934, 0.132314, 0.151854, 0.190764", \ + "0.123435, 0.125881, 0.128014, 0.132764, 0.145144, 0.164684, 0.203594" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116536, 0.119106, 0.121366, 0.126396, 0.139536, 0.160356, 0.201756", \ + "0.117056, 0.119626, 0.121886, 0.126916, 0.140056, 0.160876, 0.202276", \ + "0.117836, 0.120406, 0.122666, 0.127696, 0.140836, 0.161656, 0.203056", \ + "0.119686, 0.122256, 0.124516, 0.129546, 0.142686, 0.163506, 0.204906", \ + "0.122396, 0.124966, 0.127226, 0.132256, 0.145396, 0.166216, 0.207616", \ + "0.122586, 0.125156, 0.127416, 0.132446, 0.145586, 0.166406, 0.207806", \ + "0.124686, 0.127256, 0.129516, 0.134546, 0.147686, 0.168506, 0.209906" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099168, 0.101608, 0.103718, 0.108458, 0.120828, 0.140448, 0.179298", \ + "0.099588, 0.102028, 0.104138, 0.108878, 0.121248, 0.140868, 0.179718", \ + "0.100468, 0.102908, 0.105018, 0.109758, 0.122128, 0.141748, 0.180598", \ + "0.102208, 0.104648, 0.106758, 0.111498, 0.123868, 0.143488, 0.182338", \ + "0.104868, 0.107308, 0.109418, 0.114158, 0.126528, 0.146148, 0.184998", \ + "0.105138, 0.107578, 0.109688, 0.114428, 0.126798, 0.146418, 0.185268", \ + "0.107188, 0.109628, 0.111738, 0.116478, 0.128848, 0.148468, 0.187318" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111070, 0.114215, 0.117025, 0.123565, 0.142325, 0.173465, 0.235835", \ + "0.111654, 0.114799, 0.117609, 0.124149, 0.142909, 0.174049, 0.236419", \ + "0.113075, 0.116220, 0.119030, 0.125570, 0.144330, 0.175470, 0.237840", \ + "0.115765, 0.118910, 0.121720, 0.128260, 0.147020, 0.178160, 0.240530", \ + "0.125195, 0.128340, 0.131150, 0.137690, 0.156450, 0.187590, 0.249960", \ + "0.128945, 0.132090, 0.134900, 0.141440, 0.160200, 0.191340, 0.253710", \ + "0.138445, 0.141590, 0.144400, 0.150940, 0.169700, 0.200840, 0.263210" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093620, 0.096695, 0.099442, 0.105762, 0.124102, 0.154652, 0.215852", \ + "0.094068, 0.097143, 0.099890, 0.106210, 0.124550, 0.155100, 0.216300", \ + "0.095655, 0.098730, 0.101477, 0.107797, 0.126137, 0.156687, 0.217887", \ + "0.098262, 0.101337, 0.104084, 0.110404, 0.128744, 0.159294, 0.220494", \ + "0.107722, 0.110797, 0.113544, 0.119864, 0.138204, 0.168754, 0.229954", \ + "0.111442, 0.114517, 0.117264, 0.123584, 0.141924, 0.172474, 0.233674", \ + "0.120912, 0.123987, 0.126734, 0.133054, 0.151394, 0.181944, 0.243144" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107836, 0.110990, 0.113811, 0.120341, 0.139071, 0.170191, 0.232581", \ + "0.108413, 0.111567, 0.114388, 0.120918, 0.139648, 0.170768, 0.233158", \ + "0.109178, 0.112332, 0.115153, 0.121683, 0.140413, 0.171533, 0.233923", \ + "0.111351, 0.114505, 0.117326, 0.123856, 0.142586, 0.173706, 0.236096", \ + "0.113411, 0.116565, 0.119386, 0.125916, 0.144646, 0.175766, 0.238156", \ + "0.114261, 0.117415, 0.120236, 0.126766, 0.145496, 0.176616, 0.239006", \ + "0.113661, 0.116815, 0.119636, 0.126166, 0.144896, 0.176016, 0.238406" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090730, 0.093792, 0.096542, 0.102853, 0.121173, 0.151703, 0.212803", \ + "0.091275, 0.094337, 0.097087, 0.103398, 0.121718, 0.152248, 0.213348", \ + "0.092234, 0.095296, 0.098046, 0.104357, 0.122677, 0.153207, 0.214307", \ + "0.094086, 0.097148, 0.099898, 0.106209, 0.124529, 0.155059, 0.216159", \ + "0.096364, 0.099426, 0.102176, 0.108487, 0.126807, 0.157337, 0.218437", \ + "0.097260, 0.100322, 0.103072, 0.109383, 0.127703, 0.158233, 0.219333", \ + "0.096557, 0.099619, 0.102369, 0.108680, 0.127000, 0.157530, 0.218630" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109883, 0.112455, 0.114745, 0.119795, 0.132925, 0.153785, 0.195115", \ + "0.110705, 0.113277, 0.115567, 0.120617, 0.133747, 0.154607, 0.195937", \ + "0.111515, 0.114087, 0.116377, 0.121427, 0.134557, 0.155417, 0.196747", \ + "0.113635, 0.116207, 0.118497, 0.123547, 0.136677, 0.157537, 0.198867", \ + "0.123555, 0.126127, 0.128417, 0.133467, 0.146597, 0.167457, 0.208787", \ + "0.127105, 0.129677, 0.131967, 0.137017, 0.150147, 0.171007, 0.212337", \ + "0.139945, 0.142517, 0.144807, 0.149857, 0.162987, 0.183847, 0.225177" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093466, 0.095912, 0.098045, 0.102795, 0.115175, 0.134715, 0.173625", \ + "0.094154, 0.096600, 0.098733, 0.103483, 0.115863, 0.135403, 0.174313", \ + "0.095058, 0.097504, 0.099637, 0.104387, 0.116767, 0.136307, 0.175217", \ + "0.097085, 0.099531, 0.101664, 0.106414, 0.118794, 0.138334, 0.177244", \ + "0.107055, 0.109501, 0.111634, 0.116384, 0.128764, 0.148304, 0.187214", \ + "0.110605, 0.113051, 0.115184, 0.119934, 0.132314, 0.151854, 0.190764", \ + "0.123435, 0.125881, 0.128014, 0.132764, 0.145144, 0.164684, 0.203594" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116536, 0.119106, 0.121366, 0.126396, 0.139536, 0.160356, 0.201756", \ + "0.117056, 0.119626, 0.121886, 0.126916, 0.140056, 0.160876, 0.202276", \ + "0.117836, 0.120406, 0.122666, 0.127696, 0.140836, 0.161656, 0.203056", \ + "0.119686, 0.122256, 0.124516, 0.129546, 0.142686, 0.163506, 0.204906", \ + "0.122396, 0.124966, 0.127226, 0.132256, 0.145396, 0.166216, 0.207616", \ + "0.122586, 0.125156, 0.127416, 0.132446, 0.145586, 0.166406, 0.207806", \ + "0.124686, 0.127256, 0.129516, 0.134546, 0.147686, 0.168506, 0.209906" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099168, 0.101608, 0.103718, 0.108458, 0.120828, 0.140448, 0.179298", \ + "0.099588, 0.102028, 0.104138, 0.108878, 0.121248, 0.140868, 0.179718", \ + "0.100468, 0.102908, 0.105018, 0.109758, 0.122128, 0.141748, 0.180598", \ + "0.102208, 0.104648, 0.106758, 0.111498, 0.123868, 0.143488, 0.182338", \ + "0.104868, 0.107308, 0.109418, 0.114158, 0.126528, 0.146148, 0.184998", \ + "0.105138, 0.107578, 0.109688, 0.114428, 0.126798, 0.146418, 0.185268", \ + "0.107188, 0.109628, 0.111738, 0.116478, 0.128848, 0.148468, 0.187318" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111070, 0.114215, 0.117025, 0.123565, 0.142325, 0.173465, 0.235835", \ + "0.111654, 0.114799, 0.117609, 0.124149, 0.142909, 0.174049, 0.236419", \ + "0.113075, 0.116220, 0.119030, 0.125570, 0.144330, 0.175470, 0.237840", \ + "0.115765, 0.118910, 0.121720, 0.128260, 0.147020, 0.178160, 0.240530", \ + "0.125195, 0.128340, 0.131150, 0.137690, 0.156450, 0.187590, 0.249960", \ + "0.128945, 0.132090, 0.134900, 0.141440, 0.160200, 0.191340, 0.253710", \ + "0.138445, 0.141590, 0.144400, 0.150940, 0.169700, 0.200840, 0.263210" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093620, 0.096695, 0.099442, 0.105762, 0.124102, 0.154652, 0.215852", \ + "0.094068, 0.097143, 0.099890, 0.106210, 0.124550, 0.155100, 0.216300", \ + "0.095655, 0.098730, 0.101477, 0.107797, 0.126137, 0.156687, 0.217887", \ + "0.098262, 0.101337, 0.104084, 0.110404, 0.128744, 0.159294, 0.220494", \ + "0.107722, 0.110797, 0.113544, 0.119864, 0.138204, 0.168754, 0.229954", \ + "0.111442, 0.114517, 0.117264, 0.123584, 0.141924, 0.172474, 0.233674", \ + "0.120912, 0.123987, 0.126734, 0.133054, 0.151394, 0.181944, 0.243144" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107836, 0.110990, 0.113811, 0.120341, 0.139071, 0.170191, 0.232581", \ + "0.108413, 0.111567, 0.114388, 0.120918, 0.139648, 0.170768, 0.233158", \ + "0.109178, 0.112332, 0.115153, 0.121683, 0.140413, 0.171533, 0.233923", \ + "0.111351, 0.114505, 0.117326, 0.123856, 0.142586, 0.173706, 0.236096", \ + "0.113411, 0.116565, 0.119386, 0.125916, 0.144646, 0.175766, 0.238156", \ + "0.114261, 0.117415, 0.120236, 0.126766, 0.145496, 0.176616, 0.239006", \ + "0.113661, 0.116815, 0.119636, 0.126166, 0.144896, 0.176016, 0.238406" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090730, 0.093792, 0.096542, 0.102853, 0.121173, 0.151703, 0.212803", \ + "0.091275, 0.094337, 0.097087, 0.103398, 0.121718, 0.152248, 0.213348", \ + "0.092234, 0.095296, 0.098046, 0.104357, 0.122677, 0.153207, 0.214307", \ + "0.094086, 0.097148, 0.099898, 0.106209, 0.124529, 0.155059, 0.216159", \ + "0.096364, 0.099426, 0.102176, 0.108487, 0.126807, 0.157337, 0.218437", \ + "0.097260, 0.100322, 0.103072, 0.109383, 0.127703, 0.158233, 0.219333", \ + "0.096557, 0.099619, 0.102369, 0.108680, 0.127000, 0.157530, 0.218630" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109883, 0.112455, 0.114745, 0.119795, 0.132925, 0.153785, 0.195115", \ + "0.110705, 0.113277, 0.115567, 0.120617, 0.133747, 0.154607, 0.195937", \ + "0.111515, 0.114087, 0.116377, 0.121427, 0.134557, 0.155417, 0.196747", \ + "0.113635, 0.116207, 0.118497, 0.123547, 0.136677, 0.157537, 0.198867", \ + "0.123555, 0.126127, 0.128417, 0.133467, 0.146597, 0.167457, 0.208787", \ + "0.127105, 0.129677, 0.131967, 0.137017, 0.150147, 0.171007, 0.212337", \ + "0.139945, 0.142517, 0.144807, 0.149857, 0.162987, 0.183847, 0.225177" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093466, 0.095912, 0.098045, 0.102795, 0.115175, 0.134715, 0.173625", \ + "0.094154, 0.096600, 0.098733, 0.103483, 0.115863, 0.135403, 0.174313", \ + "0.095058, 0.097504, 0.099637, 0.104387, 0.116767, 0.136307, 0.175217", \ + "0.097085, 0.099531, 0.101664, 0.106414, 0.118794, 0.138334, 0.177244", \ + "0.107055, 0.109501, 0.111634, 0.116384, 0.128764, 0.148304, 0.187214", \ + "0.110605, 0.113051, 0.115184, 0.119934, 0.132314, 0.151854, 0.190764", \ + "0.123435, 0.125881, 0.128014, 0.132764, 0.145144, 0.164684, 0.203594" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116536, 0.119106, 0.121366, 0.126396, 0.139536, 0.160356, 0.201756", \ + "0.117056, 0.119626, 0.121886, 0.126916, 0.140056, 0.160876, 0.202276", \ + "0.117836, 0.120406, 0.122666, 0.127696, 0.140836, 0.161656, 0.203056", \ + "0.119686, 0.122256, 0.124516, 0.129546, 0.142686, 0.163506, 0.204906", \ + "0.122396, 0.124966, 0.127226, 0.132256, 0.145396, 0.166216, 0.207616", \ + "0.122586, 0.125156, 0.127416, 0.132446, 0.145586, 0.166406, 0.207806", \ + "0.124686, 0.127256, 0.129516, 0.134546, 0.147686, 0.168506, 0.209906" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099168, 0.101608, 0.103718, 0.108458, 0.120828, 0.140448, 0.179298", \ + "0.099588, 0.102028, 0.104138, 0.108878, 0.121248, 0.140868, 0.179718", \ + "0.100468, 0.102908, 0.105018, 0.109758, 0.122128, 0.141748, 0.180598", \ + "0.102208, 0.104648, 0.106758, 0.111498, 0.123868, 0.143488, 0.182338", \ + "0.104868, 0.107308, 0.109418, 0.114158, 0.126528, 0.146148, 0.184998", \ + "0.105138, 0.107578, 0.109688, 0.114428, 0.126798, 0.146418, 0.185268", \ + "0.107188, 0.109628, 0.111738, 0.116478, 0.128848, 0.148468, 0.187318" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111070, 0.114215, 0.117025, 0.123565, 0.142325, 0.173465, 0.235835", \ + "0.111654, 0.114799, 0.117609, 0.124149, 0.142909, 0.174049, 0.236419", \ + "0.113075, 0.116220, 0.119030, 0.125570, 0.144330, 0.175470, 0.237840", \ + "0.115765, 0.118910, 0.121720, 0.128260, 0.147020, 0.178160, 0.240530", \ + "0.125195, 0.128340, 0.131150, 0.137690, 0.156450, 0.187590, 0.249960", \ + "0.128945, 0.132090, 0.134900, 0.141440, 0.160200, 0.191340, 0.253710", \ + "0.138445, 0.141590, 0.144400, 0.150940, 0.169700, 0.200840, 0.263210" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093620, 0.096695, 0.099442, 0.105762, 0.124102, 0.154652, 0.215852", \ + "0.094068, 0.097143, 0.099890, 0.106210, 0.124550, 0.155100, 0.216300", \ + "0.095655, 0.098730, 0.101477, 0.107797, 0.126137, 0.156687, 0.217887", \ + "0.098262, 0.101337, 0.104084, 0.110404, 0.128744, 0.159294, 0.220494", \ + "0.107722, 0.110797, 0.113544, 0.119864, 0.138204, 0.168754, 0.229954", \ + "0.111442, 0.114517, 0.117264, 0.123584, 0.141924, 0.172474, 0.233674", \ + "0.120912, 0.123987, 0.126734, 0.133054, 0.151394, 0.181944, 0.243144" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107836, 0.110990, 0.113811, 0.120341, 0.139071, 0.170191, 0.232581", \ + "0.108413, 0.111567, 0.114388, 0.120918, 0.139648, 0.170768, 0.233158", \ + "0.109178, 0.112332, 0.115153, 0.121683, 0.140413, 0.171533, 0.233923", \ + "0.111351, 0.114505, 0.117326, 0.123856, 0.142586, 0.173706, 0.236096", \ + "0.113411, 0.116565, 0.119386, 0.125916, 0.144646, 0.175766, 0.238156", \ + "0.114261, 0.117415, 0.120236, 0.126766, 0.145496, 0.176616, 0.239006", \ + "0.113661, 0.116815, 0.119636, 0.126166, 0.144896, 0.176016, 0.238406" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090730, 0.093792, 0.096542, 0.102853, 0.121173, 0.151703, 0.212803", \ + "0.091275, 0.094337, 0.097087, 0.103398, 0.121718, 0.152248, 0.213348", \ + "0.092234, 0.095296, 0.098046, 0.104357, 0.122677, 0.153207, 0.214307", \ + "0.094086, 0.097148, 0.099898, 0.106209, 0.124529, 0.155059, 0.216159", \ + "0.096364, 0.099426, 0.102176, 0.108487, 0.126807, 0.157337, 0.218437", \ + "0.097260, 0.100322, 0.103072, 0.109383, 0.127703, 0.158233, 0.219333", \ + "0.096557, 0.099619, 0.102369, 0.108680, 0.127000, 0.157530, 0.218630" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109883, 0.112455, 0.114745, 0.119795, 0.132925, 0.153785, 0.195115", \ + "0.110705, 0.113277, 0.115567, 0.120617, 0.133747, 0.154607, 0.195937", \ + "0.111515, 0.114087, 0.116377, 0.121427, 0.134557, 0.155417, 0.196747", \ + "0.113635, 0.116207, 0.118497, 0.123547, 0.136677, 0.157537, 0.198867", \ + "0.123555, 0.126127, 0.128417, 0.133467, 0.146597, 0.167457, 0.208787", \ + "0.127105, 0.129677, 0.131967, 0.137017, 0.150147, 0.171007, 0.212337", \ + "0.139945, 0.142517, 0.144807, 0.149857, 0.162987, 0.183847, 0.225177" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093466, 0.095912, 0.098045, 0.102795, 0.115175, 0.134715, 0.173625", \ + "0.094154, 0.096600, 0.098733, 0.103483, 0.115863, 0.135403, 0.174313", \ + "0.095058, 0.097504, 0.099637, 0.104387, 0.116767, 0.136307, 0.175217", \ + "0.097085, 0.099531, 0.101664, 0.106414, 0.118794, 0.138334, 0.177244", \ + "0.107055, 0.109501, 0.111634, 0.116384, 0.128764, 0.148304, 0.187214", \ + "0.110605, 0.113051, 0.115184, 0.119934, 0.132314, 0.151854, 0.190764", \ + "0.123435, 0.125881, 0.128014, 0.132764, 0.145144, 0.164684, 0.203594" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116536, 0.119106, 0.121366, 0.126396, 0.139536, 0.160356, 0.201756", \ + "0.117056, 0.119626, 0.121886, 0.126916, 0.140056, 0.160876, 0.202276", \ + "0.117836, 0.120406, 0.122666, 0.127696, 0.140836, 0.161656, 0.203056", \ + "0.119686, 0.122256, 0.124516, 0.129546, 0.142686, 0.163506, 0.204906", \ + "0.122396, 0.124966, 0.127226, 0.132256, 0.145396, 0.166216, 0.207616", \ + "0.122586, 0.125156, 0.127416, 0.132446, 0.145586, 0.166406, 0.207806", \ + "0.124686, 0.127256, 0.129516, 0.134546, 0.147686, 0.168506, 0.209906" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.099168, 0.101608, 0.103718, 0.108458, 0.120828, 0.140448, 0.179298", \ + "0.099588, 0.102028, 0.104138, 0.108878, 0.121248, 0.140868, 0.179718", \ + "0.100468, 0.102908, 0.105018, 0.109758, 0.122128, 0.141748, 0.180598", \ + "0.102208, 0.104648, 0.106758, 0.111498, 0.123868, 0.143488, 0.182338", \ + "0.104868, 0.107308, 0.109418, 0.114158, 0.126528, 0.146148, 0.184998", \ + "0.105138, 0.107578, 0.109688, 0.114428, 0.126798, 0.146418, 0.185268", \ + "0.107188, 0.109628, 0.111738, 0.116478, 0.128848, 0.148468, 0.187318" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967", \ + "0.010359, 0.013191, 0.015842, 0.022608, 0.044046, 0.080836, 0.157967" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111070, 0.114215, 0.117025, 0.123565, 0.142325, 0.173465, 0.235835", \ + "0.111654, 0.114799, 0.117609, 0.124149, 0.142909, 0.174049, 0.236419", \ + "0.113075, 0.116220, 0.119030, 0.125570, 0.144330, 0.175470, 0.237840", \ + "0.115765, 0.118910, 0.121720, 0.128260, 0.147020, 0.178160, 0.240530", \ + "0.125195, 0.128340, 0.131150, 0.137690, 0.156450, 0.187590, 0.249960", \ + "0.128945, 0.132090, 0.134900, 0.141440, 0.160200, 0.191340, 0.253710", \ + "0.138445, 0.141590, 0.144400, 0.150940, 0.169700, 0.200840, 0.263210" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093620, 0.096695, 0.099442, 0.105762, 0.124102, 0.154652, 0.215852", \ + "0.094068, 0.097143, 0.099890, 0.106210, 0.124550, 0.155100, 0.216300", \ + "0.095655, 0.098730, 0.101477, 0.107797, 0.126137, 0.156687, 0.217887", \ + "0.098262, 0.101337, 0.104084, 0.110404, 0.128744, 0.159294, 0.220494", \ + "0.107722, 0.110797, 0.113544, 0.119864, 0.138204, 0.168754, 0.229954", \ + "0.111442, 0.114517, 0.117264, 0.123584, 0.141924, 0.172474, 0.233674", \ + "0.120912, 0.123987, 0.126734, 0.133054, 0.151394, 0.181944, 0.243144" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308", \ + "0.009944, 0.013842, 0.017961, 0.028517, 0.062144, 0.119970, 0.235308" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107836, 0.110990, 0.113811, 0.120341, 0.139071, 0.170191, 0.232581", \ + "0.108413, 0.111567, 0.114388, 0.120918, 0.139648, 0.170768, 0.233158", \ + "0.109178, 0.112332, 0.115153, 0.121683, 0.140413, 0.171533, 0.233923", \ + "0.111351, 0.114505, 0.117326, 0.123856, 0.142586, 0.173706, 0.236096", \ + "0.113411, 0.116565, 0.119386, 0.125916, 0.144646, 0.175766, 0.238156", \ + "0.114261, 0.117415, 0.120236, 0.126766, 0.145496, 0.176616, 0.239006", \ + "0.113661, 0.116815, 0.119636, 0.126166, 0.144896, 0.176016, 0.238406" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.090730, 0.093792, 0.096542, 0.102853, 0.121173, 0.151703, 0.212803", \ + "0.091275, 0.094337, 0.097087, 0.103398, 0.121718, 0.152248, 0.213348", \ + "0.092234, 0.095296, 0.098046, 0.104357, 0.122677, 0.153207, 0.214307", \ + "0.094086, 0.097148, 0.099898, 0.106209, 0.124529, 0.155059, 0.216159", \ + "0.096364, 0.099426, 0.102176, 0.108487, 0.126807, 0.157337, 0.218437", \ + "0.097260, 0.100322, 0.103072, 0.109383, 0.127703, 0.158233, 0.219333", \ + "0.096557, 0.099619, 0.102369, 0.108680, 0.127000, 0.157530, 0.218630" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667", \ + "0.009890, 0.014003, 0.017952, 0.028553, 0.062266, 0.120061, 0.235667" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.109883, 0.112455, 0.114745, 0.119795, 0.132925, 0.153785, 0.195115", \ + "0.110705, 0.113277, 0.115567, 0.120617, 0.133747, 0.154607, 0.195937", \ + "0.111515, 0.114087, 0.116377, 0.121427, 0.134557, 0.155417, 0.196747", \ + "0.113635, 0.116207, 0.118497, 0.123547, 0.136677, 0.157537, 0.198867", \ + "0.123555, 0.126127, 0.128417, 0.133467, 0.146597, 0.167457, 0.208787", \ + "0.127105, 0.129677, 0.131967, 0.137017, 0.150147, 0.171007, 0.212337", \ + "0.139945, 0.142517, 0.144807, 0.149857, 0.162987, 0.183847, 0.225177" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.093466, 0.095912, 0.098045, 0.102795, 0.115175, 0.134715, 0.173625", \ + "0.094154, 0.096600, 0.098733, 0.103483, 0.115863, 0.135403, 0.174313", \ + "0.095058, 0.097504, 0.099637, 0.104387, 0.116767, 0.136307, 0.175217", \ + "0.097085, 0.099531, 0.101664, 0.106414, 0.118794, 0.138334, 0.177244", \ + "0.107055, 0.109501, 0.111634, 0.116384, 0.128764, 0.148304, 0.187214", \ + "0.110605, 0.113051, 0.115184, 0.119934, 0.132314, 0.151854, 0.190764", \ + "0.123435, 0.125881, 0.128014, 0.132764, 0.145144, 0.164684, 0.203594" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417", \ + "0.010358, 0.013290, 0.015877, 0.022504, 0.043673, 0.081281, 0.157417" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842, 0.019842", \ + "0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867, 0.019867", \ + "0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899, 0.019899", \ + "0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919, 0.019919", \ + "0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126, 0.020126", \ + "0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325, 0.020325", \ + "0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173, 0.021173" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069, 0.023069", \ + "0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092, 0.023092", \ + "0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116, 0.023116", \ + "0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139, 0.023139", \ + "0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162, 0.023162", \ + "0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301, 0.023301", \ + "0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008, 0.024008" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.055840, 0.058914, 0.061892, 0.068298, 0.085208, 0.112659, 0.165398", \ + "0.056526, 0.060083, 0.063131, 0.068950, 0.085510, 0.111498, 0.163127", \ + "0.058087, 0.061682, 0.064526, 0.070489, 0.086937, 0.113203, 0.168133", \ + "0.061147, 0.064491, 0.067408, 0.073621, 0.090095, 0.116887, 0.168980", \ + "0.072850, 0.076168, 0.079538, 0.085608, 0.102314, 0.128074, 0.180687", \ + "0.075851, 0.079326, 0.080497, 0.088367, 0.105246, 0.131249, 0.182676", \ + "0.082869, 0.086035, 0.089169, 0.095669, 0.112280, 0.138448, 0.190111" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048477, 0.051442, 0.054315, 0.060494, 0.076805, 0.103284, 0.154157", \ + "0.049139, 0.052570, 0.055510, 0.061123, 0.077097, 0.102165, 0.151966", \ + "0.050644, 0.054112, 0.056856, 0.062608, 0.078473, 0.103810, 0.156795", \ + "0.053596, 0.056822, 0.059635, 0.065628, 0.081519, 0.107363, 0.157612", \ + "0.064885, 0.068085, 0.071337, 0.077191, 0.093306, 0.118154, 0.168905", \ + "0.067780, 0.071132, 0.072261, 0.079853, 0.096134, 0.121217, 0.170823", \ + "0.074549, 0.077603, 0.080627, 0.086896, 0.102919, 0.128160, 0.177995" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.060140, 0.064261, 0.067764, 0.076407, 0.100360, 0.140538, 0.222870", \ + "0.061736, 0.065302, 0.069075, 0.077277, 0.101533, 0.142504, 0.219389", \ + "0.063288, 0.067415, 0.070871, 0.079465, 0.103341, 0.143578, 0.225943", \ + "0.066647, 0.070740, 0.074062, 0.082370, 0.105978, 0.144922, 0.225684", \ + "0.078664, 0.082849, 0.086383, 0.094738, 0.118819, 0.157714, 0.239967", \ + "0.083315, 0.087446, 0.091259, 0.099703, 0.123565, 0.164121, 0.246340", \ + "0.098654, 0.102967, 0.106585, 0.115102, 0.139159, 0.178065, 0.257437" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052210, 0.056185, 0.059564, 0.067901, 0.091006, 0.129762, 0.209180", \ + "0.053750, 0.057189, 0.060828, 0.068741, 0.092138, 0.131659, 0.205822", \ + "0.055247, 0.059227, 0.062562, 0.070851, 0.093882, 0.132694, 0.212144", \ + "0.058487, 0.062435, 0.065640, 0.073653, 0.096426, 0.133991, 0.211894", \ + "0.070078, 0.074116, 0.077524, 0.085583, 0.108812, 0.146330, 0.225671", \ + "0.074565, 0.078550, 0.082227, 0.090373, 0.113390, 0.152511, 0.231819", \ + "0.089360, 0.093521, 0.097011, 0.105226, 0.128432, 0.165961, 0.242523" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056217, 0.059330, 0.062265, 0.068850, 0.085271, 0.111676, 0.164912", \ + "0.056850, 0.060209, 0.063343, 0.069937, 0.086466, 0.112595, 0.166246", \ + "0.058507, 0.061968, 0.064757, 0.071006, 0.087574, 0.113463, 0.165048", \ + "0.061644, 0.065063, 0.067832, 0.074068, 0.090810, 0.117418, 0.169251", \ + "0.072782, 0.075979, 0.078938, 0.085305, 0.102101, 0.129261, 0.184213", \ + "0.076066, 0.079345, 0.082207, 0.088426, 0.105093, 0.131781, 0.186292", \ + "0.083830, 0.086973, 0.089916, 0.096262, 0.112594, 0.138482, 0.190767" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.048805, 0.051807, 0.054638, 0.060990, 0.076830, 0.102300, 0.153652", \ + "0.049415, 0.052655, 0.055678, 0.062038, 0.077983, 0.103187, 0.154938", \ + "0.051013, 0.054352, 0.057042, 0.063070, 0.079051, 0.104024, 0.153783", \ + "0.054039, 0.057337, 0.060008, 0.066023, 0.082173, 0.107839, 0.157837", \ + "0.064783, 0.067867, 0.070721, 0.076862, 0.093064, 0.119262, 0.172269", \ + "0.067951, 0.071114, 0.073875, 0.079873, 0.095951, 0.121693, 0.174275", \ + "0.075440, 0.078471, 0.081311, 0.087432, 0.103186, 0.128157, 0.178591" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.058607, 0.062699, 0.066523, 0.074693, 0.098909, 0.137815, 0.216237", \ + "0.060184, 0.063395, 0.067287, 0.075234, 0.098778, 0.138820, 0.218113", \ + "0.062143, 0.065686, 0.069445, 0.077480, 0.101758, 0.141092, 0.219909", \ + "0.064897, 0.069017, 0.072535, 0.081061, 0.105101, 0.143860, 0.227322", \ + "0.077290, 0.081398, 0.085583, 0.093939, 0.117588, 0.157658, 0.236656", \ + "0.081845, 0.086012, 0.090189, 0.098629, 0.121870, 0.163454, 0.243153", \ + "0.096752, 0.100819, 0.104550, 0.113734, 0.138199, 0.176788, 0.255030" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.050880, 0.054826, 0.058515, 0.066396, 0.089754, 0.127283, 0.202929", \ + "0.052400, 0.055498, 0.059252, 0.066918, 0.089628, 0.128253, 0.204739", \ + "0.054290, 0.057707, 0.061334, 0.069084, 0.092502, 0.130444, 0.206472", \ + "0.056947, 0.060921, 0.064314, 0.072538, 0.095728, 0.133115, 0.213622", \ + "0.068901, 0.072864, 0.076900, 0.084961, 0.107772, 0.146424, 0.222625", \ + "0.073294, 0.077314, 0.081343, 0.089484, 0.111903, 0.152015, 0.228893", \ + "0.087674, 0.091597, 0.095196, 0.104055, 0.127654, 0.164877, 0.240349" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.087128, 0.089944, 0.092549, 0.098354, 0.113869, 0.138719, 0.188539", \ + "0.087681, 0.090497, 0.093102, 0.098907, 0.114422, 0.139272, 0.189092", \ + "0.088447, 0.091263, 0.093868, 0.099673, 0.115188, 0.140038, 0.189858", \ + "0.090071, 0.092887, 0.095492, 0.101297, 0.116812, 0.141662, 0.191482", \ + "0.098481, 0.101297, 0.103902, 0.109707, 0.125222, 0.150072, 0.199892", \ + "0.101747, 0.104563, 0.107168, 0.112973, 0.128488, 0.153338, 0.203158", \ + "0.110959, 0.113775, 0.116380, 0.122185, 0.137700, 0.162550, 0.212370" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075188, 0.078004, 0.080609, 0.086414, 0.101929, 0.126779, 0.176599", \ + "0.075741, 0.078557, 0.081162, 0.086967, 0.102482, 0.127332, 0.177152", \ + "0.076507, 0.079323, 0.081928, 0.087733, 0.103248, 0.128098, 0.177918", \ + "0.078131, 0.080947, 0.083552, 0.089357, 0.104872, 0.129722, 0.179542", \ + "0.086541, 0.089357, 0.091962, 0.097767, 0.113282, 0.138132, 0.187952", \ + "0.089807, 0.092623, 0.095228, 0.101033, 0.116548, 0.141398, 0.191218", \ + "0.099019, 0.101835, 0.104440, 0.110245, 0.125760, 0.150610, 0.200430" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025", \ + "0.012384, 0.015458, 0.018656, 0.026431, 0.051523, 0.095871, 0.186025" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096280, 0.100604, 0.103820, 0.111468, 0.134093, 0.170733, 0.244413", \ + "0.097376, 0.101700, 0.104916, 0.112564, 0.135189, 0.171829, 0.245509", \ + "0.098819, 0.103143, 0.106359, 0.114007, 0.136632, 0.173272, 0.246952", \ + "0.101435, 0.105759, 0.108975, 0.116623, 0.139248, 0.175888, 0.249568", \ + "0.108783, 0.113107, 0.116323, 0.123971, 0.146596, 0.183236, 0.256916", \ + "0.109542, 0.113866, 0.117082, 0.124730, 0.147355, 0.183995, 0.257675", \ + "0.114593, 0.118917, 0.122133, 0.129781, 0.152406, 0.189046, 0.262726" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.082937, 0.087261, 0.090477, 0.098125, 0.120750, 0.157390, 0.231070", \ + "0.084033, 0.088357, 0.091573, 0.099221, 0.121846, 0.158486, 0.232166", \ + "0.085476, 0.089800, 0.093016, 0.100664, 0.123289, 0.159929, 0.233609", \ + "0.088092, 0.092416, 0.095632, 0.103280, 0.125905, 0.162545, 0.236225", \ + "0.095440, 0.099764, 0.102980, 0.110628, 0.133253, 0.169893, 0.243573", \ + "0.096199, 0.100523, 0.103739, 0.111387, 0.134012, 0.170652, 0.244332", \ + "0.101250, 0.105574, 0.108790, 0.116438, 0.139063, 0.175703, 0.249383" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605", \ + "0.014369, 0.018212, 0.023332, 0.034674, 0.073105, 0.139831, 0.273605" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124095, 0.127925, 0.131885, 0.139075, 0.161185, 0.198215, 0.272365", \ + "0.124845, 0.128675, 0.132635, 0.139825, 0.161935, 0.198965, 0.273115", \ + "0.125575, 0.129405, 0.133365, 0.140555, 0.162665, 0.199695, 0.273845", \ + "0.128895, 0.132725, 0.136685, 0.143875, 0.165985, 0.203015, 0.277165", \ + "0.136565, 0.140395, 0.144355, 0.151545, 0.173655, 0.210685, 0.284835", \ + "0.140165, 0.143995, 0.147955, 0.155145, 0.177255, 0.214285, 0.288435", \ + "0.147425, 0.151255, 0.155215, 0.162405, 0.184515, 0.221545, 0.295695" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107102, 0.110932, 0.114892, 0.122082, 0.144192, 0.181222, 0.255372", \ + "0.107852, 0.111682, 0.115642, 0.122832, 0.144942, 0.181972, 0.256122", \ + "0.108582, 0.112412, 0.116372, 0.123562, 0.145672, 0.182702, 0.256852", \ + "0.111902, 0.115732, 0.119692, 0.126882, 0.148992, 0.186022, 0.260172", \ + "0.119572, 0.123402, 0.127362, 0.134552, 0.156662, 0.193692, 0.267842", \ + "0.123172, 0.127002, 0.130962, 0.138152, 0.160262, 0.197292, 0.271442", \ + "0.130432, 0.134262, 0.138222, 0.145412, 0.167522, 0.204552, 0.278702" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576", \ + "0.013612, 0.017853, 0.021860, 0.034508, 0.073471, 0.139858, 0.272576" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.116601, 0.119752, 0.122237, 0.128017, 0.143667, 0.168557, 0.218237", \ + "0.117250, 0.120401, 0.122886, 0.128666, 0.144316, 0.169206, 0.218886", \ + "0.117932, 0.121083, 0.123568, 0.129348, 0.144998, 0.169888, 0.219568", \ + "0.120597, 0.123748, 0.126233, 0.132013, 0.147663, 0.172553, 0.222233", \ + "0.127637, 0.130788, 0.133273, 0.139053, 0.154703, 0.179593, 0.229273", \ + "0.129917, 0.133068, 0.135553, 0.141333, 0.156983, 0.181873, 0.231553", \ + "0.136657, 0.139808, 0.142293, 0.148073, 0.163723, 0.188613, 0.238293" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100736, 0.103887, 0.106372, 0.112152, 0.127802, 0.152692, 0.202372", \ + "0.101385, 0.104536, 0.107021, 0.112801, 0.128451, 0.153341, 0.203021", \ + "0.102067, 0.105218, 0.107703, 0.113483, 0.129133, 0.154023, 0.203703", \ + "0.104732, 0.107883, 0.110368, 0.116148, 0.131798, 0.156688, 0.206368", \ + "0.111772, 0.114923, 0.117408, 0.123188, 0.138838, 0.163728, 0.213408", \ + "0.114052, 0.117203, 0.119688, 0.125468, 0.141118, 0.166008, 0.215688", \ + "0.120792, 0.123943, 0.126428, 0.132208, 0.147858, 0.172748, 0.222428" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717", \ + "0.011863, 0.014881, 0.017986, 0.026226, 0.051529, 0.095081, 0.185717" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.055440, 0.058316, 0.060470, 0.066899, 0.082429, 0.106674, 0.156714", \ + "0.056218, 0.059094, 0.061248, 0.067677, 0.083207, 0.107452, 0.157492", \ + "0.057218, 0.060094, 0.062248, 0.068677, 0.084207, 0.108452, 0.158492", \ + "0.060116, 0.062992, 0.065146, 0.071575, 0.087105, 0.111350, 0.161390", \ + "0.067758, 0.070634, 0.072788, 0.079217, 0.094747, 0.118992, 0.169032", \ + "0.070726, 0.073602, 0.075756, 0.082185, 0.097715, 0.121960, 0.172000", \ + "0.075740, 0.078616, 0.080770, 0.087199, 0.102729, 0.126974, 0.177014" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047616, 0.050492, 0.052646, 0.059075, 0.074605, 0.098850, 0.148890", \ + "0.048394, 0.051270, 0.053424, 0.059853, 0.075383, 0.099628, 0.149668", \ + "0.049394, 0.052270, 0.054424, 0.060853, 0.076383, 0.100628, 0.150668", \ + "0.052292, 0.055168, 0.057322, 0.063751, 0.079281, 0.103526, 0.153566", \ + "0.059934, 0.062810, 0.064964, 0.071393, 0.086923, 0.111168, 0.161208", \ + "0.062902, 0.065778, 0.067932, 0.074361, 0.089891, 0.114136, 0.164176", \ + "0.067916, 0.070792, 0.072946, 0.079375, 0.094905, 0.119150, 0.169190" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768", \ + "0.011694, 0.015571, 0.018379, 0.026151, 0.052870, 0.095793, 0.185768" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062056, 0.066071, 0.069050, 0.076987, 0.098960, 0.135820, 0.209580", \ + "0.062851, 0.066866, 0.069845, 0.077782, 0.099755, 0.136615, 0.210375", \ + "0.064570, 0.068585, 0.071564, 0.079501, 0.101474, 0.138334, 0.212094", \ + "0.066801, 0.070816, 0.073795, 0.081732, 0.103705, 0.140565, 0.214325", \ + "0.075781, 0.079796, 0.082775, 0.090712, 0.112685, 0.149545, 0.223305", \ + "0.077448, 0.081463, 0.084442, 0.092379, 0.114352, 0.151212, 0.224972", \ + "0.084855, 0.088870, 0.091849, 0.099786, 0.121759, 0.158619, 0.232379" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.053247, 0.057262, 0.060241, 0.068178, 0.090151, 0.127011, 0.200771", \ + "0.054042, 0.058057, 0.061036, 0.068973, 0.090946, 0.127806, 0.201566", \ + "0.055761, 0.059776, 0.062755, 0.070692, 0.092665, 0.129525, 0.203285", \ + "0.057992, 0.062007, 0.064986, 0.072923, 0.094896, 0.131756, 0.205516", \ + "0.066972, 0.070987, 0.073966, 0.081903, 0.103876, 0.140736, 0.214496", \ + "0.068639, 0.072654, 0.075633, 0.083570, 0.105543, 0.142403, 0.216163", \ + "0.076046, 0.080061, 0.083040, 0.090977, 0.112950, 0.149810, 0.223570" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128", \ + "0.013839, 0.016515, 0.021101, 0.033348, 0.072916, 0.138044, 0.274128" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216, 0.086216", \ + "0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650, 0.086650", \ + "0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804, 0.087804", \ + "0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939, 0.087939", \ + "0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023, 0.088023", \ + "0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111, 0.088111", \ + "0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765, 0.088765" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741, 0.047741", \ + "0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319, 0.048319", \ + "0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692, 0.048692", \ + "0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741, 0.048741", \ + "0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789, 0.048789", \ + "0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838, 0.048838", \ + "0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693, 0.049693" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005936, 0.005942, 0.005948, 0.005954, 0.005960, 0.005966, 0.005972", \ + "0.006463, 0.006469, 0.006476, 0.006482, 0.006488, 0.006495, 0.006501", \ + "0.007354, 0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413", \ + "0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421", \ + "0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421, 0.007428" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006695, 0.006702, 0.006708, 0.006715, 0.006722, 0.006729, 0.006735", \ + "0.006759, 0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800", \ + "0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800, 0.006807", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.007170, 0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213", \ + "0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213, 0.007220", \ + "0.007875, 0.007883, 0.007891, 0.007899, 0.007907, 0.007914, 0.007922" \ + ); + } + } + } + bus(AYB) { + bus_type : rf2_32x19_wm0_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047737, 0.050612, 0.052938, 0.057990, 0.071468, 0.092902, 0.136459", \ + "0.048667, 0.051597, 0.054022, 0.058980, 0.072575, 0.093868, 0.137216", \ + "0.051023, 0.053663, 0.055995, 0.061197, 0.074726, 0.095832, 0.139691", \ + "0.053676, 0.056414, 0.058926, 0.064018, 0.077654, 0.098911, 0.143872", \ + "0.064233, 0.066867, 0.068974, 0.074227, 0.087852, 0.108960, 0.151928", \ + "0.069923, 0.072705, 0.075043, 0.080442, 0.093809, 0.115192, 0.158369", \ + "0.082109, 0.084816, 0.087508, 0.092425, 0.106001, 0.125826, 0.168212" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.041442, 0.044215, 0.046460, 0.051333, 0.064333, 0.085009, 0.127024", \ + "0.042339, 0.045166, 0.047505, 0.052288, 0.065402, 0.085941, 0.127754", \ + "0.044612, 0.047158, 0.049408, 0.054426, 0.067476, 0.087835, 0.130141", \ + "0.047171, 0.049812, 0.052236, 0.057147, 0.070300, 0.090805, 0.134174", \ + "0.057354, 0.059895, 0.061928, 0.066995, 0.080137, 0.100499, 0.141946", \ + "0.062843, 0.065527, 0.067782, 0.072990, 0.085884, 0.106510, 0.148159", \ + "0.074598, 0.077209, 0.079806, 0.084549, 0.097644, 0.116767, 0.157653" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.043085, 0.046663, 0.049670, 0.056767, 0.076631, 0.110767, 0.180540", \ + "0.043545, 0.047144, 0.049992, 0.057149, 0.076825, 0.110367, 0.181670", \ + "0.045521, 0.049100, 0.052056, 0.059139, 0.079011, 0.113102, 0.180506", \ + "0.048761, 0.052368, 0.055382, 0.062473, 0.082350, 0.117882, 0.187230", \ + "0.061786, 0.065234, 0.068341, 0.075287, 0.095338, 0.128357, 0.197162", \ + "0.066946, 0.070442, 0.073456, 0.080390, 0.100691, 0.134289, 0.204247", \ + "0.083036, 0.086471, 0.089558, 0.096479, 0.116209, 0.149329, 0.216305" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.037404, 0.040856, 0.043756, 0.050601, 0.069762, 0.102690, 0.169993", \ + "0.037847, 0.041319, 0.044067, 0.050970, 0.069950, 0.102304, 0.171083", \ + "0.039754, 0.043206, 0.046057, 0.052889, 0.072058, 0.104942, 0.169961", \ + "0.042879, 0.046358, 0.049266, 0.056106, 0.075279, 0.109553, 0.176446", \ + "0.055443, 0.058769, 0.061766, 0.068466, 0.087807, 0.119657, 0.186027", \ + "0.060420, 0.063792, 0.066699, 0.073389, 0.092971, 0.125380, 0.192862", \ + "0.075941, 0.079254, 0.082232, 0.088908, 0.107940, 0.139888, 0.204492" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052078, 0.054730, 0.057064, 0.062268, 0.075729, 0.096917, 0.141431", \ + "0.053035, 0.055532, 0.057879, 0.063245, 0.077023, 0.098224, 0.143600", \ + "0.054158, 0.056909, 0.059479, 0.064586, 0.078136, 0.099376, 0.144877", \ + "0.057567, 0.060255, 0.062548, 0.067718, 0.081125, 0.102362, 0.145985", \ + "0.067325, 0.070321, 0.072520, 0.077877, 0.091087, 0.112546, 0.155703", \ + "0.073278, 0.076031, 0.078405, 0.083423, 0.097022, 0.118661, 0.161680", \ + "0.086921, 0.089580, 0.092019, 0.094975, 0.108464, 0.129735, 0.172381" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045211, 0.047770, 0.050020, 0.055040, 0.068025, 0.088463, 0.131401", \ + "0.046135, 0.048542, 0.050806, 0.055983, 0.069273, 0.089724, 0.133494", \ + "0.047217, 0.049871, 0.052350, 0.057277, 0.070347, 0.090834, 0.134725", \ + "0.050505, 0.053099, 0.055310, 0.060297, 0.073230, 0.093715, 0.135794", \ + "0.059919, 0.062808, 0.064929, 0.070097, 0.082839, 0.103538, 0.145168", \ + "0.065661, 0.068316, 0.070606, 0.075447, 0.088564, 0.109437, 0.150934", \ + "0.078820, 0.081385, 0.083738, 0.086590, 0.099601, 0.120119, 0.161256" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045303, 0.048989, 0.052036, 0.058971, 0.078877, 0.114266, 0.182755", \ + "0.046339, 0.049934, 0.052861, 0.060037, 0.079815, 0.115011, 0.186032", \ + "0.048031, 0.051742, 0.054613, 0.061732, 0.081568, 0.115802, 0.185320", \ + "0.051944, 0.055301, 0.058454, 0.065183, 0.085335, 0.119181, 0.184642", \ + "0.063134, 0.066751, 0.069803, 0.076806, 0.096806, 0.130843, 0.201592", \ + "0.067214, 0.070779, 0.073719, 0.080713, 0.101089, 0.134165, 0.200790", \ + "0.085461, 0.089038, 0.092020, 0.099177, 0.119034, 0.151962, 0.218700" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.039329, 0.042885, 0.045825, 0.052514, 0.071715, 0.105851, 0.171916", \ + "0.040329, 0.043796, 0.046620, 0.053542, 0.072620, 0.106570, 0.175077", \ + "0.041961, 0.045540, 0.048310, 0.055177, 0.074311, 0.107333, 0.174390", \ + "0.045735, 0.048974, 0.052015, 0.058506, 0.077945, 0.110592, 0.173736", \ + "0.056529, 0.060019, 0.062963, 0.069717, 0.089009, 0.121841, 0.190086", \ + "0.060464, 0.063903, 0.066740, 0.073486, 0.093140, 0.125046, 0.189312", \ + "0.078066, 0.081517, 0.084393, 0.091296, 0.110451, 0.142213, 0.206589" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.052048, 0.055128, 0.057017, 0.061909, 0.075474, 0.096116, 0.137127", \ + "0.052704, 0.055784, 0.057673, 0.062565, 0.076130, 0.096772, 0.137783", \ + "0.054577, 0.057657, 0.059546, 0.064438, 0.078003, 0.098645, 0.139656", \ + "0.056721, 0.059801, 0.061690, 0.066582, 0.080147, 0.100789, 0.141800", \ + "0.064044, 0.067124, 0.069013, 0.073905, 0.087470, 0.108112, 0.149123", \ + "0.066897, 0.069977, 0.071866, 0.076758, 0.090323, 0.110965, 0.151976", \ + "0.070804, 0.073884, 0.075773, 0.080665, 0.094230, 0.114872, 0.155883" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.044585, 0.047654, 0.049430, 0.054103, 0.066937, 0.086292, 0.124671", \ + "0.045260, 0.048329, 0.050105, 0.054778, 0.067612, 0.086967, 0.125346", \ + "0.047155, 0.050224, 0.052000, 0.056673, 0.069507, 0.088862, 0.127241", \ + "0.049278, 0.052347, 0.054123, 0.058796, 0.071630, 0.090985, 0.129364", \ + "0.056630, 0.059699, 0.061475, 0.066148, 0.078982, 0.098337, 0.136716", \ + "0.059460, 0.062529, 0.064305, 0.068978, 0.081812, 0.101167, 0.139546", \ + "0.063382, 0.066451, 0.068227, 0.072900, 0.085734, 0.105089, 0.143468" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953", \ + "0.010047, 0.012805, 0.015258, 0.021775, 0.043239, 0.081007, 0.156953" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056721, 0.059989, 0.062917, 0.069293, 0.087903, 0.119022, 0.181282", \ + "0.057508, 0.060775, 0.063703, 0.070080, 0.088691, 0.119809, 0.182068", \ + "0.058814, 0.062081, 0.065009, 0.071386, 0.089997, 0.121114, 0.183374", \ + "0.061680, 0.064949, 0.067877, 0.074252, 0.092864, 0.123981, 0.186242", \ + "0.069596, 0.072863, 0.075791, 0.082168, 0.100779, 0.131896, 0.194157", \ + "0.070929, 0.074196, 0.077124, 0.083501, 0.102111, 0.133230, 0.195490", \ + "0.078330, 0.081599, 0.084527, 0.090902, 0.109513, 0.140631, 0.202892" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.047875, 0.051071, 0.053896, 0.060109, 0.078326, 0.108882, 0.170072", \ + "0.048710, 0.051906, 0.054731, 0.060944, 0.079161, 0.109717, 0.170907", \ + "0.049970, 0.053166, 0.055991, 0.062204, 0.080421, 0.110977, 0.172167", \ + "0.052748, 0.055944, 0.058769, 0.064982, 0.083199, 0.113755, 0.174945", \ + "0.060773, 0.063969, 0.066794, 0.073007, 0.091224, 0.121780, 0.182970", \ + "0.062039, 0.065235, 0.068060, 0.074273, 0.092490, 0.123046, 0.184236", \ + "0.069333, 0.072529, 0.075354, 0.081567, 0.099784, 0.130340, 0.191530" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801", \ + "0.009936, 0.013675, 0.017479, 0.027902, 0.061902, 0.118674, 0.233801" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005936, 0.005942, 0.005948, 0.005954, 0.005960, 0.005966, 0.005972", \ + "0.006463, 0.006469, 0.006476, 0.006482, 0.006488, 0.006495, 0.006501", \ + "0.007354, 0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413", \ + "0.007376, 0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421", \ + "0.007384, 0.007391, 0.007399, 0.007406, 0.007413, 0.007421, 0.007428" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006695, 0.006702, 0.006708, 0.006715, 0.006722, 0.006729, 0.006735", \ + "0.006759, 0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800", \ + "0.006766, 0.006773, 0.006779, 0.006786, 0.006793, 0.006800, 0.006807", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.007170, 0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213", \ + "0.007177, 0.007184, 0.007191, 0.007198, 0.007206, 0.007213, 0.007220", \ + "0.007875, 0.007883, 0.007891, 0.007899, 0.007907, 0.007914, 0.007922" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123283, 0.125833, 0.128093, 0.133153, 0.146363, 0.167283, 0.208883", \ + "0.123743, 0.126293, 0.128553, 0.133613, 0.146823, 0.167743, 0.209343", \ + "0.125563, 0.128113, 0.130373, 0.135433, 0.148643, 0.169563, 0.211163", \ + "0.127953, 0.130503, 0.132763, 0.137823, 0.151033, 0.171953, 0.213553", \ + "0.134833, 0.137383, 0.139643, 0.144703, 0.157913, 0.178833, 0.220433", \ + "0.138013, 0.140563, 0.142823, 0.147883, 0.161093, 0.182013, 0.223613", \ + "0.147493, 0.150043, 0.152303, 0.157363, 0.170573, 0.191493, 0.233093" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104705, 0.107216, 0.109345, 0.114045, 0.126395, 0.145916, 0.184886", \ + "0.105286, 0.107796, 0.109925, 0.114626, 0.126975, 0.146496, 0.185466", \ + "0.107006, 0.109516, 0.111645, 0.116346, 0.128695, 0.148216, 0.187186", \ + "0.109396, 0.111906, 0.114035, 0.118736, 0.131085, 0.150606, 0.189576", \ + "0.116386, 0.118896, 0.121025, 0.125725, 0.138076, 0.157595, 0.196566", \ + "0.119596, 0.122105, 0.124236, 0.128936, 0.141286, 0.160806, 0.199775", \ + "0.129035, 0.131546, 0.133676, 0.138376, 0.150726, 0.170245, 0.209215" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119629, 0.122835, 0.125695, 0.132305, 0.151125, 0.182295, 0.244675", \ + "0.119933, 0.123139, 0.125999, 0.132609, 0.151429, 0.182599, 0.244979", \ + "0.121615, 0.124821, 0.127681, 0.134291, 0.153111, 0.184281, 0.246661", \ + "0.124505, 0.127711, 0.130571, 0.137181, 0.156001, 0.187171, 0.249551", \ + "0.130725, 0.133931, 0.136791, 0.143401, 0.162221, 0.193391, 0.255771", \ + "0.133075, 0.136281, 0.139141, 0.145751, 0.164571, 0.195741, 0.258121", \ + "0.135475, 0.138681, 0.141541, 0.148151, 0.166971, 0.198141, 0.260521" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100793, 0.103904, 0.106652, 0.113012, 0.131402, 0.162022, 0.223372", \ + "0.100984, 0.104095, 0.106843, 0.113203, 0.131593, 0.162213, 0.223563", \ + "0.102792, 0.105903, 0.108651, 0.115011, 0.133401, 0.164021, 0.225371", \ + "0.105502, 0.108613, 0.111361, 0.117721, 0.136111, 0.166731, 0.228081", \ + "0.111902, 0.115013, 0.117761, 0.124121, 0.142511, 0.173131, 0.234481", \ + "0.114272, 0.117383, 0.120131, 0.126491, 0.144881, 0.175501, 0.236851", \ + "0.116572, 0.119683, 0.122431, 0.128791, 0.147181, 0.177801, 0.239151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115339, 0.118519, 0.121372, 0.127962, 0.146742, 0.177862, 0.240212", \ + "0.115930, 0.119110, 0.121963, 0.128553, 0.147333, 0.178453, 0.240803", \ + "0.117340, 0.120520, 0.123373, 0.129963, 0.148743, 0.179863, 0.242213", \ + "0.120062, 0.123242, 0.126095, 0.132685, 0.151465, 0.182585, 0.244935", \ + "0.126792, 0.129972, 0.132825, 0.139415, 0.158195, 0.189315, 0.251665", \ + "0.130082, 0.133262, 0.136115, 0.142705, 0.161485, 0.192605, 0.254955", \ + "0.137752, 0.140932, 0.143785, 0.150375, 0.169155, 0.200275, 0.262625" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096552, 0.099616, 0.102364, 0.108696, 0.127056, 0.157666, 0.218946", \ + "0.097210, 0.100274, 0.103022, 0.109354, 0.127714, 0.158324, 0.219604", \ + "0.098481, 0.101545, 0.104293, 0.110625, 0.128985, 0.159595, 0.220875", \ + "0.101334, 0.104398, 0.107146, 0.113478, 0.131838, 0.162448, 0.223728", \ + "0.108026, 0.111090, 0.113838, 0.120170, 0.138530, 0.169140, 0.230420", \ + "0.111156, 0.114220, 0.116968, 0.123300, 0.141660, 0.172270, 0.233550", \ + "0.119026, 0.122090, 0.124838, 0.131170, 0.149530, 0.180140, 0.241420" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.118969, 0.121579, 0.123869, 0.128969, 0.142179, 0.163069, 0.204419", \ + "0.119769, 0.122379, 0.124669, 0.129769, 0.142979, 0.163869, 0.205219", \ + "0.120699, 0.123309, 0.125599, 0.130699, 0.143909, 0.164799, 0.206149", \ + "0.123049, 0.125659, 0.127949, 0.133049, 0.146259, 0.167149, 0.208499", \ + "0.129849, 0.132459, 0.134749, 0.139849, 0.153059, 0.173949, 0.215299", \ + "0.132149, 0.134759, 0.137049, 0.142149, 0.155359, 0.176249, 0.217599", \ + "0.139539, 0.142149, 0.144439, 0.149539, 0.162749, 0.183639, 0.224989" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.101090, 0.103509, 0.105643, 0.110393, 0.122763, 0.142263, 0.181043", \ + "0.101789, 0.104208, 0.106342, 0.111092, 0.123462, 0.142962, 0.181742", \ + "0.102730, 0.105149, 0.107283, 0.112033, 0.124403, 0.143903, 0.182683", \ + "0.105073, 0.107492, 0.109626, 0.114376, 0.126746, 0.146246, 0.185026", \ + "0.111743, 0.114162, 0.116296, 0.121046, 0.133416, 0.152916, 0.191696", \ + "0.114213, 0.116632, 0.118766, 0.123516, 0.135886, 0.155386, 0.194166", \ + "0.121513, 0.123932, 0.126066, 0.130816, 0.143186, 0.162686, 0.201466" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123283, 0.125833, 0.128093, 0.133153, 0.146363, 0.167283, 0.208883", \ + "0.123743, 0.126293, 0.128553, 0.133613, 0.146823, 0.167743, 0.209343", \ + "0.125563, 0.128113, 0.130373, 0.135433, 0.148643, 0.169563, 0.211163", \ + "0.127953, 0.130503, 0.132763, 0.137823, 0.151033, 0.171953, 0.213553", \ + "0.134833, 0.137383, 0.139643, 0.144703, 0.157913, 0.178833, 0.220433", \ + "0.138013, 0.140563, 0.142823, 0.147883, 0.161093, 0.182013, 0.223613", \ + "0.147493, 0.150043, 0.152303, 0.157363, 0.170573, 0.191493, 0.233093" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104705, 0.107216, 0.109345, 0.114045, 0.126395, 0.145916, 0.184886", \ + "0.105286, 0.107796, 0.109925, 0.114626, 0.126975, 0.146496, 0.185466", \ + "0.107006, 0.109516, 0.111645, 0.116346, 0.128695, 0.148216, 0.187186", \ + "0.109396, 0.111906, 0.114035, 0.118736, 0.131085, 0.150606, 0.189576", \ + "0.116386, 0.118896, 0.121025, 0.125725, 0.138076, 0.157595, 0.196566", \ + "0.119596, 0.122105, 0.124236, 0.128936, 0.141286, 0.160806, 0.199775", \ + "0.129035, 0.131546, 0.133676, 0.138376, 0.150726, 0.170245, 0.209215" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119629, 0.122835, 0.125695, 0.132305, 0.151125, 0.182295, 0.244675", \ + "0.119933, 0.123139, 0.125999, 0.132609, 0.151429, 0.182599, 0.244979", \ + "0.121615, 0.124821, 0.127681, 0.134291, 0.153111, 0.184281, 0.246661", \ + "0.124505, 0.127711, 0.130571, 0.137181, 0.156001, 0.187171, 0.249551", \ + "0.130725, 0.133931, 0.136791, 0.143401, 0.162221, 0.193391, 0.255771", \ + "0.133075, 0.136281, 0.139141, 0.145751, 0.164571, 0.195741, 0.258121", \ + "0.135475, 0.138681, 0.141541, 0.148151, 0.166971, 0.198141, 0.260521" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100793, 0.103904, 0.106652, 0.113012, 0.131402, 0.162022, 0.223372", \ + "0.100984, 0.104095, 0.106843, 0.113203, 0.131593, 0.162213, 0.223563", \ + "0.102792, 0.105903, 0.108651, 0.115011, 0.133401, 0.164021, 0.225371", \ + "0.105502, 0.108613, 0.111361, 0.117721, 0.136111, 0.166731, 0.228081", \ + "0.111902, 0.115013, 0.117761, 0.124121, 0.142511, 0.173131, 0.234481", \ + "0.114272, 0.117383, 0.120131, 0.126491, 0.144881, 0.175501, 0.236851", \ + "0.116572, 0.119683, 0.122431, 0.128791, 0.147181, 0.177801, 0.239151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115339, 0.118519, 0.121372, 0.127962, 0.146742, 0.177862, 0.240212", \ + "0.115930, 0.119110, 0.121963, 0.128553, 0.147333, 0.178453, 0.240803", \ + "0.117340, 0.120520, 0.123373, 0.129963, 0.148743, 0.179863, 0.242213", \ + "0.120062, 0.123242, 0.126095, 0.132685, 0.151465, 0.182585, 0.244935", \ + "0.126792, 0.129972, 0.132825, 0.139415, 0.158195, 0.189315, 0.251665", \ + "0.130082, 0.133262, 0.136115, 0.142705, 0.161485, 0.192605, 0.254955", \ + "0.137752, 0.140932, 0.143785, 0.150375, 0.169155, 0.200275, 0.262625" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096552, 0.099616, 0.102364, 0.108696, 0.127056, 0.157666, 0.218946", \ + "0.097210, 0.100274, 0.103022, 0.109354, 0.127714, 0.158324, 0.219604", \ + "0.098481, 0.101545, 0.104293, 0.110625, 0.128985, 0.159595, 0.220875", \ + "0.101334, 0.104398, 0.107146, 0.113478, 0.131838, 0.162448, 0.223728", \ + "0.108026, 0.111090, 0.113838, 0.120170, 0.138530, 0.169140, 0.230420", \ + "0.111156, 0.114220, 0.116968, 0.123300, 0.141660, 0.172270, 0.233550", \ + "0.119026, 0.122090, 0.124838, 0.131170, 0.149530, 0.180140, 0.241420" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.118969, 0.121579, 0.123869, 0.128969, 0.142179, 0.163069, 0.204419", \ + "0.119769, 0.122379, 0.124669, 0.129769, 0.142979, 0.163869, 0.205219", \ + "0.120699, 0.123309, 0.125599, 0.130699, 0.143909, 0.164799, 0.206149", \ + "0.123049, 0.125659, 0.127949, 0.133049, 0.146259, 0.167149, 0.208499", \ + "0.129849, 0.132459, 0.134749, 0.139849, 0.153059, 0.173949, 0.215299", \ + "0.132149, 0.134759, 0.137049, 0.142149, 0.155359, 0.176249, 0.217599", \ + "0.139539, 0.142149, 0.144439, 0.149539, 0.162749, 0.183639, 0.224989" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.101090, 0.103509, 0.105643, 0.110393, 0.122763, 0.142263, 0.181043", \ + "0.101789, 0.104208, 0.106342, 0.111092, 0.123462, 0.142962, 0.181742", \ + "0.102730, 0.105149, 0.107283, 0.112033, 0.124403, 0.143903, 0.182683", \ + "0.105073, 0.107492, 0.109626, 0.114376, 0.126746, 0.146246, 0.185026", \ + "0.111743, 0.114162, 0.116296, 0.121046, 0.133416, 0.152916, 0.191696", \ + "0.114213, 0.116632, 0.118766, 0.123516, 0.135886, 0.155386, 0.194166", \ + "0.121513, 0.123932, 0.126066, 0.130816, 0.143186, 0.162686, 0.201466" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123283, 0.125833, 0.128093, 0.133153, 0.146363, 0.167283, 0.208883", \ + "0.123743, 0.126293, 0.128553, 0.133613, 0.146823, 0.167743, 0.209343", \ + "0.125563, 0.128113, 0.130373, 0.135433, 0.148643, 0.169563, 0.211163", \ + "0.127953, 0.130503, 0.132763, 0.137823, 0.151033, 0.171953, 0.213553", \ + "0.134833, 0.137383, 0.139643, 0.144703, 0.157913, 0.178833, 0.220433", \ + "0.138013, 0.140563, 0.142823, 0.147883, 0.161093, 0.182013, 0.223613", \ + "0.147493, 0.150043, 0.152303, 0.157363, 0.170573, 0.191493, 0.233093" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104705, 0.107216, 0.109345, 0.114045, 0.126395, 0.145916, 0.184886", \ + "0.105286, 0.107796, 0.109925, 0.114626, 0.126975, 0.146496, 0.185466", \ + "0.107006, 0.109516, 0.111645, 0.116346, 0.128695, 0.148216, 0.187186", \ + "0.109396, 0.111906, 0.114035, 0.118736, 0.131085, 0.150606, 0.189576", \ + "0.116386, 0.118896, 0.121025, 0.125725, 0.138076, 0.157595, 0.196566", \ + "0.119596, 0.122105, 0.124236, 0.128936, 0.141286, 0.160806, 0.199775", \ + "0.129035, 0.131546, 0.133676, 0.138376, 0.150726, 0.170245, 0.209215" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119629, 0.122835, 0.125695, 0.132305, 0.151125, 0.182295, 0.244675", \ + "0.119933, 0.123139, 0.125999, 0.132609, 0.151429, 0.182599, 0.244979", \ + "0.121615, 0.124821, 0.127681, 0.134291, 0.153111, 0.184281, 0.246661", \ + "0.124505, 0.127711, 0.130571, 0.137181, 0.156001, 0.187171, 0.249551", \ + "0.130725, 0.133931, 0.136791, 0.143401, 0.162221, 0.193391, 0.255771", \ + "0.133075, 0.136281, 0.139141, 0.145751, 0.164571, 0.195741, 0.258121", \ + "0.135475, 0.138681, 0.141541, 0.148151, 0.166971, 0.198141, 0.260521" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100793, 0.103904, 0.106652, 0.113012, 0.131402, 0.162022, 0.223372", \ + "0.100984, 0.104095, 0.106843, 0.113203, 0.131593, 0.162213, 0.223563", \ + "0.102792, 0.105903, 0.108651, 0.115011, 0.133401, 0.164021, 0.225371", \ + "0.105502, 0.108613, 0.111361, 0.117721, 0.136111, 0.166731, 0.228081", \ + "0.111902, 0.115013, 0.117761, 0.124121, 0.142511, 0.173131, 0.234481", \ + "0.114272, 0.117383, 0.120131, 0.126491, 0.144881, 0.175501, 0.236851", \ + "0.116572, 0.119683, 0.122431, 0.128791, 0.147181, 0.177801, 0.239151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115339, 0.118519, 0.121372, 0.127962, 0.146742, 0.177862, 0.240212", \ + "0.115930, 0.119110, 0.121963, 0.128553, 0.147333, 0.178453, 0.240803", \ + "0.117340, 0.120520, 0.123373, 0.129963, 0.148743, 0.179863, 0.242213", \ + "0.120062, 0.123242, 0.126095, 0.132685, 0.151465, 0.182585, 0.244935", \ + "0.126792, 0.129972, 0.132825, 0.139415, 0.158195, 0.189315, 0.251665", \ + "0.130082, 0.133262, 0.136115, 0.142705, 0.161485, 0.192605, 0.254955", \ + "0.137752, 0.140932, 0.143785, 0.150375, 0.169155, 0.200275, 0.262625" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096552, 0.099616, 0.102364, 0.108696, 0.127056, 0.157666, 0.218946", \ + "0.097210, 0.100274, 0.103022, 0.109354, 0.127714, 0.158324, 0.219604", \ + "0.098481, 0.101545, 0.104293, 0.110625, 0.128985, 0.159595, 0.220875", \ + "0.101334, 0.104398, 0.107146, 0.113478, 0.131838, 0.162448, 0.223728", \ + "0.108026, 0.111090, 0.113838, 0.120170, 0.138530, 0.169140, 0.230420", \ + "0.111156, 0.114220, 0.116968, 0.123300, 0.141660, 0.172270, 0.233550", \ + "0.119026, 0.122090, 0.124838, 0.131170, 0.149530, 0.180140, 0.241420" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.118969, 0.121579, 0.123869, 0.128969, 0.142179, 0.163069, 0.204419", \ + "0.119769, 0.122379, 0.124669, 0.129769, 0.142979, 0.163869, 0.205219", \ + "0.120699, 0.123309, 0.125599, 0.130699, 0.143909, 0.164799, 0.206149", \ + "0.123049, 0.125659, 0.127949, 0.133049, 0.146259, 0.167149, 0.208499", \ + "0.129849, 0.132459, 0.134749, 0.139849, 0.153059, 0.173949, 0.215299", \ + "0.132149, 0.134759, 0.137049, 0.142149, 0.155359, 0.176249, 0.217599", \ + "0.139539, 0.142149, 0.144439, 0.149539, 0.162749, 0.183639, 0.224989" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.101090, 0.103509, 0.105643, 0.110393, 0.122763, 0.142263, 0.181043", \ + "0.101789, 0.104208, 0.106342, 0.111092, 0.123462, 0.142962, 0.181742", \ + "0.102730, 0.105149, 0.107283, 0.112033, 0.124403, 0.143903, 0.182683", \ + "0.105073, 0.107492, 0.109626, 0.114376, 0.126746, 0.146246, 0.185026", \ + "0.111743, 0.114162, 0.116296, 0.121046, 0.133416, 0.152916, 0.191696", \ + "0.114213, 0.116632, 0.118766, 0.123516, 0.135886, 0.155386, 0.194166", \ + "0.121513, 0.123932, 0.126066, 0.130816, 0.143186, 0.162686, 0.201466" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123283, 0.125833, 0.128093, 0.133153, 0.146363, 0.167283, 0.208883", \ + "0.123743, 0.126293, 0.128553, 0.133613, 0.146823, 0.167743, 0.209343", \ + "0.125563, 0.128113, 0.130373, 0.135433, 0.148643, 0.169563, 0.211163", \ + "0.127953, 0.130503, 0.132763, 0.137823, 0.151033, 0.171953, 0.213553", \ + "0.134833, 0.137383, 0.139643, 0.144703, 0.157913, 0.178833, 0.220433", \ + "0.138013, 0.140563, 0.142823, 0.147883, 0.161093, 0.182013, 0.223613", \ + "0.147493, 0.150043, 0.152303, 0.157363, 0.170573, 0.191493, 0.233093" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104705, 0.107216, 0.109345, 0.114045, 0.126395, 0.145916, 0.184886", \ + "0.105286, 0.107796, 0.109925, 0.114626, 0.126975, 0.146496, 0.185466", \ + "0.107006, 0.109516, 0.111645, 0.116346, 0.128695, 0.148216, 0.187186", \ + "0.109396, 0.111906, 0.114035, 0.118736, 0.131085, 0.150606, 0.189576", \ + "0.116386, 0.118896, 0.121025, 0.125725, 0.138076, 0.157595, 0.196566", \ + "0.119596, 0.122105, 0.124236, 0.128936, 0.141286, 0.160806, 0.199775", \ + "0.129035, 0.131546, 0.133676, 0.138376, 0.150726, 0.170245, 0.209215" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119629, 0.122835, 0.125695, 0.132305, 0.151125, 0.182295, 0.244675", \ + "0.119933, 0.123139, 0.125999, 0.132609, 0.151429, 0.182599, 0.244979", \ + "0.121615, 0.124821, 0.127681, 0.134291, 0.153111, 0.184281, 0.246661", \ + "0.124505, 0.127711, 0.130571, 0.137181, 0.156001, 0.187171, 0.249551", \ + "0.130725, 0.133931, 0.136791, 0.143401, 0.162221, 0.193391, 0.255771", \ + "0.133075, 0.136281, 0.139141, 0.145751, 0.164571, 0.195741, 0.258121", \ + "0.135475, 0.138681, 0.141541, 0.148151, 0.166971, 0.198141, 0.260521" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100793, 0.103904, 0.106652, 0.113012, 0.131402, 0.162022, 0.223372", \ + "0.100984, 0.104095, 0.106843, 0.113203, 0.131593, 0.162213, 0.223563", \ + "0.102792, 0.105903, 0.108651, 0.115011, 0.133401, 0.164021, 0.225371", \ + "0.105502, 0.108613, 0.111361, 0.117721, 0.136111, 0.166731, 0.228081", \ + "0.111902, 0.115013, 0.117761, 0.124121, 0.142511, 0.173131, 0.234481", \ + "0.114272, 0.117383, 0.120131, 0.126491, 0.144881, 0.175501, 0.236851", \ + "0.116572, 0.119683, 0.122431, 0.128791, 0.147181, 0.177801, 0.239151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115339, 0.118519, 0.121372, 0.127962, 0.146742, 0.177862, 0.240212", \ + "0.115930, 0.119110, 0.121963, 0.128553, 0.147333, 0.178453, 0.240803", \ + "0.117340, 0.120520, 0.123373, 0.129963, 0.148743, 0.179863, 0.242213", \ + "0.120062, 0.123242, 0.126095, 0.132685, 0.151465, 0.182585, 0.244935", \ + "0.126792, 0.129972, 0.132825, 0.139415, 0.158195, 0.189315, 0.251665", \ + "0.130082, 0.133262, 0.136115, 0.142705, 0.161485, 0.192605, 0.254955", \ + "0.137752, 0.140932, 0.143785, 0.150375, 0.169155, 0.200275, 0.262625" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096552, 0.099616, 0.102364, 0.108696, 0.127056, 0.157666, 0.218946", \ + "0.097210, 0.100274, 0.103022, 0.109354, 0.127714, 0.158324, 0.219604", \ + "0.098481, 0.101545, 0.104293, 0.110625, 0.128985, 0.159595, 0.220875", \ + "0.101334, 0.104398, 0.107146, 0.113478, 0.131838, 0.162448, 0.223728", \ + "0.108026, 0.111090, 0.113838, 0.120170, 0.138530, 0.169140, 0.230420", \ + "0.111156, 0.114220, 0.116968, 0.123300, 0.141660, 0.172270, 0.233550", \ + "0.119026, 0.122090, 0.124838, 0.131170, 0.149530, 0.180140, 0.241420" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.118969, 0.121579, 0.123869, 0.128969, 0.142179, 0.163069, 0.204419", \ + "0.119769, 0.122379, 0.124669, 0.129769, 0.142979, 0.163869, 0.205219", \ + "0.120699, 0.123309, 0.125599, 0.130699, 0.143909, 0.164799, 0.206149", \ + "0.123049, 0.125659, 0.127949, 0.133049, 0.146259, 0.167149, 0.208499", \ + "0.129849, 0.132459, 0.134749, 0.139849, 0.153059, 0.173949, 0.215299", \ + "0.132149, 0.134759, 0.137049, 0.142149, 0.155359, 0.176249, 0.217599", \ + "0.139539, 0.142149, 0.144439, 0.149539, 0.162749, 0.183639, 0.224989" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.101090, 0.103509, 0.105643, 0.110393, 0.122763, 0.142263, 0.181043", \ + "0.101789, 0.104208, 0.106342, 0.111092, 0.123462, 0.142962, 0.181742", \ + "0.102730, 0.105149, 0.107283, 0.112033, 0.124403, 0.143903, 0.182683", \ + "0.105073, 0.107492, 0.109626, 0.114376, 0.126746, 0.146246, 0.185026", \ + "0.111743, 0.114162, 0.116296, 0.121046, 0.133416, 0.152916, 0.191696", \ + "0.114213, 0.116632, 0.118766, 0.123516, 0.135886, 0.155386, 0.194166", \ + "0.121513, 0.123932, 0.126066, 0.130816, 0.143186, 0.162686, 0.201466" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123283, 0.125833, 0.128093, 0.133153, 0.146363, 0.167283, 0.208883", \ + "0.123743, 0.126293, 0.128553, 0.133613, 0.146823, 0.167743, 0.209343", \ + "0.125563, 0.128113, 0.130373, 0.135433, 0.148643, 0.169563, 0.211163", \ + "0.127953, 0.130503, 0.132763, 0.137823, 0.151033, 0.171953, 0.213553", \ + "0.134833, 0.137383, 0.139643, 0.144703, 0.157913, 0.178833, 0.220433", \ + "0.138013, 0.140563, 0.142823, 0.147883, 0.161093, 0.182013, 0.223613", \ + "0.147493, 0.150043, 0.152303, 0.157363, 0.170573, 0.191493, 0.233093" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.104705, 0.107216, 0.109345, 0.114045, 0.126395, 0.145916, 0.184886", \ + "0.105286, 0.107796, 0.109925, 0.114626, 0.126975, 0.146496, 0.185466", \ + "0.107006, 0.109516, 0.111645, 0.116346, 0.128695, 0.148216, 0.187186", \ + "0.109396, 0.111906, 0.114035, 0.118736, 0.131085, 0.150606, 0.189576", \ + "0.116386, 0.118896, 0.121025, 0.125725, 0.138076, 0.157595, 0.196566", \ + "0.119596, 0.122105, 0.124236, 0.128936, 0.141286, 0.160806, 0.199775", \ + "0.129035, 0.131546, 0.133676, 0.138376, 0.150726, 0.170245, 0.209215" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795", \ + "0.010014, 0.012706, 0.015379, 0.022160, 0.043506, 0.080502, 0.157795" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119629, 0.122835, 0.125695, 0.132305, 0.151125, 0.182295, 0.244675", \ + "0.119933, 0.123139, 0.125999, 0.132609, 0.151429, 0.182599, 0.244979", \ + "0.121615, 0.124821, 0.127681, 0.134291, 0.153111, 0.184281, 0.246661", \ + "0.124505, 0.127711, 0.130571, 0.137181, 0.156001, 0.187171, 0.249551", \ + "0.130725, 0.133931, 0.136791, 0.143401, 0.162221, 0.193391, 0.255771", \ + "0.133075, 0.136281, 0.139141, 0.145751, 0.164571, 0.195741, 0.258121", \ + "0.135475, 0.138681, 0.141541, 0.148151, 0.166971, 0.198141, 0.260521" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.100793, 0.103904, 0.106652, 0.113012, 0.131402, 0.162022, 0.223372", \ + "0.100984, 0.104095, 0.106843, 0.113203, 0.131593, 0.162213, 0.223563", \ + "0.102792, 0.105903, 0.108651, 0.115011, 0.133401, 0.164021, 0.225371", \ + "0.105502, 0.108613, 0.111361, 0.117721, 0.136111, 0.166731, 0.228081", \ + "0.111902, 0.115013, 0.117761, 0.124121, 0.142511, 0.173131, 0.234481", \ + "0.114272, 0.117383, 0.120131, 0.126491, 0.144881, 0.175501, 0.236851", \ + "0.116572, 0.119683, 0.122431, 0.128791, 0.147181, 0.177801, 0.239151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304", \ + "0.009635, 0.013652, 0.017575, 0.028133, 0.061771, 0.119776, 0.235304" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115339, 0.118519, 0.121372, 0.127962, 0.146742, 0.177862, 0.240212", \ + "0.115930, 0.119110, 0.121963, 0.128553, 0.147333, 0.178453, 0.240803", \ + "0.117340, 0.120520, 0.123373, 0.129963, 0.148743, 0.179863, 0.242213", \ + "0.120062, 0.123242, 0.126095, 0.132685, 0.151465, 0.182585, 0.244935", \ + "0.126792, 0.129972, 0.132825, 0.139415, 0.158195, 0.189315, 0.251665", \ + "0.130082, 0.133262, 0.136115, 0.142705, 0.161485, 0.192605, 0.254955", \ + "0.137752, 0.140932, 0.143785, 0.150375, 0.169155, 0.200275, 0.262625" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096552, 0.099616, 0.102364, 0.108696, 0.127056, 0.157666, 0.218946", \ + "0.097210, 0.100274, 0.103022, 0.109354, 0.127714, 0.158324, 0.219604", \ + "0.098481, 0.101545, 0.104293, 0.110625, 0.128985, 0.159595, 0.220875", \ + "0.101334, 0.104398, 0.107146, 0.113478, 0.131838, 0.162448, 0.223728", \ + "0.108026, 0.111090, 0.113838, 0.120170, 0.138530, 0.169140, 0.230420", \ + "0.111156, 0.114220, 0.116968, 0.123300, 0.141660, 0.172270, 0.233550", \ + "0.119026, 0.122090, 0.124838, 0.131170, 0.149530, 0.180140, 0.241420" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398", \ + "0.009680, 0.013593, 0.017652, 0.028295, 0.062021, 0.119834, 0.235398" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.118969, 0.121579, 0.123869, 0.128969, 0.142179, 0.163069, 0.204419", \ + "0.119769, 0.122379, 0.124669, 0.129769, 0.142979, 0.163869, 0.205219", \ + "0.120699, 0.123309, 0.125599, 0.130699, 0.143909, 0.164799, 0.206149", \ + "0.123049, 0.125659, 0.127949, 0.133049, 0.146259, 0.167149, 0.208499", \ + "0.129849, 0.132459, 0.134749, 0.139849, 0.153059, 0.173949, 0.215299", \ + "0.132149, 0.134759, 0.137049, 0.142149, 0.155359, 0.176249, 0.217599", \ + "0.139539, 0.142149, 0.144439, 0.149539, 0.162749, 0.183639, 0.224989" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.101090, 0.103509, 0.105643, 0.110393, 0.122763, 0.142263, 0.181043", \ + "0.101789, 0.104208, 0.106342, 0.111092, 0.123462, 0.142962, 0.181742", \ + "0.102730, 0.105149, 0.107283, 0.112033, 0.124403, 0.143903, 0.182683", \ + "0.105073, 0.107492, 0.109626, 0.114376, 0.126746, 0.146246, 0.185026", \ + "0.111743, 0.114162, 0.116296, 0.121046, 0.133416, 0.152916, 0.191696", \ + "0.114213, 0.116632, 0.118766, 0.123516, 0.135886, 0.155386, 0.194166", \ + "0.121513, 0.123932, 0.126066, 0.130816, 0.143186, 0.162686, 0.201466" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328", \ + "0.010037, 0.012821, 0.015518, 0.022055, 0.043438, 0.080483, 0.157328" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620, 0.023620", \ + "0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656, 0.023656", \ + "0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663, 0.023663", \ + "0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687, 0.023687", \ + "0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861, 0.023861", \ + "0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091, 0.024091", \ + "0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080, 0.025080" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787, 0.026787", \ + "0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814, 0.026814", \ + "0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840, 0.026840", \ + "0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867, 0.026867", \ + "0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894, 0.026894", \ + "0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970, 0.026970", \ + "0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744, 0.027744" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x19_wm0_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.262800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247311, 0.250381, 0.254922, 0.262082, 0.276391, 0.300841, 0.348801", \ + "0.247791, 0.250861, 0.255401, 0.262561, 0.276872, 0.301322, 0.349282", \ + "0.248801, 0.251871, 0.256411, 0.263571, 0.277881, 0.302331, 0.350291", \ + "0.250771, 0.253841, 0.258381, 0.265541, 0.279851, 0.304301, 0.352261", \ + "0.257002, 0.260071, 0.264611, 0.271771, 0.286081, 0.310531, 0.358491", \ + "0.260091, 0.263162, 0.267701, 0.274861, 0.289172, 0.313621, 0.361581", \ + "0.266971, 0.270041, 0.274581, 0.281741, 0.296052, 0.320501, 0.368461" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.191746, 0.194836, 0.199656, 0.206746, 0.221126, 0.245566, 0.293736", \ + "0.192156, 0.195246, 0.200066, 0.207156, 0.221536, 0.245976, 0.294146", \ + "0.193276, 0.196366, 0.201186, 0.208276, 0.222656, 0.247096, 0.295266", \ + "0.195236, 0.198326, 0.203146, 0.210236, 0.224616, 0.249056, 0.297226", \ + "0.201656, 0.204746, 0.209566, 0.216656, 0.231036, 0.255476, 0.303646", \ + "0.204646, 0.207736, 0.212556, 0.219646, 0.234026, 0.258466, 0.306636", \ + "0.211526, 0.214616, 0.219436, 0.226526, 0.240906, 0.265346, 0.313516" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.231494, 0.235264, 0.240824, 0.249414, 0.266964, 0.297804, 0.358784", \ + "0.232294, 0.236064, 0.241624, 0.250214, 0.267764, 0.298604, 0.359584", \ + "0.233594, 0.237364, 0.242924, 0.251514, 0.269064, 0.299904, 0.360884", \ + "0.235214, 0.238984, 0.244544, 0.253134, 0.270684, 0.301524, 0.362504", \ + "0.241724, 0.245494, 0.251054, 0.259644, 0.277194, 0.308034, 0.369014", \ + "0.244714, 0.248484, 0.254044, 0.262634, 0.280184, 0.311024, 0.372004", \ + "0.251084, 0.254854, 0.260414, 0.269004, 0.286554, 0.317394, 0.378374" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179231, 0.182751, 0.188071, 0.196891, 0.214321, 0.245141, 0.305801", \ + "0.179581, 0.183101, 0.188421, 0.197241, 0.214671, 0.245491, 0.306151", \ + "0.180921, 0.184441, 0.189761, 0.198581, 0.216011, 0.246831, 0.307491", \ + "0.182881, 0.186401, 0.191721, 0.200541, 0.217971, 0.248791, 0.309451", \ + "0.189151, 0.192671, 0.197991, 0.206811, 0.224241, 0.255061, 0.315721", \ + "0.192041, 0.195561, 0.200881, 0.209701, 0.227131, 0.257951, 0.318611", \ + "0.197891, 0.201411, 0.206731, 0.215551, 0.232981, 0.263801, 0.324461" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247893, 0.250963, 0.255503, 0.262663, 0.276973, 0.301423, 0.349383", \ + "0.248373, 0.251443, 0.255983, 0.263143, 0.277453, 0.301903, 0.349863", \ + "0.249383, 0.252453, 0.256993, 0.264153, 0.278463, 0.302913, 0.350873", \ + "0.251353, 0.254423, 0.258963, 0.266123, 0.280433, 0.304883, 0.352843", \ + "0.257583, 0.260653, 0.265193, 0.272353, 0.286663, 0.311113, 0.359073", \ + "0.260673, 0.263743, 0.268283, 0.275443, 0.289753, 0.314203, 0.362163", \ + "0.267553, 0.270623, 0.275163, 0.282323, 0.296633, 0.321083, 0.369043" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192223, 0.195313, 0.200133, 0.207223, 0.221603, 0.246043, 0.294213", \ + "0.192633, 0.195723, 0.200543, 0.207633, 0.222013, 0.246453, 0.294623", \ + "0.193753, 0.196843, 0.201663, 0.208753, 0.223133, 0.247573, 0.295743", \ + "0.195713, 0.198803, 0.203623, 0.210713, 0.225093, 0.249533, 0.297703", \ + "0.202133, 0.205223, 0.210043, 0.217133, 0.231513, 0.255953, 0.304123", \ + "0.205123, 0.208213, 0.213033, 0.220123, 0.234503, 0.258943, 0.307113", \ + "0.212003, 0.215093, 0.219913, 0.227003, 0.241383, 0.265823, 0.313993" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232075, 0.235845, 0.241406, 0.249995, 0.267545, 0.298385, 0.359365", \ + "0.232875, 0.236645, 0.242205, 0.250796, 0.268345, 0.299185, 0.360165", \ + "0.234175, 0.237945, 0.243506, 0.252095, 0.269645, 0.300486, 0.361465", \ + "0.235795, 0.239565, 0.245125, 0.253715, 0.271266, 0.302105, 0.363086", \ + "0.242306, 0.246075, 0.251635, 0.260225, 0.277776, 0.308616, 0.369596", \ + "0.245295, 0.249066, 0.254626, 0.263216, 0.280765, 0.311605, 0.372585", \ + "0.251665, 0.255435, 0.260996, 0.269585, 0.287135, 0.317976, 0.378955" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179708, 0.183228, 0.188548, 0.197368, 0.214798, 0.245618, 0.306278", \ + "0.180058, 0.183578, 0.188898, 0.197718, 0.215148, 0.245968, 0.306628", \ + "0.181398, 0.184918, 0.190238, 0.199058, 0.216488, 0.247308, 0.307968", \ + "0.183358, 0.186878, 0.192198, 0.201018, 0.218448, 0.249268, 0.309928", \ + "0.189628, 0.193148, 0.198468, 0.207288, 0.224718, 0.255538, 0.316198", \ + "0.192518, 0.196038, 0.201358, 0.210178, 0.227608, 0.258428, 0.319088", \ + "0.198368, 0.201888, 0.207208, 0.216028, 0.233458, 0.264278, 0.324938" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247921, 0.250991, 0.255531, 0.262691, 0.277001, 0.301451, 0.349411", \ + "0.248401, 0.251471, 0.256011, 0.263171, 0.277481, 0.301931, 0.349891", \ + "0.249411, 0.252481, 0.257021, 0.264181, 0.278491, 0.302941, 0.350901", \ + "0.251381, 0.254451, 0.258991, 0.266151, 0.280461, 0.304911, 0.352871", \ + "0.257611, 0.260681, 0.265221, 0.272381, 0.286691, 0.311141, 0.359101", \ + "0.260701, 0.263771, 0.268311, 0.275471, 0.289781, 0.314231, 0.362191", \ + "0.267581, 0.270651, 0.275191, 0.282351, 0.296661, 0.321111, 0.369071" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192250, 0.195340, 0.200160, 0.207250, 0.221630, 0.246070, 0.294240", \ + "0.192660, 0.195750, 0.200570, 0.207660, 0.222040, 0.246480, 0.294650", \ + "0.193780, 0.196870, 0.201690, 0.208780, 0.223160, 0.247600, 0.295770", \ + "0.195740, 0.198830, 0.203650, 0.210740, 0.225120, 0.249560, 0.297730", \ + "0.202160, 0.205250, 0.210070, 0.217160, 0.231540, 0.255980, 0.304150", \ + "0.205150, 0.208240, 0.213060, 0.220150, 0.234530, 0.258970, 0.307140", \ + "0.212030, 0.215120, 0.219940, 0.227030, 0.241410, 0.265850, 0.314020" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232103, 0.235873, 0.241433, 0.250023, 0.267573, 0.298413, 0.359393", \ + "0.232903, 0.236673, 0.242233, 0.250823, 0.268373, 0.299213, 0.360193", \ + "0.234203, 0.237973, 0.243533, 0.252123, 0.269673, 0.300513, 0.361493", \ + "0.235823, 0.239593, 0.245153, 0.253743, 0.271293, 0.302133, 0.363113", \ + "0.242333, 0.246103, 0.251663, 0.260253, 0.277803, 0.308643, 0.369623", \ + "0.245323, 0.249093, 0.254653, 0.263243, 0.280793, 0.311633, 0.372613", \ + "0.251693, 0.255463, 0.261023, 0.269613, 0.287163, 0.318003, 0.378983" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179731, 0.183251, 0.188571, 0.197391, 0.214821, 0.245641, 0.306301", \ + "0.180081, 0.183601, 0.188921, 0.197741, 0.215171, 0.245991, 0.306651", \ + "0.181421, 0.184941, 0.190261, 0.199081, 0.216511, 0.247331, 0.307991", \ + "0.183381, 0.186901, 0.192221, 0.201041, 0.218471, 0.249291, 0.309951", \ + "0.189651, 0.193171, 0.198491, 0.207311, 0.224741, 0.255561, 0.316221", \ + "0.192541, 0.196061, 0.201381, 0.210201, 0.227631, 0.258451, 0.319111", \ + "0.198391, 0.201911, 0.207231, 0.216051, 0.233481, 0.264301, 0.324961" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.248475, 0.251545, 0.256085, 0.263245, 0.277555, 0.302005, 0.349965", \ + "0.248955, 0.252025, 0.256565, 0.263725, 0.278035, 0.302485, 0.350445", \ + "0.249965, 0.253035, 0.257575, 0.264735, 0.279045, 0.303495, 0.351455", \ + "0.251935, 0.255005, 0.259545, 0.266705, 0.281015, 0.305465, 0.353425", \ + "0.258165, 0.261235, 0.265775, 0.272935, 0.287245, 0.311695, 0.359655", \ + "0.261255, 0.264325, 0.268865, 0.276025, 0.290335, 0.314785, 0.362745", \ + "0.268135, 0.271205, 0.275745, 0.282905, 0.297215, 0.321665, 0.369625" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192700, 0.195790, 0.200610, 0.207700, 0.222080, 0.246520, 0.294690", \ + "0.193110, 0.196200, 0.201020, 0.208110, 0.222490, 0.246930, 0.295100", \ + "0.194230, 0.197320, 0.202140, 0.209230, 0.223610, 0.248050, 0.296220", \ + "0.196190, 0.199280, 0.204100, 0.211190, 0.225570, 0.250010, 0.298180", \ + "0.202610, 0.205700, 0.210520, 0.217610, 0.231990, 0.256430, 0.304600", \ + "0.205600, 0.208690, 0.213510, 0.220600, 0.234980, 0.259420, 0.307590", \ + "0.212480, 0.215570, 0.220390, 0.227480, 0.241860, 0.266300, 0.314470" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232657, 0.236427, 0.241987, 0.250577, 0.268127, 0.298967, 0.359947", \ + "0.233457, 0.237227, 0.242787, 0.251377, 0.268927, 0.299767, 0.360747", \ + "0.234757, 0.238527, 0.244087, 0.252677, 0.270227, 0.301067, 0.362047", \ + "0.236377, 0.240147, 0.245707, 0.254297, 0.271847, 0.302687, 0.363667", \ + "0.242887, 0.246657, 0.252217, 0.260807, 0.278357, 0.309197, 0.370177", \ + "0.245877, 0.249647, 0.255207, 0.263797, 0.281347, 0.312187, 0.373167", \ + "0.252247, 0.256017, 0.261577, 0.270167, 0.287717, 0.318557, 0.379537" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.180185, 0.183705, 0.189025, 0.197845, 0.215275, 0.246095, 0.306755", \ + "0.180535, 0.184055, 0.189375, 0.198195, 0.215625, 0.246445, 0.307105", \ + "0.181875, 0.185395, 0.190715, 0.199535, 0.216965, 0.247785, 0.308445", \ + "0.183835, 0.187355, 0.192675, 0.201495, 0.218925, 0.249745, 0.310405", \ + "0.190105, 0.193625, 0.198945, 0.207765, 0.225195, 0.256015, 0.316675", \ + "0.192995, 0.196515, 0.201835, 0.210655, 0.228085, 0.258905, 0.319565", \ + "0.198845, 0.202365, 0.207685, 0.216505, 0.233935, 0.264755, 0.325415" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.290407, 0.293477, 0.298017, 0.305177, 0.319487, 0.343937, 0.391897", \ + "0.290887, 0.293957, 0.298497, 0.305657, 0.319967, 0.344417, 0.392377", \ + "0.291897, 0.294967, 0.299507, 0.306667, 0.320977, 0.345427, 0.393387", \ + "0.293867, 0.296937, 0.301477, 0.308637, 0.322947, 0.347397, 0.395357", \ + "0.300097, 0.303167, 0.307707, 0.314867, 0.329177, 0.353627, 0.401587", \ + "0.303187, 0.306257, 0.310797, 0.317957, 0.332267, 0.356717, 0.404677", \ + "0.310067, 0.313137, 0.317677, 0.324837, 0.339147, 0.363597, 0.411557" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.227081, 0.230171, 0.234991, 0.242081, 0.256461, 0.280901, 0.329071", \ + "0.227491, 0.230581, 0.235401, 0.242491, 0.256871, 0.281311, 0.329481", \ + "0.228611, 0.231701, 0.236521, 0.243611, 0.257991, 0.282431, 0.330601", \ + "0.230571, 0.233661, 0.238481, 0.245571, 0.259951, 0.284391, 0.332561", \ + "0.236991, 0.240081, 0.244901, 0.251991, 0.266371, 0.290811, 0.338981", \ + "0.239981, 0.243071, 0.247891, 0.254981, 0.269361, 0.293801, 0.341971", \ + "0.246861, 0.249951, 0.254771, 0.261861, 0.276241, 0.300681, 0.348851" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.274590, 0.278360, 0.283920, 0.292510, 0.310060, 0.340900, 0.401880", \ + "0.275390, 0.279160, 0.284720, 0.293310, 0.310860, 0.341700, 0.402680", \ + "0.276690, 0.280460, 0.286020, 0.294610, 0.312160, 0.343000, 0.403980", \ + "0.278310, 0.282080, 0.287640, 0.296230, 0.313780, 0.344620, 0.405600", \ + "0.284820, 0.288590, 0.294150, 0.302740, 0.320290, 0.351130, 0.412110", \ + "0.287810, 0.291580, 0.297140, 0.305730, 0.323280, 0.354120, 0.415100", \ + "0.294180, 0.297950, 0.303510, 0.312100, 0.329650, 0.360490, 0.421470" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.214566, 0.218086, 0.223406, 0.232226, 0.249656, 0.280476, 0.341136", \ + "0.214916, 0.218436, 0.223756, 0.232576, 0.250006, 0.280826, 0.341486", \ + "0.216256, 0.219776, 0.225096, 0.233916, 0.251346, 0.282166, 0.342826", \ + "0.218216, 0.221736, 0.227056, 0.235876, 0.253306, 0.284126, 0.344786", \ + "0.224486, 0.228006, 0.233326, 0.242146, 0.259576, 0.290396, 0.351056", \ + "0.227376, 0.230896, 0.236216, 0.245036, 0.262466, 0.293286, 0.353946", \ + "0.233226, 0.236746, 0.242066, 0.250886, 0.268316, 0.299136, 0.359796" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.327093, 0.330163, 0.334703, 0.341863, 0.356173, 0.380623, 0.428583", \ + "0.327573, 0.330643, 0.335183, 0.342343, 0.356653, 0.381103, 0.429063", \ + "0.328583, 0.331653, 0.336193, 0.343353, 0.357663, 0.382113, 0.430073", \ + "0.330553, 0.333623, 0.338163, 0.345323, 0.359633, 0.384083, 0.432043", \ + "0.336783, 0.339853, 0.344393, 0.351553, 0.365863, 0.390313, 0.438273", \ + "0.339873, 0.342943, 0.347483, 0.354643, 0.368953, 0.393403, 0.441363", \ + "0.346753, 0.349823, 0.354363, 0.361523, 0.375833, 0.400283, 0.448243" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.257164, 0.260254, 0.265074, 0.272164, 0.286544, 0.310984, 0.359154", \ + "0.257574, 0.260664, 0.265484, 0.272574, 0.286954, 0.311394, 0.359564", \ + "0.258694, 0.261784, 0.266604, 0.273694, 0.288074, 0.312514, 0.360684", \ + "0.260654, 0.263744, 0.268564, 0.275654, 0.290034, 0.314474, 0.362644", \ + "0.267074, 0.270164, 0.274984, 0.282074, 0.296454, 0.320894, 0.369064", \ + "0.270064, 0.273154, 0.277974, 0.285064, 0.299444, 0.323884, 0.372054", \ + "0.276944, 0.280034, 0.284854, 0.291944, 0.306324, 0.330764, 0.378934" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.311275, 0.315045, 0.320605, 0.329195, 0.346745, 0.377585, 0.438565", \ + "0.312075, 0.315845, 0.321405, 0.329995, 0.347545, 0.378385, 0.439365", \ + "0.313375, 0.317145, 0.322705, 0.331295, 0.348845, 0.379685, 0.440665", \ + "0.314995, 0.318765, 0.324325, 0.332915, 0.350465, 0.381305, 0.442285", \ + "0.321505, 0.325275, 0.330835, 0.339425, 0.356975, 0.387815, 0.448795", \ + "0.324495, 0.328265, 0.333825, 0.342415, 0.359965, 0.390805, 0.451785", \ + "0.330865, 0.334635, 0.340195, 0.348785, 0.366335, 0.397175, 0.458155" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.244644, 0.248164, 0.253484, 0.262304, 0.279734, 0.310554, 0.371214", \ + "0.244994, 0.248514, 0.253834, 0.262654, 0.280084, 0.310904, 0.371564", \ + "0.246334, 0.249854, 0.255174, 0.263994, 0.281424, 0.312244, 0.372904", \ + "0.248294, 0.251814, 0.257134, 0.265954, 0.283384, 0.314204, 0.374864", \ + "0.254564, 0.258084, 0.263404, 0.272224, 0.289654, 0.320474, 0.381134", \ + "0.257454, 0.260974, 0.266294, 0.275114, 0.292544, 0.323364, 0.384024", \ + "0.263304, 0.266824, 0.272144, 0.280964, 0.298394, 0.329214, 0.389874" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.365550, 0.368620, 0.373160, 0.380320, 0.394630, 0.419080, 0.467040", \ + "0.366030, 0.369100, 0.373640, 0.380800, 0.395110, 0.419560, 0.467520", \ + "0.367040, 0.370110, 0.374650, 0.381810, 0.396120, 0.420570, 0.468530", \ + "0.369010, 0.372080, 0.376620, 0.383780, 0.398090, 0.422540, 0.470500", \ + "0.375240, 0.378310, 0.382850, 0.390010, 0.404320, 0.428770, 0.476730", \ + "0.378330, 0.381400, 0.385940, 0.393100, 0.407410, 0.431860, 0.479820", \ + "0.385210, 0.388280, 0.392820, 0.399980, 0.414290, 0.438740, 0.486700" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.288691, 0.291782, 0.296602, 0.303692, 0.318072, 0.342512, 0.390682", \ + "0.289102, 0.292191, 0.297012, 0.304102, 0.318482, 0.342921, 0.391092", \ + "0.290222, 0.293312, 0.298131, 0.305222, 0.319602, 0.344042, 0.392211", \ + "0.292182, 0.295272, 0.300092, 0.307181, 0.321562, 0.346002, 0.394172", \ + "0.298602, 0.301692, 0.306511, 0.313602, 0.327982, 0.352421, 0.400591", \ + "0.301592, 0.304681, 0.309502, 0.316592, 0.330972, 0.355411, 0.403582", \ + "0.308472, 0.311561, 0.316382, 0.323472, 0.337852, 0.362292, 0.410462" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.349733, 0.353503, 0.359063, 0.367653, 0.385203, 0.416043, 0.477023", \ + "0.350533, 0.354303, 0.359863, 0.368453, 0.386003, 0.416843, 0.477823", \ + "0.351833, 0.355603, 0.361163, 0.369753, 0.387303, 0.418143, 0.479123", \ + "0.353453, 0.357223, 0.362783, 0.371373, 0.388923, 0.419763, 0.480743", \ + "0.359963, 0.363733, 0.369293, 0.377883, 0.395433, 0.426273, 0.487253", \ + "0.362953, 0.366723, 0.372283, 0.380873, 0.398423, 0.429263, 0.490243", \ + "0.369323, 0.373093, 0.378653, 0.387243, 0.404793, 0.435633, 0.496613" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.276176, 0.279696, 0.285016, 0.293836, 0.311266, 0.342086, 0.402746", \ + "0.276526, 0.280046, 0.285366, 0.294186, 0.311616, 0.342436, 0.403096", \ + "0.277866, 0.281386, 0.286706, 0.295526, 0.312956, 0.343776, 0.404436", \ + "0.279826, 0.283346, 0.288666, 0.297486, 0.314916, 0.345736, 0.406396", \ + "0.286096, 0.289616, 0.294936, 0.303756, 0.321186, 0.352006, 0.412666", \ + "0.288986, 0.292506, 0.297826, 0.306646, 0.324076, 0.354896, 0.415556", \ + "0.294836, 0.298356, 0.303676, 0.312496, 0.329926, 0.360746, 0.421406" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.402236, 0.405306, 0.409846, 0.417006, 0.431316, 0.455766, 0.503726", \ + "0.402716, 0.405786, 0.410326, 0.417486, 0.431796, 0.456246, 0.504206", \ + "0.403726, 0.406796, 0.411336, 0.418496, 0.432806, 0.457256, 0.505216", \ + "0.405696, 0.408766, 0.413306, 0.420466, 0.434776, 0.459226, 0.507186", \ + "0.411926, 0.414996, 0.419536, 0.426696, 0.441006, 0.465456, 0.513416", \ + "0.415016, 0.418086, 0.422626, 0.429786, 0.444096, 0.468546, 0.516506", \ + "0.421896, 0.424966, 0.429506, 0.436666, 0.450976, 0.475426, 0.523386" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.318771, 0.321861, 0.326681, 0.333771, 0.348151, 0.372591, 0.420761", \ + "0.319181, 0.322271, 0.327091, 0.334181, 0.348561, 0.373001, 0.421171", \ + "0.320301, 0.323391, 0.328211, 0.335301, 0.349681, 0.374121, 0.422291", \ + "0.322261, 0.325351, 0.330171, 0.337261, 0.351641, 0.376081, 0.424251", \ + "0.328681, 0.331771, 0.336591, 0.343681, 0.358061, 0.382501, 0.430671", \ + "0.331671, 0.334761, 0.339581, 0.346671, 0.361051, 0.385491, 0.433661", \ + "0.338551, 0.341641, 0.346461, 0.353551, 0.367931, 0.392371, 0.440541" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.386419, 0.390189, 0.395749, 0.404339, 0.421889, 0.452729, 0.513709", \ + "0.387219, 0.390989, 0.396549, 0.405139, 0.422689, 0.453529, 0.514509", \ + "0.388519, 0.392289, 0.397849, 0.406439, 0.423989, 0.454829, 0.515809", \ + "0.390139, 0.393909, 0.399469, 0.408059, 0.425609, 0.456449, 0.517429", \ + "0.396649, 0.400419, 0.405979, 0.414569, 0.432119, 0.462959, 0.523939", \ + "0.399639, 0.403409, 0.408969, 0.417559, 0.435109, 0.465949, 0.526929", \ + "0.406009, 0.409779, 0.415339, 0.423929, 0.441479, 0.472319, 0.533299" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.306256, 0.309776, 0.315096, 0.323916, 0.341346, 0.372166, 0.432826", \ + "0.306606, 0.310126, 0.315446, 0.324266, 0.341696, 0.372516, 0.433176", \ + "0.307946, 0.311466, 0.316786, 0.325606, 0.343036, 0.373856, 0.434516", \ + "0.309906, 0.313426, 0.318746, 0.327566, 0.344996, 0.375816, 0.436476", \ + "0.316176, 0.319696, 0.325016, 0.333836, 0.351266, 0.382086, 0.442746", \ + "0.319066, 0.322586, 0.327906, 0.336726, 0.354156, 0.384976, 0.445636", \ + "0.324916, 0.328436, 0.333756, 0.342576, 0.360006, 0.390826, 0.451486" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247311, 0.250381, 0.254922, 0.262082, 0.276391, 0.300841, 0.348801", \ + "0.247791, 0.250861, 0.255401, 0.262561, 0.276872, 0.301322, 0.349282", \ + "0.248801, 0.251871, 0.256411, 0.263571, 0.277881, 0.302331, 0.350291", \ + "0.250771, 0.253841, 0.258381, 0.265541, 0.279851, 0.304301, 0.352261", \ + "0.257002, 0.260071, 0.264611, 0.271771, 0.286081, 0.310531, 0.358491", \ + "0.260091, 0.263162, 0.267701, 0.274861, 0.289172, 0.313621, 0.361581", \ + "0.266971, 0.270041, 0.274581, 0.281741, 0.296052, 0.320501, 0.368461" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.191746, 0.194836, 0.199656, 0.206746, 0.221126, 0.245566, 0.293736", \ + "0.192156, 0.195246, 0.200066, 0.207156, 0.221536, 0.245976, 0.294146", \ + "0.193276, 0.196366, 0.201186, 0.208276, 0.222656, 0.247096, 0.295266", \ + "0.195236, 0.198326, 0.203146, 0.210236, 0.224616, 0.249056, 0.297226", \ + "0.201656, 0.204746, 0.209566, 0.216656, 0.231036, 0.255476, 0.303646", \ + "0.204646, 0.207736, 0.212556, 0.219646, 0.234026, 0.258466, 0.306636", \ + "0.211526, 0.214616, 0.219436, 0.226526, 0.240906, 0.265346, 0.313516" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.231494, 0.235264, 0.240824, 0.249414, 0.266964, 0.297804, 0.358784", \ + "0.232294, 0.236064, 0.241624, 0.250214, 0.267764, 0.298604, 0.359584", \ + "0.233594, 0.237364, 0.242924, 0.251514, 0.269064, 0.299904, 0.360884", \ + "0.235214, 0.238984, 0.244544, 0.253134, 0.270684, 0.301524, 0.362504", \ + "0.241724, 0.245494, 0.251054, 0.259644, 0.277194, 0.308034, 0.369014", \ + "0.244714, 0.248484, 0.254044, 0.262634, 0.280184, 0.311024, 0.372004", \ + "0.251084, 0.254854, 0.260414, 0.269004, 0.286554, 0.317394, 0.378374" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179231, 0.182751, 0.188071, 0.196891, 0.214321, 0.245141, 0.305801", \ + "0.179581, 0.183101, 0.188421, 0.197241, 0.214671, 0.245491, 0.306151", \ + "0.180921, 0.184441, 0.189761, 0.198581, 0.216011, 0.246831, 0.307491", \ + "0.182881, 0.186401, 0.191721, 0.200541, 0.217971, 0.248791, 0.309451", \ + "0.189151, 0.192671, 0.197991, 0.206811, 0.224241, 0.255061, 0.315721", \ + "0.192041, 0.195561, 0.200881, 0.209701, 0.227131, 0.257951, 0.318611", \ + "0.197891, 0.201411, 0.206731, 0.215551, 0.232981, 0.263801, 0.324461" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247893, 0.250963, 0.255503, 0.262663, 0.276973, 0.301423, 0.349383", \ + "0.248373, 0.251443, 0.255983, 0.263143, 0.277453, 0.301903, 0.349863", \ + "0.249383, 0.252453, 0.256993, 0.264153, 0.278463, 0.302913, 0.350873", \ + "0.251353, 0.254423, 0.258963, 0.266123, 0.280433, 0.304883, 0.352843", \ + "0.257583, 0.260653, 0.265193, 0.272353, 0.286663, 0.311113, 0.359073", \ + "0.260673, 0.263743, 0.268283, 0.275443, 0.289753, 0.314203, 0.362163", \ + "0.267553, 0.270623, 0.275163, 0.282323, 0.296633, 0.321083, 0.369043" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192223, 0.195313, 0.200133, 0.207223, 0.221603, 0.246043, 0.294213", \ + "0.192633, 0.195723, 0.200543, 0.207633, 0.222013, 0.246453, 0.294623", \ + "0.193753, 0.196843, 0.201663, 0.208753, 0.223133, 0.247573, 0.295743", \ + "0.195713, 0.198803, 0.203623, 0.210713, 0.225093, 0.249533, 0.297703", \ + "0.202133, 0.205223, 0.210043, 0.217133, 0.231513, 0.255953, 0.304123", \ + "0.205123, 0.208213, 0.213033, 0.220123, 0.234503, 0.258943, 0.307113", \ + "0.212003, 0.215093, 0.219913, 0.227003, 0.241383, 0.265823, 0.313993" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232075, 0.235845, 0.241406, 0.249995, 0.267545, 0.298385, 0.359365", \ + "0.232875, 0.236645, 0.242205, 0.250796, 0.268345, 0.299185, 0.360165", \ + "0.234175, 0.237945, 0.243506, 0.252095, 0.269645, 0.300486, 0.361465", \ + "0.235795, 0.239565, 0.245125, 0.253715, 0.271266, 0.302105, 0.363086", \ + "0.242306, 0.246075, 0.251635, 0.260225, 0.277776, 0.308616, 0.369596", \ + "0.245295, 0.249066, 0.254626, 0.263216, 0.280765, 0.311605, 0.372585", \ + "0.251665, 0.255435, 0.260996, 0.269585, 0.287135, 0.317976, 0.378955" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179708, 0.183228, 0.188548, 0.197368, 0.214798, 0.245618, 0.306278", \ + "0.180058, 0.183578, 0.188898, 0.197718, 0.215148, 0.245968, 0.306628", \ + "0.181398, 0.184918, 0.190238, 0.199058, 0.216488, 0.247308, 0.307968", \ + "0.183358, 0.186878, 0.192198, 0.201018, 0.218448, 0.249268, 0.309928", \ + "0.189628, 0.193148, 0.198468, 0.207288, 0.224718, 0.255538, 0.316198", \ + "0.192518, 0.196038, 0.201358, 0.210178, 0.227608, 0.258428, 0.319088", \ + "0.198368, 0.201888, 0.207208, 0.216028, 0.233458, 0.264278, 0.324938" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.247921, 0.250991, 0.255531, 0.262691, 0.277001, 0.301451, 0.349411", \ + "0.248401, 0.251471, 0.256011, 0.263171, 0.277481, 0.301931, 0.349891", \ + "0.249411, 0.252481, 0.257021, 0.264181, 0.278491, 0.302941, 0.350901", \ + "0.251381, 0.254451, 0.258991, 0.266151, 0.280461, 0.304911, 0.352871", \ + "0.257611, 0.260681, 0.265221, 0.272381, 0.286691, 0.311141, 0.359101", \ + "0.260701, 0.263771, 0.268311, 0.275471, 0.289781, 0.314231, 0.362191", \ + "0.267581, 0.270651, 0.275191, 0.282351, 0.296661, 0.321111, 0.369071" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192250, 0.195340, 0.200160, 0.207250, 0.221630, 0.246070, 0.294240", \ + "0.192660, 0.195750, 0.200570, 0.207660, 0.222040, 0.246480, 0.294650", \ + "0.193780, 0.196870, 0.201690, 0.208780, 0.223160, 0.247600, 0.295770", \ + "0.195740, 0.198830, 0.203650, 0.210740, 0.225120, 0.249560, 0.297730", \ + "0.202160, 0.205250, 0.210070, 0.217160, 0.231540, 0.255980, 0.304150", \ + "0.205150, 0.208240, 0.213060, 0.220150, 0.234530, 0.258970, 0.307140", \ + "0.212030, 0.215120, 0.219940, 0.227030, 0.241410, 0.265850, 0.314020" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232103, 0.235873, 0.241433, 0.250023, 0.267573, 0.298413, 0.359393", \ + "0.232903, 0.236673, 0.242233, 0.250823, 0.268373, 0.299213, 0.360193", \ + "0.234203, 0.237973, 0.243533, 0.252123, 0.269673, 0.300513, 0.361493", \ + "0.235823, 0.239593, 0.245153, 0.253743, 0.271293, 0.302133, 0.363113", \ + "0.242333, 0.246103, 0.251663, 0.260253, 0.277803, 0.308643, 0.369623", \ + "0.245323, 0.249093, 0.254653, 0.263243, 0.280793, 0.311633, 0.372613", \ + "0.251693, 0.255463, 0.261023, 0.269613, 0.287163, 0.318003, 0.378983" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.179731, 0.183251, 0.188571, 0.197391, 0.214821, 0.245641, 0.306301", \ + "0.180081, 0.183601, 0.188921, 0.197741, 0.215171, 0.245991, 0.306651", \ + "0.181421, 0.184941, 0.190261, 0.199081, 0.216511, 0.247331, 0.307991", \ + "0.183381, 0.186901, 0.192221, 0.201041, 0.218471, 0.249291, 0.309951", \ + "0.189651, 0.193171, 0.198491, 0.207311, 0.224741, 0.255561, 0.316221", \ + "0.192541, 0.196061, 0.201381, 0.210201, 0.227631, 0.258451, 0.319111", \ + "0.198391, 0.201911, 0.207231, 0.216051, 0.233481, 0.264301, 0.324961" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.248475, 0.251545, 0.256085, 0.263245, 0.277555, 0.302005, 0.349965", \ + "0.248955, 0.252025, 0.256565, 0.263725, 0.278035, 0.302485, 0.350445", \ + "0.249965, 0.253035, 0.257575, 0.264735, 0.279045, 0.303495, 0.351455", \ + "0.251935, 0.255005, 0.259545, 0.266705, 0.281015, 0.305465, 0.353425", \ + "0.258165, 0.261235, 0.265775, 0.272935, 0.287245, 0.311695, 0.359655", \ + "0.261255, 0.264325, 0.268865, 0.276025, 0.290335, 0.314785, 0.362745", \ + "0.268135, 0.271205, 0.275745, 0.282905, 0.297215, 0.321665, 0.369625" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.192700, 0.195790, 0.200610, 0.207700, 0.222080, 0.246520, 0.294690", \ + "0.193110, 0.196200, 0.201020, 0.208110, 0.222490, 0.246930, 0.295100", \ + "0.194230, 0.197320, 0.202140, 0.209230, 0.223610, 0.248050, 0.296220", \ + "0.196190, 0.199280, 0.204100, 0.211190, 0.225570, 0.250010, 0.298180", \ + "0.202610, 0.205700, 0.210520, 0.217610, 0.231990, 0.256430, 0.304600", \ + "0.205600, 0.208690, 0.213510, 0.220600, 0.234980, 0.259420, 0.307590", \ + "0.212480, 0.215570, 0.220390, 0.227480, 0.241860, 0.266300, 0.314470" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.232657, 0.236427, 0.241987, 0.250577, 0.268127, 0.298967, 0.359947", \ + "0.233457, 0.237227, 0.242787, 0.251377, 0.268927, 0.299767, 0.360747", \ + "0.234757, 0.238527, 0.244087, 0.252677, 0.270227, 0.301067, 0.362047", \ + "0.236377, 0.240147, 0.245707, 0.254297, 0.271847, 0.302687, 0.363667", \ + "0.242887, 0.246657, 0.252217, 0.260807, 0.278357, 0.309197, 0.370177", \ + "0.245877, 0.249647, 0.255207, 0.263797, 0.281347, 0.312187, 0.373167", \ + "0.252247, 0.256017, 0.261577, 0.270167, 0.287717, 0.318557, 0.379537" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.180185, 0.183705, 0.189025, 0.197845, 0.215275, 0.246095, 0.306755", \ + "0.180535, 0.184055, 0.189375, 0.198195, 0.215625, 0.246445, 0.307105", \ + "0.181875, 0.185395, 0.190715, 0.199535, 0.216965, 0.247785, 0.308445", \ + "0.183835, 0.187355, 0.192675, 0.201495, 0.218925, 0.249745, 0.310405", \ + "0.190105, 0.193625, 0.198945, 0.207765, 0.225195, 0.256015, 0.316675", \ + "0.192995, 0.196515, 0.201835, 0.210655, 0.228085, 0.258905, 0.319565", \ + "0.198845, 0.202365, 0.207685, 0.216505, 0.233935, 0.264755, 0.325415" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.290407, 0.293477, 0.298017, 0.305177, 0.319487, 0.343937, 0.391897", \ + "0.290887, 0.293957, 0.298497, 0.305657, 0.319967, 0.344417, 0.392377", \ + "0.291897, 0.294967, 0.299507, 0.306667, 0.320977, 0.345427, 0.393387", \ + "0.293867, 0.296937, 0.301477, 0.308637, 0.322947, 0.347397, 0.395357", \ + "0.300097, 0.303167, 0.307707, 0.314867, 0.329177, 0.353627, 0.401587", \ + "0.303187, 0.306257, 0.310797, 0.317957, 0.332267, 0.356717, 0.404677", \ + "0.310067, 0.313137, 0.317677, 0.324837, 0.339147, 0.363597, 0.411557" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.227081, 0.230171, 0.234991, 0.242081, 0.256461, 0.280901, 0.329071", \ + "0.227491, 0.230581, 0.235401, 0.242491, 0.256871, 0.281311, 0.329481", \ + "0.228611, 0.231701, 0.236521, 0.243611, 0.257991, 0.282431, 0.330601", \ + "0.230571, 0.233661, 0.238481, 0.245571, 0.259951, 0.284391, 0.332561", \ + "0.236991, 0.240081, 0.244901, 0.251991, 0.266371, 0.290811, 0.338981", \ + "0.239981, 0.243071, 0.247891, 0.254981, 0.269361, 0.293801, 0.341971", \ + "0.246861, 0.249951, 0.254771, 0.261861, 0.276241, 0.300681, 0.348851" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.274590, 0.278360, 0.283920, 0.292510, 0.310060, 0.340900, 0.401880", \ + "0.275390, 0.279160, 0.284720, 0.293310, 0.310860, 0.341700, 0.402680", \ + "0.276690, 0.280460, 0.286020, 0.294610, 0.312160, 0.343000, 0.403980", \ + "0.278310, 0.282080, 0.287640, 0.296230, 0.313780, 0.344620, 0.405600", \ + "0.284820, 0.288590, 0.294150, 0.302740, 0.320290, 0.351130, 0.412110", \ + "0.287810, 0.291580, 0.297140, 0.305730, 0.323280, 0.354120, 0.415100", \ + "0.294180, 0.297950, 0.303510, 0.312100, 0.329650, 0.360490, 0.421470" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.214566, 0.218086, 0.223406, 0.232226, 0.249656, 0.280476, 0.341136", \ + "0.214916, 0.218436, 0.223756, 0.232576, 0.250006, 0.280826, 0.341486", \ + "0.216256, 0.219776, 0.225096, 0.233916, 0.251346, 0.282166, 0.342826", \ + "0.218216, 0.221736, 0.227056, 0.235876, 0.253306, 0.284126, 0.344786", \ + "0.224486, 0.228006, 0.233326, 0.242146, 0.259576, 0.290396, 0.351056", \ + "0.227376, 0.230896, 0.236216, 0.245036, 0.262466, 0.293286, 0.353946", \ + "0.233226, 0.236746, 0.242066, 0.250886, 0.268316, 0.299136, 0.359796" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.327093, 0.330163, 0.334703, 0.341863, 0.356173, 0.380623, 0.428583", \ + "0.327573, 0.330643, 0.335183, 0.342343, 0.356653, 0.381103, 0.429063", \ + "0.328583, 0.331653, 0.336193, 0.343353, 0.357663, 0.382113, 0.430073", \ + "0.330553, 0.333623, 0.338163, 0.345323, 0.359633, 0.384083, 0.432043", \ + "0.336783, 0.339853, 0.344393, 0.351553, 0.365863, 0.390313, 0.438273", \ + "0.339873, 0.342943, 0.347483, 0.354643, 0.368953, 0.393403, 0.441363", \ + "0.346753, 0.349823, 0.354363, 0.361523, 0.375833, 0.400283, 0.448243" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.257164, 0.260254, 0.265074, 0.272164, 0.286544, 0.310984, 0.359154", \ + "0.257574, 0.260664, 0.265484, 0.272574, 0.286954, 0.311394, 0.359564", \ + "0.258694, 0.261784, 0.266604, 0.273694, 0.288074, 0.312514, 0.360684", \ + "0.260654, 0.263744, 0.268564, 0.275654, 0.290034, 0.314474, 0.362644", \ + "0.267074, 0.270164, 0.274984, 0.282074, 0.296454, 0.320894, 0.369064", \ + "0.270064, 0.273154, 0.277974, 0.285064, 0.299444, 0.323884, 0.372054", \ + "0.276944, 0.280034, 0.284854, 0.291944, 0.306324, 0.330764, 0.378934" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.311275, 0.315045, 0.320605, 0.329195, 0.346745, 0.377585, 0.438565", \ + "0.312075, 0.315845, 0.321405, 0.329995, 0.347545, 0.378385, 0.439365", \ + "0.313375, 0.317145, 0.322705, 0.331295, 0.348845, 0.379685, 0.440665", \ + "0.314995, 0.318765, 0.324325, 0.332915, 0.350465, 0.381305, 0.442285", \ + "0.321505, 0.325275, 0.330835, 0.339425, 0.356975, 0.387815, 0.448795", \ + "0.324495, 0.328265, 0.333825, 0.342415, 0.359965, 0.390805, 0.451785", \ + "0.330865, 0.334635, 0.340195, 0.348785, 0.366335, 0.397175, 0.458155" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.244644, 0.248164, 0.253484, 0.262304, 0.279734, 0.310554, 0.371214", \ + "0.244994, 0.248514, 0.253834, 0.262654, 0.280084, 0.310904, 0.371564", \ + "0.246334, 0.249854, 0.255174, 0.263994, 0.281424, 0.312244, 0.372904", \ + "0.248294, 0.251814, 0.257134, 0.265954, 0.283384, 0.314204, 0.374864", \ + "0.254564, 0.258084, 0.263404, 0.272224, 0.289654, 0.320474, 0.381134", \ + "0.257454, 0.260974, 0.266294, 0.275114, 0.292544, 0.323364, 0.384024", \ + "0.263304, 0.266824, 0.272144, 0.280964, 0.298394, 0.329214, 0.389874" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.365550, 0.368620, 0.373160, 0.380320, 0.394630, 0.419080, 0.467040", \ + "0.366030, 0.369100, 0.373640, 0.380800, 0.395110, 0.419560, 0.467520", \ + "0.367040, 0.370110, 0.374650, 0.381810, 0.396120, 0.420570, 0.468530", \ + "0.369010, 0.372080, 0.376620, 0.383780, 0.398090, 0.422540, 0.470500", \ + "0.375240, 0.378310, 0.382850, 0.390010, 0.404320, 0.428770, 0.476730", \ + "0.378330, 0.381400, 0.385940, 0.393100, 0.407410, 0.431860, 0.479820", \ + "0.385210, 0.388280, 0.392820, 0.399980, 0.414290, 0.438740, 0.486700" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.288691, 0.291782, 0.296602, 0.303692, 0.318072, 0.342512, 0.390682", \ + "0.289102, 0.292191, 0.297012, 0.304102, 0.318482, 0.342921, 0.391092", \ + "0.290222, 0.293312, 0.298131, 0.305222, 0.319602, 0.344042, 0.392211", \ + "0.292182, 0.295272, 0.300092, 0.307181, 0.321562, 0.346002, 0.394172", \ + "0.298602, 0.301692, 0.306511, 0.313602, 0.327982, 0.352421, 0.400591", \ + "0.301592, 0.304681, 0.309502, 0.316592, 0.330972, 0.355411, 0.403582", \ + "0.308472, 0.311561, 0.316382, 0.323472, 0.337852, 0.362292, 0.410462" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.349733, 0.353503, 0.359063, 0.367653, 0.385203, 0.416043, 0.477023", \ + "0.350533, 0.354303, 0.359863, 0.368453, 0.386003, 0.416843, 0.477823", \ + "0.351833, 0.355603, 0.361163, 0.369753, 0.387303, 0.418143, 0.479123", \ + "0.353453, 0.357223, 0.362783, 0.371373, 0.388923, 0.419763, 0.480743", \ + "0.359963, 0.363733, 0.369293, 0.377883, 0.395433, 0.426273, 0.487253", \ + "0.362953, 0.366723, 0.372283, 0.380873, 0.398423, 0.429263, 0.490243", \ + "0.369323, 0.373093, 0.378653, 0.387243, 0.404793, 0.435633, 0.496613" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.276176, 0.279696, 0.285016, 0.293836, 0.311266, 0.342086, 0.402746", \ + "0.276526, 0.280046, 0.285366, 0.294186, 0.311616, 0.342436, 0.403096", \ + "0.277866, 0.281386, 0.286706, 0.295526, 0.312956, 0.343776, 0.404436", \ + "0.279826, 0.283346, 0.288666, 0.297486, 0.314916, 0.345736, 0.406396", \ + "0.286096, 0.289616, 0.294936, 0.303756, 0.321186, 0.352006, 0.412666", \ + "0.288986, 0.292506, 0.297826, 0.306646, 0.324076, 0.354896, 0.415556", \ + "0.294836, 0.298356, 0.303676, 0.312496, 0.329926, 0.360746, 0.421406" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.402236, 0.405306, 0.409846, 0.417006, 0.431316, 0.455766, 0.503726", \ + "0.402716, 0.405786, 0.410326, 0.417486, 0.431796, 0.456246, 0.504206", \ + "0.403726, 0.406796, 0.411336, 0.418496, 0.432806, 0.457256, 0.505216", \ + "0.405696, 0.408766, 0.413306, 0.420466, 0.434776, 0.459226, 0.507186", \ + "0.411926, 0.414996, 0.419536, 0.426696, 0.441006, 0.465456, 0.513416", \ + "0.415016, 0.418086, 0.422626, 0.429786, 0.444096, 0.468546, 0.516506", \ + "0.421896, 0.424966, 0.429506, 0.436666, 0.450976, 0.475426, 0.523386" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.318771, 0.321861, 0.326681, 0.333771, 0.348151, 0.372591, 0.420761", \ + "0.319181, 0.322271, 0.327091, 0.334181, 0.348561, 0.373001, 0.421171", \ + "0.320301, 0.323391, 0.328211, 0.335301, 0.349681, 0.374121, 0.422291", \ + "0.322261, 0.325351, 0.330171, 0.337261, 0.351641, 0.376081, 0.424251", \ + "0.328681, 0.331771, 0.336591, 0.343681, 0.358061, 0.382501, 0.430671", \ + "0.331671, 0.334761, 0.339581, 0.346671, 0.361051, 0.385491, 0.433661", \ + "0.338551, 0.341641, 0.346461, 0.353551, 0.367931, 0.392371, 0.440541" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949", \ + "0.011986, 0.014946, 0.020133, 0.029314, 0.050472, 0.092061, 0.178949" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.386419, 0.390189, 0.395749, 0.404339, 0.421889, 0.452729, 0.513709", \ + "0.387219, 0.390989, 0.396549, 0.405139, 0.422689, 0.453529, 0.514509", \ + "0.388519, 0.392289, 0.397849, 0.406439, 0.423989, 0.454829, 0.515809", \ + "0.390139, 0.393909, 0.399469, 0.408059, 0.425609, 0.456449, 0.517429", \ + "0.396649, 0.400419, 0.405979, 0.414569, 0.432119, 0.462959, 0.523939", \ + "0.399639, 0.403409, 0.408969, 0.417559, 0.435109, 0.465949, 0.526929", \ + "0.406009, 0.409779, 0.415339, 0.423929, 0.441479, 0.472319, 0.533299" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.306256, 0.309776, 0.315096, 0.323916, 0.341346, 0.372166, 0.432826", \ + "0.306606, 0.310126, 0.315446, 0.324266, 0.341696, 0.372516, 0.433176", \ + "0.307946, 0.311466, 0.316786, 0.325606, 0.343036, 0.373856, 0.434516", \ + "0.309906, 0.313426, 0.318746, 0.327566, 0.344996, 0.375816, 0.436476", \ + "0.316176, 0.319696, 0.325016, 0.333836, 0.351266, 0.382086, 0.442746", \ + "0.319066, 0.322586, 0.327906, 0.336726, 0.354156, 0.384976, 0.445636", \ + "0.324916, 0.328436, 0.333756, 0.342576, 0.360006, 0.390826, 0.451486" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131", \ + "0.013610, 0.017442, 0.023847, 0.034971, 0.061945, 0.114938, 0.229131" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013734, 0.014267, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338", \ + "0.013748, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353", \ + "0.013762, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367", \ + "0.013775, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381", \ + "0.013789, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381, 0.014396", \ + "0.014205, 0.014737, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811", \ + "0.014219, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811, 0.014826" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008956, 0.009213, 0.009222, 0.009231, 0.009240, 0.009250, 0.009259", \ + "0.009094, 0.009352, 0.009361, 0.009370, 0.009380, 0.009389, 0.009398", \ + "0.009419, 0.009676, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724", \ + "0.009428, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734", \ + "0.009437, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744", \ + "0.009447, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753", \ + "0.009456, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753, 0.009763" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.013734, 0.014267, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338", \ + "0.013748, 0.014281, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353", \ + "0.013762, 0.014295, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367", \ + "0.013775, 0.014310, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381", \ + "0.013789, 0.014324, 0.014338, 0.014353, 0.014367, 0.014381, 0.014396", \ + "0.014205, 0.014737, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811", \ + "0.014219, 0.014752, 0.014767, 0.014782, 0.014796, 0.014811, 0.014826" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008956, 0.009213, 0.009222, 0.009231, 0.009240, 0.009250, 0.009259", \ + "0.009094, 0.009352, 0.009361, 0.009370, 0.009380, 0.009389, 0.009398", \ + "0.009419, 0.009676, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724", \ + "0.009428, 0.009685, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734", \ + "0.009437, 0.009695, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744", \ + "0.009447, 0.009705, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753", \ + "0.009456, 0.009714, 0.009724, 0.009734, 0.009744, 0.009753, 0.009763" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x19_wm0_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272273, 0.273973, 0.275793, 0.280583, 0.294693, 0.318173, 0.365183", \ + "0.272643, 0.274343, 0.276163, 0.280953, 0.295063, 0.318543, 0.365553", \ + "0.273383, 0.275083, 0.276903, 0.281693, 0.295803, 0.319283, 0.366293", \ + "0.275573, 0.277273, 0.279093, 0.283883, 0.297993, 0.321473, 0.368483", \ + "0.281953, 0.283653, 0.285473, 0.290263, 0.304373, 0.327853, 0.374863", \ + "0.285053, 0.286753, 0.288573, 0.293363, 0.307473, 0.330953, 0.377963", \ + "0.291883, 0.293583, 0.295403, 0.300193, 0.314303, 0.337783, 0.384793" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.221856, 0.224056, 0.225726, 0.230516, 0.244566, 0.267856, 0.314806", \ + "0.222446, 0.224646, 0.226316, 0.231106, 0.245156, 0.268446, 0.315396", \ + "0.223416, 0.225616, 0.227286, 0.232076, 0.246126, 0.269416, 0.316366", \ + "0.225556, 0.227756, 0.229426, 0.234216, 0.248266, 0.271556, 0.318506", \ + "0.231596, 0.233796, 0.235466, 0.240256, 0.254306, 0.277596, 0.324546", \ + "0.235186, 0.237386, 0.239056, 0.243846, 0.257896, 0.281186, 0.328136", \ + "0.242016, 0.244216, 0.245886, 0.250676, 0.264726, 0.288016, 0.334966" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.254905, 0.257585, 0.260125, 0.266985, 0.287895, 0.322465, 0.391895", \ + "0.255405, 0.258085, 0.260625, 0.267485, 0.288395, 0.322965, 0.392395", \ + "0.256715, 0.259395, 0.261935, 0.268795, 0.289705, 0.324275, 0.393705", \ + "0.258625, 0.261305, 0.263845, 0.270705, 0.291615, 0.326185, 0.395615", \ + "0.264995, 0.267675, 0.270215, 0.277075, 0.297985, 0.332555, 0.401985", \ + "0.267855, 0.270535, 0.273075, 0.279935, 0.300845, 0.335415, 0.404845", \ + "0.274495, 0.277175, 0.279715, 0.286575, 0.307485, 0.342055, 0.411485" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.207840, 0.210610, 0.212990, 0.220120, 0.240740, 0.275440, 0.344850", \ + "0.208400, 0.211170, 0.213550, 0.220680, 0.241300, 0.276000, 0.345410", \ + "0.209460, 0.212230, 0.214610, 0.221740, 0.242360, 0.277060, 0.346470", \ + "0.211500, 0.214270, 0.216650, 0.223780, 0.244400, 0.279100, 0.348510", \ + "0.217780, 0.220550, 0.222930, 0.230060, 0.250680, 0.285380, 0.354790", \ + "0.220680, 0.223450, 0.225830, 0.232960, 0.253580, 0.288280, 0.357690", \ + "0.226680, 0.229450, 0.231830, 0.238960, 0.259580, 0.294280, 0.363690" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272843, 0.274543, 0.276363, 0.281153, 0.295263, 0.318743, 0.365753", \ + "0.273213, 0.274913, 0.276733, 0.281523, 0.295633, 0.319113, 0.366123", \ + "0.273953, 0.275653, 0.277473, 0.282263, 0.296373, 0.319853, 0.366863", \ + "0.276143, 0.277843, 0.279663, 0.284453, 0.298563, 0.322043, 0.369053", \ + "0.282523, 0.284223, 0.286043, 0.290833, 0.304943, 0.328423, 0.375433", \ + "0.285623, 0.287323, 0.289143, 0.293933, 0.308043, 0.331523, 0.378533", \ + "0.292453, 0.294153, 0.295973, 0.300763, 0.314873, 0.338353, 0.385363" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222329, 0.224529, 0.226199, 0.230989, 0.245039, 0.268329, 0.315279", \ + "0.222919, 0.225119, 0.226789, 0.231579, 0.245629, 0.268919, 0.315869", \ + "0.223889, 0.226089, 0.227759, 0.232549, 0.246599, 0.269889, 0.316839", \ + "0.226029, 0.228229, 0.229899, 0.234689, 0.248739, 0.272029, 0.318979", \ + "0.232069, 0.234269, 0.235939, 0.240729, 0.254779, 0.278069, 0.325019", \ + "0.235659, 0.237859, 0.239529, 0.244319, 0.258369, 0.281659, 0.328609", \ + "0.242489, 0.244689, 0.246359, 0.251149, 0.265199, 0.288489, 0.335439" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.255486, 0.258166, 0.260706, 0.267566, 0.288476, 0.323046, 0.392476", \ + "0.255986, 0.258666, 0.261206, 0.268066, 0.288976, 0.323546, 0.392976", \ + "0.257296, 0.259976, 0.262516, 0.269376, 0.290286, 0.324856, 0.394286", \ + "0.259206, 0.261886, 0.264426, 0.271286, 0.292196, 0.326766, 0.396196", \ + "0.265576, 0.268256, 0.270796, 0.277656, 0.298566, 0.333136, 0.402566", \ + "0.268436, 0.271116, 0.273656, 0.280516, 0.301426, 0.335996, 0.405426", \ + "0.275076, 0.277756, 0.280296, 0.287156, 0.308066, 0.342636, 0.412066" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208312, 0.211082, 0.213462, 0.220592, 0.241212, 0.275912, 0.345322", \ + "0.208872, 0.211642, 0.214022, 0.221152, 0.241772, 0.276472, 0.345882", \ + "0.209932, 0.212702, 0.215082, 0.222212, 0.242832, 0.277532, 0.346942", \ + "0.211972, 0.214742, 0.217122, 0.224252, 0.244872, 0.279572, 0.348982", \ + "0.218252, 0.221022, 0.223402, 0.230532, 0.251152, 0.285852, 0.355262", \ + "0.221152, 0.223922, 0.226302, 0.233432, 0.254052, 0.288752, 0.358162", \ + "0.227152, 0.229922, 0.232302, 0.239432, 0.260052, 0.294752, 0.364162" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272876, 0.274576, 0.276396, 0.281186, 0.295296, 0.318776, 0.365786", \ + "0.273246, 0.274946, 0.276766, 0.281556, 0.295666, 0.319146, 0.366156", \ + "0.273986, 0.275686, 0.277506, 0.282296, 0.296406, 0.319886, 0.366896", \ + "0.276176, 0.277876, 0.279696, 0.284486, 0.298596, 0.322076, 0.369086", \ + "0.282556, 0.284256, 0.286076, 0.290866, 0.304976, 0.328456, 0.375466", \ + "0.285656, 0.287356, 0.289176, 0.293966, 0.308076, 0.331556, 0.378566", \ + "0.292486, 0.294186, 0.296006, 0.300796, 0.314906, 0.338386, 0.385396" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222351, 0.224551, 0.226221, 0.231011, 0.245061, 0.268351, 0.315301", \ + "0.222941, 0.225141, 0.226811, 0.231601, 0.245651, 0.268941, 0.315891", \ + "0.223911, 0.226111, 0.227781, 0.232571, 0.246621, 0.269911, 0.316861", \ + "0.226051, 0.228251, 0.229921, 0.234711, 0.248761, 0.272051, 0.319001", \ + "0.232091, 0.234291, 0.235961, 0.240751, 0.254801, 0.278091, 0.325041", \ + "0.235681, 0.237881, 0.239551, 0.244341, 0.258391, 0.281681, 0.328631", \ + "0.242511, 0.244711, 0.246381, 0.251171, 0.265221, 0.288511, 0.335461" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.255519, 0.258199, 0.260739, 0.267599, 0.288509, 0.323079, 0.392509", \ + "0.256019, 0.258699, 0.261239, 0.268099, 0.289009, 0.323579, 0.393009", \ + "0.257329, 0.260009, 0.262549, 0.269409, 0.290319, 0.324889, 0.394319", \ + "0.259239, 0.261919, 0.264459, 0.271319, 0.292229, 0.326799, 0.396229", \ + "0.265609, 0.268289, 0.270829, 0.277689, 0.298599, 0.333169, 0.402599", \ + "0.268469, 0.271149, 0.273689, 0.280549, 0.301459, 0.336029, 0.405459", \ + "0.275109, 0.277789, 0.280329, 0.287189, 0.308099, 0.342669, 0.412099" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208339, 0.211109, 0.213489, 0.220619, 0.241239, 0.275939, 0.345349", \ + "0.208899, 0.211669, 0.214049, 0.221179, 0.241799, 0.276499, 0.345909", \ + "0.209959, 0.212729, 0.215109, 0.222239, 0.242859, 0.277559, 0.346969", \ + "0.211999, 0.214769, 0.217149, 0.224279, 0.244899, 0.279599, 0.349009", \ + "0.218279, 0.221049, 0.223429, 0.230559, 0.251179, 0.285879, 0.355289", \ + "0.221179, 0.223949, 0.226329, 0.233459, 0.254079, 0.288779, 0.358189", \ + "0.227179, 0.229949, 0.232329, 0.239459, 0.260079, 0.294779, 0.364189" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.273425, 0.275125, 0.276945, 0.281735, 0.295845, 0.319325, 0.366335", \ + "0.273795, 0.275495, 0.277315, 0.282105, 0.296215, 0.319695, 0.366705", \ + "0.274535, 0.276235, 0.278055, 0.282845, 0.296955, 0.320435, 0.367445", \ + "0.276725, 0.278425, 0.280245, 0.285035, 0.299145, 0.322625, 0.369635", \ + "0.283105, 0.284805, 0.286625, 0.291415, 0.305525, 0.329005, 0.376015", \ + "0.286205, 0.287905, 0.289725, 0.294515, 0.308625, 0.332105, 0.379115", \ + "0.293035, 0.294735, 0.296555, 0.301345, 0.315455, 0.338935, 0.385945" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222805, 0.225005, 0.226675, 0.231465, 0.245515, 0.268805, 0.315755", \ + "0.223395, 0.225595, 0.227265, 0.232055, 0.246105, 0.269395, 0.316345", \ + "0.224365, 0.226565, 0.228235, 0.233025, 0.247075, 0.270365, 0.317315", \ + "0.226505, 0.228705, 0.230375, 0.235165, 0.249215, 0.272505, 0.319455", \ + "0.232545, 0.234745, 0.236415, 0.241205, 0.255255, 0.278545, 0.325495", \ + "0.236135, 0.238335, 0.240005, 0.244795, 0.258845, 0.282135, 0.329085", \ + "0.242965, 0.245165, 0.246835, 0.251625, 0.265675, 0.288965, 0.335915" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.256067, 0.258747, 0.261287, 0.268147, 0.289057, 0.323627, 0.393057", \ + "0.256567, 0.259247, 0.261787, 0.268647, 0.289557, 0.324127, 0.393557", \ + "0.257877, 0.260557, 0.263097, 0.269957, 0.290867, 0.325437, 0.394867", \ + "0.259787, 0.262467, 0.265007, 0.271867, 0.292777, 0.327347, 0.396777", \ + "0.266157, 0.268837, 0.271377, 0.278237, 0.299147, 0.333717, 0.403147", \ + "0.269017, 0.271697, 0.274237, 0.281097, 0.302007, 0.336577, 0.406007", \ + "0.275657, 0.278338, 0.280877, 0.287737, 0.308647, 0.343217, 0.412647" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208794, 0.211564, 0.213944, 0.221074, 0.241694, 0.276394, 0.345804", \ + "0.209354, 0.212124, 0.214504, 0.221634, 0.242254, 0.276954, 0.346364", \ + "0.210414, 0.213184, 0.215564, 0.222694, 0.243314, 0.278014, 0.347424", \ + "0.212454, 0.215224, 0.217604, 0.224734, 0.245354, 0.280054, 0.349464", \ + "0.218734, 0.221504, 0.223884, 0.231014, 0.251634, 0.286334, 0.355744", \ + "0.221634, 0.224404, 0.226784, 0.233914, 0.254534, 0.289234, 0.358644", \ + "0.227634, 0.230404, 0.232784, 0.239914, 0.260534, 0.295234, 0.364644" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.315362, 0.317062, 0.318882, 0.323672, 0.337782, 0.361263, 0.408273", \ + "0.315732, 0.317432, 0.319253, 0.324042, 0.338152, 0.361632, 0.408642", \ + "0.316473, 0.318172, 0.319992, 0.324782, 0.338893, 0.362372, 0.409382", \ + "0.318662, 0.320362, 0.322183, 0.326972, 0.341083, 0.364562, 0.411572", \ + "0.325042, 0.326743, 0.328562, 0.333353, 0.347462, 0.370943, 0.417953", \ + "0.328142, 0.329843, 0.331662, 0.336453, 0.350562, 0.374043, 0.421053", \ + "0.334972, 0.336673, 0.338492, 0.343283, 0.357392, 0.380873, 0.427883" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.257186, 0.259386, 0.261056, 0.265846, 0.279896, 0.303186, 0.350136", \ + "0.257776, 0.259976, 0.261646, 0.266436, 0.280486, 0.303776, 0.350726", \ + "0.258746, 0.260946, 0.262616, 0.267406, 0.281456, 0.304746, 0.351696", \ + "0.260886, 0.263086, 0.264756, 0.269546, 0.283596, 0.306886, 0.353836", \ + "0.266926, 0.269126, 0.270796, 0.275586, 0.289636, 0.312926, 0.359876", \ + "0.270516, 0.272716, 0.274386, 0.279176, 0.293226, 0.316516, 0.363466", \ + "0.277346, 0.279546, 0.281216, 0.286006, 0.300056, 0.323346, 0.370296" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.298000, 0.300680, 0.303220, 0.310080, 0.330990, 0.365560, 0.434990", \ + "0.298500, 0.301180, 0.303720, 0.310580, 0.331490, 0.366060, 0.435490", \ + "0.299810, 0.302490, 0.305030, 0.311890, 0.332800, 0.367370, 0.436800", \ + "0.301720, 0.304400, 0.306940, 0.313800, 0.334710, 0.369280, 0.438710", \ + "0.308090, 0.310770, 0.313310, 0.320170, 0.341080, 0.375650, 0.445080", \ + "0.310950, 0.313630, 0.316170, 0.323030, 0.343940, 0.378510, 0.447940", \ + "0.317590, 0.320270, 0.322810, 0.329670, 0.350580, 0.385150, 0.454580" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.243169, 0.245939, 0.248319, 0.255449, 0.276069, 0.310769, 0.380179", \ + "0.243729, 0.246499, 0.248879, 0.256009, 0.276629, 0.311329, 0.380739", \ + "0.244789, 0.247559, 0.249939, 0.257069, 0.277689, 0.312389, 0.381799", \ + "0.246829, 0.249599, 0.251979, 0.259109, 0.279729, 0.314429, 0.383839", \ + "0.253109, 0.255879, 0.258259, 0.265389, 0.286009, 0.320709, 0.390119", \ + "0.256009, 0.258779, 0.261159, 0.268289, 0.288909, 0.323609, 0.393019", \ + "0.262009, 0.264779, 0.267159, 0.274289, 0.294909, 0.329609, 0.399019" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.352048, 0.353748, 0.355568, 0.360358, 0.374468, 0.397948, 0.444958", \ + "0.352418, 0.354118, 0.355938, 0.360728, 0.374838, 0.398318, 0.445328", \ + "0.353158, 0.354858, 0.356678, 0.361468, 0.375578, 0.399058, 0.446068", \ + "0.355348, 0.357048, 0.358868, 0.363658, 0.377769, 0.401248, 0.448258", \ + "0.361728, 0.363428, 0.365248, 0.370038, 0.384148, 0.407629, 0.454639", \ + "0.364828, 0.366528, 0.368348, 0.373138, 0.387248, 0.410728, 0.457738", \ + "0.371658, 0.373358, 0.375178, 0.379968, 0.394078, 0.417558, 0.464568" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287270, 0.289470, 0.291140, 0.295930, 0.309980, 0.333270, 0.380220", \ + "0.287860, 0.290060, 0.291730, 0.296520, 0.310570, 0.333860, 0.380810", \ + "0.288830, 0.291030, 0.292700, 0.297490, 0.311540, 0.334830, 0.381780", \ + "0.290970, 0.293170, 0.294840, 0.299630, 0.313680, 0.336970, 0.383920", \ + "0.297010, 0.299210, 0.300880, 0.305670, 0.319720, 0.343010, 0.389960", \ + "0.300600, 0.302800, 0.304470, 0.309260, 0.323310, 0.346600, 0.393550", \ + "0.307430, 0.309630, 0.311300, 0.316090, 0.330140, 0.353430, 0.400380" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.334691, 0.337371, 0.339911, 0.346771, 0.367681, 0.402251, 0.471681", \ + "0.335191, 0.337871, 0.340411, 0.347271, 0.368181, 0.402751, 0.472181", \ + "0.336501, 0.339181, 0.341721, 0.348581, 0.369491, 0.404061, 0.473491", \ + "0.338411, 0.341091, 0.343631, 0.350491, 0.371401, 0.405971, 0.475401", \ + "0.344781, 0.347461, 0.350001, 0.356861, 0.377771, 0.412341, 0.481771", \ + "0.347641, 0.350321, 0.352861, 0.359721, 0.380631, 0.415201, 0.484631", \ + "0.354281, 0.356961, 0.359501, 0.366361, 0.387271, 0.421841, 0.491271" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.273254, 0.276024, 0.278404, 0.285534, 0.306154, 0.340854, 0.410264", \ + "0.273814, 0.276584, 0.278964, 0.286094, 0.306714, 0.341414, 0.410824", \ + "0.274874, 0.277644, 0.280024, 0.287154, 0.307774, 0.342474, 0.411884", \ + "0.276914, 0.279684, 0.282064, 0.289194, 0.309814, 0.344514, 0.413924", \ + "0.283194, 0.285964, 0.288344, 0.295474, 0.316094, 0.350794, 0.420204", \ + "0.286094, 0.288864, 0.291244, 0.298374, 0.318994, 0.353694, 0.423104", \ + "0.292094, 0.294864, 0.297244, 0.304374, 0.324994, 0.359694, 0.429104" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.390501, 0.392201, 0.394021, 0.398811, 0.412921, 0.436401, 0.483411", \ + "0.390871, 0.392571, 0.394391, 0.399181, 0.413291, 0.436771, 0.483781", \ + "0.391611, 0.393311, 0.395131, 0.399921, 0.414031, 0.437511, 0.484521", \ + "0.393801, 0.395501, 0.397321, 0.402111, 0.416221, 0.439701, 0.486711", \ + "0.400181, 0.401881, 0.403701, 0.408491, 0.422601, 0.446081, 0.493091", \ + "0.403281, 0.404981, 0.406801, 0.411591, 0.425701, 0.449181, 0.496191", \ + "0.410111, 0.411811, 0.413631, 0.418421, 0.432531, 0.456011, 0.503021" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.318802, 0.321002, 0.322672, 0.327462, 0.341512, 0.364802, 0.411752", \ + "0.319392, 0.321592, 0.323262, 0.328052, 0.342102, 0.365392, 0.412342", \ + "0.320362, 0.322562, 0.324232, 0.329022, 0.343072, 0.366362, 0.413312", \ + "0.322502, 0.324702, 0.326372, 0.331162, 0.345212, 0.368502, 0.415452", \ + "0.328542, 0.330742, 0.332412, 0.337202, 0.351252, 0.374542, 0.421492", \ + "0.332132, 0.334332, 0.336002, 0.340792, 0.354842, 0.378132, 0.425082", \ + "0.338962, 0.341162, 0.342832, 0.347622, 0.361672, 0.384962, 0.431912" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.373143, 0.375823, 0.378363, 0.385223, 0.406133, 0.440703, 0.510133", \ + "0.373643, 0.376323, 0.378863, 0.385723, 0.406633, 0.441203, 0.510633", \ + "0.374953, 0.377633, 0.380173, 0.387033, 0.407943, 0.442513, 0.511943", \ + "0.376863, 0.379543, 0.382083, 0.388943, 0.409853, 0.444423, 0.513853", \ + "0.383233, 0.385913, 0.388453, 0.395313, 0.416223, 0.450793, 0.520223", \ + "0.386093, 0.388773, 0.391313, 0.398173, 0.419083, 0.453653, 0.523083", \ + "0.392733, 0.395413, 0.397953, 0.404813, 0.425723, 0.460293, 0.529723" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.304785, 0.307555, 0.309935, 0.317065, 0.337685, 0.372385, 0.441795", \ + "0.305345, 0.308115, 0.310495, 0.317625, 0.338245, 0.372945, 0.442355", \ + "0.306405, 0.309175, 0.311555, 0.318685, 0.339305, 0.374005, 0.443415", \ + "0.308445, 0.311215, 0.313595, 0.320725, 0.341345, 0.376045, 0.445455", \ + "0.314725, 0.317495, 0.319875, 0.327005, 0.347625, 0.382325, 0.451735", \ + "0.317625, 0.320395, 0.322775, 0.329905, 0.350525, 0.385225, 0.454635", \ + "0.323625, 0.326395, 0.328775, 0.335905, 0.356525, 0.391225, 0.460635" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.427187, 0.428887, 0.430707, 0.435497, 0.449607, 0.473087, 0.520097", \ + "0.427557, 0.429257, 0.431077, 0.435867, 0.449977, 0.473457, 0.520467", \ + "0.428297, 0.429997, 0.431817, 0.436607, 0.450717, 0.474197, 0.521207", \ + "0.430487, 0.432187, 0.434007, 0.438797, 0.452907, 0.476387, 0.523397", \ + "0.436867, 0.438567, 0.440387, 0.445177, 0.459287, 0.482767, 0.529777", \ + "0.439967, 0.441667, 0.443487, 0.448277, 0.462387, 0.485867, 0.532877", \ + "0.446797, 0.448497, 0.450317, 0.455107, 0.469217, 0.492697, 0.539707" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.348876, 0.351076, 0.352746, 0.357536, 0.371586, 0.394876, 0.441826", \ + "0.349466, 0.351666, 0.353336, 0.358126, 0.372176, 0.395466, 0.442416", \ + "0.350436, 0.352636, 0.354306, 0.359096, 0.373146, 0.396436, 0.443386", \ + "0.352576, 0.354776, 0.356446, 0.361236, 0.375286, 0.398576, 0.445526", \ + "0.358616, 0.360816, 0.362486, 0.367276, 0.381326, 0.404616, 0.451566", \ + "0.362206, 0.364406, 0.366076, 0.370866, 0.384916, 0.408206, 0.455156", \ + "0.369036, 0.371236, 0.372906, 0.377696, 0.391746, 0.415036, 0.461986" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.409823, 0.412503, 0.415043, 0.421903, 0.442813, 0.477383, 0.546813", \ + "0.410323, 0.413003, 0.415543, 0.422403, 0.443313, 0.477883, 0.547313", \ + "0.411633, 0.414313, 0.416853, 0.423713, 0.444623, 0.479193, 0.548623", \ + "0.413543, 0.416223, 0.418763, 0.425623, 0.446533, 0.481103, 0.550533", \ + "0.419913, 0.422593, 0.425133, 0.431993, 0.452903, 0.487473, 0.556903", \ + "0.422773, 0.425453, 0.427993, 0.434853, 0.455763, 0.490333, 0.559763", \ + "0.429413, 0.432093, 0.434633, 0.441493, 0.462403, 0.496973, 0.566403" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.334859, 0.337629, 0.340009, 0.347139, 0.367759, 0.402459, 0.471869", \ + "0.335419, 0.338189, 0.340569, 0.347699, 0.368319, 0.403019, 0.472429", \ + "0.336479, 0.339249, 0.341629, 0.348759, 0.369379, 0.404079, 0.473489", \ + "0.338519, 0.341289, 0.343669, 0.350799, 0.371419, 0.406119, 0.475529", \ + "0.344799, 0.347569, 0.349949, 0.357079, 0.377699, 0.412399, 0.481809", \ + "0.347699, 0.350469, 0.352849, 0.359979, 0.380599, 0.415299, 0.484709", \ + "0.353699, 0.356469, 0.358849, 0.365979, 0.386599, 0.421299, 0.490709" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272273, 0.273973, 0.275793, 0.280583, 0.294693, 0.318173, 0.365183", \ + "0.272643, 0.274343, 0.276163, 0.280953, 0.295063, 0.318543, 0.365553", \ + "0.273383, 0.275083, 0.276903, 0.281693, 0.295803, 0.319283, 0.366293", \ + "0.275573, 0.277273, 0.279093, 0.283883, 0.297993, 0.321473, 0.368483", \ + "0.281953, 0.283653, 0.285473, 0.290263, 0.304373, 0.327853, 0.374863", \ + "0.285053, 0.286753, 0.288573, 0.293363, 0.307473, 0.330953, 0.377963", \ + "0.291883, 0.293583, 0.295403, 0.300193, 0.314303, 0.337783, 0.384793" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.221856, 0.224056, 0.225726, 0.230516, 0.244566, 0.267856, 0.314806", \ + "0.222446, 0.224646, 0.226316, 0.231106, 0.245156, 0.268446, 0.315396", \ + "0.223416, 0.225616, 0.227286, 0.232076, 0.246126, 0.269416, 0.316366", \ + "0.225556, 0.227756, 0.229426, 0.234216, 0.248266, 0.271556, 0.318506", \ + "0.231596, 0.233796, 0.235466, 0.240256, 0.254306, 0.277596, 0.324546", \ + "0.235186, 0.237386, 0.239056, 0.243846, 0.257896, 0.281186, 0.328136", \ + "0.242016, 0.244216, 0.245886, 0.250676, 0.264726, 0.288016, 0.334966" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.254905, 0.257585, 0.260125, 0.266985, 0.287895, 0.322465, 0.391895", \ + "0.255405, 0.258085, 0.260625, 0.267485, 0.288395, 0.322965, 0.392395", \ + "0.256715, 0.259395, 0.261935, 0.268795, 0.289705, 0.324275, 0.393705", \ + "0.258625, 0.261305, 0.263845, 0.270705, 0.291615, 0.326185, 0.395615", \ + "0.264995, 0.267675, 0.270215, 0.277075, 0.297985, 0.332555, 0.401985", \ + "0.267855, 0.270535, 0.273075, 0.279935, 0.300845, 0.335415, 0.404845", \ + "0.274495, 0.277175, 0.279715, 0.286575, 0.307485, 0.342055, 0.411485" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.207840, 0.210610, 0.212990, 0.220120, 0.240740, 0.275440, 0.344850", \ + "0.208400, 0.211170, 0.213550, 0.220680, 0.241300, 0.276000, 0.345410", \ + "0.209460, 0.212230, 0.214610, 0.221740, 0.242360, 0.277060, 0.346470", \ + "0.211500, 0.214270, 0.216650, 0.223780, 0.244400, 0.279100, 0.348510", \ + "0.217780, 0.220550, 0.222930, 0.230060, 0.250680, 0.285380, 0.354790", \ + "0.220680, 0.223450, 0.225830, 0.232960, 0.253580, 0.288280, 0.357690", \ + "0.226680, 0.229450, 0.231830, 0.238960, 0.259580, 0.294280, 0.363690" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272843, 0.274543, 0.276363, 0.281153, 0.295263, 0.318743, 0.365753", \ + "0.273213, 0.274913, 0.276733, 0.281523, 0.295633, 0.319113, 0.366123", \ + "0.273953, 0.275653, 0.277473, 0.282263, 0.296373, 0.319853, 0.366863", \ + "0.276143, 0.277843, 0.279663, 0.284453, 0.298563, 0.322043, 0.369053", \ + "0.282523, 0.284223, 0.286043, 0.290833, 0.304943, 0.328423, 0.375433", \ + "0.285623, 0.287323, 0.289143, 0.293933, 0.308043, 0.331523, 0.378533", \ + "0.292453, 0.294153, 0.295973, 0.300763, 0.314873, 0.338353, 0.385363" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222329, 0.224529, 0.226199, 0.230989, 0.245039, 0.268329, 0.315279", \ + "0.222919, 0.225119, 0.226789, 0.231579, 0.245629, 0.268919, 0.315869", \ + "0.223889, 0.226089, 0.227759, 0.232549, 0.246599, 0.269889, 0.316839", \ + "0.226029, 0.228229, 0.229899, 0.234689, 0.248739, 0.272029, 0.318979", \ + "0.232069, 0.234269, 0.235939, 0.240729, 0.254779, 0.278069, 0.325019", \ + "0.235659, 0.237859, 0.239529, 0.244319, 0.258369, 0.281659, 0.328609", \ + "0.242489, 0.244689, 0.246359, 0.251149, 0.265199, 0.288489, 0.335439" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.255486, 0.258166, 0.260706, 0.267566, 0.288476, 0.323046, 0.392476", \ + "0.255986, 0.258666, 0.261206, 0.268066, 0.288976, 0.323546, 0.392976", \ + "0.257296, 0.259976, 0.262516, 0.269376, 0.290286, 0.324856, 0.394286", \ + "0.259206, 0.261886, 0.264426, 0.271286, 0.292196, 0.326766, 0.396196", \ + "0.265576, 0.268256, 0.270796, 0.277656, 0.298566, 0.333136, 0.402566", \ + "0.268436, 0.271116, 0.273656, 0.280516, 0.301426, 0.335996, 0.405426", \ + "0.275076, 0.277756, 0.280296, 0.287156, 0.308066, 0.342636, 0.412066" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208312, 0.211082, 0.213462, 0.220592, 0.241212, 0.275912, 0.345322", \ + "0.208872, 0.211642, 0.214022, 0.221152, 0.241772, 0.276472, 0.345882", \ + "0.209932, 0.212702, 0.215082, 0.222212, 0.242832, 0.277532, 0.346942", \ + "0.211972, 0.214742, 0.217122, 0.224252, 0.244872, 0.279572, 0.348982", \ + "0.218252, 0.221022, 0.223402, 0.230532, 0.251152, 0.285852, 0.355262", \ + "0.221152, 0.223922, 0.226302, 0.233432, 0.254052, 0.288752, 0.358162", \ + "0.227152, 0.229922, 0.232302, 0.239432, 0.260052, 0.294752, 0.364162" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.272876, 0.274576, 0.276396, 0.281186, 0.295296, 0.318776, 0.365786", \ + "0.273246, 0.274946, 0.276766, 0.281556, 0.295666, 0.319146, 0.366156", \ + "0.273986, 0.275686, 0.277506, 0.282296, 0.296406, 0.319886, 0.366896", \ + "0.276176, 0.277876, 0.279696, 0.284486, 0.298596, 0.322076, 0.369086", \ + "0.282556, 0.284256, 0.286076, 0.290866, 0.304976, 0.328456, 0.375466", \ + "0.285656, 0.287356, 0.289176, 0.293966, 0.308076, 0.331556, 0.378566", \ + "0.292486, 0.294186, 0.296006, 0.300796, 0.314906, 0.338386, 0.385396" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222351, 0.224551, 0.226221, 0.231011, 0.245061, 0.268351, 0.315301", \ + "0.222941, 0.225141, 0.226811, 0.231601, 0.245651, 0.268941, 0.315891", \ + "0.223911, 0.226111, 0.227781, 0.232571, 0.246621, 0.269911, 0.316861", \ + "0.226051, 0.228251, 0.229921, 0.234711, 0.248761, 0.272051, 0.319001", \ + "0.232091, 0.234291, 0.235961, 0.240751, 0.254801, 0.278091, 0.325041", \ + "0.235681, 0.237881, 0.239551, 0.244341, 0.258391, 0.281681, 0.328631", \ + "0.242511, 0.244711, 0.246381, 0.251171, 0.265221, 0.288511, 0.335461" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.255519, 0.258199, 0.260739, 0.267599, 0.288509, 0.323079, 0.392509", \ + "0.256019, 0.258699, 0.261239, 0.268099, 0.289009, 0.323579, 0.393009", \ + "0.257329, 0.260009, 0.262549, 0.269409, 0.290319, 0.324889, 0.394319", \ + "0.259239, 0.261919, 0.264459, 0.271319, 0.292229, 0.326799, 0.396229", \ + "0.265609, 0.268289, 0.270829, 0.277689, 0.298599, 0.333169, 0.402599", \ + "0.268469, 0.271149, 0.273689, 0.280549, 0.301459, 0.336029, 0.405459", \ + "0.275109, 0.277789, 0.280329, 0.287189, 0.308099, 0.342669, 0.412099" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208339, 0.211109, 0.213489, 0.220619, 0.241239, 0.275939, 0.345349", \ + "0.208899, 0.211669, 0.214049, 0.221179, 0.241799, 0.276499, 0.345909", \ + "0.209959, 0.212729, 0.215109, 0.222239, 0.242859, 0.277559, 0.346969", \ + "0.211999, 0.214769, 0.217149, 0.224279, 0.244899, 0.279599, 0.349009", \ + "0.218279, 0.221049, 0.223429, 0.230559, 0.251179, 0.285879, 0.355289", \ + "0.221179, 0.223949, 0.226329, 0.233459, 0.254079, 0.288779, 0.358189", \ + "0.227179, 0.229949, 0.232329, 0.239459, 0.260079, 0.294779, 0.364189" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.273425, 0.275125, 0.276945, 0.281735, 0.295845, 0.319325, 0.366335", \ + "0.273795, 0.275495, 0.277315, 0.282105, 0.296215, 0.319695, 0.366705", \ + "0.274535, 0.276235, 0.278055, 0.282845, 0.296955, 0.320435, 0.367445", \ + "0.276725, 0.278425, 0.280245, 0.285035, 0.299145, 0.322625, 0.369635", \ + "0.283105, 0.284805, 0.286625, 0.291415, 0.305525, 0.329005, 0.376015", \ + "0.286205, 0.287905, 0.289725, 0.294515, 0.308625, 0.332105, 0.379115", \ + "0.293035, 0.294735, 0.296555, 0.301345, 0.315455, 0.338935, 0.385945" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.222805, 0.225005, 0.226675, 0.231465, 0.245515, 0.268805, 0.315755", \ + "0.223395, 0.225595, 0.227265, 0.232055, 0.246105, 0.269395, 0.316345", \ + "0.224365, 0.226565, 0.228235, 0.233025, 0.247075, 0.270365, 0.317315", \ + "0.226505, 0.228705, 0.230375, 0.235165, 0.249215, 0.272505, 0.319455", \ + "0.232545, 0.234745, 0.236415, 0.241205, 0.255255, 0.278545, 0.325495", \ + "0.236135, 0.238335, 0.240005, 0.244795, 0.258845, 0.282135, 0.329085", \ + "0.242965, 0.245165, 0.246835, 0.251625, 0.265675, 0.288965, 0.335915" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.256067, 0.258747, 0.261287, 0.268147, 0.289057, 0.323627, 0.393057", \ + "0.256567, 0.259247, 0.261787, 0.268647, 0.289557, 0.324127, 0.393557", \ + "0.257877, 0.260557, 0.263097, 0.269957, 0.290867, 0.325437, 0.394867", \ + "0.259787, 0.262467, 0.265007, 0.271867, 0.292777, 0.327347, 0.396777", \ + "0.266157, 0.268837, 0.271377, 0.278237, 0.299147, 0.333717, 0.403147", \ + "0.269017, 0.271697, 0.274237, 0.281097, 0.302007, 0.336577, 0.406007", \ + "0.275657, 0.278338, 0.280877, 0.287737, 0.308647, 0.343217, 0.412647" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.208794, 0.211564, 0.213944, 0.221074, 0.241694, 0.276394, 0.345804", \ + "0.209354, 0.212124, 0.214504, 0.221634, 0.242254, 0.276954, 0.346364", \ + "0.210414, 0.213184, 0.215564, 0.222694, 0.243314, 0.278014, 0.347424", \ + "0.212454, 0.215224, 0.217604, 0.224734, 0.245354, 0.280054, 0.349464", \ + "0.218734, 0.221504, 0.223884, 0.231014, 0.251634, 0.286334, 0.355744", \ + "0.221634, 0.224404, 0.226784, 0.233914, 0.254534, 0.289234, 0.358644", \ + "0.227634, 0.230404, 0.232784, 0.239914, 0.260534, 0.295234, 0.364644" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.315362, 0.317062, 0.318882, 0.323672, 0.337782, 0.361263, 0.408273", \ + "0.315732, 0.317432, 0.319253, 0.324042, 0.338152, 0.361632, 0.408642", \ + "0.316473, 0.318172, 0.319992, 0.324782, 0.338893, 0.362372, 0.409382", \ + "0.318662, 0.320362, 0.322183, 0.326972, 0.341083, 0.364562, 0.411572", \ + "0.325042, 0.326743, 0.328562, 0.333353, 0.347462, 0.370943, 0.417953", \ + "0.328142, 0.329843, 0.331662, 0.336453, 0.350562, 0.374043, 0.421053", \ + "0.334972, 0.336673, 0.338492, 0.343283, 0.357392, 0.380873, 0.427883" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.257186, 0.259386, 0.261056, 0.265846, 0.279896, 0.303186, 0.350136", \ + "0.257776, 0.259976, 0.261646, 0.266436, 0.280486, 0.303776, 0.350726", \ + "0.258746, 0.260946, 0.262616, 0.267406, 0.281456, 0.304746, 0.351696", \ + "0.260886, 0.263086, 0.264756, 0.269546, 0.283596, 0.306886, 0.353836", \ + "0.266926, 0.269126, 0.270796, 0.275586, 0.289636, 0.312926, 0.359876", \ + "0.270516, 0.272716, 0.274386, 0.279176, 0.293226, 0.316516, 0.363466", \ + "0.277346, 0.279546, 0.281216, 0.286006, 0.300056, 0.323346, 0.370296" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.298000, 0.300680, 0.303220, 0.310080, 0.330990, 0.365560, 0.434990", \ + "0.298500, 0.301180, 0.303720, 0.310580, 0.331490, 0.366060, 0.435490", \ + "0.299810, 0.302490, 0.305030, 0.311890, 0.332800, 0.367370, 0.436800", \ + "0.301720, 0.304400, 0.306940, 0.313800, 0.334710, 0.369280, 0.438710", \ + "0.308090, 0.310770, 0.313310, 0.320170, 0.341080, 0.375650, 0.445080", \ + "0.310950, 0.313630, 0.316170, 0.323030, 0.343940, 0.378510, 0.447940", \ + "0.317590, 0.320270, 0.322810, 0.329670, 0.350580, 0.385150, 0.454580" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.243169, 0.245939, 0.248319, 0.255449, 0.276069, 0.310769, 0.380179", \ + "0.243729, 0.246499, 0.248879, 0.256009, 0.276629, 0.311329, 0.380739", \ + "0.244789, 0.247559, 0.249939, 0.257069, 0.277689, 0.312389, 0.381799", \ + "0.246829, 0.249599, 0.251979, 0.259109, 0.279729, 0.314429, 0.383839", \ + "0.253109, 0.255879, 0.258259, 0.265389, 0.286009, 0.320709, 0.390119", \ + "0.256009, 0.258779, 0.261159, 0.268289, 0.288909, 0.323609, 0.393019", \ + "0.262009, 0.264779, 0.267159, 0.274289, 0.294909, 0.329609, 0.399019" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.352048, 0.353748, 0.355568, 0.360358, 0.374468, 0.397948, 0.444958", \ + "0.352418, 0.354118, 0.355938, 0.360728, 0.374838, 0.398318, 0.445328", \ + "0.353158, 0.354858, 0.356678, 0.361468, 0.375578, 0.399058, 0.446068", \ + "0.355348, 0.357048, 0.358868, 0.363658, 0.377769, 0.401248, 0.448258", \ + "0.361728, 0.363428, 0.365248, 0.370038, 0.384148, 0.407629, 0.454639", \ + "0.364828, 0.366528, 0.368348, 0.373138, 0.387248, 0.410728, 0.457738", \ + "0.371658, 0.373358, 0.375178, 0.379968, 0.394078, 0.417558, 0.464568" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287270, 0.289470, 0.291140, 0.295930, 0.309980, 0.333270, 0.380220", \ + "0.287860, 0.290060, 0.291730, 0.296520, 0.310570, 0.333860, 0.380810", \ + "0.288830, 0.291030, 0.292700, 0.297490, 0.311540, 0.334830, 0.381780", \ + "0.290970, 0.293170, 0.294840, 0.299630, 0.313680, 0.336970, 0.383920", \ + "0.297010, 0.299210, 0.300880, 0.305670, 0.319720, 0.343010, 0.389960", \ + "0.300600, 0.302800, 0.304470, 0.309260, 0.323310, 0.346600, 0.393550", \ + "0.307430, 0.309630, 0.311300, 0.316090, 0.330140, 0.353430, 0.400380" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.334691, 0.337371, 0.339911, 0.346771, 0.367681, 0.402251, 0.471681", \ + "0.335191, 0.337871, 0.340411, 0.347271, 0.368181, 0.402751, 0.472181", \ + "0.336501, 0.339181, 0.341721, 0.348581, 0.369491, 0.404061, 0.473491", \ + "0.338411, 0.341091, 0.343631, 0.350491, 0.371401, 0.405971, 0.475401", \ + "0.344781, 0.347461, 0.350001, 0.356861, 0.377771, 0.412341, 0.481771", \ + "0.347641, 0.350321, 0.352861, 0.359721, 0.380631, 0.415201, 0.484631", \ + "0.354281, 0.356961, 0.359501, 0.366361, 0.387271, 0.421841, 0.491271" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.273254, 0.276024, 0.278404, 0.285534, 0.306154, 0.340854, 0.410264", \ + "0.273814, 0.276584, 0.278964, 0.286094, 0.306714, 0.341414, 0.410824", \ + "0.274874, 0.277644, 0.280024, 0.287154, 0.307774, 0.342474, 0.411884", \ + "0.276914, 0.279684, 0.282064, 0.289194, 0.309814, 0.344514, 0.413924", \ + "0.283194, 0.285964, 0.288344, 0.295474, 0.316094, 0.350794, 0.420204", \ + "0.286094, 0.288864, 0.291244, 0.298374, 0.318994, 0.353694, 0.423104", \ + "0.292094, 0.294864, 0.297244, 0.304374, 0.324994, 0.359694, 0.429104" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.390501, 0.392201, 0.394021, 0.398811, 0.412921, 0.436401, 0.483411", \ + "0.390871, 0.392571, 0.394391, 0.399181, 0.413291, 0.436771, 0.483781", \ + "0.391611, 0.393311, 0.395131, 0.399921, 0.414031, 0.437511, 0.484521", \ + "0.393801, 0.395501, 0.397321, 0.402111, 0.416221, 0.439701, 0.486711", \ + "0.400181, 0.401881, 0.403701, 0.408491, 0.422601, 0.446081, 0.493091", \ + "0.403281, 0.404981, 0.406801, 0.411591, 0.425701, 0.449181, 0.496191", \ + "0.410111, 0.411811, 0.413631, 0.418421, 0.432531, 0.456011, 0.503021" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.318802, 0.321002, 0.322672, 0.327462, 0.341512, 0.364802, 0.411752", \ + "0.319392, 0.321592, 0.323262, 0.328052, 0.342102, 0.365392, 0.412342", \ + "0.320362, 0.322562, 0.324232, 0.329022, 0.343072, 0.366362, 0.413312", \ + "0.322502, 0.324702, 0.326372, 0.331162, 0.345212, 0.368502, 0.415452", \ + "0.328542, 0.330742, 0.332412, 0.337202, 0.351252, 0.374542, 0.421492", \ + "0.332132, 0.334332, 0.336002, 0.340792, 0.354842, 0.378132, 0.425082", \ + "0.338962, 0.341162, 0.342832, 0.347622, 0.361672, 0.384962, 0.431912" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.373143, 0.375823, 0.378363, 0.385223, 0.406133, 0.440703, 0.510133", \ + "0.373643, 0.376323, 0.378863, 0.385723, 0.406633, 0.441203, 0.510633", \ + "0.374953, 0.377633, 0.380173, 0.387033, 0.407943, 0.442513, 0.511943", \ + "0.376863, 0.379543, 0.382083, 0.388943, 0.409853, 0.444423, 0.513853", \ + "0.383233, 0.385913, 0.388453, 0.395313, 0.416223, 0.450793, 0.520223", \ + "0.386093, 0.388773, 0.391313, 0.398173, 0.419083, 0.453653, 0.523083", \ + "0.392733, 0.395413, 0.397953, 0.404813, 0.425723, 0.460293, 0.529723" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.304785, 0.307555, 0.309935, 0.317065, 0.337685, 0.372385, 0.441795", \ + "0.305345, 0.308115, 0.310495, 0.317625, 0.338245, 0.372945, 0.442355", \ + "0.306405, 0.309175, 0.311555, 0.318685, 0.339305, 0.374005, 0.443415", \ + "0.308445, 0.311215, 0.313595, 0.320725, 0.341345, 0.376045, 0.445455", \ + "0.314725, 0.317495, 0.319875, 0.327005, 0.347625, 0.382325, 0.451735", \ + "0.317625, 0.320395, 0.322775, 0.329905, 0.350525, 0.385225, 0.454635", \ + "0.323625, 0.326395, 0.328775, 0.335905, 0.356525, 0.391225, 0.460635" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.427187, 0.428887, 0.430707, 0.435497, 0.449607, 0.473087, 0.520097", \ + "0.427557, 0.429257, 0.431077, 0.435867, 0.449977, 0.473457, 0.520467", \ + "0.428297, 0.429997, 0.431817, 0.436607, 0.450717, 0.474197, 0.521207", \ + "0.430487, 0.432187, 0.434007, 0.438797, 0.452907, 0.476387, 0.523397", \ + "0.436867, 0.438567, 0.440387, 0.445177, 0.459287, 0.482767, 0.529777", \ + "0.439967, 0.441667, 0.443487, 0.448277, 0.462387, 0.485867, 0.532877", \ + "0.446797, 0.448497, 0.450317, 0.455107, 0.469217, 0.492697, 0.539707" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.348876, 0.351076, 0.352746, 0.357536, 0.371586, 0.394876, 0.441826", \ + "0.349466, 0.351666, 0.353336, 0.358126, 0.372176, 0.395466, 0.442416", \ + "0.350436, 0.352636, 0.354306, 0.359096, 0.373146, 0.396436, 0.443386", \ + "0.352576, 0.354776, 0.356446, 0.361236, 0.375286, 0.398576, 0.445526", \ + "0.358616, 0.360816, 0.362486, 0.367276, 0.381326, 0.404616, 0.451566", \ + "0.362206, 0.364406, 0.366076, 0.370866, 0.384916, 0.408206, 0.455156", \ + "0.369036, 0.371236, 0.372906, 0.377696, 0.391746, 0.415036, 0.461986" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443", \ + "0.012069, 0.015138, 0.018367, 0.025983, 0.050745, 0.093152, 0.179443" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.409823, 0.412503, 0.415043, 0.421903, 0.442813, 0.477383, 0.546813", \ + "0.410323, 0.413003, 0.415543, 0.422403, 0.443313, 0.477883, 0.547313", \ + "0.411633, 0.414313, 0.416853, 0.423713, 0.444623, 0.479193, 0.548623", \ + "0.413543, 0.416223, 0.418763, 0.425623, 0.446533, 0.481103, 0.550533", \ + "0.419913, 0.422593, 0.425133, 0.431993, 0.452903, 0.487473, 0.556903", \ + "0.422773, 0.425453, 0.427993, 0.434853, 0.455763, 0.490333, 0.559763", \ + "0.429413, 0.432093, 0.434633, 0.441493, 0.462403, 0.496973, 0.566403" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.334859, 0.337629, 0.340009, 0.347139, 0.367759, 0.402459, 0.471869", \ + "0.335419, 0.338189, 0.340569, 0.347699, 0.368319, 0.403019, 0.472429", \ + "0.336479, 0.339249, 0.341629, 0.348759, 0.369379, 0.404079, 0.473489", \ + "0.338519, 0.341289, 0.343669, 0.350799, 0.371419, 0.406119, 0.475529", \ + "0.344799, 0.347569, 0.349949, 0.357079, 0.377699, 0.412399, 0.481809", \ + "0.347699, 0.350469, 0.352849, 0.359979, 0.380599, 0.415299, 0.484709", \ + "0.353699, 0.356469, 0.358849, 0.365979, 0.386599, 0.421299, 0.490709" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065", \ + "0.014793, 0.019287, 0.023525, 0.035440, 0.072758, 0.135537, 0.261065" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x19_wm0_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.262800; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141571, 0.144050, 0.146131, 0.151091, 0.164721, 0.187061, 0.231651", \ + "0.141841, 0.144320, 0.146401, 0.151361, 0.164991, 0.187331, 0.231920", \ + "0.143011, 0.145490, 0.147571, 0.152531, 0.166161, 0.188501, 0.233091", \ + "0.144990, 0.147470, 0.149550, 0.154510, 0.168140, 0.190480, 0.235071", \ + "0.149910, 0.152391, 0.154471, 0.159430, 0.173061, 0.195401, 0.239990", \ + "0.153331, 0.155811, 0.157891, 0.162851, 0.176481, 0.198821, 0.243410", \ + "0.159501, 0.161980, 0.164060, 0.169021, 0.182650, 0.204991, 0.249581" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.115552, 0.118032, 0.120122, 0.125072, 0.138692, 0.161042, 0.205622", \ + "0.115762, 0.118242, 0.120332, 0.125282, 0.138902, 0.161252, 0.205832", \ + "0.116872, 0.119352, 0.121442, 0.126392, 0.140012, 0.162362, 0.206942", \ + "0.118972, 0.121452, 0.123542, 0.128492, 0.142112, 0.164462, 0.209042", \ + "0.123902, 0.126382, 0.128472, 0.133422, 0.147042, 0.169392, 0.213972", \ + "0.127302, 0.129782, 0.131872, 0.136822, 0.150442, 0.172792, 0.217372", \ + "0.133272, 0.135752, 0.137842, 0.142792, 0.156412, 0.178762, 0.223342" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582", \ + "0.009891, 0.012655, 0.015417, 0.022946, 0.046271, 0.086967, 0.168582" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.135673, 0.138973, 0.142013, 0.149213, 0.170463, 0.205853, 0.276623", \ + "0.135953, 0.139253, 0.142293, 0.149493, 0.170743, 0.206133, 0.276903", \ + "0.137383, 0.140683, 0.143723, 0.150923, 0.172173, 0.207563, 0.278333", \ + "0.138843, 0.142143, 0.145183, 0.152383, 0.173633, 0.209023, 0.279793", \ + "0.144523, 0.147823, 0.150863, 0.158063, 0.179313, 0.214703, 0.285473", \ + "0.147603, 0.150903, 0.153943, 0.161143, 0.182393, 0.217783, 0.288553", \ + "0.153343, 0.156643, 0.159683, 0.166883, 0.188133, 0.223523, 0.294293" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.110591, 0.113891, 0.116931, 0.124131, 0.145391, 0.180771, 0.251541", \ + "0.110871, 0.114171, 0.117211, 0.124411, 0.145671, 0.181051, 0.251821", \ + "0.112311, 0.115611, 0.118651, 0.125851, 0.147111, 0.182491, 0.253261", \ + "0.113741, 0.117041, 0.120081, 0.127281, 0.148541, 0.183921, 0.254691", \ + "0.119391, 0.122691, 0.125731, 0.132931, 0.154191, 0.189571, 0.260341", \ + "0.122521, 0.125821, 0.128861, 0.136061, 0.157321, 0.192701, 0.263471", \ + "0.128261, 0.131561, 0.134601, 0.141801, 0.163061, 0.198441, 0.269211" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236", \ + "0.011775, 0.016259, 0.020826, 0.033145, 0.071627, 0.136726, 0.267236" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406", \ + "0.007362, 0.007369, 0.007376, 0.007384, 0.007391, 0.007399, 0.007406" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838", \ + "0.006797, 0.006804, 0.006811, 0.006817, 0.006824, 0.006831, 0.006838" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.010482; + clock : true; + max_transition : 0.219000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.418174, 1.420256, 1.420441, 1.421866, 1.423743, 1.425169, 1.427392"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.418209, 1.420292, 1.420477, 1.421902, 1.423779, 1.425205, 1.427428"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.419435, 1.421518, 1.421708, 1.423128, 1.425005, 1.426431, 1.428655"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.419653, 1.421736, 1.421927, 1.423346, 1.425223, 1.426650, 1.428874"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.419990, 1.422072, 1.422263, 1.423683, 1.425561, 1.426987, 1.429212"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.425556, 1.427639, 1.427830, 1.429255, 1.431128, 1.432560, 1.434779"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.429211, 1.431294, 1.431480, 1.432911, 1.434784, 1.436216, 1.438435"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.429621, 1.431704, 1.431890, 1.433321, 1.435194, 1.436626, 1.438845"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014093, 0.014107, 0.015205, 0.015220, 0.016677, 0.018303, 0.024686"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009028, 0.009037, 0.009046, 0.009549, 0.011381, 0.012714, 0.017934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010031, 0.010041, 0.010051, 0.010610, 0.012646, 0.014126, 0.019927"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009028, 0.009037, 0.009046, 0.009549, 0.011381, 0.012714, 0.017934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010031, 0.010041, 0.010051, 0.010610, 0.012646, 0.014126, 0.019927"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.201659, 1.202530, 1.203733, 1.204710, 1.206847, 1.207828, 1.210342"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014600, 0.014614, 0.014789, 0.015368, 0.017246, 0.018897, 0.024430"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.190094, 0.190494, 0.192314, 0.193734, 0.200294, 0.202954, 0.264404", \ + "0.189849, 0.190249, 0.192069, 0.193489, 0.200049, 0.202709, 0.264159", \ + "0.188648, 0.189048, 0.190868, 0.192288, 0.198848, 0.201508, 0.262958", \ + "0.186266, 0.186666, 0.188486, 0.189906, 0.196466, 0.199126, 0.260576", \ + "0.181145, 0.181545, 0.183365, 0.184785, 0.191345, 0.194005, 0.255455", \ + "0.178485, 0.178885, 0.180705, 0.182125, 0.188685, 0.191345, 0.252795", \ + "0.226826, 0.227226, 0.229046, 0.230466, 0.237026, 0.239686, 0.301136" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.190675, 0.191075, 0.192895, 0.194315, 0.200875, 0.203535, 0.264985", \ + "0.190430, 0.190830, 0.192650, 0.194070, 0.200630, 0.203290, 0.264740", \ + "0.189229, 0.189629, 0.191449, 0.192869, 0.199429, 0.202089, 0.263539", \ + "0.186847, 0.187247, 0.189067, 0.190487, 0.197047, 0.199707, 0.261157", \ + "0.181726, 0.182126, 0.183946, 0.185366, 0.191926, 0.194586, 0.256036", \ + "0.179066, 0.179466, 0.181286, 0.182706, 0.189266, 0.191926, 0.253376", \ + "0.227407, 0.227807, 0.229627, 0.231047, 0.237607, 0.240267, 0.301717" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.190703, 0.191103, 0.192923, 0.194343, 0.200903, 0.203563, 0.265013", \ + "0.190458, 0.190858, 0.192678, 0.194098, 0.200658, 0.203318, 0.264768", \ + "0.189257, 0.189657, 0.191477, 0.192897, 0.199457, 0.202117, 0.263567", \ + "0.186875, 0.187275, 0.189095, 0.190515, 0.197075, 0.199735, 0.261185", \ + "0.181754, 0.182154, 0.183974, 0.185394, 0.191954, 0.194614, 0.256064", \ + "0.179094, 0.179494, 0.181314, 0.182734, 0.189294, 0.191954, 0.253404", \ + "0.227435, 0.227835, 0.229655, 0.231075, 0.237635, 0.240295, 0.301745" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.191257, 0.191657, 0.193477, 0.194897, 0.201457, 0.204117, 0.265567", \ + "0.191012, 0.191412, 0.193232, 0.194652, 0.201212, 0.203872, 0.265322", \ + "0.189811, 0.190211, 0.192031, 0.193451, 0.200011, 0.202671, 0.264121", \ + "0.187429, 0.187829, 0.189649, 0.191069, 0.197629, 0.200289, 0.261739", \ + "0.182308, 0.182708, 0.184528, 0.185948, 0.192508, 0.195168, 0.256618", \ + "0.179648, 0.180048, 0.181868, 0.183288, 0.189848, 0.192508, 0.253958", \ + "0.227989, 0.228389, 0.230209, 0.231629, 0.238189, 0.240849, 0.302299" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.233189, 0.233589, 0.235409, 0.236829, 0.243389, 0.246049, 0.307499", \ + "0.232944, 0.233344, 0.235164, 0.236584, 0.243144, 0.245804, 0.307254", \ + "0.231743, 0.232143, 0.233963, 0.235383, 0.241943, 0.244603, 0.306053", \ + "0.229361, 0.229761, 0.231581, 0.233001, 0.239561, 0.242221, 0.303671", \ + "0.224240, 0.224640, 0.226460, 0.227880, 0.234440, 0.237100, 0.298550", \ + "0.221580, 0.221980, 0.223800, 0.225220, 0.231780, 0.234440, 0.295890", \ + "0.269921, 0.270321, 0.272141, 0.273561, 0.280121, 0.282781, 0.344231" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.269875, 0.270275, 0.272095, 0.273515, 0.280075, 0.282735, 0.344185", \ + "0.269630, 0.270030, 0.271850, 0.273270, 0.279830, 0.282490, 0.343940", \ + "0.268429, 0.268829, 0.270649, 0.272069, 0.278629, 0.281289, 0.342739", \ + "0.266047, 0.266447, 0.268267, 0.269687, 0.276247, 0.278907, 0.340357", \ + "0.260926, 0.261326, 0.263146, 0.264566, 0.271126, 0.273786, 0.335236", \ + "0.258266, 0.258666, 0.260486, 0.261906, 0.268466, 0.271126, 0.332576", \ + "0.306607, 0.307007, 0.308827, 0.310247, 0.316807, 0.319467, 0.380917" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.308332, 0.308732, 0.310552, 0.311972, 0.318532, 0.321192, 0.382642", \ + "0.308087, 0.308487, 0.310307, 0.311727, 0.318287, 0.320947, 0.382397", \ + "0.306886, 0.307286, 0.309106, 0.310526, 0.317086, 0.319746, 0.381196", \ + "0.304504, 0.304904, 0.306724, 0.308144, 0.314704, 0.317364, 0.378814", \ + "0.299383, 0.299783, 0.301603, 0.303023, 0.309583, 0.312243, 0.373693", \ + "0.296723, 0.297123, 0.298943, 0.300363, 0.306923, 0.309583, 0.371033", \ + "0.345064, 0.345464, 0.347284, 0.348704, 0.355264, 0.357924, 0.419374" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.345019, 0.345419, 0.347239, 0.348659, 0.355219, 0.357879, 0.419329", \ + "0.344774, 0.345174, 0.346994, 0.348414, 0.354974, 0.357634, 0.419084", \ + "0.343573, 0.343973, 0.345793, 0.347213, 0.353773, 0.356433, 0.417883", \ + "0.341191, 0.341591, 0.343411, 0.344831, 0.351391, 0.354051, 0.415501", \ + "0.336070, 0.336470, 0.338290, 0.339710, 0.346270, 0.348930, 0.410380", \ + "0.333410, 0.333810, 0.335630, 0.337050, 0.343610, 0.346270, 0.407720", \ + "0.381751, 0.382151, 0.383971, 0.385391, 0.391951, 0.394611, 0.456061" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.380017; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.380608; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.380636; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.381198; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.423759; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.460995; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.500030; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.537266; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.437106; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.437684; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.437718; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.438275; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.480841; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.518084; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.557113; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.594343; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.058535, 0.058885, 0.060010, 0.062078, 0.068240, 0.070864, 0.076693"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + min_pulse_width_high : 0.092635; + min_pulse_width_low : 0.089660; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001808; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073467, 0.074005, 0.074951, 0.077414, 0.084228, 0.086231, 0.148646", \ + "0.073539, 0.074077, 0.075023, 0.077486, 0.084300, 0.086303, 0.148718", \ + "0.073586, 0.074124, 0.075070, 0.077533, 0.084347, 0.086350, 0.148765", \ + "0.074880, 0.075418, 0.076364, 0.078827, 0.085641, 0.087644, 0.150059", \ + "0.079408, 0.079946, 0.080892, 0.083355, 0.090169, 0.092172, 0.154587", \ + "0.081423, 0.081961, 0.082907, 0.085370, 0.092184, 0.094187, 0.156602", \ + "0.147348, 0.147886, 0.148832, 0.151295, 0.158109, 0.160112, 0.222527" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.072971, 0.073586, 0.074998, 0.077333, 0.085110, 0.088868, 0.152617", \ + "0.072714, 0.073329, 0.074741, 0.077076, 0.084853, 0.088611, 0.152360", \ + "0.071479, 0.072094, 0.073506, 0.075841, 0.083618, 0.087376, 0.151125", \ + "0.069561, 0.070176, 0.071588, 0.073923, 0.081700, 0.085458, 0.149207", \ + "0.068554, 0.069583, 0.071078, 0.073047, 0.080396, 0.084821, 0.146596", \ + "0.070569, 0.071598, 0.073093, 0.075062, 0.082411, 0.086836, 0.148611", \ + "0.136494, 0.137523, 0.139018, 0.140987, 0.148336, 0.152761, 0.214536" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.040459, 0.039839, 0.038685, 0.036443, 0.031390, 0.029596, 0.081513", \ + "0.040807, 0.040187, 0.039033, 0.036791, 0.031691, 0.029897, 0.081814", \ + "0.041932, 0.041312, 0.040158, 0.037916, 0.032978, 0.031184, 0.083101", \ + "0.044002, 0.043382, 0.042228, 0.039986, 0.034714, 0.032920, 0.084837", \ + "0.050019, 0.049399, 0.048245, 0.046003, 0.039810, 0.038016, 0.089933", \ + "0.052799, 0.052179, 0.051025, 0.048783, 0.042401, 0.040347, 0.091964", \ + "0.114377, 0.113757, 0.112603, 0.110361, 0.103979, 0.101925, 0.152029" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.040034, 0.039334, 0.037908, 0.035679, 0.028594, 0.024129, 0.075782", \ + "0.040382, 0.039682, 0.038256, 0.036027, 0.028942, 0.024477, 0.076130", \ + "0.041507, 0.040807, 0.039381, 0.037152, 0.030067, 0.025602, 0.077255", \ + "0.043577, 0.042877, 0.041451, 0.039222, 0.032137, 0.027672, 0.079325", \ + "0.049594, 0.048894, 0.047468, 0.045239, 0.038154, 0.033689, 0.085342", \ + "0.052374, 0.051674, 0.050248, 0.048019, 0.040934, 0.036469, 0.088122", \ + "0.113952, 0.113252, 0.111826, 0.109597, 0.102512, 0.098047, 0.149700" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.241043, 0.239423, 0.238023, 0.237123, 0.228443, 0.225773, 0.215323", \ + "0.244283, 0.242663, 0.241263, 0.240363, 0.231683, 0.229013, 0.218563", \ + "0.247093, 0.245473, 0.244073, 0.243173, 0.234493, 0.231823, 0.221373", \ + "0.248893, 0.247273, 0.245873, 0.244973, 0.236293, 0.233623, 0.223173", \ + "0.266243, 0.264623, 0.263223, 0.262323, 0.253643, 0.250973, 0.240523", \ + "0.271583, 0.269963, 0.268563, 0.267663, 0.258983, 0.256313, 0.245863", \ + "0.292483, 0.290863, 0.289463, 0.288563, 0.279883, 0.277213, 0.266763" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(AA) { + bus_type : rf2_32x19_wm0_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001223; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088908, 0.088968, 0.090375, 0.092863, 0.102637, 0.108714, 0.175425", \ + "0.088602, 0.088662, 0.090069, 0.092557, 0.102331, 0.108408, 0.175119", \ + "0.087361, 0.087421, 0.088828, 0.091316, 0.101090, 0.107167, 0.173878", \ + "0.085437, 0.085497, 0.086904, 0.089392, 0.099166, 0.105243, 0.171954", \ + "0.079049, 0.079109, 0.080516, 0.083004, 0.092778, 0.098855, 0.165566", \ + "0.076705, 0.076765, 0.078172, 0.080660, 0.090434, 0.096511, 0.163222", \ + "0.125119, 0.125179, 0.126586, 0.129074, 0.138848, 0.144925, 0.211636" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.010551; + clock : true; + max_transition : 0.219000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.440658, 1.441560, 1.443006, 1.444447, 1.446365, 1.447808, 1.450015"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.440694, 1.441596, 1.443042, 1.444483, 1.446402, 1.447844, 1.450051"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.441919, 1.442826, 1.444267, 1.445713, 1.447632, 1.449079, 1.451287"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.442136, 1.443044, 1.444485, 1.445931, 1.447850, 1.449298, 1.451505"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.442474, 1.443382, 1.444823, 1.446269, 1.448189, 1.449637, 1.451844"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.448040, 1.448948, 1.450395, 1.451847, 1.453772, 1.455225, 1.457438"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.451698, 1.452600, 1.454052, 1.455510, 1.457435, 1.458894, 1.461113"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("1.452108, 1.453010, 1.454463, 1.455920, 1.457844, 1.459304, 1.461523"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014287, 0.014301, 0.014684, 0.015016, 0.017374, 0.018780, 0.025188"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009015, 0.009024, 0.009033, 0.009612, 0.011302, 0.012587, 0.017689"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010016, 0.010026, 0.010036, 0.010680, 0.012557, 0.013985, 0.019654"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.009015, 0.009024, 0.009033, 0.009612, 0.011302, 0.012587, 0.017689"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.010016, 0.010026, 0.010036, 0.010680, 0.012557, 0.013985, 0.019654"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.929343, 0.930282, 0.931100, 0.932034, 0.932766, 0.934118, 0.939101"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.014447, 0.014457, 0.014970, 0.015513, 0.017437, 0.018798, 0.024357"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.245321, 0.245431, 0.247111, 0.249261, 0.254971, 0.257591, 0.317681", \ + "0.245082, 0.245192, 0.246872, 0.249022, 0.254732, 0.257352, 0.317442", \ + "0.244126, 0.244236, 0.245916, 0.248066, 0.253776, 0.256396, 0.316486", \ + "0.241928, 0.242038, 0.243718, 0.245868, 0.251578, 0.254198, 0.314288", \ + "0.236156, 0.236266, 0.237946, 0.240096, 0.245806, 0.248426, 0.308516", \ + "0.233212, 0.233322, 0.235002, 0.237152, 0.242862, 0.245482, 0.305572", \ + "0.282645, 0.282755, 0.284435, 0.286585, 0.292295, 0.294915, 0.355005" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.249647, 0.249757, 0.251437, 0.253587, 0.259297, 0.261917, 0.322007", \ + "0.249408, 0.249518, 0.251198, 0.253348, 0.259058, 0.261678, 0.321768", \ + "0.248452, 0.248562, 0.250242, 0.252392, 0.258102, 0.260722, 0.320812", \ + "0.246254, 0.246364, 0.248044, 0.250194, 0.255904, 0.258524, 0.318614", \ + "0.240482, 0.240592, 0.242272, 0.244422, 0.250132, 0.252752, 0.312842", \ + "0.237538, 0.237648, 0.239328, 0.241478, 0.247188, 0.249808, 0.309898", \ + "0.286971, 0.287081, 0.288761, 0.290911, 0.296621, 0.299241, 0.359331" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.253289, 0.253399, 0.255079, 0.257229, 0.262939, 0.265559, 0.325649", \ + "0.253050, 0.253160, 0.254840, 0.256990, 0.262700, 0.265320, 0.325410", \ + "0.252094, 0.252204, 0.253884, 0.256034, 0.261744, 0.264364, 0.324454", \ + "0.249896, 0.250006, 0.251686, 0.253836, 0.259546, 0.262166, 0.322256", \ + "0.244124, 0.244234, 0.245914, 0.248064, 0.253774, 0.256394, 0.316484", \ + "0.241180, 0.241290, 0.242970, 0.245120, 0.250830, 0.253450, 0.313540", \ + "0.290613, 0.290723, 0.292403, 0.294553, 0.300263, 0.302883, 0.362973" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.259767, 0.259877, 0.261557, 0.263707, 0.269417, 0.272037, 0.332127", \ + "0.259528, 0.259638, 0.261318, 0.263468, 0.269178, 0.271798, 0.331888", \ + "0.258572, 0.258682, 0.260362, 0.262512, 0.268222, 0.270842, 0.330932", \ + "0.256374, 0.256484, 0.258164, 0.260314, 0.266024, 0.268644, 0.328734", \ + "0.250602, 0.250712, 0.252392, 0.254542, 0.260252, 0.262872, 0.322962", \ + "0.247658, 0.247768, 0.249448, 0.251598, 0.257308, 0.259928, 0.320018", \ + "0.297091, 0.297201, 0.298881, 0.301031, 0.306741, 0.309361, 0.369451" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.311060, 0.311170, 0.312850, 0.315000, 0.320710, 0.323330, 0.383420", \ + "0.310821, 0.310931, 0.312611, 0.314761, 0.320471, 0.323091, 0.383181", \ + "0.309865, 0.309975, 0.311655, 0.313805, 0.319515, 0.322135, 0.382225", \ + "0.307667, 0.307777, 0.309457, 0.311607, 0.317317, 0.319937, 0.380027", \ + "0.301895, 0.302005, 0.303685, 0.305835, 0.311545, 0.314165, 0.374255", \ + "0.298951, 0.299061, 0.300741, 0.302891, 0.308601, 0.311221, 0.371311", \ + "0.348384, 0.348494, 0.350174, 0.352324, 0.358034, 0.360654, 0.420744" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.346403, 0.346513, 0.348193, 0.350343, 0.356053, 0.358673, 0.418763", \ + "0.346164, 0.346274, 0.347954, 0.350104, 0.355814, 0.358434, 0.418524", \ + "0.345208, 0.345318, 0.346998, 0.349148, 0.354858, 0.357478, 0.417568", \ + "0.343010, 0.343120, 0.344800, 0.346950, 0.352660, 0.355280, 0.415370", \ + "0.337238, 0.337348, 0.339028, 0.341178, 0.346888, 0.349508, 0.409598", \ + "0.334294, 0.334404, 0.336084, 0.338234, 0.343944, 0.346564, 0.406654", \ + "0.383727, 0.383837, 0.385517, 0.387667, 0.393377, 0.395997, 0.456087" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.393490, 0.393600, 0.395280, 0.397430, 0.403140, 0.405760, 0.465850", \ + "0.393251, 0.393361, 0.395041, 0.397191, 0.402901, 0.405521, 0.465611", \ + "0.392295, 0.392405, 0.394085, 0.396235, 0.401945, 0.404565, 0.464655", \ + "0.390097, 0.390207, 0.391887, 0.394037, 0.399747, 0.402367, 0.462457", \ + "0.384325, 0.384435, 0.386115, 0.388265, 0.393975, 0.396595, 0.456685", \ + "0.381381, 0.381491, 0.383171, 0.385321, 0.391031, 0.393651, 0.453741", \ + "0.430814, 0.430924, 0.432604, 0.434754, 0.440464, 0.443084, 0.503174" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.428118, 0.428228, 0.429908, 0.432058, 0.437768, 0.440388, 0.500478", \ + "0.427879, 0.427989, 0.429669, 0.431819, 0.437529, 0.440149, 0.500239", \ + "0.426923, 0.427033, 0.428713, 0.430863, 0.436573, 0.439193, 0.499283", \ + "0.424725, 0.424835, 0.426515, 0.428665, 0.434375, 0.436995, 0.497085", \ + "0.418953, 0.419063, 0.420743, 0.422893, 0.428603, 0.431223, 0.491313", \ + "0.416009, 0.416119, 0.417799, 0.419949, 0.425659, 0.428279, 0.488369", \ + "0.465442, 0.465552, 0.467232, 0.469382, 0.475092, 0.477712, 0.537802" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.406180; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.410576; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.414268; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 0.420843; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 0.472906; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.508784; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.556577; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 0.591724; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.053194, 0.053443, 0.054783, 0.056678, 0.062505, 0.065145, 0.069949"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.087909, 0.088203, 0.089562, 0.091410, 0.096878, 0.099376, 0.103976"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.087909, 0.088203, 0.089562, 0.091410, 0.096878, 0.099376, 0.103976"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.087909, 0.088203, 0.089562, 0.091410, 0.096878, 0.099376, 0.103976"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.015581, 0.015487, 0.015507, 0.015711, 0.015500, 0.015466, 0.015738"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.087909, 0.088203, 0.089562, 0.091410, 0.096878, 0.099376, 0.103976"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013439, 0.013369, 0.013366, 0.013390, 0.013361, 0.013371, 0.013424"); + } + } + min_pulse_width_high : 0.095817; + min_pulse_width_low : 0.090686; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001463; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.077497, 0.078529, 0.079059, 0.081941, 0.089144, 0.091965, 0.154650", \ + "0.077670, 0.078702, 0.079232, 0.082114, 0.089317, 0.092138, 0.154823", \ + "0.078005, 0.079037, 0.079567, 0.082449, 0.089652, 0.092473, 0.155158", \ + "0.079629, 0.080661, 0.081191, 0.084073, 0.091276, 0.094097, 0.156782", \ + "0.084359, 0.085391, 0.085921, 0.088803, 0.096006, 0.098827, 0.161512", \ + "0.086802, 0.087834, 0.088364, 0.091246, 0.098449, 0.101270, 0.163955", \ + "0.152375, 0.153407, 0.153937, 0.156819, 0.164022, 0.166843, 0.229528" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.075509, 0.076743, 0.077879, 0.080879, 0.088856, 0.092874, 0.156309", \ + "0.075273, 0.076507, 0.077643, 0.080643, 0.088620, 0.092638, 0.156073", \ + "0.074014, 0.075248, 0.076384, 0.079384, 0.087361, 0.091379, 0.154814", \ + "0.071863, 0.073097, 0.074233, 0.077233, 0.085210, 0.089228, 0.152663", \ + "0.074066, 0.075174, 0.076095, 0.079059, 0.087212, 0.091366, 0.155029", \ + "0.076511, 0.077619, 0.078540, 0.081504, 0.089657, 0.093811, 0.157474", \ + "0.142082, 0.143190, 0.144111, 0.147075, 0.155228, 0.159382, 0.223045" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.042558, 0.041879, 0.040936, 0.038505, 0.034399, 0.031193, 0.081304", \ + "0.042792, 0.042113, 0.041170, 0.038739, 0.034633, 0.031427, 0.081538", \ + "0.044088, 0.043409, 0.042466, 0.040035, 0.035929, 0.032723, 0.082834", \ + "0.045627, 0.044948, 0.044005, 0.041574, 0.037468, 0.034262, 0.084373", \ + "0.050328, 0.049649, 0.048706, 0.046275, 0.042169, 0.038963, 0.089074", \ + "0.052315, 0.051636, 0.050693, 0.048262, 0.044156, 0.040950, 0.091061", \ + "0.111228, 0.110549, 0.109606, 0.107175, 0.103069, 0.099863, 0.149974" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.034747, 0.034100, 0.033061, 0.030148, 0.022467, 0.018463, 0.069750", \ + "0.035021, 0.034374, 0.033335, 0.030422, 0.022741, 0.018737, 0.069750", \ + "0.036365, 0.035718, 0.034679, 0.031766, 0.024085, 0.020081, 0.069750", \ + "0.038259, 0.037612, 0.036573, 0.033660, 0.025979, 0.021975, 0.070060", \ + "0.044069, 0.043422, 0.042383, 0.039470, 0.031789, 0.027785, 0.075870", \ + "0.046789, 0.046142, 0.045103, 0.042190, 0.034509, 0.030505, 0.078590", \ + "0.107937, 0.107290, 0.106251, 0.103338, 0.095657, 0.091653, 0.139738" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.241043, 0.239423, 0.238023, 0.237123, 0.228443, 0.225773, 0.215323", \ + "0.244283, 0.242663, 0.241263, 0.240363, 0.231683, 0.229013, 0.218563", \ + "0.247093, 0.245473, 0.244073, 0.243173, 0.234493, 0.231823, 0.221373", \ + "0.248893, 0.247273, 0.245873, 0.244973, 0.236293, 0.233623, 0.223173", \ + "0.266243, 0.264623, 0.263223, 0.262323, 0.253643, 0.250973, 0.240523", \ + "0.271583, 0.269963, 0.268563, 0.267663, 0.258983, 0.256313, 0.245863", \ + "0.292483, 0.290863, 0.289463, 0.288563, 0.279883, 0.277213, 0.266763" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(AB) { + bus_type : rf2_32x19_wm0_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001226; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.093256, 0.093871, 0.095194, 0.097790, 0.108421, 0.112564, 0.181634", \ + "0.093030, 0.093645, 0.094968, 0.097564, 0.108195, 0.112338, 0.181408", \ + "0.091792, 0.092407, 0.093730, 0.096326, 0.106957, 0.111100, 0.180170", \ + "0.089635, 0.090250, 0.091573, 0.094169, 0.104800, 0.108943, 0.178013", \ + "0.084173, 0.084788, 0.086111, 0.088707, 0.099338, 0.103481, 0.172551", \ + "0.081490, 0.082105, 0.083428, 0.086024, 0.096655, 0.100798, 0.169868", \ + "0.132119, 0.132734, 0.134057, 0.136653, 0.147284, 0.151427, 0.220497" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + } + bus(DB) { + bus_type : rf2_32x19_wm0_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001920; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.029886, 0.030580, 0.032576, 0.033602, 0.039836, 0.044035, 0.108248", \ + "0.029641, 0.030335, 0.032331, 0.033357, 0.039591, 0.043790, 0.108003", \ + "0.028300, 0.028994, 0.030990, 0.032016, 0.038250, 0.042449, 0.106662", \ + "0.026494, 0.027188, 0.029184, 0.030210, 0.036444, 0.040643, 0.104856", \ + "0.021154, 0.021848, 0.023844, 0.024870, 0.031104, 0.035303, 0.099516", \ + "0.018388, 0.019082, 0.021078, 0.022104, 0.028338, 0.032537, 0.096750", \ + "0.068613, 0.069307, 0.071303, 0.072329, 0.078563, 0.082762, 0.146975" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.033595, 0.033680, 0.035294, 0.037830, 0.045983, 0.050999, 0.116399", \ + "0.033323, 0.033408, 0.035022, 0.037558, 0.045711, 0.050727, 0.116127", \ + "0.032000, 0.032085, 0.033699, 0.036235, 0.044388, 0.049404, 0.114804", \ + "0.030157, 0.030242, 0.031856, 0.034392, 0.042545, 0.047561, 0.112961", \ + "0.024919, 0.025004, 0.026618, 0.029154, 0.037307, 0.042323, 0.107723", \ + "0.022151, 0.022236, 0.023850, 0.026386, 0.034539, 0.039555, 0.104955", \ + "0.072291, 0.072376, 0.073990, 0.076526, 0.084679, 0.089695, 0.155095" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088381, 0.087806, 0.086983, 0.085554, 0.085094, 0.085157, 0.145469", \ + "0.088677, 0.088102, 0.087279, 0.085850, 0.085390, 0.085453, 0.145765", \ + "0.090031, 0.089456, 0.088633, 0.087204, 0.086744, 0.086807, 0.147119", \ + "0.091881, 0.091306, 0.090483, 0.089054, 0.088594, 0.088657, 0.148969", \ + "0.097347, 0.096772, 0.095949, 0.094520, 0.094060, 0.094123, 0.154435", \ + "0.099848, 0.099273, 0.098450, 0.097021, 0.096561, 0.096624, 0.156936", \ + "0.159197, 0.158622, 0.157799, 0.156370, 0.155910, 0.155973, 0.216285" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090316, 0.089684, 0.088448, 0.086941, 0.085987, 0.085576, 0.140737", \ + "0.090610, 0.089978, 0.088742, 0.087235, 0.086281, 0.085870, 0.141031", \ + "0.091969, 0.091337, 0.090101, 0.088594, 0.087640, 0.087229, 0.142390", \ + "0.093821, 0.093189, 0.091953, 0.090446, 0.089492, 0.089081, 0.144242", \ + "0.099290, 0.098658, 0.097422, 0.095915, 0.094961, 0.094550, 0.149711", \ + "0.101783, 0.101151, 0.099915, 0.098408, 0.097454, 0.097043, 0.152204", \ + "0.161133, 0.160501, 0.159265, 0.157758, 0.156804, 0.156393, 0.211554" \ + ); + } + } + internal_power() { + when : "TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + bus(EMAA) { + bus_type : rf2_32x19_wm0_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005859; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002146; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x19_wm0_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005712; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.445448, 0.445746, 0.447130, 0.449128, 0.455309, 0.457540, 0.517573", \ + "0.445116, 0.445414, 0.446798, 0.448796, 0.454977, 0.457208, 0.517241", \ + "0.443846, 0.444144, 0.445528, 0.447526, 0.453707, 0.455938, 0.515971", \ + "0.442141, 0.442439, 0.443823, 0.445821, 0.452002, 0.454233, 0.514266", \ + "0.436265, 0.436563, 0.437947, 0.439945, 0.446126, 0.448357, 0.508390", \ + "0.433620, 0.433918, 0.435302, 0.437300, 0.443481, 0.445712, 0.505745", \ + "0.482460, 0.482758, 0.484142, 0.486140, 0.492321, 0.494552, 0.554585" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.445448, 0.445746, 0.447130, 0.449128, 0.455309, 0.457540, 0.517573", \ + "0.445116, 0.445414, 0.446798, 0.448796, 0.454977, 0.457208, 0.517241", \ + "0.443846, 0.444144, 0.445528, 0.447526, 0.453707, 0.455938, 0.515971", \ + "0.442141, 0.442439, 0.443823, 0.445821, 0.452002, 0.454233, 0.514266", \ + "0.436265, 0.436563, 0.437947, 0.439945, 0.446126, 0.448357, 0.508390", \ + "0.433620, 0.433918, 0.435302, 0.437300, 0.443481, 0.445712, 0.505745", \ + "0.482460, 0.482758, 0.484142, 0.486140, 0.492321, 0.494552, 0.554585" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.614606, 0.614018, 0.613674, 0.613672, 0.617119, 0.619275, 0.684344", \ + "0.614867, 0.614279, 0.613935, 0.613933, 0.617380, 0.619536, 0.684605", \ + "0.616175, 0.615587, 0.615243, 0.615241, 0.618688, 0.620844, 0.685913", \ + "0.617924, 0.617336, 0.616992, 0.616990, 0.620437, 0.622593, 0.687662", \ + "0.624188, 0.623600, 0.623256, 0.623254, 0.626701, 0.628857, 0.693926", \ + "0.626365, 0.625777, 0.625433, 0.625431, 0.628878, 0.631034, 0.696103", \ + "0.685535, 0.684947, 0.684603, 0.684601, 0.688048, 0.690204, 0.755273" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.614606, 0.614018, 0.613674, 0.613672, 0.617119, 0.619275, 0.684344", \ + "0.614867, 0.614279, 0.613935, 0.613933, 0.617380, 0.619536, 0.684605", \ + "0.616175, 0.615587, 0.615243, 0.615241, 0.618688, 0.620844, 0.685913", \ + "0.617924, 0.617336, 0.616992, 0.616990, 0.620437, 0.622593, 0.687662", \ + "0.624188, 0.623600, 0.623256, 0.623254, 0.626701, 0.628857, 0.693926", \ + "0.626365, 0.625777, 0.625433, 0.625431, 0.628878, 0.631034, 0.696103", \ + "0.685535, 0.684947, 0.684603, 0.684601, 0.688048, 0.690204, 0.755273" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000972; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.158397, 0.159016, 0.161221, 0.165613, 0.183585, 0.194363, 0.273397", \ + "0.158090, 0.158709, 0.160914, 0.165306, 0.183436, 0.194214, 0.273249", \ + "0.157020, 0.157639, 0.159844, 0.164237, 0.182040, 0.192818, 0.271852", \ + "0.154924, 0.155543, 0.157748, 0.162140, 0.179926, 0.190704, 0.269738", \ + "0.148540, 0.149159, 0.151364, 0.155757, 0.173726, 0.184504, 0.263538", \ + "0.148933, 0.150030, 0.151774, 0.156142, 0.171310, 0.182068, 0.261103", \ + "0.215082, 0.216179, 0.217923, 0.222290, 0.237143, 0.243847, 0.318586" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.158397, 0.159016, 0.161221, 0.165613, 0.183585, 0.194363, 0.273397", \ + "0.158090, 0.158709, 0.160914, 0.165306, 0.183436, 0.194214, 0.273249", \ + "0.157020, 0.157639, 0.159844, 0.164237, 0.182040, 0.192818, 0.271852", \ + "0.154924, 0.155543, 0.157748, 0.162140, 0.179926, 0.190704, 0.269738", \ + "0.148540, 0.149159, 0.151364, 0.155757, 0.173726, 0.184504, 0.263538", \ + "0.148933, 0.150030, 0.151774, 0.156142, 0.171310, 0.182068, 0.261103", \ + "0.215082, 0.216179, 0.217923, 0.222290, 0.237143, 0.243847, 0.318586" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.069479, 0.068661, 0.067452, 0.066020, 0.065744, 0.066997, 0.126709", \ + "0.069864, 0.069046, 0.067837, 0.066405, 0.066129, 0.067381, 0.127093", \ + "0.071102, 0.070283, 0.069075, 0.067642, 0.067366, 0.068619, 0.128331", \ + "0.073377, 0.072558, 0.071349, 0.069917, 0.069641, 0.070894, 0.130606", \ + "0.080156, 0.079338, 0.078129, 0.076696, 0.076420, 0.077672, 0.137384", \ + "0.083041, 0.082223, 0.081014, 0.079582, 0.079306, 0.080559, 0.140271", \ + "0.144203, 0.143385, 0.142176, 0.140744, 0.140467, 0.141719, 0.201431" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.069479, 0.068661, 0.067452, 0.066020, 0.065744, 0.066997, 0.126709", \ + "0.069864, 0.069046, 0.067837, 0.066405, 0.066129, 0.067381, 0.127093", \ + "0.071102, 0.070283, 0.069075, 0.067642, 0.067366, 0.068619, 0.128331", \ + "0.073377, 0.072558, 0.071349, 0.069917, 0.069641, 0.070894, 0.130606", \ + "0.080156, 0.079338, 0.078129, 0.076696, 0.076420, 0.077672, 0.137384", \ + "0.083041, 0.082223, 0.081014, 0.079582, 0.079306, 0.080559, 0.140271", \ + "0.144203, 0.143385, 0.142176, 0.140744, 0.140467, 0.141719, 0.201431" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019566, 0.019586, 0.019605, 0.019625, 0.019644, 0.019664, 0.019995"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019107, 0.019126, 0.019145, 0.019165, 0.019206, 0.019225, 0.019427"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001582; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073793, 0.074331, 0.075277, 0.077740, 0.084554, 0.086557, 0.148972", \ + "0.073865, 0.074403, 0.075349, 0.077812, 0.084626, 0.086629, 0.149044", \ + "0.073912, 0.074450, 0.075396, 0.077859, 0.084673, 0.086676, 0.149091", \ + "0.075206, 0.075744, 0.076690, 0.079153, 0.085967, 0.087970, 0.150385", \ + "0.079734, 0.080272, 0.081218, 0.083681, 0.090495, 0.092498, 0.154913", \ + "0.081749, 0.082287, 0.083233, 0.085696, 0.092510, 0.094513, 0.156928", \ + "0.147674, 0.148212, 0.149158, 0.151621, 0.158435, 0.160438, 0.222853" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.073297, 0.073912, 0.075324, 0.077659, 0.085436, 0.089194, 0.152943", \ + "0.073040, 0.073655, 0.075067, 0.077402, 0.085179, 0.088937, 0.152686", \ + "0.071805, 0.072420, 0.073832, 0.076167, 0.083944, 0.087702, 0.151451", \ + "0.069887, 0.070502, 0.071914, 0.074249, 0.082026, 0.085784, 0.149533", \ + "0.068880, 0.069909, 0.071404, 0.073373, 0.080722, 0.085147, 0.146922", \ + "0.070895, 0.071924, 0.073419, 0.075388, 0.082737, 0.087162, 0.148937", \ + "0.136820, 0.137849, 0.139344, 0.141313, 0.148662, 0.153087, 0.214862" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.041686, 0.041066, 0.039912, 0.037670, 0.032617, 0.030823, 0.082740", \ + "0.042034, 0.041414, 0.040260, 0.038018, 0.032918, 0.031124, 0.083041", \ + "0.043159, 0.042539, 0.041385, 0.039143, 0.034205, 0.032411, 0.084328", \ + "0.045229, 0.044609, 0.043455, 0.041213, 0.035941, 0.034147, 0.086064", \ + "0.051246, 0.050626, 0.049472, 0.047230, 0.041037, 0.039243, 0.091160", \ + "0.054026, 0.053406, 0.052252, 0.050010, 0.043628, 0.041574, 0.093191", \ + "0.115604, 0.114984, 0.113830, 0.111588, 0.105206, 0.103152, 0.153256" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.041261, 0.040561, 0.039135, 0.036906, 0.029821, 0.025356, 0.077009", \ + "0.041609, 0.040909, 0.039483, 0.037254, 0.030169, 0.025704, 0.077357", \ + "0.042734, 0.042034, 0.040608, 0.038379, 0.031294, 0.026829, 0.078482", \ + "0.044804, 0.044104, 0.042678, 0.040449, 0.033364, 0.028899, 0.080552", \ + "0.050821, 0.050121, 0.048695, 0.046466, 0.039381, 0.034916, 0.086569", \ + "0.053601, 0.052901, 0.051475, 0.049246, 0.042161, 0.037696, 0.089349", \ + "0.115179, 0.114479, 0.113053, 0.110824, 0.103739, 0.099274, 0.150927" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.241043, 0.239423, 0.238023, 0.237123, 0.228443, 0.225773, 0.215323", \ + "0.244283, 0.242663, 0.241263, 0.240363, 0.231683, 0.229013, 0.218563", \ + "0.247093, 0.245473, 0.244073, 0.243173, 0.234493, 0.231823, 0.221373", \ + "0.248893, 0.247273, 0.245873, 0.244973, 0.236293, 0.233623, 0.223173", \ + "0.266243, 0.264623, 0.263223, 0.262323, 0.253643, 0.250973, 0.240523", \ + "0.271583, 0.269963, 0.268563, 0.267663, 0.258983, 0.256313, 0.245863", \ + "0.292483, 0.290863, 0.289463, 0.288563, 0.279883, 0.277213, 0.266763" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + } + bus(TAA) { + bus_type : rf2_32x19_wm0_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001358; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090964, 0.091024, 0.092431, 0.094919, 0.104693, 0.110770, 0.177481", \ + "0.090658, 0.090718, 0.092125, 0.094613, 0.104387, 0.110464, 0.177175", \ + "0.089417, 0.089477, 0.090884, 0.093372, 0.103146, 0.109223, 0.175934", \ + "0.087493, 0.087553, 0.088960, 0.091448, 0.101222, 0.107299, 0.174010", \ + "0.081105, 0.081165, 0.082572, 0.085060, 0.094834, 0.100911, 0.167622", \ + "0.078761, 0.078821, 0.080228, 0.082716, 0.092490, 0.098567, 0.165278", \ + "0.127175, 0.127235, 0.128642, 0.131130, 0.140904, 0.146981, 0.213692" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062069, 0.061373, 0.060122, 0.058863, 0.059493, 0.060906, 0.120167", \ + "0.062418, 0.061722, 0.060471, 0.059212, 0.059842, 0.061255, 0.120516", \ + "0.063544, 0.062848, 0.061597, 0.060338, 0.060968, 0.062381, 0.121642", \ + "0.065612, 0.064916, 0.063665, 0.062406, 0.063036, 0.064449, 0.123710", \ + "0.071774, 0.071078, 0.069827, 0.068568, 0.069198, 0.070611, 0.129872", \ + "0.074398, 0.073702, 0.072451, 0.071192, 0.071822, 0.073235, 0.132496", \ + "0.134976, 0.134280, 0.133029, 0.131770, 0.132400, 0.133813, 0.193074" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.063163, 0.062419, 0.061320, 0.060018, 0.059767, 0.058994, 0.117650", \ + "0.063513, 0.062769, 0.061670, 0.060368, 0.060117, 0.059344, 0.118000", \ + "0.064638, 0.063894, 0.062795, 0.061493, 0.061242, 0.060469, 0.119125", \ + "0.066706, 0.065962, 0.064863, 0.063561, 0.063310, 0.062537, 0.121193", \ + "0.072869, 0.072125, 0.071026, 0.069724, 0.069473, 0.068700, 0.127356", \ + "0.075492, 0.074748, 0.073649, 0.072347, 0.072096, 0.071323, 0.129979", \ + "0.136071, 0.135327, 0.134228, 0.132926, 0.132675, 0.131902, 0.190558" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019225, 0.019244, 0.019263, 0.019282, 0.019302, 0.019418, 0.020007"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.016535, 0.016555, 0.016583, 0.016599, 0.016772, 0.016938, 0.017644"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001188; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.216253, 0.217233, 0.220359, 0.225473, 0.243998, 0.251270, 0.329034", \ + "0.215798, 0.216778, 0.219905, 0.225018, 0.243543, 0.250815, 0.328579", \ + "0.215257, 0.216237, 0.219364, 0.224478, 0.243003, 0.250275, 0.328039", \ + "0.212557, 0.213536, 0.216663, 0.221777, 0.240302, 0.247574, 0.325338", \ + "0.207020, 0.207999, 0.211126, 0.216240, 0.234765, 0.242037, 0.319801", \ + "0.206063, 0.207460, 0.209793, 0.215193, 0.231749, 0.239021, 0.316785", \ + "0.272077, 0.273474, 0.275807, 0.281207, 0.296304, 0.302254, 0.373633" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.216253, 0.217233, 0.220359, 0.225473, 0.243998, 0.251270, 0.329034", \ + "0.215798, 0.216778, 0.219905, 0.225018, 0.243543, 0.250815, 0.328579", \ + "0.215257, 0.216237, 0.219364, 0.224478, 0.243003, 0.250275, 0.328039", \ + "0.212557, 0.213536, 0.216663, 0.221777, 0.240302, 0.247574, 0.325338", \ + "0.207020, 0.207999, 0.211126, 0.216240, 0.234765, 0.242037, 0.319801", \ + "0.206063, 0.207460, 0.209793, 0.215193, 0.231749, 0.239021, 0.316785", \ + "0.272077, 0.273474, 0.275807, 0.281207, 0.296304, 0.302254, 0.373633" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.099347, 0.098652, 0.097293, 0.095635, 0.094585, 0.094133, 0.154541", \ + "0.099671, 0.098976, 0.097616, 0.095958, 0.094909, 0.094457, 0.154867", \ + "0.101166, 0.100470, 0.099111, 0.097453, 0.096404, 0.095952, 0.156356", \ + "0.103203, 0.102508, 0.101148, 0.099490, 0.098441, 0.097989, 0.158391", \ + "0.109219, 0.108524, 0.107164, 0.105506, 0.104457, 0.104005, 0.164404", \ + "0.111961, 0.111266, 0.109906, 0.108249, 0.107199, 0.106747, 0.167155", \ + "0.171771, 0.171076, 0.169716, 0.168059, 0.167009, 0.166557, 0.226964" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.099347, 0.098652, 0.097293, 0.095635, 0.094585, 0.094133, 0.154541", \ + "0.099671, 0.098976, 0.097616, 0.095958, 0.094909, 0.094457, 0.154867", \ + "0.101166, 0.100470, 0.099111, 0.097453, 0.096404, 0.095952, 0.156356", \ + "0.103203, 0.102508, 0.101148, 0.099490, 0.098441, 0.097989, 0.158391", \ + "0.109219, 0.108524, 0.107164, 0.105506, 0.104457, 0.104005, 0.164404", \ + "0.111961, 0.111266, 0.109906, 0.108249, 0.107199, 0.106747, 0.167155", \ + "0.171771, 0.171076, 0.169716, 0.168059, 0.167009, 0.166557, 0.226964" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.114190, 0.114318, 0.114645, 0.114760, 0.114874, 0.114989, 0.115104"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.124041, 0.124160, 0.124495, 0.124627, 0.124752, 0.124876, 0.125001"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001576; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.077944, 0.078976, 0.079506, 0.082388, 0.089591, 0.092412, 0.155097", \ + "0.078117, 0.079149, 0.079679, 0.082561, 0.089764, 0.092585, 0.155270", \ + "0.078452, 0.079484, 0.080014, 0.082896, 0.090099, 0.092920, 0.155605", \ + "0.080076, 0.081108, 0.081638, 0.084520, 0.091723, 0.094544, 0.157229", \ + "0.084806, 0.085838, 0.086368, 0.089250, 0.096453, 0.099274, 0.161959", \ + "0.087249, 0.088281, 0.088811, 0.091693, 0.098896, 0.101717, 0.164402", \ + "0.152822, 0.153854, 0.154384, 0.157266, 0.164469, 0.167290, 0.229975" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.075956, 0.077190, 0.078326, 0.081326, 0.089303, 0.093321, 0.156756", \ + "0.075720, 0.076954, 0.078090, 0.081090, 0.089067, 0.093085, 0.156520", \ + "0.074461, 0.075695, 0.076831, 0.079831, 0.087808, 0.091826, 0.155261", \ + "0.072310, 0.073544, 0.074680, 0.077680, 0.085657, 0.089675, 0.153110", \ + "0.074513, 0.075621, 0.076542, 0.079506, 0.087659, 0.091813, 0.155476", \ + "0.076958, 0.078066, 0.078987, 0.081951, 0.090104, 0.094258, 0.157921", \ + "0.142529, 0.143637, 0.144558, 0.147522, 0.155675, 0.159829, 0.223492" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.043867, 0.043188, 0.042245, 0.039814, 0.035708, 0.032502, 0.082613", \ + "0.044101, 0.043422, 0.042479, 0.040048, 0.035942, 0.032736, 0.082847", \ + "0.045397, 0.044718, 0.043775, 0.041344, 0.037238, 0.034032, 0.084143", \ + "0.046936, 0.046257, 0.045314, 0.042883, 0.038777, 0.035571, 0.085682", \ + "0.051637, 0.050958, 0.050015, 0.047584, 0.043478, 0.040272, 0.090383", \ + "0.053624, 0.052945, 0.052002, 0.049571, 0.045465, 0.042259, 0.092370", \ + "0.112537, 0.111858, 0.110915, 0.108484, 0.104378, 0.101172, 0.151283" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.036056, 0.035409, 0.034370, 0.031457, 0.023776, 0.019772, 0.071059", \ + "0.036330, 0.035683, 0.034644, 0.031731, 0.024050, 0.020046, 0.071059", \ + "0.037674, 0.037027, 0.035988, 0.033075, 0.025394, 0.021390, 0.071059", \ + "0.039568, 0.038921, 0.037882, 0.034969, 0.027288, 0.023284, 0.071369", \ + "0.045378, 0.044731, 0.043692, 0.040779, 0.033098, 0.029094, 0.077179", \ + "0.048098, 0.047451, 0.046412, 0.043499, 0.035818, 0.031814, 0.079899", \ + "0.109246, 0.108599, 0.107560, 0.104647, 0.096966, 0.092962, 0.141047" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.039784, 0.040266, 0.040577, 0.040617, 0.040658, 0.040699, 0.041411"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.071846, 0.072208, 0.073170, 0.073282, 0.073352, 0.073426, 0.073971"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.241043, 0.239423, 0.238023, 0.237123, 0.228443, 0.225773, 0.215323", \ + "0.244283, 0.242663, 0.241263, 0.240363, 0.231683, 0.229013, 0.218563", \ + "0.247093, 0.245473, 0.244073, 0.243173, 0.234493, 0.231823, 0.221373", \ + "0.248893, 0.247273, 0.245873, 0.244973, 0.236293, 0.233623, 0.223173", \ + "0.266243, 0.264623, 0.263223, 0.262323, 0.253643, 0.250973, 0.240523", \ + "0.271583, 0.269963, 0.268563, 0.267663, 0.258983, 0.256313, 0.245863", \ + "0.292483, 0.290863, 0.289463, 0.288563, 0.279883, 0.277213, 0.266763" \ + ); + } + } + } + bus(TAB) { + bus_type : rf2_32x19_wm0_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001369; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.096956, 0.097571, 0.098894, 0.101490, 0.112121, 0.116264, 0.185334", \ + "0.096730, 0.097345, 0.098668, 0.101264, 0.111895, 0.116038, 0.185108", \ + "0.095492, 0.096107, 0.097430, 0.100026, 0.110657, 0.114800, 0.183870", \ + "0.093335, 0.093950, 0.095273, 0.097869, 0.108500, 0.112643, 0.181713", \ + "0.087873, 0.088488, 0.089811, 0.092407, 0.103038, 0.107181, 0.176251", \ + "0.085190, 0.085805, 0.087128, 0.089724, 0.100355, 0.104498, 0.173568", \ + "0.135819, 0.136434, 0.137757, 0.140353, 0.150984, 0.155127, 0.224197" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.056593, 0.055888, 0.054634, 0.053398, 0.053707, 0.055456, 0.117654", \ + "0.056842, 0.056137, 0.054883, 0.053647, 0.053956, 0.055705, 0.117903", \ + "0.058182, 0.057477, 0.056223, 0.054987, 0.055296, 0.057045, 0.119243", \ + "0.060077, 0.059372, 0.058118, 0.056882, 0.057191, 0.058940, 0.121138", \ + "0.065904, 0.065199, 0.063945, 0.062709, 0.063018, 0.064767, 0.126965", \ + "0.068540, 0.067835, 0.066581, 0.065345, 0.065654, 0.067403, 0.129601", \ + "0.128098, 0.127393, 0.126139, 0.124903, 0.125212, 0.126961, 0.189159" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.057847, 0.057105, 0.056003, 0.054685, 0.054379, 0.053606, 0.114775", \ + "0.058097, 0.057355, 0.056253, 0.054935, 0.054629, 0.053856, 0.115025", \ + "0.059438, 0.058696, 0.057594, 0.056276, 0.055970, 0.055197, 0.116366", \ + "0.061333, 0.060591, 0.059489, 0.058171, 0.057865, 0.057092, 0.118261", \ + "0.067160, 0.066418, 0.065316, 0.063998, 0.063692, 0.062919, 0.124088", \ + "0.069799, 0.069057, 0.067955, 0.066637, 0.066331, 0.065558, 0.126727", \ + "0.129354, 0.128612, 0.127510, 0.126192, 0.125886, 0.125113, 0.186282" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.022322, 0.022345, 0.022367, 0.022389, 0.022412, 0.022475, 0.023120"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.019683, 0.019713, 0.019719, 0.019739, 0.019884, 0.020075, 0.020900"); + } + } + } + bus(TDB) { + bus_type : rf2_32x19_wm0_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001590; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.030800, 0.031494, 0.033490, 0.034516, 0.040750, 0.044949, 0.109162", \ + "0.030555, 0.031249, 0.033245, 0.034271, 0.040505, 0.044704, 0.108917", \ + "0.029214, 0.029908, 0.031904, 0.032930, 0.039164, 0.043363, 0.107576", \ + "0.027408, 0.028102, 0.030098, 0.031124, 0.037358, 0.041557, 0.105770", \ + "0.022068, 0.022762, 0.024758, 0.025784, 0.032018, 0.036217, 0.100430", \ + "0.019302, 0.019996, 0.021992, 0.023018, 0.029252, 0.033451, 0.097664", \ + "0.069527, 0.070221, 0.072217, 0.073243, 0.079477, 0.083676, 0.147889" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.034510, 0.034595, 0.036209, 0.038745, 0.046898, 0.051914, 0.117314", \ + "0.034238, 0.034323, 0.035937, 0.038473, 0.046626, 0.051642, 0.117042", \ + "0.032915, 0.033000, 0.034614, 0.037150, 0.045303, 0.050319, 0.115719", \ + "0.031072, 0.031157, 0.032771, 0.035307, 0.043460, 0.048476, 0.113876", \ + "0.025834, 0.025919, 0.027533, 0.030069, 0.038222, 0.043238, 0.108638", \ + "0.023066, 0.023151, 0.024765, 0.027301, 0.035454, 0.040470, 0.105870", \ + "0.073206, 0.073291, 0.074905, 0.077441, 0.085594, 0.090610, 0.156010" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088381, 0.087806, 0.086983, 0.085554, 0.085094, 0.085157, 0.145469", \ + "0.088677, 0.088102, 0.087279, 0.085850, 0.085390, 0.085453, 0.145765", \ + "0.090031, 0.089456, 0.088633, 0.087204, 0.086744, 0.086807, 0.147119", \ + "0.091881, 0.091306, 0.090483, 0.089054, 0.088594, 0.088657, 0.148969", \ + "0.097347, 0.096772, 0.095949, 0.094520, 0.094060, 0.094123, 0.154435", \ + "0.099848, 0.099273, 0.098450, 0.097021, 0.096561, 0.096624, 0.156936", \ + "0.159197, 0.158622, 0.157799, 0.156370, 0.155910, 0.155973, 0.216285" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090316, 0.089684, 0.088448, 0.086941, 0.085987, 0.085576, 0.140737", \ + "0.090610, 0.089978, 0.088742, 0.087235, 0.086281, 0.085870, 0.141031", \ + "0.091969, 0.091337, 0.090101, 0.088594, 0.087640, 0.087229, 0.142390", \ + "0.093821, 0.093189, 0.091953, 0.090446, 0.089492, 0.089081, 0.144242", \ + "0.099290, 0.098658, 0.097422, 0.095915, 0.094961, 0.094550, 0.149711", \ + "0.101783, 0.101151, 0.099915, 0.098408, 0.097454, 0.097043, 0.152204", \ + "0.161133, 0.160501, 0.159265, 0.157758, 0.156804, 0.156393, 0.211554" \ + ); + } + } + internal_power() { + when : "!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006133, 0.006137, 0.006192, 0.006293, 0.006299, 0.006305, 0.006402"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007097, 0.007105, 0.007115, 0.007122, 0.007129, 0.007136, 0.007304"); + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003513; + max_transition : 0.219000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.771748, 0.772186, 0.772392, 0.773163, 0.773937, 0.774710, 0.776404"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.194628, 0.194807, 0.195110, 0.195453, 0.195648, 0.195989, 0.197019"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.018448, 0.018583, 0.018831, 0.019435, 0.021359, 0.022298, 0.024548", \ + "0.018466, 0.018601, 0.018837, 0.019453, 0.021295, 0.022234, 0.024484", \ + "0.018478, 0.018612, 0.018849, 0.019465, 0.021168, 0.021925, 0.024175", \ + "0.018801, 0.018936, 0.019172, 0.019788, 0.021492, 0.021992, 0.023909", \ + "0.019933, 0.020068, 0.020304, 0.020920, 0.022624, 0.023124, 0.025041", \ + "0.020437, 0.020572, 0.020808, 0.021424, 0.023127, 0.023628, 0.025544", \ + "0.023231, 0.023365, 0.023602, 0.024218, 0.025921, 0.026422, 0.028338" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.018448, 0.018583, 0.018831, 0.019435, 0.021359, 0.022298, 0.024548", \ + "0.018466, 0.018601, 0.018837, 0.019453, 0.021295, 0.022234, 0.024484", \ + "0.018478, 0.018612, 0.018849, 0.019465, 0.021168, 0.021925, 0.024175", \ + "0.018801, 0.018936, 0.019172, 0.019788, 0.021492, 0.021992, 0.023909", \ + "0.019933, 0.020068, 0.020304, 0.020920, 0.022624, 0.023124, 0.025041", \ + "0.020437, 0.020572, 0.020808, 0.021424, 0.023127, 0.023628, 0.025544", \ + "0.023231, 0.023365, 0.023602, 0.024218, 0.025921, 0.026422, 0.028338" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.019486, 0.019744, 0.019876, 0.020597, 0.022398, 0.023330, 0.025501", \ + "0.019529, 0.019787, 0.019920, 0.020640, 0.022441, 0.023271, 0.025442", \ + "0.019613, 0.019871, 0.020003, 0.020724, 0.022525, 0.023230, 0.025214", \ + "0.020019, 0.020277, 0.020409, 0.021130, 0.022931, 0.023636, 0.025620", \ + "0.021201, 0.021459, 0.021592, 0.022312, 0.024113, 0.024818, 0.026802", \ + "0.021812, 0.022070, 0.022203, 0.022923, 0.024724, 0.025429, 0.027413", \ + "0.024518, 0.024776, 0.024908, 0.025629, 0.027430, 0.028135, 0.030119" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.404079, 0.403491, 0.403147, 0.403145, 0.406592, 0.408748, 0.419067", \ + "0.404340, 0.403752, 0.403408, 0.403406, 0.406853, 0.409009, 0.419328", \ + "0.405648, 0.405060, 0.404716, 0.404714, 0.408161, 0.410317, 0.420636", \ + "0.407397, 0.406809, 0.406465, 0.406463, 0.409910, 0.412066, 0.422385", \ + "0.413661, 0.413073, 0.412729, 0.412727, 0.416174, 0.418330, 0.428649", \ + "0.415838, 0.415250, 0.414906, 0.414904, 0.418351, 0.420507, 0.430826", \ + "0.420258, 0.419670, 0.419326, 0.419324, 0.422771, 0.424927, 0.435246" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.404079, 0.403491, 0.403147, 0.403145, 0.406592, 0.408748, 0.419067", \ + "0.404340, 0.403752, 0.403408, 0.403406, 0.406853, 0.409009, 0.419328", \ + "0.405648, 0.405060, 0.404716, 0.404714, 0.408161, 0.410317, 0.420636", \ + "0.407397, 0.406809, 0.406465, 0.406463, 0.409910, 0.412066, 0.422385", \ + "0.413661, 0.413073, 0.412729, 0.412727, 0.416174, 0.418330, 0.428649", \ + "0.415838, 0.415250, 0.414906, 0.414904, 0.418351, 0.420507, 0.430826", \ + "0.420258, 0.419670, 0.419326, 0.419324, 0.422771, 0.424927, 0.435246" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x19_wm0_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001516; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174237, 0.174917, 0.177343, 0.182175, 0.201943, 0.213799, 0.295262", \ + "0.173899, 0.174580, 0.177005, 0.181837, 0.201780, 0.213635, 0.295099", \ + "0.172722, 0.173403, 0.175828, 0.180660, 0.200244, 0.212099, 0.293563", \ + "0.170416, 0.171097, 0.173522, 0.178354, 0.197918, 0.209774, 0.291237", \ + "0.163394, 0.164075, 0.166500, 0.171332, 0.191098, 0.202954, 0.284417", \ + "0.163827, 0.165033, 0.166951, 0.171756, 0.188441, 0.200275, 0.281738", \ + "0.231115, 0.232321, 0.234240, 0.239044, 0.255382, 0.262756, 0.339494" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174237, 0.174917, 0.177343, 0.182175, 0.201943, 0.213799, 0.295262", \ + "0.173899, 0.174580, 0.177005, 0.181837, 0.201780, 0.213635, 0.295099", \ + "0.172722, 0.173403, 0.175828, 0.180660, 0.200244, 0.212099, 0.293563", \ + "0.170416, 0.171097, 0.173522, 0.178354, 0.197918, 0.209774, 0.291237", \ + "0.163394, 0.164075, 0.166500, 0.171332, 0.191098, 0.202954, 0.284417", \ + "0.163827, 0.165033, 0.166951, 0.171756, 0.188441, 0.200275, 0.281738", \ + "0.231115, 0.232321, 0.234240, 0.239044, 0.255382, 0.262756, 0.339494" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062837, 0.062389, 0.061658, 0.061437, 0.065144, 0.065944, 0.135703", \ + "0.063702, 0.063254, 0.062523, 0.062301, 0.066008, 0.066808, 0.136568", \ + "0.064360, 0.063912, 0.063180, 0.062959, 0.066666, 0.067466, 0.137225", \ + "0.066717, 0.066269, 0.065538, 0.065317, 0.069024, 0.069823, 0.139583", \ + "0.073338, 0.072890, 0.072159, 0.071937, 0.075644, 0.076444, 0.146204", \ + "0.076754, 0.076307, 0.075575, 0.075354, 0.079061, 0.079861, 0.149620", \ + "0.136048, 0.135601, 0.134869, 0.134648, 0.138355, 0.139155, 0.208914" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.062225, 0.061894, 0.060700, 0.059798, 0.058835, 0.058340, 0.114321", \ + "0.062918, 0.062587, 0.061393, 0.060491, 0.059528, 0.059033, 0.115014", \ + "0.063779, 0.063448, 0.062255, 0.061353, 0.060389, 0.059894, 0.115875", \ + "0.065925, 0.065594, 0.064401, 0.063499, 0.062535, 0.062040, 0.118021", \ + "0.072731, 0.072400, 0.071206, 0.070304, 0.069341, 0.068846, 0.124827", \ + "0.075968, 0.075637, 0.074444, 0.073542, 0.072578, 0.072083, 0.128064", \ + "0.135265, 0.134934, 0.133740, 0.132838, 0.131874, 0.131379, 0.187360" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.008057, 0.008230, 0.008238, 0.008246, 0.008254, 0.008309, 0.008591"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013811, 0.013825, 0.013838, 0.013852, 0.013866, 0.013955, 0.014308"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001888; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174237, 0.174917, 0.177343, 0.182175, 0.201943, 0.213799, 0.295262", \ + "0.173899, 0.174580, 0.177005, 0.181837, 0.201780, 0.213635, 0.295099", \ + "0.172722, 0.173403, 0.175828, 0.180660, 0.200244, 0.212099, 0.293563", \ + "0.170416, 0.171097, 0.173522, 0.178354, 0.197918, 0.209774, 0.291237", \ + "0.163394, 0.164075, 0.166500, 0.171332, 0.191098, 0.202954, 0.284417", \ + "0.163827, 0.165033, 0.166951, 0.171756, 0.188441, 0.200275, 0.281738", \ + "0.231115, 0.232321, 0.234240, 0.239044, 0.255382, 0.262756, 0.339494" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.174237, 0.174917, 0.177343, 0.182175, 0.201943, 0.213799, 0.295262", \ + "0.173899, 0.174580, 0.177005, 0.181837, 0.201780, 0.213635, 0.295099", \ + "0.172722, 0.173403, 0.175828, 0.180660, 0.200244, 0.212099, 0.293563", \ + "0.170416, 0.171097, 0.173522, 0.178354, 0.197918, 0.209774, 0.291237", \ + "0.163394, 0.164075, 0.166500, 0.171332, 0.191098, 0.202954, 0.284417", \ + "0.163827, 0.165033, 0.166951, 0.171756, 0.188441, 0.200275, 0.281738", \ + "0.231115, 0.232321, 0.234240, 0.239044, 0.255382, 0.262756, 0.339494" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.008057, 0.008230, 0.008238, 0.008246, 0.008254, 0.008309, 0.008591"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.013811, 0.013825, 0.013838, 0.013852, 0.013866, 0.013955, 0.014308"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002073; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.128223, 0.128913, 0.130273, 0.132612, 0.139733, 0.143813, 0.205792", \ + "0.127933, 0.128623, 0.129983, 0.132323, 0.139442, 0.143522, 0.205503", \ + "0.126753, 0.127443, 0.128803, 0.131142, 0.138263, 0.142343, 0.204322", \ + "0.124762, 0.125452, 0.126812, 0.129153, 0.136273, 0.140352, 0.202332", \ + "0.118762, 0.119453, 0.120813, 0.123152, 0.130273, 0.134353, 0.196332", \ + "0.116066, 0.116755, 0.118115, 0.120455, 0.127576, 0.131656, 0.193635", \ + "0.164476, 0.165166, 0.166526, 0.168867, 0.175986, 0.180066, 0.242046" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.146410, 0.147080, 0.148840, 0.151430, 0.158830, 0.160620, 0.223890", \ + "0.146380, 0.147050, 0.148810, 0.151400, 0.158800, 0.160590, 0.223860", \ + "0.145350, 0.146020, 0.147780, 0.150370, 0.157770, 0.159560, 0.222830", \ + "0.142880, 0.143550, 0.145310, 0.147900, 0.155300, 0.157090, 0.220360", \ + "0.136880, 0.137550, 0.139310, 0.141900, 0.149300, 0.151090, 0.214360", \ + "0.134800, 0.135470, 0.137230, 0.139820, 0.147220, 0.149010, 0.212280", \ + "0.182590, 0.183260, 0.185020, 0.187610, 0.195010, 0.196800, 0.260070" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.128223, 0.128913, 0.130273, 0.132612, 0.139733, 0.143813, 0.205792", \ + "0.127933, 0.128623, 0.129983, 0.132323, 0.139442, 0.143522, 0.205503", \ + "0.126753, 0.127443, 0.128803, 0.131142, 0.138263, 0.142343, 0.204322", \ + "0.124762, 0.125452, 0.126812, 0.129153, 0.136273, 0.140352, 0.202332", \ + "0.118762, 0.119453, 0.120813, 0.123152, 0.130273, 0.134353, 0.196332", \ + "0.116066, 0.116755, 0.118115, 0.120455, 0.127576, 0.131656, 0.193635", \ + "0.164476, 0.165166, 0.166526, 0.168867, 0.175986, 0.180066, 0.242046" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.146410, 0.147080, 0.148840, 0.151430, 0.158830, 0.160620, 0.223890", \ + "0.146380, 0.147050, 0.148810, 0.151400, 0.158800, 0.160590, 0.223860", \ + "0.145350, 0.146020, 0.147780, 0.150370, 0.157770, 0.159560, 0.222830", \ + "0.142880, 0.143550, 0.145310, 0.147900, 0.155300, 0.157090, 0.220360", \ + "0.136880, 0.137550, 0.139310, 0.141900, 0.149300, 0.151090, 0.214360", \ + "0.134800, 0.135470, 0.137230, 0.139820, 0.147220, 0.149010, 0.212280", \ + "0.182590, 0.183260, 0.185020, 0.187610, 0.195010, 0.196800, 0.260070" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.513462", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.513723", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.515031", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.516780", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.523044", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.525221", \ + "0.514653, 0.514065, 0.513721, 0.513719, 0.517166, 0.519322, 0.584391" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.513462", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.513723", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.515031", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.516780", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.523044", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.525221", \ + "0.514653, 0.514065, 0.513721, 0.513719, 0.517166, 0.519322, 0.584391" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.287832, 0.288120, 0.288409, 0.288696, 0.289012, 0.289301, 0.290626"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.308382, 0.308673, 0.309066, 0.309376, 0.309672, 0.309982, 0.310291"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.443724, 0.443136, 0.442792, 0.442790, 0.446237, 0.448393, 0.458712", \ + "0.443985, 0.443397, 0.443053, 0.443051, 0.446498, 0.448654, 0.458973", \ + "0.445293, 0.444705, 0.444361, 0.444359, 0.447806, 0.449962, 0.460281", \ + "0.447042, 0.446454, 0.446110, 0.446108, 0.449555, 0.451711, 0.462030", \ + "0.453306, 0.452718, 0.452374, 0.452372, 0.455819, 0.457975, 0.468294", \ + "0.455483, 0.454895, 0.454551, 0.454549, 0.457996, 0.460152, 0.470471", \ + "0.459903, 0.459315, 0.458971, 0.458969, 0.462416, 0.464572, 0.474891" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.241043, 0.239423, 0.238023, 0.237123, 0.228443, 0.225773, 0.215323", \ + "0.244283, 0.242663, 0.241263, 0.240363, 0.231683, 0.229013, 0.218563", \ + "0.247093, 0.245473, 0.244073, 0.243173, 0.234493, 0.231823, 0.221373", \ + "0.248893, 0.247273, 0.245873, 0.244973, 0.236293, 0.233623, 0.223173", \ + "0.266243, 0.264623, 0.263223, 0.262323, 0.253643, 0.250973, 0.240523", \ + "0.271583, 0.269963, 0.268563, 0.267663, 0.258983, 0.256313, 0.245863", \ + "0.292483, 0.290863, 0.289463, 0.288563, 0.279883, 0.277213, 0.266763" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x19_wm0_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005557; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.029886, 0.030580, 0.032576, 0.033602, 0.039836, 0.044035, 0.108248", \ + "0.029641, 0.030335, 0.032331, 0.033357, 0.039591, 0.043790, 0.108003", \ + "0.028300, 0.028994, 0.030990, 0.032016, 0.038250, 0.042449, 0.106662", \ + "0.026494, 0.027188, 0.029184, 0.030210, 0.036444, 0.040643, 0.104856", \ + "0.021154, 0.021848, 0.023844, 0.024870, 0.031104, 0.035303, 0.099516", \ + "0.018388, 0.019082, 0.021078, 0.022104, 0.028338, 0.032537, 0.096750", \ + "0.068613, 0.069307, 0.071303, 0.072329, 0.078563, 0.082762, 0.146975" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.033595, 0.033680, 0.035294, 0.037830, 0.045983, 0.050999, 0.116399", \ + "0.033323, 0.033408, 0.035022, 0.037558, 0.045711, 0.050727, 0.116127", \ + "0.032000, 0.032085, 0.033699, 0.036235, 0.044388, 0.049404, 0.114804", \ + "0.030157, 0.030242, 0.031856, 0.034392, 0.042545, 0.047561, 0.112961", \ + "0.024919, 0.025004, 0.026618, 0.029154, 0.037307, 0.042323, 0.107723", \ + "0.022151, 0.022236, 0.023850, 0.026386, 0.034539, 0.039555, 0.104955", \ + "0.072291, 0.072376, 0.073990, 0.076526, 0.084679, 0.089695, 0.155095" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.088381, 0.087806, 0.086983, 0.085554, 0.085094, 0.085157, 0.145469", \ + "0.088677, 0.088102, 0.087279, 0.085850, 0.085390, 0.085453, 0.145765", \ + "0.090031, 0.089456, 0.088633, 0.087204, 0.086744, 0.086807, 0.147119", \ + "0.091881, 0.091306, 0.090483, 0.089054, 0.088594, 0.088657, 0.148969", \ + "0.097347, 0.096772, 0.095949, 0.094520, 0.094060, 0.094123, 0.154435", \ + "0.099848, 0.099273, 0.098450, 0.097021, 0.096561, 0.096624, 0.156936", \ + "0.159197, 0.158622, 0.157799, 0.156370, 0.155910, 0.155973, 0.216285" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.090316, 0.089684, 0.088448, 0.086941, 0.085987, 0.085576, 0.140737", \ + "0.090610, 0.089978, 0.088742, 0.087235, 0.086281, 0.085870, 0.141031", \ + "0.091969, 0.091337, 0.090101, 0.088594, 0.087640, 0.087229, 0.142390", \ + "0.093821, 0.093189, 0.091953, 0.090446, 0.089492, 0.089081, 0.144242", \ + "0.099290, 0.098658, 0.097422, 0.095915, 0.094961, 0.094550, 0.149711", \ + "0.101783, 0.101151, 0.099915, 0.098408, 0.097454, 0.097043, 0.152204", \ + "0.161133, 0.160501, 0.159265, 0.157758, 0.156804, 0.156393, 0.211554" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.006180, 0.006186, 0.006192, 0.006198, 0.006204, 0.006210, 0.006356"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.007079, 0.007086, 0.007094, 0.007101, 0.007108, 0.007175, 0.007387"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001891; + max_transition : 0.219000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.216253, 0.217233, 0.220359, 0.225473, 0.243998, 0.251270, 0.329034", \ + "0.215798, 0.216778, 0.219905, 0.225018, 0.243543, 0.250815, 0.328579", \ + "0.215257, 0.216237, 0.219364, 0.224478, 0.243003, 0.250275, 0.328039", \ + "0.212557, 0.213536, 0.216663, 0.221777, 0.240302, 0.247574, 0.325338", \ + "0.207020, 0.207999, 0.211126, 0.216240, 0.234765, 0.242037, 0.319801", \ + "0.206063, 0.207460, 0.209793, 0.215193, 0.231749, 0.239021, 0.316785", \ + "0.272077, 0.273474, 0.275807, 0.281207, 0.296304, 0.302254, 0.373633" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.216253, 0.217233, 0.220359, 0.225473, 0.243998, 0.251270, 0.329034", \ + "0.215798, 0.216778, 0.219905, 0.225018, 0.243543, 0.250815, 0.328579", \ + "0.215257, 0.216237, 0.219364, 0.224478, 0.243003, 0.250275, 0.328039", \ + "0.212557, 0.213536, 0.216663, 0.221777, 0.240302, 0.247574, 0.325338", \ + "0.207020, 0.207999, 0.211126, 0.216240, 0.234765, 0.242037, 0.319801", \ + "0.206063, 0.207460, 0.209793, 0.215193, 0.231749, 0.239021, 0.316785", \ + "0.272077, 0.273474, 0.275807, 0.281207, 0.296304, 0.302254, 0.373633" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.099347, 0.098652, 0.097293, 0.095635, 0.094585, 0.094133, 0.154541", \ + "0.099671, 0.098976, 0.097616, 0.095958, 0.094909, 0.094457, 0.154867", \ + "0.101166, 0.100470, 0.099111, 0.097453, 0.096404, 0.095952, 0.156356", \ + "0.103203, 0.102508, 0.101148, 0.099490, 0.098441, 0.097989, 0.158391", \ + "0.109219, 0.108524, 0.107164, 0.105506, 0.104457, 0.104005, 0.164404", \ + "0.111961, 0.111266, 0.109906, 0.108249, 0.107199, 0.106747, 0.167155", \ + "0.171771, 0.171076, 0.169716, 0.168059, 0.167009, 0.166557, 0.226964" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.099347, 0.098652, 0.097293, 0.095635, 0.094585, 0.094133, 0.154541", \ + "0.099671, 0.098976, 0.097616, 0.095958, 0.094909, 0.094457, 0.154867", \ + "0.101166, 0.100470, 0.099111, 0.097453, 0.096404, 0.095952, 0.156356", \ + "0.103203, 0.102508, 0.101148, 0.099490, 0.098441, 0.097989, 0.158391", \ + "0.109219, 0.108524, 0.107164, 0.105506, 0.104457, 0.104005, 0.164404", \ + "0.111961, 0.111266, 0.109906, 0.108249, 0.107199, 0.106747, 0.167155", \ + "0.171771, 0.171076, 0.169716, 0.168059, 0.167009, 0.166557, 0.226964" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.114190, 0.114318, 0.114645, 0.114760, 0.114874, 0.114989, 0.115104"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values ("0.124041, 0.124160, 0.124495, 0.124627, 0.124752, 0.124876, 0.125001"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002381; + max_transition : 0.219000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.405803, 0.406101, 0.407485, 0.409483, 0.415664, 0.417895, 0.477928", \ + "0.405471, 0.405769, 0.407153, 0.409151, 0.415332, 0.417563, 0.477596", \ + "0.404201, 0.404499, 0.405883, 0.407881, 0.414062, 0.416293, 0.476326", \ + "0.402496, 0.402794, 0.404178, 0.406176, 0.412357, 0.414588, 0.474621", \ + "0.396620, 0.396918, 0.398302, 0.400300, 0.406481, 0.408712, 0.468745", \ + "0.393975, 0.394273, 0.395657, 0.397655, 0.403836, 0.406067, 0.466100", \ + "0.442815, 0.443113, 0.444497, 0.446495, 0.452676, 0.454907, 0.514940" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.617225, 0.616637, 0.616293, 0.616291, 0.619738, 0.621894, 0.686963", \ + "0.617486, 0.616898, 0.616554, 0.616552, 0.619999, 0.622155, 0.687224", \ + "0.618794, 0.618206, 0.617862, 0.617860, 0.621307, 0.623463, 0.688532", \ + "0.620543, 0.619955, 0.619611, 0.619609, 0.623056, 0.625212, 0.690281", \ + "0.626807, 0.626219, 0.625875, 0.625873, 0.629320, 0.631476, 0.696545", \ + "0.628984, 0.628396, 0.628052, 0.628050, 0.631497, 0.633653, 0.698722", \ + "0.688154, 0.687566, 0.687222, 0.687220, 0.690667, 0.692823, 0.757892" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.445448, 0.445746, 0.447130, 0.449128, 0.455309, 0.457540, 0.517573", \ + "0.445116, 0.445414, 0.446798, 0.448796, 0.454977, 0.457208, 0.517241", \ + "0.443846, 0.444144, 0.445528, 0.447526, 0.453707, 0.455938, 0.515971", \ + "0.442141, 0.442439, 0.443823, 0.445821, 0.452002, 0.454233, 0.514266", \ + "0.436265, 0.436563, 0.437947, 0.439945, 0.446126, 0.448357, 0.508390", \ + "0.433620, 0.433918, 0.435302, 0.437300, 0.443481, 0.445712, 0.505745", \ + "0.482460, 0.482758, 0.484142, 0.486140, 0.492321, 0.494552, 0.554585" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.445448, 0.445746, 0.447130, 0.449128, 0.455309, 0.457540, 0.517573", \ + "0.445116, 0.445414, 0.446798, 0.448796, 0.454977, 0.457208, 0.517241", \ + "0.443846, 0.444144, 0.445528, 0.447526, 0.453707, 0.455938, 0.515971", \ + "0.442141, 0.442439, 0.443823, 0.445821, 0.452002, 0.454233, 0.514266", \ + "0.436265, 0.436563, 0.437947, 0.439945, 0.446126, 0.448357, 0.508390", \ + "0.433620, 0.433918, 0.435302, 0.437300, 0.443481, 0.445712, 0.505745", \ + "0.482460, 0.482758, 0.484142, 0.486140, 0.492321, 0.494552, 0.554585" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.614606, 0.614018, 0.613674, 0.613672, 0.617119, 0.619275, 0.684344", \ + "0.614867, 0.614279, 0.613935, 0.613933, 0.617380, 0.619536, 0.684605", \ + "0.616175, 0.615587, 0.615243, 0.615241, 0.618688, 0.620844, 0.685913", \ + "0.617924, 0.617336, 0.616992, 0.616990, 0.620437, 0.622593, 0.687662", \ + "0.624188, 0.623600, 0.623256, 0.623254, 0.626701, 0.628857, 0.693926", \ + "0.626365, 0.625777, 0.625433, 0.625431, 0.628878, 0.631034, 0.696103", \ + "0.685535, 0.684947, 0.684603, 0.684601, 0.688048, 0.690204, 0.755273" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + index_2 ("0.003000, 0.007000, 0.014000, 0.027000, 0.080000, 0.109000, 0.219000"); + values (\ + "0.614606, 0.614018, 0.613674, 0.613672, 0.617119, 0.619275, 0.684344", \ + "0.614867, 0.614279, 0.613935, 0.613933, 0.617380, 0.619536, 0.684605", \ + "0.616175, 0.615587, 0.615243, 0.615241, 0.618688, 0.620844, 0.685913", \ + "0.617924, 0.617336, 0.616992, 0.616990, 0.620437, 0.622593, 0.687662", \ + "0.624188, 0.623600, 0.623256, 0.623254, 0.626701, 0.628857, 0.693926", \ + "0.626365, 0.625777, 0.625433, 0.625431, 0.628878, 0.631034, 0.696103", \ + "0.685535, 0.684947, 0.684603, 0.684601, 0.688048, 0.690204, 0.755273" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 0.046994; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 0.312206; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 0.04347; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 0.297191; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.ps b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.ps new file mode 100644 index 00000000..8c96d540 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ff_0p99v_0p99v_125c.ps @@ -0,0 +1,5288 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Mon Nov 11 12:00:54 2019 +% +% Instance Options: +% Instance Name: rf2_32x19_wm0 +% Number of Words: 32 +% Number of Bits: 19 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: off +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (ff Process) (0.99) (125) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ff Process) (0.99) (125) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ff Process) (0.99) (125) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x19_wm0 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + newpath + 109.056 193.374 moveto + 164.056 193.374 lineto + stroke + 109.056 193.374 ArrowLeft + 164.056 193.374 ArrowRight + newpath + 274.056 205.874 moveto + 274.056 160.116 lineto + stroke + newpath + 219.056 198.374 moveto + 219.056 173.503 lineto + stroke + newpath + 164.056 205.874 moveto + 164.056 167.238 lineto + stroke + newpath + 164.056 193.374 moveto + 219.056 193.374 lineto + stroke + 164.056 193.374 ArrowLeft + 219.056 193.374 ArrowRight + newpath + 219.056 193.374 moveto + 274.056 193.374 lineto + stroke + 219.056 193.374 ArrowLeft + 274.056 193.374 ArrowRight + newpath + 296.556 63.7808 moveto + 296.556 41.4104 lineto + stroke + newpath + 76.556 63.7808 moveto + 76.556 41.4104 lineto + stroke + newpath + 71.556 56.2808 moveto + 16.556 56.2808 lineto + stroke + newpath + 16.556 56.2808 moveto + 71.556 56.2808 lineto + 81.556 41.2808 lineto + 161.556 41.2808 lineto + stroke + newpath + 16.556 41.2808 moveto + 71.556 41.2808 lineto + 81.556 56.2808 lineto + 161.556 56.2808 lineto + stroke + newpath + 281.556 56.2808 moveto + 291.556 56.2808 lineto + 301.556 41.2808 lineto + 311.556 41.2808 lineto + stroke + newpath + 281.556 41.2808 moveto + 291.556 41.2808 lineto + 301.556 56.2808 lineto + 311.556 56.2808 lineto + stroke + newpath + 160.635 56.2808 moveto + 288.635 56.2808 lineto + stroke + newpath + 160.635 41.2808 moveto + 288.635 41.2808 lineto + stroke + newpath + 306.556 56.2808 moveto + 346.556 56.2808 lineto + stroke + newpath + 306.556 41.2808 moveto + 346.556 41.2808 lineto + stroke + newpath + 54.056 69.4576 moveto + 54.056 58.7808 lineto + stroke + newpath + 274.056 70.708 moveto + 274.056 58.7808 lineto + stroke + newpath + 274.068 61.3056 moveto + 296.548 61.3056 lineto + stroke + 274.068 61.3056 ArrowLeft + 296.548 61.3056 ArrowRight + newpath + 54.068 61.3056 moveto + 76.548 61.3056 lineto + stroke + 54.068 61.3056 ArrowLeft + 76.548 61.3056 ArrowRight + newpath + 164.1 203.374 moveto + 274.056 203.374 lineto + stroke + 164.1 203.374 ArrowLeft + 274.056 203.374 ArrowRight + newpath + 54.388 203.368 moveto + 164.344 203.368 lineto + stroke + 54.388 203.368 ArrowLeft + 164.344 203.368 ArrowRight + newpath + 44.58 22.3712 moveto + 44.58 0 lineto + stroke + newpath + 19.58 15 moveto + 29.58 0 lineto + stroke + newpath + 29.58 15 moveto + 39.58 0 lineto + stroke + newpath + 19.58 0 moveto + 29.58 15 lineto + stroke + newpath + 29.58 0 moveto + 39.58 15 lineto + stroke + newpath + 39.4744 0.3128 moveto + 44.6552 8.1304 lineto + stroke + newpath + 56.6336 22.3712 moveto + 56.6336 0.3208 lineto + stroke + newpath + 19.4472 15.112 moveto + 39.6552 15.112 lineto + stroke + newpath + 39.6552 14.904 moveto + 49.0304 0.3208 lineto + stroke + newpath + 49.2384 0.3208 moveto + 346.322 0.3208 lineto + stroke + newpath + 19.7944 0.0432 moveto + 39.3776 0.0432 lineto + stroke + newpath + 44.0936 19.1072 moveto + 56.5936 19.1072 lineto + stroke + 44.0936 19.1072 ArrowLeft + 56.5936 19.1072 ArrowRight + newpath + 17.0584 142.309 moveto + 27.0584 127.309 lineto + stroke + newpath + 27.0584 142.309 moveto + 37.0584 127.309 lineto + stroke + newpath + 17.0584 127.309 moveto + 27.0584 142.309 lineto + stroke + newpath + 27.0584 127.309 moveto + 37.0584 142.309 lineto + stroke + newpath + 42.0584 147.309 moveto + 54.7592 147.309 lineto + stroke + 42.0584 147.309 ArrowLeft + 54.7592 147.309 ArrowRight + newpath + 37.0512 142.145 moveto + 47.712 127.514 lineto + stroke + newpath + 280.423 127.352 moveto + 47.6088 127.352 lineto + stroke + newpath + 36.9128 142.076 moveto + 16.7032 142.076 lineto + stroke + newpath + 37.1552 127.354 moveto + 16.9456 127.354 lineto + stroke + newpath + 37.2592 127.353 moveto + 42.2952 134.18 lineto + stroke + newpath + 280.628 127.238 moveto + 293.337 143.14 lineto + stroke + newpath + 42.2496 155.602 moveto + 42.2496 124.337 lineto + stroke + newpath + 286.695 154.179 moveto + 286.695 126.264 lineto + stroke + newpath + 17.7008 93.3248 moveto + 27.7008 78.3248 lineto + stroke + newpath + 27.7008 93.3248 moveto + 37.7008 78.3248 lineto + stroke + newpath + 17.7008 78.3248 moveto + 27.7008 93.3248 lineto + stroke + newpath + 27.7008 78.3248 moveto + 37.7008 93.3248 lineto + stroke + newpath + 42.7008 98.3248 moveto + 55.2008 98.3248 lineto + stroke + 42.7008 98.3248 ArrowLeft + 55.2008 98.3248 ArrowRight + newpath + 55.2008 115.954 moveto + 55.2008 95.8248 lineto + stroke + newpath + 37.1032 93.0912 moveto + 16.8936 93.0912 lineto + stroke + newpath + 37.2424 78.7864 moveto + 17.0328 78.7864 lineto + stroke + newpath + 37.624 78.924 moveto + 47.9784 94.4352 lineto + stroke + newpath + 181.046 94.34 moveto + 47.8336 94.34 lineto + stroke + newpath + 37.4232 92.7688 moveto + 47.4232 77.7688 lineto + stroke + newpath + 180.63 78.368 moveto + 46.7224 78.368 lineto + stroke + newpath + 181.174 78.6232 moveto + 191.826 94.8952 lineto + stroke + newpath + 181.174 94.4248 moveto + 192.296 77.7912 lineto + stroke + newpath + 192.283 78.0568 moveto + 202.882 94.296 lineto + stroke + newpath + 213.481 78.0568 moveto + 224.08 94.296 lineto + stroke + newpath + 224.08 78.0568 moveto + 234.678 94.296 lineto + stroke + newpath + 234.678 78.0568 moveto + 245.278 94.156 lineto + stroke + newpath + 202.882 78.0568 moveto + 213.481 94.296 lineto + stroke + newpath + 192.283 94.296 moveto + 202.882 78.0568 lineto + stroke + newpath + 202.882 94.296 moveto + 213.481 78.0568 lineto + stroke + newpath + 213.481 94.296 moveto + 224.08 78.0568 lineto + stroke + newpath + 224.08 94.296 moveto + 234.678 78.0568 lineto + stroke + newpath + 234.678 94.4352 moveto + 245.278 78.0568 lineto + stroke + newpath + 257.435 77.6736 moveto + 191.602 77.6736 lineto + stroke + newpath + 256.879 94.4576 moveto + 191.462 94.4576 lineto + stroke + newpath + 41.9712 106.297 moveto + 41.9712 80.736 lineto + stroke + newpath + 273.962 157.514 moveto + 273.962 123.453 lineto + stroke + newpath + 333.028 142.932 moveto + 293.13 142.932 lineto + stroke + newpath + 266.046 94.664 moveto + 347.714 94.664 lineto + stroke + newpath + 267.296 78.3096 moveto + 346.88 78.3096 lineto + stroke + newpath + 163.778 110.17 moveto + 163.778 92.1296 lineto + stroke + newpath + 185.895 106.701 moveto + 185.895 83.368 lineto + stroke + newpath + 262.84 99.436 moveto + 275.34 99.436 lineto + stroke + 262.84 99.436 ArrowLeft + 275.34 99.436 ArrowRight + newpath + 275.34 117.065 moveto + 275.34 96.936 lineto + stroke + newpath + 262.111 107.408 moveto + 262.111 81.8464 lineto + stroke + newpath + 256.879 78.208 moveto + 267.001 94.7568 lineto + stroke + newpath + 257.146 94.2968 moveto + 267.435 78.0688 lineto + stroke + newpath + 245.291 78.208 moveto + 257.007 94.436 lineto + stroke + newpath + 245.428 94.0192 moveto + 255.979 78.208 lineto + stroke + newpath + 163.307 99.7368 moveto + 185.926 100.227 lineto + stroke + 163.307 99.7368 ArrowLeft + 185.926 100.227 ArrowRight + newpath + 273.326 140.852 moveto + 286.027 140.852 lineto + stroke + 273.326 140.852 ArrowLeft + 286.027 140.852 ArrowRight + /Times-Roman findfont 10 scalefont setfont + (CLKA) () 0 177.754 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (CENA) () 0.6944 132.111 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (AA[J]) () 0 85.532 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (QA[I]) () 0 44.9864 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 81.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 136.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 191.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 246.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 109.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 219.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (Q1) () 86.556 47.8232 RightLabel + /Times-Roman findfont 7 scalefont setfont + (Q2) () 306.556 48.5696 RightLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 65.3056 64.9888 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 285.306 64.86 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (dftrambypas) 50.628 25.8056 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenas) 49.4192 152.925 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR1) () 108.951 85.484 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 48.9504 104.496 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR2) () 283.257 86.1784 CenterLabel + /Times-Roman findfont 6.432 scalefont setfont + (t) (aah) 174.506 102.84 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 269.09 105.607 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenah) 280.687 146.468 CenterLabel + /Times-Roman findfont 10 scalefont setfont + (DFTRAMBYP) () 1.86 3.9536 LeftLabel + grestore +} def +% Waves for frame number 1 +% 122 paths, 28 strings +% Expects x y on stack +% bounds: 0.0->346.556 0.0->200.604 +/Frame2 { + gsave + translate + newpath + 109.056 188.8 moveto + 109.056 166.43 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 198.8 moveto + 54.056 133.793 lineto + stroke + newpath + 163.223 114.356 moveto + 163.223 98.792 lineto + stroke + newpath + 16.556 166.43 moveto + 49.056 166.43 lineto + 59.056 181.43 lineto + 104.056 181.43 lineto + 114.056 166.43 lineto + 159.056 166.43 lineto + 169.056 181.43 lineto + 214.056 181.43 lineto + 224.056 166.43 lineto + 269.056 166.43 lineto + 279.056 181.43 lineto + 324.056 181.43 lineto + 334.056 166.3 lineto + 346.556 166.3 lineto + stroke + newpath + 274.056 198.8 moveto + 274.056 155.667 lineto + stroke + newpath + 40.9296 104.425 moveto + 40.9296 81.9248 lineto + stroke + newpath + 219.056 188.8 moveto + 219.056 166.43 lineto + stroke + newpath + 164.056 198.8 moveto + 164.056 165.459 lineto + stroke + newpath + 41.556 62.1336 moveto + 41.556 39.892 lineto + stroke + newpath + 41.556 59.7632 moveto + 54.056 59.7632 lineto + stroke + 41.556 59.7632 ArrowLeft + 54.056 59.7632 ArrowRight + newpath + 36.556 54.6336 moveto + 46.556 39.6336 lineto + stroke + newpath + 46.9728 39.6336 moveto + 65.1264 39.6336 lineto + 106.622 39.6336 lineto + 174.056 39.6336 lineto + stroke + newpath + 36.556 40.4672 moveto + 46.2536 54.8344 lineto + stroke + newpath + 46.4624 54.6336 moveto + 174.796 54.6336 lineto + stroke + newpath + 16.556 54.892 moveto + 26.556 39.892 lineto + stroke + newpath + 26.556 54.892 moveto + 36.556 39.892 lineto + stroke + newpath + 16.556 39.892 moveto + 26.556 54.892 lineto + stroke + newpath + 26.556 39.892 moveto + 36.556 54.892 lineto + stroke + newpath + 54.056 77.5216 moveto + 54.056 57.392 lineto + stroke + newpath + 54.068 186.562 moveto + 109.068 186.562 lineto + stroke + 54.068 186.562 ArrowLeft + 109.068 186.562 ArrowRight + newpath + 109.068 186.562 moveto + 164.068 186.562 lineto + stroke + 109.068 186.562 ArrowLeft + 164.068 186.562 ArrowRight + newpath + 164.068 186.562 moveto + 219.068 186.562 lineto + stroke + 164.068 186.562 ArrowLeft + 219.068 186.562 ArrowRight + newpath + 219.068 186.562 moveto + 274.068 186.562 lineto + stroke + 219.068 186.562 ArrowLeft + 274.068 186.562 ArrowRight + newpath + 54.08 196.557 moveto + 163.695 196.557 lineto + stroke + 54.08 196.557 ArrowLeft + 163.695 196.557 ArrowRight + newpath + 164.08 196.557 moveto + 273.695 196.557 lineto + stroke + 164.08 196.557 ArrowLeft + 273.695 196.557 ArrowRight + newpath + 43.4688 22.3712 moveto + 43.4688 0 lineto + stroke + newpath + 18.4688 15 moveto + 28.4688 0 lineto + stroke + newpath + 28.4688 15 moveto + 38.4688 0 lineto + stroke + newpath + 18.4688 0 moveto + 28.4688 15 lineto + stroke + newpath + 28.4688 0 moveto + 38.4688 15 lineto + stroke + newpath + 38.3632 0.3128 moveto + 43.5448 8.1304 lineto + stroke + newpath + 55.5224 22.3712 moveto + 55.5224 0.32 lineto + stroke + newpath + 18.336 15.112 moveto + 38.5448 15.112 lineto + stroke + newpath + 38.5448 14.9032 moveto + 47.9192 0.32 lineto + stroke + newpath + 48.128 0.32 moveto + 345.211 0.32 lineto + stroke + newpath + 18.6832 0.0424 moveto + 38.2664 0.0424 lineto + stroke + newpath + 42.9832 19.1072 moveto + 55.4832 19.1072 lineto + stroke + 42.9832 19.1072 ArrowLeft + 55.4832 19.1072 ArrowRight + newpath + 18.4472 135.198 moveto + 28.4472 120.198 lineto + stroke + newpath + 28.4472 135.198 moveto + 38.4472 120.198 lineto + stroke + newpath + 18.4472 120.198 moveto + 28.4472 135.198 lineto + stroke + newpath + 28.4472 120.198 moveto + 38.4472 135.198 lineto + stroke + newpath + 44.2808 140.615 moveto + 53.9616 140.615 lineto + stroke + 44.2808 140.615 ArrowLeft + 53.9616 140.615 ArrowRight + newpath + 38.44 135.034 moveto + 48.7536 119.626 lineto + stroke + newpath + 285.111 119.825 moveto + 48.1288 119.825 lineto + stroke + newpath + 38.3024 134.966 moveto + 18.092 134.966 lineto + stroke + newpath + 38.5448 120.243 moveto + 18.3352 120.243 lineto + stroke + newpath + 38.6488 120.243 moveto + 43.5448 127.96 lineto + stroke + newpath + 285.838 120.146 moveto + 295.422 135.98 lineto + stroke + newpath + 185.357 79.8264 moveto + 195.357 95.4456 lineto + stroke + newpath + 205.357 79.8264 moveto + 215.357 95.4456 lineto + stroke + newpath + 215.357 79.8264 moveto + 225.357 95.4456 lineto + stroke + newpath + 225.357 79.8264 moveto + 235.357 95.3112 lineto + stroke + newpath + 195.357 79.8264 moveto + 205.357 95.4456 lineto + stroke + newpath + 185.357 95.4456 moveto + 195.357 79.8264 lineto + stroke + newpath + 195.357 95.4456 moveto + 205.357 79.8264 lineto + stroke + newpath + 205.357 95.4456 moveto + 215.357 79.8264 lineto + stroke + newpath + 215.357 95.4456 moveto + 225.357 79.8264 lineto + stroke + newpath + 225.357 95.58 moveto + 235.357 79.8264 lineto + stroke + newpath + 44.0552 143.376 moveto + 44.0552 119.078 lineto + stroke + newpath + 290.907 149.315 moveto + 290.907 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+/leftmargin 165 def +/rightmargin 570 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 18 sub def +/Helvetica-Bold findfont title_size scalefont setfont +(High Density Two Port Register File SVT MVT Compiler) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(CLN28HPM 28nm Process) rightmargin pagey LeftShow +/pagey pagey 18 sub def +( 256 Rows Per Bit line, 0.389um^2 Bit Cell) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(32 Words X 19 Bits, Mux 2 Instance) rightmargin pagey LeftShow +/pagey pagey 18 sub def + +0.35 50 650 ARMlogo +/pagey pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.99V) TextPiece +( and a junction temperature of ) TextPiece +(125.01C) TextReserveSpace +(125.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x19_wm0) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (19) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (off) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 572 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 518 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 464 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 422 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 368 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 314 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 224 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 176 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (100.94) (2136.4) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 22 8 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(AB[4:0]) SymbolInput +(DB[18:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[18:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(QA[18:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[18:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[18:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[18:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=64 +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.2176) (0.2729) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.2412) (0.2914) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.3812) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.4208) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.1925) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.2603) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1334) (0.1594) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.0926) () TableT1CornerRow +(Min. Low pulse width CLKA) () (t) (ckal) (0.0897) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.0958) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.0907) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=206 +% headerEstimate=110 +% estimate=98 +% tailEstimate=64 +% spaceLeft=206 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (1.7116) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (1.4236) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (1.6712) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (1.4006) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (0.5188) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(SOA load factor) () (K) (load_soa) () (1.4260) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (1.4400) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=476 +% headerEstimate=110 +% estimate=1036 +% tailEstimate=14 +% spaceLeft=476 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.0928) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.0695) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.0993) () TableT1CornerDRow +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.0637) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.0948) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.0695) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.1030) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.0637) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.0902) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0398) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (0.4558) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.2536) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.0960) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0422) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (0.4558) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.2536) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.0373) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.0950) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Setup Btw. CLKA and EMAA) () (t) (emaas) (0.4065) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (0.6293) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (0.4065) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (0.4461) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (0.6267) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.1737) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.0764) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.0905) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0410) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (0.4558) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.2536) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.2348) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.1045) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.0965) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0435) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (0.4558) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.2536) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.0382) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.0950) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0241) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (0.4558) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0241) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0226) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0226) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0241) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (0.4558) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (0.4162) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (0.4558) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (0.4162) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.1911) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.0756) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.1911) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (0.6293) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.1493) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.1493) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (0.4558) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (0.4558) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.2536) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.0373) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.0950) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.2348) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.1045) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (0.4065) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (0.4461) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (0.6267) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=414 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=414 +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.2167) (0.2718) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.2171) (0.2724) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.2172) (0.2724) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.2176) (0.2729) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.2520) (0.3149) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (0.2821) (0.3516) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (0.3136) (0.3900) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (0.3437) (0.4267) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.2167) (0.2718) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.2171) (0.2724) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.2172) (0.2724) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.2176) (0.2729) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.2520) (0.3149) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (0.2821) (0.3516) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (0.3136) (0.3900) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (0.3437) (0.4267) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.2403) (0.2903) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.2407) (0.2908) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.2408) (0.2909) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.2412) (0.2914) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (0.2756) (0.3334) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (0.3057) (0.3700) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (0.3372) (0.4085) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (0.3673) (0.4452) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.2403) (0.2903) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.2407) (0.2908) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.2408) (0.2909) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.2412) (0.2914) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (0.2756) (0.3334) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (0.3057) (0.3700) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (0.3372) (0.4085) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (0.3673) (0.4452) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (0.3800) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (0.3806) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (0.3806) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.3812) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (0.4238) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (0.4610) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (0.5000) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (0.5373) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (0.4062) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (0.4106) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (0.4143) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.4208) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (0.4729) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (0.5088) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (0.5566) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (0.5917) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.1913) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.1919) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.1920) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.1925) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.2344) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (0.2711) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (0.3096) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (0.3463) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (0.2458) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (0.2501) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (0.2538) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.2603) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (0.3115) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (0.3469) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (0.3940) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (0.4286) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1334) (0.1594) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.0926) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.0897) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.0958) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.0907) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=56 +% headerEstimate=82 +% estimate=280 +% tailEstimate=84 +% spaceLeft=56 +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.0829) (0.0917) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.0819) (0.0905) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.1066) (0.1191) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.1235) (0.1399) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.0822) (0.0912) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.0683) (0.0751) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.0677) (0.0751) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.1199) (0.1377) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.1164) (0.1335) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.0730) (0.0823) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.0856) (0.0947) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.0850) (0.0939) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.1106) (0.1240) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.1346) (0.1515) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.0819) (0.0907) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.0685) (0.0753) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.0701) (0.0779) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.1257) (0.1447) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.1210) (0.1398) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.0730) (0.0822) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=224 +% headerEstimate=77 +% estimate=336 +% tailEstimate=0 +% spaceLeft=224 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (10.4820) Table1CornerRow +(CENA) () (1.8080) Table1CornerRow +(AA) () (1.2230) Table1CornerRow +(CLKB) () (10.5510) Table1CornerRow +(CENB) () (1.4630) Table1CornerRow +(AB) () (1.2260) Table1CornerRow +(DB) () (1.9200) Table1CornerRow +(EMAA) () (5.8590) Table1CornerRow +(EMASA) () (2.1460) Table1CornerRow +(EMAB) () (5.7120) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(TENA) () (0.9716) Table1CornerRow +(TCENA) () (1.5820) Table1CornerRow +(TAA) () (1.3580) Table1CornerRow +(TENB) () (1.1880) Table1CornerRow +(TCENB) () (1.5760) Table1CornerRow +(TAB) () (1.3690) Table1CornerRow +(TDB) () (1.5900) Table1CornerRow +(SIA) () (1.5160) Table1CornerRow +(SEA) () (1.8880) Table1CornerRow +(DFTRAMBYP) () (2.0730) Table1CornerRow +(SIB) () (5.5570) Table1CornerRow +(SEB) () (1.8910) Table1CornerRow +(COLLDISN) () (2.3810) Table1CornerRow +(RET1N) () (3.5130) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=315 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=315 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (0.047469) Table1CornerRow +(Peri Standby std Curr.) (3) (0.315359) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (0.049704) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (0.029192) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (0.043909) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (0.300193) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (3.684e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (3.686e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (3.688e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (3.699e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (3.716e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (3.721e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (3.740e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (3.740e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (7.939e-04) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (7.939e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Peri Read AC (EMAA=2) Curr.) (1,4) (7.945e-04) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (7.945e-04) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (7.945e-04) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (7.973e-04) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (7.989e-04) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (7.991e-04) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (4.675e-05) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (4.677e-05) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (4.678e-05) Table1CornerRow +(Core Write AC (EMAB=3) Curr.) (1,4) (4.689e-05) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (4.706e-05) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (4.712e-05) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (4.731e-05) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (4.731e-05) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (8.078e-04) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (8.078e-04) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (8.084e-04) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (8.084e-04) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (8.084e-04) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (8.112e-04) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (8.128e-04) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (8.130e-04) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (6.071e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (1.273e-04) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (3.469816) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (17.441054) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (2.619715) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (12.101938) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=79 +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0463) (0.1980) TableD1CornerRow +(CLKB) (0.0479) (0.1980) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0990) Table1CornerRow +(Ground) () (0.0990) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 16 +%%EOF diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_rtl.v b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_rtl.v new file mode 100644 index 00000000..9f3bc0f1 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_rtl.v @@ -0,0 +1,257 @@ +/* verilog_rtl_memcomp Version: 4.0.5-beta11 */ +/* common_memcomp Version: 4.0.5.2-amci */ +/* lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 */ +// +// CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +// +// Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +// +// Use of this Software is subject to the terms and conditions of the +// applicable license agreement with ARM Physical IP, Inc. +// In addition, this Software is protected by patents, copyright law +// and international treaties. +// +// The copyright notice(s) in this Software does not indicate actual or +// intended publication of this Software. +// +// Repair Verilog RTL for High Density Two Port Register File SVT MVT Compiler +// +// Instance Name: rf2_32x19_wm0_rtl_top +// Words: 32 +// User Bits: 19 +// Mux: 2 +// Drive: 6 +// Write Mask: Off +// Extra Margin Adjustment: On +// Redundancy: off +// Redundant Rows: 0 +// Redundant Columns: 2 +// Test Muxes On +// Ser: none +// Retention: on +// Power Gating: off +// +// Creation Date: Mon Nov 11 12:01:10 2019 +// Version: r4p0 +// +// Verified +// +// Known Bugs: None. +// +// Known Work Arounds: N/A +// +`timescale 1ns/1ps + +module rf2_32x19_wm0_rtl_top ( + CENYA, + AYA, + CENYB, + AYB, + QA, + SOA, + SOB, + CLKA, + CENA, + AA, + CLKB, + CENB, + AB, + DB, + EMAA, + EMASA, + EMAB, + TENA, + TCENA, + TAA, + TENB, + TCENB, + TAB, + TDB, + RET1N, + SIA, + SEA, + DFTRAMBYP, + SIB, + SEB, + COLLDISN + ); + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; + wire [18:0] QOA; + wire [18:0] DIB; + + assign QA = QOA; + assign DIB = DB; + rf2_32x19_wm0_fr_top u0 ( + .CENYA(CENYA), + .AYA(AYA), + .CENYB(CENYB), + .AYB(AYB), + .QOA(QOA), + .SOA(SOA), + .SOB(SOB), + .CLKA(CLKA), + .CENA(CENA), + .AA(AA), + .CLKB(CLKB), + .CENB(CENB), + .AB(AB), + .DIB(DIB), + .EMAA(EMAA), + .EMASA(EMASA), + .EMAB(EMAB), + .TENA(TENA), + .TCENA(TCENA), + .TAA(TAA), + .TENB(TENB), + .TCENB(TCENB), + .TAB(TAB), + .TDB(TDB), + .RET1N(RET1N), + .SIA(SIA), + .SEA(SEA), + .DFTRAMBYP(DFTRAMBYP), + .SIB(SIB), + .SEB(SEB), + .COLLDISN(COLLDISN) +); + +endmodule + +module rf2_32x19_wm0_fr_top ( + CENYA, + AYA, + CENYB, + AYB, + QOA, + SOA, + SOB, + CLKA, + CENA, + AA, + CLKB, + CENB, + AB, + DIB, + EMAA, + EMASA, + EMAB, + TENA, + TCENA, + TAA, + TENB, + TCENB, + TAB, + TDB, + RET1N, + SIA, + SEA, + DFTRAMBYP, + SIB, + SEB, + COLLDISN + ); + + output CENYA; + output [4:0] AYA; + output CENYB; + output [4:0] AYB; + output [18:0] QOA; + output [1:0] SOA; + output [1:0] SOB; + input CLKA; + input CENA; + input [4:0] AA; + input CLKB; + input CENB; + input [4:0] AB; + input [18:0] DIB; + input [2:0] EMAA; + input EMASA; + input [2:0] EMAB; + input TENA; + input TCENA; + input [4:0] TAA; + input TENB; + input TCENB; + input [4:0] TAB; + input [18:0] TDB; + input RET1N; + input [1:0] SIA; + input SEA; + input DFTRAMBYP; + input [1:0] SIB; + input SEB; + input COLLDISN; + + wire [18:0] DB; + wire [18:0] QA; + + assign DB=DIB; + assign QOA=QA; + rf2_32x19_wm0 u0 ( + .CENYA(CENYA), + .AYA(AYA), + .CENYB(CENYB), + .AYB(AYB), + .QA(QA), + .SOA(SOA), + .SOB(SOB), + .CLKA(CLKA), + .CENA(CENA), + .AA(AA), + .CLKB(CLKB), + .CENB(CENB), + .AB(AB), + .DB(DB), + .EMAA(EMAA), + .EMASA(EMASA), + .EMAB(EMAB), + .TENA(TENA), + .TCENA(TCENA), + .TAA(TAA), + .TENB(TENB), + .TCENB(TCENB), + .TAB(TAB), + .TDB(TDB), + .RET1N(RET1N), + .SIA(SIA), + .SEA(SEA), + .DFTRAMBYP(DFTRAMBYP), + .SIB(SIB), + .SEB(SEB), + .COLLDISN(COLLDISN) + ); + +endmodule // rf2_32x19_wm0_fr_top + diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.avm b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.avm new file mode 100644 index 00000000..771fd127 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:17 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x19_wm0 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 669 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS SS, CORNER SS_0P81V_0P81V_M40C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.81 0.81 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 5.76886e-05nF + VDDPE VSSE 1.27989e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 0.76535mA + VDDPE VSSE 0.93511mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 6.34575e-05nF + VDDPE VSSE 7.30835e-04nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 0.84189mA + VDDPE VSSE 4.18352mA + } + Cpd avm_read_write { + VDDCE VSSE 7.36082e-05nF + VDDPE VSSE 1.50204e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 1.25799mA + VDDPE VSSE 5.12310mA + } + Cpd avm_read_desel { + VDDCE VSSE 3.25605e-05nF + VDDPE VSSE 7.35075e-04nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 0.64128mA + VDDPE VSSE 3.47188mA + } + Cpd avm_desel_write { + VDDCE VSSE 4.10477e-05nF + VDDPE VSSE 7.66967e-04nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 0.62343mA + VDDPE VSSE 3.82429mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.45177e-06nF + VDDPE VSSE 2.05103e-03nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.13288mA + VDDPE VSSE 3.77962mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.45177e-06nF + VDDPE VSSE 2.05103e-03nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.13288mA + VDDPE VSSE 3.77962mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.69190e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.87989e-05nF + } + LEAKAGE_I { + VDDCE VSSE 4.42400e-05mA + VDDPE VSSE 7.31600e-05mA + } + tsu 0.25018ns + ck2q_delay 0.654227ns + tr_q 0.0348014ns + tf_q 0.0395567ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.dat b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.dat new file mode 100644 index 00000000..62af436d --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.dat @@ -0,0 +1,322 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:38 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name ss_0p81v_0p81v_m40c +S N +geomx 21.1650 +geomy 100.9400 +volt 0.8100 +temp -40.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.2145 +ttcenacenya 0.2108 +ttenacenyapu 0.3031 +ttenacenyanu 0.3532 +tdftrambypcenya 0.2178 +taaaya 0.2110 +ttaaaya 0.2184 +ttenaayapu 0.3903 +ttenaayanu 0.3746 +tdftrambypaya 0.2078 +tcenbcenyb 0.2113 +ttcenbcenyb 0.2108 +ttenbcenybpu 0.3062 +ttenbcenybnu 0.3744 +tdftrambypcenyb 0.2168 +tabayb 0.2105 +ttabayb 0.2161 +ttenbaybpu 0.4138 +ttenbaybnu 0.3794 +tdftrambypayb 0.2083 +taccqa_rd0 0.6468 +taccqa_rd1 0.6493 +taccqa_rd2 0.6522 +taccqa_rd3 0.6542 +taccqa_rd4 0.7720 +taccqa_rd5 0.8868 +taccqa_rd6 1.0184 +taccqa_rd7 1.1326 +taccqa_scan0 0.6468 +taccqa_scan1 0.6493 +taccqa_scan2 0.6522 +taccqa_scan3 0.6542 +taccqa_scan4 0.7720 +taccqa_scan5 0.8868 +taccqa_scan6 1.0184 +taccqa_scan7 1.1326 +tclkasoa_rd0 0.7505 +tclkasoa_rd1 0.7530 +tclkasoa_rd2 0.7559 +tclkasoa_rd3 0.7580 +tclkasoa_rd4 0.8757 +tclkasoa_rd5 0.9905 +tclkasoa_rd6 1.1222 +tclkasoa_rd7 1.2364 +tclkasoa_scan0 0.7505 +tclkasoa_scan1 0.7530 +tclkasoa_scan2 0.7559 +tclkasoa_scan3 0.7580 +tclkasoa_scan4 0.8757 +tclkasoa_scan5 0.9905 +tclkasoa_scan6 1.1222 +tclkasoa_scan7 1.2364 +tclkbsob 0.4116 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 3.3060 +kload_aya 2.7500 +kload_cenyb 3.3440 +kload_ayb 2.7720 +kload_qa 1.0935 +kload_soa 2.7600 +kload_sob 3.1660 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 0.9449 +tcyca_ema1 0.9474 +tcyca_ema2 0.9504 +tcyca_ema3 0.9524 +tcyca_ema4 1.0720 +tcyca_ema5 1.1885 +tcyca_ema6 1.3221 +tcyca_ema7 1.4380 +tcycb_ema0 1.2005 +tcycb_ema1 1.2125 +tcycb_ema2 1.2291 +tcycb_ema3 1.2494 +tcycb_ema4 1.3876 +tcycb_ema5 1.5019 +tcycb_ema6 1.6521 +tcycb_ema7 1.7664 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.4248 +tcracwb_rd1 0.4273 +tcracwb_rd2 0.4302 +tcracwb_rd3 0.4322 +tcracwb_rd4 0.5500 +tcracwb_rd5 0.6648 +tcracwb_rd6 0.7964 +tcracwb_rd7 0.9106 +tcwbcra_wr0 0.6462 +tcwbcra_wr1 0.6580 +tcwbcra_wr2 0.6743 +tcwbcra_wr3 0.6944 +tcwbcra_wr4 0.8306 +tcwbcra_wr5 0.9431 +tcwbcra_wr6 1.0911 +tcwbcra_wr7 1.2037 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.1790 +tckal 0.1936 +tckbh 0.1813 +tckbl 0.1760 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.2125 +taas 0.2502 +tcenbs 0.2141 +tabs 0.2561 +tdbs 0.2167 +temaas 1.0358 +temasas 1.0358 +temabs 1.3328 +ttenas 0.4407 +ttcenas 0.2138 +ttaas 0.2589 +ttenbs 0.5692 +ttcenbs 0.2147 +ttabs 0.2633 +ttdbs 0.2206 +tsias 0.4848 +tseas 0.4848 +tdftrambypas 0.4140 +tdftrambypbs 0.4140 +tsibs 0.2167 +tsebs 0.5692 +tcolldisnas 1.0358 +tcolldisnbs 1.3328 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0854 +tcenaf_ret1nfh 1.3136 +tcenaf_ret1nrh 0.6293 +taah 0.1392 +tcenbh 0.0857 +tcenbf_ret1nfh 1.3136 +tcenbf_ret1nrh 0.6293 +tabh 0.1263 +tdbh 0.1864 +temaah 1.6903 +temasah 1.6903 +temabh 1.8306 +ttenah 0.1531 +ttcenah 0.0871 +ttcenaf_ret1nfh 1.3136 +ttcenaf_ret1nrh 0.6293 +ttaah 0.1392 +ttenbh 0.2050 +ttcenbh 0.0870 +ttcenbf_ret1nfh 1.3136 +ttcenbf_ret1nrh 0.6293 +ttabh 0.1263 +ttdbh 0.1864 +tret1nf_dftrambypfh 0.0537 +tret1nr_dftrambypfh 1.3136 +tret1nf_cenbrh 0.0537 +tret1nf_cenarh 0.0534 +tret1nf_tcenarh 0.0534 +tret1nf_tcenbrh 0.0537 +tret1nr_tcenbrh 1.3136 +tret1nr_tcenarh 1.0166 +tret1nr_cenbrh 1.3136 +tret1nr_cenarh 1.0166 +tsiah 0.1247 +tseah 1.6903 +tdftrambypah 1.6903 +tdftrambypbh 1.3136 +tdftrambypr_ret1nfh 1.3136 +tdftrambypr_ret1nrh 0.6293 +tsibh 0.1864 +tsebh 0.2050 +tcolldisnah 1.6903 +tcolldisnbh 1.8306 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0087 +icap_cena 0.0014 +icap_aa 0.0017 +icap_clkb 0.0088 +icap_cenb 0.0011 +icap_ab 0.0015 +icap_db 0.0018 +icap_emaa 0.0056 +icap_emasa 0.0021 +icap_emab 0.0054 +icap_tena 0.0008 +icap_tcena 0.0012 +icap_taa 0.0016 +icap_tenb 0.0009 +icap_tcenb 0.0012 +icap_tab 0.0014 +icap_tdb 0.0015 +icap_sia 0.0011 +icap_sea 0.0016 +icap_dftrambyp 0.0016 +icap_sib 0.0054 +icap_seb 0.0017 +icap_colldisn 0.0021 +icap_ret1n 0.0032 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 4.424e-05 +icc_standby_p_chipdisable 7.316e-05 +icc_standby_c_ret1 4.397e-05 +icc_standby_p_ret1 4.152e-07 +icc_standby_c_selective_precharge 4.344e-05 +icc_standby_p_selective_precharge 6.081e-05 +icc_c_rd0_a 2.630e-05 +icc_c_rd1_a 2.635e-05 +icc_c_rd2_a 2.637e-05 +icc_c_rd3_a 2.637e-05 +icc_c_rd4_a 2.637e-05 +icc_c_rd5_a 2.637e-05 +icc_c_rd6_a 2.659e-05 +icc_c_rd7_a 2.659e-05 +icc_p_rd0_a 5.954e-04 +icc_p_rd1_a 5.954e-04 +icc_p_rd2_a 5.954e-04 +icc_p_rd3_a 5.954e-04 +icc_p_rd4_a 5.954e-04 +icc_p_rd5_a 5.954e-04 +icc_p_rd6_a 5.954e-04 +icc_p_rd7_a 5.954e-04 +icc_c_wr0_b 3.317e-05 +icc_c_wr1_b 3.322e-05 +icc_c_wr2_b 3.325e-05 +icc_c_wr3_b 3.325e-05 +icc_c_wr4_b 3.325e-05 +icc_c_wr5_b 3.325e-05 +icc_c_wr6_b 3.346e-05 +icc_c_wr7_b 3.347e-05 +icc_p_wr0_b 6.212e-04 +icc_p_wr1_b 6.212e-04 +icc_p_wr2_b 6.212e-04 +icc_p_wr3_b 6.212e-04 +icc_p_wr4_b 6.212e-04 +icc_p_wr5_b 6.212e-04 +icc_p_wr6_b 6.213e-04 +icc_p_wr7_b 6.213e-04 +icc_c_desela 0.000e+00 +icc_p_desela 4.150e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 9.250e-05 +icc_c_peak 1.25799 +icc_p_peak 5.123099 +icc_c_inrush 0.896377 +icc_p_inrush 4.158242 diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.lib b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.lib new file mode 100644 index 00000000..1b796f1e --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.lib @@ -0,0 +1,13667 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Mon Nov 11 12:00:22 2019 + * + * Instance Options: + * Instance Name: rf2_32x19_wm0 + * Number of Words: 32 + * Number of Bits: 19 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: off + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_ss_0p81v_0p81v_m40c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Mon Nov 11 12:00:22 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : -40; + nom_voltage : 0.81; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x19_wm0_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x19_wm0_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_QA) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_DB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.81); + voltage_map (VDDPE, 0.81); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(ss_0p81v_0p81v_m40c) { + process : 1; + temperature : -40; + voltage : 0.81; + tree_type : balanced_tree; + } + default_operating_conditions : ss_0p81v_0p81v_m40c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x19_wm0) { + area : 2136.395100; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 6.381089; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 5.054618; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 4.438e-05; + memory() { + type : ram; + address_width : 5; + word_width : 19; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151710, 0.158420, 0.164150, 0.176670, 0.209340, 0.257350, 0.354200", \ + "0.154470, 0.160890, 0.167030, 0.179250, 0.210810, 0.265460, 0.370920", \ + "0.157770, 0.163320, 0.168700, 0.180590, 0.212980, 0.262900, 0.360790", \ + "0.165520, 0.172180, 0.177590, 0.189490, 0.222660, 0.271740, 0.372840", \ + "0.176310, 0.182660, 0.188220, 0.200780, 0.232900, 0.283910, 0.378490", \ + "0.227210, 0.233880, 0.239590, 0.252130, 0.283410, 0.332720, 0.432500", \ + "0.293170, 0.300050, 0.305600, 0.318200, 0.349420, 0.399870, 0.505940" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136539, 0.143249, 0.148979, 0.161499, 0.194169, 0.242179, 0.339029", \ + "0.139299, 0.145719, 0.151859, 0.164079, 0.195639, 0.250289, 0.355749", \ + "0.142599, 0.148149, 0.153529, 0.165419, 0.197809, 0.247729, 0.345619", \ + "0.150349, 0.157009, 0.162419, 0.174319, 0.207489, 0.256569, 0.357669", \ + "0.161139, 0.167489, 0.173049, 0.185609, 0.217729, 0.268739, 0.363319", \ + "0.212039, 0.218709, 0.224419, 0.236959, 0.268239, 0.317549, 0.417329", \ + "0.277999, 0.284879, 0.290429, 0.303029, 0.334249, 0.384699, 0.490769" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150630, 0.158500, 0.165520, 0.182040, 0.229550, 0.303660, 0.462160", \ + "0.153560, 0.162450, 0.169740, 0.185510, 0.231940, 0.308550, 0.462370", \ + "0.157630, 0.165500, 0.172570, 0.189020, 0.236860, 0.314230, 0.467100", \ + "0.167320, 0.175010, 0.182030, 0.198780, 0.244720, 0.320980, 0.477200", \ + "0.181960, 0.190530, 0.198010, 0.214540, 0.260430, 0.339580, 0.499170", \ + "0.233610, 0.241440, 0.248430, 0.265060, 0.312210, 0.390030, 0.543210", \ + "0.313080, 0.321390, 0.328250, 0.344160, 0.390770, 0.469460, 0.629230" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.135567, 0.143437, 0.150457, 0.166977, 0.214487, 0.288597, 0.447097", \ + "0.138497, 0.147387, 0.154677, 0.170447, 0.216877, 0.293487, 0.447307", \ + "0.142567, 0.150437, 0.157507, 0.173957, 0.221797, 0.299167, 0.452037", \ + "0.152257, 0.159947, 0.166967, 0.183717, 0.229657, 0.305917, 0.462137", \ + "0.166897, 0.175467, 0.182947, 0.199477, 0.245367, 0.324517, 0.484107", \ + "0.218547, 0.226377, 0.233367, 0.249997, 0.297147, 0.374967, 0.528147", \ + "0.298017, 0.306327, 0.313187, 0.329097, 0.375707, 0.454397, 0.614167" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151800, 0.158730, 0.164390, 0.176660, 0.208210, 0.257430, 0.355790", \ + "0.155160, 0.162690, 0.167350, 0.179300, 0.213000, 0.265380, 0.368240", \ + "0.157950, 0.164920, 0.170700, 0.182210, 0.215150, 0.267490, 0.364080", \ + "0.166590, 0.173280, 0.178770, 0.190700, 0.221650, 0.272040, 0.377000", \ + "0.177010, 0.183470, 0.189210, 0.201270, 0.232530, 0.282500, 0.381080", \ + "0.229120, 0.235260, 0.240890, 0.252720, 0.283930, 0.335080, 0.434970", \ + "0.297930, 0.304370, 0.306140, 0.318380, 0.349640, 0.398440, 0.497540" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136620, 0.143550, 0.149210, 0.161480, 0.193030, 0.242250, 0.340610", \ + "0.139980, 0.147510, 0.152170, 0.164120, 0.197820, 0.250200, 0.353060", \ + "0.142770, 0.149740, 0.155520, 0.167030, 0.199970, 0.252310, 0.348900", \ + "0.151410, 0.158100, 0.163590, 0.175520, 0.206470, 0.256860, 0.361820", \ + "0.161830, 0.168290, 0.174030, 0.186090, 0.217350, 0.267320, 0.365900", \ + "0.213940, 0.220080, 0.225710, 0.237540, 0.268750, 0.319900, 0.419790", \ + "0.282750, 0.289190, 0.290960, 0.303200, 0.334460, 0.383260, 0.482360" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.149120, 0.157120, 0.164030, 0.181310, 0.229370, 0.306620, 0.458950", \ + "0.151760, 0.159980, 0.166950, 0.182720, 0.232140, 0.308880, 0.461580", \ + "0.157410, 0.164090, 0.171150, 0.187830, 0.234530, 0.311150, 0.462410", \ + "0.166410, 0.174930, 0.180480, 0.197110, 0.244020, 0.322450, 0.478510", \ + "0.179770, 0.187970, 0.195160, 0.210770, 0.257630, 0.336890, 0.493780", \ + "0.231950, 0.239930, 0.247120, 0.263610, 0.310510, 0.388730, 0.541610", \ + "0.314030, 0.322440, 0.330410, 0.347280, 0.392640, 0.466650, 0.622620" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134208, 0.142208, 0.149118, 0.166398, 0.214458, 0.291708, 0.444038", \ + "0.136848, 0.145068, 0.152038, 0.167808, 0.217228, 0.293968, 0.446668", \ + "0.142498, 0.149178, 0.156238, 0.172918, 0.219618, 0.296238, 0.447498", \ + "0.151498, 0.160018, 0.165568, 0.182198, 0.229108, 0.307538, 0.463598", \ + "0.164858, 0.173058, 0.180248, 0.195858, 0.242718, 0.321978, 0.478868", \ + "0.217038, 0.225018, 0.232208, 0.248698, 0.295598, 0.373818, 0.526698", \ + "0.299118, 0.307528, 0.315498, 0.332368, 0.377728, 0.451738, 0.607708" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.218477, 0.224637, 0.229937, 0.241627, 0.272157, 0.321057, 0.418047", \ + "0.220507, 0.226667, 0.231967, 0.243657, 0.274187, 0.323087, 0.420077", \ + "0.225477, 0.231637, 0.236937, 0.248627, 0.279157, 0.328057, 0.425047", \ + "0.234607, 0.240767, 0.246067, 0.257757, 0.288287, 0.337187, 0.434177", \ + "0.247887, 0.254047, 0.259347, 0.271037, 0.301567, 0.350467, 0.447457", \ + "0.298587, 0.304747, 0.310047, 0.321737, 0.352267, 0.401167, 0.498157", \ + "0.359187, 0.365347, 0.370647, 0.382337, 0.412867, 0.461767, 0.558757" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.196629, 0.202789, 0.208089, 0.219779, 0.250309, 0.299209, 0.396199", \ + "0.198659, 0.204819, 0.210119, 0.221809, 0.252339, 0.301239, 0.398229", \ + "0.203629, 0.209789, 0.215089, 0.226779, 0.257309, 0.306209, 0.403199", \ + "0.212759, 0.218919, 0.224219, 0.235909, 0.266439, 0.315339, 0.412329", \ + "0.226039, 0.232199, 0.237499, 0.249189, 0.279719, 0.328619, 0.425609", \ + "0.276739, 0.282899, 0.288199, 0.299889, 0.330419, 0.379319, 0.476309", \ + "0.337339, 0.343499, 0.348799, 0.360489, 0.391019, 0.439919, 0.536909" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360", \ + "0.027324, 0.033641, 0.039977, 0.055785, 0.106770, 0.195846, 0.375360" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.240109, 0.247719, 0.254479, 0.270109, 0.315619, 0.391219, 0.542199", \ + "0.242559, 0.250169, 0.256929, 0.272559, 0.318069, 0.393669, 0.544649", \ + "0.246969, 0.254579, 0.261339, 0.276969, 0.322479, 0.398079, 0.549059", \ + "0.258219, 0.265829, 0.272589, 0.288219, 0.333729, 0.409329, 0.560309", \ + "0.273089, 0.280699, 0.287459, 0.303089, 0.348599, 0.424199, 0.575179", \ + "0.333829, 0.341439, 0.348199, 0.363829, 0.409339, 0.484939, 0.635919", \ + "0.429449, 0.437059, 0.443819, 0.459449, 0.504959, 0.580559, 0.731539" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.216098, 0.223708, 0.230468, 0.246098, 0.291608, 0.367208, 0.518188", \ + "0.218548, 0.226158, 0.232918, 0.248548, 0.294058, 0.369658, 0.520638", \ + "0.222958, 0.230568, 0.237328, 0.252958, 0.298468, 0.374068, 0.525048", \ + "0.234208, 0.241818, 0.248578, 0.264208, 0.309718, 0.385318, 0.536298", \ + "0.249078, 0.256688, 0.263448, 0.279078, 0.324588, 0.400188, 0.551168", \ + "0.309818, 0.317428, 0.324188, 0.339818, 0.385328, 0.460928, 0.611908", \ + "0.405438, 0.413048, 0.419808, 0.435438, 0.480948, 0.556548, 0.707528" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458", \ + "0.027501, 0.036592, 0.045959, 0.072454, 0.152513, 0.287472, 0.559458" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.294661, 0.301971, 0.308601, 0.324281, 0.369951, 0.445621, 0.596571", \ + "0.297491, 0.304801, 0.311431, 0.327111, 0.372781, 0.448451, 0.599401", \ + "0.302161, 0.309471, 0.316101, 0.331781, 0.377451, 0.453121, 0.604071", \ + "0.311591, 0.318901, 0.325531, 0.341211, 0.386881, 0.462551, 0.613501", \ + "0.323611, 0.330921, 0.337551, 0.353231, 0.398901, 0.474571, 0.625521", \ + "0.372291, 0.379601, 0.386231, 0.401911, 0.447581, 0.523251, 0.674201", \ + "0.439761, 0.447071, 0.453701, 0.469381, 0.515051, 0.590721, 0.741671" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.265195, 0.272505, 0.279135, 0.294815, 0.340485, 0.416155, 0.567105", \ + "0.268025, 0.275335, 0.281965, 0.297645, 0.343315, 0.418985, 0.569935", \ + "0.272695, 0.280005, 0.286635, 0.302315, 0.347985, 0.423655, 0.574605", \ + "0.282125, 0.289435, 0.296065, 0.311745, 0.357415, 0.433085, 0.584035", \ + "0.294145, 0.301455, 0.308085, 0.323765, 0.369435, 0.445105, 0.596055", \ + "0.342825, 0.350135, 0.356765, 0.372445, 0.418115, 0.493785, 0.644735", \ + "0.410295, 0.417605, 0.424235, 0.439915, 0.485585, 0.561255, 0.712205" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955", \ + "0.027107, 0.036444, 0.046702, 0.071755, 0.152108, 0.287295, 0.559955" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.293847, 0.300067, 0.305267, 0.316757, 0.347287, 0.396287, 0.493607", \ + "0.296897, 0.303117, 0.308317, 0.319807, 0.350337, 0.399337, 0.496657", \ + "0.300407, 0.306627, 0.311827, 0.323317, 0.353847, 0.402847, 0.500167", \ + "0.312827, 0.319047, 0.324247, 0.335737, 0.366267, 0.415267, 0.512587", \ + "0.325967, 0.332187, 0.337387, 0.348877, 0.379407, 0.428407, 0.525727", \ + "0.387967, 0.394187, 0.399387, 0.410877, 0.441407, 0.490407, 0.587727", \ + "0.483967, 0.490187, 0.495387, 0.506877, 0.537407, 0.586407, 0.683727" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.264462, 0.270682, 0.275882, 0.287372, 0.317902, 0.366902, 0.464222", \ + "0.267512, 0.273732, 0.278932, 0.290422, 0.320952, 0.369952, 0.467272", \ + "0.271022, 0.277242, 0.282442, 0.293932, 0.324462, 0.373462, 0.470782", \ + "0.283442, 0.289662, 0.294862, 0.306352, 0.336882, 0.385882, 0.483202", \ + "0.296582, 0.302802, 0.308002, 0.319492, 0.350022, 0.399022, 0.496342", \ + "0.358582, 0.364802, 0.370002, 0.381492, 0.412022, 0.461022, 0.558342", \ + "0.454582, 0.460802, 0.466002, 0.477492, 0.508022, 0.557022, 0.654342" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659", \ + "0.026982, 0.033476, 0.039875, 0.056139, 0.107744, 0.195150, 0.374659" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.148981, 0.155441, 0.160981, 0.172411, 0.202501, 0.251561, 0.348321", \ + "0.151001, 0.157461, 0.163001, 0.174431, 0.204521, 0.253581, 0.350341", \ + "0.155611, 0.162071, 0.167611, 0.179041, 0.209131, 0.258191, 0.354951", \ + "0.165721, 0.172181, 0.177721, 0.189151, 0.219241, 0.268301, 0.365061", \ + "0.178741, 0.185201, 0.190741, 0.202171, 0.232261, 0.281321, 0.378081", \ + "0.229411, 0.235871, 0.241411, 0.252841, 0.282931, 0.331991, 0.428751", \ + "0.303171, 0.309631, 0.315171, 0.326601, 0.356691, 0.405751, 0.502511" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134083, 0.140543, 0.146083, 0.157513, 0.187603, 0.236663, 0.333423", \ + "0.136103, 0.142563, 0.148103, 0.159533, 0.189623, 0.238683, 0.335443", \ + "0.140713, 0.147173, 0.152713, 0.164143, 0.194233, 0.243293, 0.340053", \ + "0.150823, 0.157283, 0.162823, 0.174253, 0.204343, 0.253403, 0.350163", \ + "0.163843, 0.170303, 0.175843, 0.187273, 0.217363, 0.266423, 0.363183", \ + "0.214513, 0.220973, 0.226513, 0.237943, 0.268033, 0.317093, 0.413853", \ + "0.288273, 0.294733, 0.300273, 0.311703, 0.341793, 0.390853, 0.487613" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057", \ + "0.027252, 0.033623, 0.039891, 0.055984, 0.107273, 0.196108, 0.374057" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.154290, 0.162900, 0.168990, 0.184150, 0.229770, 0.305580, 0.456390", \ + "0.156850, 0.165460, 0.171550, 0.186710, 0.232330, 0.308140, 0.458950", \ + "0.161440, 0.170050, 0.176140, 0.191300, 0.236920, 0.312730, 0.463540", \ + "0.172480, 0.181090, 0.187180, 0.202340, 0.247960, 0.323770, 0.474580", \ + "0.187950, 0.196560, 0.202650, 0.217810, 0.263430, 0.339240, 0.490050", \ + "0.244740, 0.253350, 0.259440, 0.274600, 0.320220, 0.396030, 0.546840", \ + "0.326810, 0.335420, 0.341510, 0.356670, 0.402290, 0.478100, 0.628910" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138861, 0.147471, 0.153561, 0.168721, 0.214341, 0.290151, 0.440961", \ + "0.141421, 0.150031, 0.156121, 0.171281, 0.216901, 0.292711, 0.443521", \ + "0.146011, 0.154621, 0.160711, 0.175871, 0.221491, 0.297301, 0.448111", \ + "0.157051, 0.165661, 0.171751, 0.186911, 0.232531, 0.308341, 0.459151", \ + "0.172521, 0.181131, 0.187221, 0.202381, 0.248001, 0.323811, 0.474621", \ + "0.229311, 0.237921, 0.244011, 0.259171, 0.304791, 0.380601, 0.531411", \ + "0.311381, 0.319991, 0.326081, 0.341241, 0.386861, 0.462671, 0.613481" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418", \ + "0.026478, 0.035659, 0.044395, 0.070030, 0.151634, 0.286846, 0.556418" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003618, 0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640", \ + "0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640, 0.003643", \ + "0.004305, 0.004309, 0.004314, 0.004318, 0.004322, 0.004327, 0.004331", \ + "0.004368, 0.004372, 0.004377, 0.004381, 0.004386, 0.004390, 0.004394", \ + "0.004416, 0.004420, 0.004424, 0.004429, 0.004433, 0.004438, 0.004442", \ + "0.004460, 0.004465, 0.004469, 0.004474, 0.004478, 0.004483, 0.004487", \ + "0.005876, 0.005882, 0.005888, 0.005894, 0.005900, 0.005906, 0.005911" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005342, 0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374", \ + "0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380", \ + "0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385", \ + "0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385, 0.005391", \ + "0.005409, 0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442", \ + "0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447", \ + "0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447, 0.005452" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x19_wm0_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.160700, 0.167050, 0.172150, 0.183210, 0.211750, 0.257420, 0.353950", \ + "0.162490, 0.169280, 0.174810, 0.186180, 0.214720, 0.260850, 0.358910", \ + "0.169370, 0.175150, 0.180310, 0.192750, 0.223570, 0.270260, 0.360390", \ + "0.178250, 0.184620, 0.190570, 0.200160, 0.231950, 0.280190, 0.371600", \ + "0.191520, 0.197120, 0.200350, 0.211020, 0.242270, 0.287140, 0.382980", \ + "0.239200, 0.245330, 0.247180, 0.257810, 0.290420, 0.333350, 0.425710", \ + "0.315550, 0.322170, 0.325330, 0.335870, 0.367790, 0.413340, 0.512100" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.144630, 0.150980, 0.156080, 0.167140, 0.195680, 0.241350, 0.337880", \ + "0.146420, 0.153210, 0.158740, 0.170110, 0.198650, 0.244780, 0.342840", \ + "0.153300, 0.159080, 0.164240, 0.176680, 0.207500, 0.254190, 0.344320", \ + "0.162180, 0.168550, 0.174500, 0.184090, 0.215880, 0.264120, 0.355530", \ + "0.175450, 0.181050, 0.184280, 0.194950, 0.226200, 0.271070, 0.366910", \ + "0.223130, 0.229260, 0.231110, 0.241740, 0.274350, 0.317280, 0.409640", \ + "0.299480, 0.306100, 0.309260, 0.319800, 0.351720, 0.397270, 0.496030" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134590, 0.142130, 0.148090, 0.161440, 0.199150, 0.264930, 0.399900", \ + "0.136780, 0.144470, 0.150770, 0.163640, 0.200980, 0.267320, 0.393440", \ + "0.140730, 0.147770, 0.154090, 0.167660, 0.205610, 0.272580, 0.409480", \ + "0.151100, 0.158540, 0.164550, 0.178180, 0.216850, 0.283250, 0.408670", \ + "0.161810, 0.169150, 0.175230, 0.188940, 0.227620, 0.294060, 0.419420", \ + "0.211280, 0.218380, 0.224380, 0.238390, 0.275780, 0.342320, 0.468550", \ + "0.299630, 0.306700, 0.312660, 0.321710, 0.360400, 0.427440, 0.563980" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.121131, 0.128671, 0.134631, 0.147981, 0.185691, 0.251471, 0.386441", \ + "0.123321, 0.131011, 0.137311, 0.150181, 0.187521, 0.253861, 0.379981", \ + "0.127271, 0.134311, 0.140631, 0.154201, 0.192151, 0.259121, 0.396021", \ + "0.137641, 0.145081, 0.151091, 0.164721, 0.203391, 0.269791, 0.395211", \ + "0.148351, 0.155691, 0.161771, 0.175481, 0.214161, 0.280601, 0.405961", \ + "0.197821, 0.204921, 0.210921, 0.224931, 0.262321, 0.328861, 0.455091", \ + "0.286171, 0.293241, 0.299201, 0.308251, 0.346941, 0.413981, 0.550521" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.171490, 0.177210, 0.181340, 0.193210, 0.223010, 0.271470, 0.361650", \ + "0.172730, 0.178800, 0.183910, 0.196710, 0.226750, 0.274660, 0.364700", \ + "0.177510, 0.183860, 0.188300, 0.202190, 0.230660, 0.276330, 0.373300", \ + "0.186140, 0.192150, 0.199150, 0.208850, 0.237890, 0.285480, 0.383040", \ + "0.196810, 0.202570, 0.208200, 0.218410, 0.248110, 0.301220, 0.389960", \ + "0.243520, 0.249720, 0.254860, 0.265990, 0.294950, 0.341710, 0.439800", \ + "0.322610, 0.328470, 0.333040, 0.344190, 0.372580, 0.418670, 0.517050" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.154341, 0.160061, 0.164191, 0.176061, 0.205861, 0.254321, 0.344501", \ + "0.155581, 0.161651, 0.166761, 0.179561, 0.209601, 0.257511, 0.347551", \ + "0.160361, 0.166711, 0.171151, 0.185041, 0.213511, 0.259181, 0.356151", \ + "0.168991, 0.175001, 0.182001, 0.191701, 0.220741, 0.268331, 0.365891", \ + "0.179661, 0.185421, 0.191051, 0.201261, 0.230961, 0.284071, 0.372811", \ + "0.226371, 0.232571, 0.237711, 0.248841, 0.277801, 0.324561, 0.422651", \ + "0.305461, 0.311321, 0.315891, 0.327041, 0.355431, 0.401521, 0.499901" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138520, 0.145600, 0.151370, 0.165080, 0.202480, 0.270470, 0.403470", \ + "0.139470, 0.146600, 0.152640, 0.166340, 0.204810, 0.271560, 0.404520", \ + "0.145040, 0.152280, 0.158350, 0.171570, 0.210000, 0.278480, 0.410090", \ + "0.155490, 0.162720, 0.168520, 0.182630, 0.219710, 0.286400, 0.418770", \ + "0.165490, 0.172680, 0.178800, 0.192050, 0.230700, 0.297550, 0.429440", \ + "0.214520, 0.221730, 0.227360, 0.240960, 0.279420, 0.344000, 0.479790", \ + "0.303840, 0.310850, 0.312470, 0.326080, 0.364460, 0.432010, 0.558550" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124668, 0.131748, 0.137518, 0.151228, 0.188628, 0.256618, 0.389618", \ + "0.125618, 0.132748, 0.138788, 0.152488, 0.190958, 0.257708, 0.390668", \ + "0.131188, 0.138428, 0.144498, 0.157718, 0.196148, 0.264628, 0.396238", \ + "0.141638, 0.148868, 0.154668, 0.168778, 0.205858, 0.272548, 0.404918", \ + "0.151638, 0.158828, 0.164948, 0.178198, 0.216848, 0.283698, 0.415588", \ + "0.200668, 0.207878, 0.213508, 0.227108, 0.265568, 0.330148, 0.465938", \ + "0.289988, 0.296998, 0.298618, 0.312228, 0.350608, 0.418158, 0.544698" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139169, 0.145359, 0.150779, 0.161499, 0.189709, 0.235979, 0.327689", \ + "0.141239, 0.147429, 0.152849, 0.163569, 0.191779, 0.238049, 0.329759", \ + "0.145689, 0.151879, 0.157299, 0.168019, 0.196229, 0.242499, 0.334209", \ + "0.155779, 0.161969, 0.167389, 0.178109, 0.206319, 0.252589, 0.344299", \ + "0.168919, 0.175109, 0.180529, 0.191249, 0.219459, 0.265729, 0.357439", \ + "0.219639, 0.225829, 0.231249, 0.241969, 0.270179, 0.316449, 0.408159", \ + "0.293339, 0.299529, 0.304949, 0.315669, 0.343879, 0.390149, 0.481859" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124616, 0.130736, 0.136176, 0.146806, 0.174926, 0.221006, 0.312386", \ + "0.126596, 0.132716, 0.138156, 0.148786, 0.176906, 0.222986, 0.314366", \ + "0.131176, 0.137296, 0.142736, 0.153366, 0.181486, 0.227566, 0.318946", \ + "0.141306, 0.147426, 0.152866, 0.163496, 0.191616, 0.237696, 0.329076", \ + "0.154356, 0.160476, 0.165916, 0.176546, 0.204666, 0.250746, 0.342126", \ + "0.205066, 0.211186, 0.216626, 0.227256, 0.255376, 0.301456, 0.392836", \ + "0.278836, 0.284956, 0.290396, 0.301026, 0.329146, 0.375226, 0.466606" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433", \ + "0.024577, 0.030735, 0.036687, 0.052126, 0.101754, 0.188290, 0.360433" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147429, 0.155549, 0.160749, 0.174499, 0.213849, 0.279919, 0.411469", \ + "0.149709, 0.157829, 0.163029, 0.176779, 0.216129, 0.282199, 0.413749", \ + "0.154479, 0.162599, 0.167799, 0.181549, 0.220899, 0.286969, 0.418519", \ + "0.165599, 0.173719, 0.178919, 0.192669, 0.232019, 0.298089, 0.429639", \ + "0.180769, 0.188889, 0.194089, 0.207839, 0.247189, 0.313259, 0.444809", \ + "0.237509, 0.245629, 0.250829, 0.264579, 0.303929, 0.369999, 0.501549", \ + "0.320139, 0.328259, 0.333459, 0.347209, 0.386559, 0.452629, 0.584179" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.131177, 0.138967, 0.144157, 0.157387, 0.195567, 0.259507, 0.386717", \ + "0.133537, 0.141327, 0.146517, 0.159747, 0.197927, 0.261867, 0.389077", \ + "0.138287, 0.146077, 0.151267, 0.164497, 0.202677, 0.266617, 0.393827", \ + "0.149217, 0.157007, 0.162197, 0.175427, 0.213607, 0.277547, 0.404757", \ + "0.164557, 0.172347, 0.177537, 0.190767, 0.228947, 0.292887, 0.420097", \ + "0.221277, 0.229067, 0.234257, 0.247487, 0.285667, 0.349607, 0.476817", \ + "0.303947, 0.311737, 0.316927, 0.330157, 0.368337, 0.432277, 0.559487" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891", \ + "0.023542, 0.031158, 0.039017, 0.059533, 0.130845, 0.248554, 0.486891" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003618, 0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640", \ + "0.003621, 0.003625, 0.003629, 0.003632, 0.003636, 0.003640, 0.003643", \ + "0.004305, 0.004309, 0.004314, 0.004318, 0.004322, 0.004327, 0.004331", \ + "0.004368, 0.004372, 0.004377, 0.004381, 0.004386, 0.004390, 0.004394", \ + "0.004416, 0.004420, 0.004424, 0.004429, 0.004433, 0.004438, 0.004442", \ + "0.004460, 0.004465, 0.004469, 0.004474, 0.004478, 0.004483, 0.004487", \ + "0.005876, 0.005882, 0.005888, 0.005894, 0.005900, 0.005906, 0.005911" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005342, 0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374", \ + "0.005348, 0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380", \ + "0.005353, 0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385", \ + "0.005358, 0.005364, 0.005369, 0.005374, 0.005380, 0.005385, 0.005391", \ + "0.005409, 0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442", \ + "0.005414, 0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447", \ + "0.005420, 0.005425, 0.005431, 0.005436, 0.005442, 0.005447, 0.005452" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339515, 0.345385, 0.350315, 0.361215, 0.389725, 0.435765, 0.527205", \ + "0.341445, 0.347315, 0.352245, 0.363145, 0.391655, 0.437695, 0.529135", \ + "0.346455, 0.352325, 0.357255, 0.368155, 0.396665, 0.442705, 0.534145", \ + "0.355825, 0.361695, 0.366625, 0.377525, 0.406035, 0.452075, 0.543515", \ + "0.368585, 0.374455, 0.379385, 0.390285, 0.418795, 0.464835, 0.556275", \ + "0.419315, 0.425185, 0.430115, 0.441015, 0.469525, 0.515565, 0.607005", \ + "0.480855, 0.486725, 0.491655, 0.502555, 0.531065, 0.577105, 0.668545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302107, 0.308097, 0.313047, 0.323827, 0.352597, 0.398827, 0.490687", \ + "0.304157, 0.310147, 0.315097, 0.325877, 0.354647, 0.400877, 0.492737", \ + "0.308947, 0.314937, 0.319887, 0.330667, 0.359437, 0.405667, 0.497527", \ + "0.318387, 0.324377, 0.329327, 0.340107, 0.368877, 0.415107, 0.506967", \ + "0.331177, 0.337167, 0.342117, 0.352897, 0.381667, 0.427897, 0.519757", \ + "0.381957, 0.387947, 0.392897, 0.403677, 0.432447, 0.478677, 0.570537", \ + "0.443327, 0.449317, 0.454267, 0.465047, 0.493817, 0.540047, 0.631907" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311513, 0.318543, 0.324663, 0.338343, 0.377893, 0.443653, 0.575073", \ + "0.313723, 0.320753, 0.326873, 0.340553, 0.380103, 0.445863, 0.577283", \ + "0.318303, 0.325333, 0.331453, 0.345133, 0.384683, 0.450443, 0.581863", \ + "0.329713, 0.336743, 0.342863, 0.356543, 0.396093, 0.461853, 0.593273", \ + "0.344863, 0.351893, 0.358013, 0.371693, 0.411243, 0.477003, 0.608423", \ + "0.404683, 0.411713, 0.417833, 0.431513, 0.471063, 0.536823, 0.668243", \ + "0.500613, 0.507643, 0.513763, 0.527443, 0.566993, 0.632753, 0.764173" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275760, 0.282580, 0.288520, 0.301700, 0.339990, 0.403670, 0.531000", \ + "0.277690, 0.284510, 0.290450, 0.303630, 0.341920, 0.405600, 0.532930", \ + "0.282530, 0.289350, 0.295290, 0.308470, 0.346760, 0.410440, 0.537770", \ + "0.293850, 0.300670, 0.306610, 0.319790, 0.358080, 0.421760, 0.549090", \ + "0.308750, 0.315570, 0.321510, 0.334690, 0.372980, 0.436660, 0.563990", \ + "0.369040, 0.375860, 0.381800, 0.394980, 0.433270, 0.496950, 0.624280", \ + "0.464460, 0.471280, 0.477220, 0.490400, 0.528690, 0.592370, 0.719700" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285215, 0.292365, 0.298355, 0.312035, 0.351565, 0.417165, 0.548505", \ + "0.288115, 0.295265, 0.301255, 0.314935, 0.354465, 0.420065, 0.551405", \ + "0.292935, 0.300085, 0.306075, 0.319755, 0.359285, 0.424885, 0.556225", \ + "0.302055, 0.309205, 0.315195, 0.328875, 0.368405, 0.434005, 0.565345", \ + "0.314245, 0.321395, 0.327385, 0.341065, 0.380595, 0.446195, 0.577535", \ + "0.362735, 0.369885, 0.375875, 0.389555, 0.429085, 0.494685, 0.626025", \ + "0.430285, 0.437435, 0.443425, 0.457105, 0.496635, 0.562235, 0.693575" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.251404, 0.258464, 0.264294, 0.277524, 0.315764, 0.379264, 0.506444", \ + "0.254194, 0.261254, 0.267084, 0.280314, 0.318554, 0.382054, 0.509234", \ + "0.259034, 0.266094, 0.271924, 0.285154, 0.323394, 0.386894, 0.514074", \ + "0.268264, 0.275324, 0.281154, 0.294384, 0.332624, 0.396124, 0.523304", \ + "0.280294, 0.287354, 0.293184, 0.306414, 0.344654, 0.408154, 0.535334", \ + "0.328894, 0.335954, 0.341784, 0.355014, 0.393254, 0.456754, 0.583934", \ + "0.396544, 0.403604, 0.409434, 0.422664, 0.460904, 0.524404, 0.651584" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.320801, 0.326811, 0.331771, 0.342461, 0.371081, 0.417161, 0.508941", \ + "0.323431, 0.329441, 0.334401, 0.345091, 0.373711, 0.419791, 0.511571", \ + "0.327041, 0.333051, 0.338011, 0.348701, 0.377321, 0.423401, 0.515181", \ + "0.339431, 0.345441, 0.350401, 0.361091, 0.389711, 0.435791, 0.527571", \ + "0.352901, 0.358911, 0.363871, 0.374561, 0.403181, 0.449261, 0.541041", \ + "0.414791, 0.420801, 0.425761, 0.436451, 0.465071, 0.511151, 0.602931", \ + "0.510921, 0.516931, 0.521891, 0.532581, 0.561201, 0.607281, 0.699061" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284955, 0.291025, 0.296025, 0.306745, 0.335475, 0.381815, 0.473885", \ + "0.287835, 0.293905, 0.298905, 0.309625, 0.338355, 0.384695, 0.476765", \ + "0.291365, 0.297435, 0.302435, 0.313155, 0.341885, 0.388225, 0.480295", \ + "0.303595, 0.309665, 0.314665, 0.325385, 0.354115, 0.400455, 0.492525", \ + "0.316975, 0.323045, 0.328045, 0.338765, 0.367495, 0.413835, 0.505905", \ + "0.378985, 0.385055, 0.390055, 0.400775, 0.429505, 0.475845, 0.567915", \ + "0.475305, 0.481375, 0.486375, 0.497095, 0.525825, 0.572165, 0.664235" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339515, 0.345385, 0.350315, 0.361215, 0.389725, 0.435765, 0.527205", \ + "0.341445, 0.347315, 0.352245, 0.363145, 0.391655, 0.437695, 0.529135", \ + "0.346455, 0.352325, 0.357255, 0.368155, 0.396665, 0.442705, 0.534145", \ + "0.355825, 0.361695, 0.366625, 0.377525, 0.406035, 0.452075, 0.543515", \ + "0.368585, 0.374455, 0.379385, 0.390285, 0.418795, 0.464835, 0.556275", \ + "0.419315, 0.425185, 0.430115, 0.441015, 0.469525, 0.515565, 0.607005", \ + "0.480855, 0.486725, 0.491655, 0.502555, 0.531065, 0.577105, 0.668545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302107, 0.308097, 0.313047, 0.323827, 0.352597, 0.398827, 0.490687", \ + "0.304157, 0.310147, 0.315097, 0.325877, 0.354647, 0.400877, 0.492737", \ + "0.308947, 0.314937, 0.319887, 0.330667, 0.359437, 0.405667, 0.497527", \ + "0.318387, 0.324377, 0.329327, 0.340107, 0.368877, 0.415107, 0.506967", \ + "0.331177, 0.337167, 0.342117, 0.352897, 0.381667, 0.427897, 0.519757", \ + "0.381957, 0.387947, 0.392897, 0.403677, 0.432447, 0.478677, 0.570537", \ + "0.443327, 0.449317, 0.454267, 0.465047, 0.493817, 0.540047, 0.631907" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311513, 0.318543, 0.324663, 0.338343, 0.377893, 0.443653, 0.575073", \ + "0.313723, 0.320753, 0.326873, 0.340553, 0.380103, 0.445863, 0.577283", \ + "0.318303, 0.325333, 0.331453, 0.345133, 0.384683, 0.450443, 0.581863", \ + "0.329713, 0.336743, 0.342863, 0.356543, 0.396093, 0.461853, 0.593273", \ + "0.344863, 0.351893, 0.358013, 0.371693, 0.411243, 0.477003, 0.608423", \ + "0.404683, 0.411713, 0.417833, 0.431513, 0.471063, 0.536823, 0.668243", \ + "0.500613, 0.507643, 0.513763, 0.527443, 0.566993, 0.632753, 0.764173" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275760, 0.282580, 0.288520, 0.301700, 0.339990, 0.403670, 0.531000", \ + "0.277690, 0.284510, 0.290450, 0.303630, 0.341920, 0.405600, 0.532930", \ + "0.282530, 0.289350, 0.295290, 0.308470, 0.346760, 0.410440, 0.537770", \ + "0.293850, 0.300670, 0.306610, 0.319790, 0.358080, 0.421760, 0.549090", \ + "0.308750, 0.315570, 0.321510, 0.334690, 0.372980, 0.436660, 0.563990", \ + "0.369040, 0.375860, 0.381800, 0.394980, 0.433270, 0.496950, 0.624280", \ + "0.464460, 0.471280, 0.477220, 0.490400, 0.528690, 0.592370, 0.719700" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285215, 0.292365, 0.298355, 0.312035, 0.351565, 0.417165, 0.548505", \ + "0.288115, 0.295265, 0.301255, 0.314935, 0.354465, 0.420065, 0.551405", \ + "0.292935, 0.300085, 0.306075, 0.319755, 0.359285, 0.424885, 0.556225", \ + "0.302055, 0.309205, 0.315195, 0.328875, 0.368405, 0.434005, 0.565345", \ + "0.314245, 0.321395, 0.327385, 0.341065, 0.380595, 0.446195, 0.577535", \ + "0.362735, 0.369885, 0.375875, 0.389555, 0.429085, 0.494685, 0.626025", \ + "0.430285, 0.437435, 0.443425, 0.457105, 0.496635, 0.562235, 0.693575" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.251404, 0.258464, 0.264294, 0.277524, 0.315764, 0.379264, 0.506444", \ + "0.254194, 0.261254, 0.267084, 0.280314, 0.318554, 0.382054, 0.509234", \ + "0.259034, 0.266094, 0.271924, 0.285154, 0.323394, 0.386894, 0.514074", \ + "0.268264, 0.275324, 0.281154, 0.294384, 0.332624, 0.396124, 0.523304", \ + "0.280294, 0.287354, 0.293184, 0.306414, 0.344654, 0.408154, 0.535334", \ + "0.328894, 0.335954, 0.341784, 0.355014, 0.393254, 0.456754, 0.583934", \ + "0.396544, 0.403604, 0.409434, 0.422664, 0.460904, 0.524404, 0.651584" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.320801, 0.326811, 0.331771, 0.342461, 0.371081, 0.417161, 0.508941", \ + "0.323431, 0.329441, 0.334401, 0.345091, 0.373711, 0.419791, 0.511571", \ + "0.327041, 0.333051, 0.338011, 0.348701, 0.377321, 0.423401, 0.515181", \ + "0.339431, 0.345441, 0.350401, 0.361091, 0.389711, 0.435791, 0.527571", \ + "0.352901, 0.358911, 0.363871, 0.374561, 0.403181, 0.449261, 0.541041", \ + "0.414791, 0.420801, 0.425761, 0.436451, 0.465071, 0.511151, 0.602931", \ + "0.510921, 0.516931, 0.521891, 0.532581, 0.561201, 0.607281, 0.699061" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284955, 0.291025, 0.296025, 0.306745, 0.335475, 0.381815, 0.473885", \ + "0.287835, 0.293905, 0.298905, 0.309625, 0.338355, 0.384695, 0.476765", \ + "0.291365, 0.297435, 0.302435, 0.313155, 0.341885, 0.388225, 0.480295", \ + "0.303595, 0.309665, 0.314665, 0.325385, 0.354115, 0.400455, 0.492525", \ + "0.316975, 0.323045, 0.328045, 0.338765, 0.367495, 0.413835, 0.505905", \ + "0.378985, 0.385055, 0.390055, 0.400775, 0.429505, 0.475845, 0.567915", \ + "0.475305, 0.481375, 0.486375, 0.497095, 0.525825, 0.572165, 0.664235" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339515, 0.345385, 0.350315, 0.361215, 0.389725, 0.435765, 0.527205", \ + "0.341445, 0.347315, 0.352245, 0.363145, 0.391655, 0.437695, 0.529135", \ + "0.346455, 0.352325, 0.357255, 0.368155, 0.396665, 0.442705, 0.534145", \ + "0.355825, 0.361695, 0.366625, 0.377525, 0.406035, 0.452075, 0.543515", \ + "0.368585, 0.374455, 0.379385, 0.390285, 0.418795, 0.464835, 0.556275", \ + "0.419315, 0.425185, 0.430115, 0.441015, 0.469525, 0.515565, 0.607005", \ + "0.480855, 0.486725, 0.491655, 0.502555, 0.531065, 0.577105, 0.668545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302107, 0.308097, 0.313047, 0.323827, 0.352597, 0.398827, 0.490687", \ + "0.304157, 0.310147, 0.315097, 0.325877, 0.354647, 0.400877, 0.492737", \ + "0.308947, 0.314937, 0.319887, 0.330667, 0.359437, 0.405667, 0.497527", \ + "0.318387, 0.324377, 0.329327, 0.340107, 0.368877, 0.415107, 0.506967", \ + "0.331177, 0.337167, 0.342117, 0.352897, 0.381667, 0.427897, 0.519757", \ + "0.381957, 0.387947, 0.392897, 0.403677, 0.432447, 0.478677, 0.570537", \ + "0.443327, 0.449317, 0.454267, 0.465047, 0.493817, 0.540047, 0.631907" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311513, 0.318543, 0.324663, 0.338343, 0.377893, 0.443653, 0.575073", \ + "0.313723, 0.320753, 0.326873, 0.340553, 0.380103, 0.445863, 0.577283", \ + "0.318303, 0.325333, 0.331453, 0.345133, 0.384683, 0.450443, 0.581863", \ + "0.329713, 0.336743, 0.342863, 0.356543, 0.396093, 0.461853, 0.593273", \ + "0.344863, 0.351893, 0.358013, 0.371693, 0.411243, 0.477003, 0.608423", \ + "0.404683, 0.411713, 0.417833, 0.431513, 0.471063, 0.536823, 0.668243", \ + "0.500613, 0.507643, 0.513763, 0.527443, 0.566993, 0.632753, 0.764173" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275760, 0.282580, 0.288520, 0.301700, 0.339990, 0.403670, 0.531000", \ + "0.277690, 0.284510, 0.290450, 0.303630, 0.341920, 0.405600, 0.532930", \ + "0.282530, 0.289350, 0.295290, 0.308470, 0.346760, 0.410440, 0.537770", \ + "0.293850, 0.300670, 0.306610, 0.319790, 0.358080, 0.421760, 0.549090", \ + "0.308750, 0.315570, 0.321510, 0.334690, 0.372980, 0.436660, 0.563990", \ + "0.369040, 0.375860, 0.381800, 0.394980, 0.433270, 0.496950, 0.624280", \ + "0.464460, 0.471280, 0.477220, 0.490400, 0.528690, 0.592370, 0.719700" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285215, 0.292365, 0.298355, 0.312035, 0.351565, 0.417165, 0.548505", \ + "0.288115, 0.295265, 0.301255, 0.314935, 0.354465, 0.420065, 0.551405", \ + "0.292935, 0.300085, 0.306075, 0.319755, 0.359285, 0.424885, 0.556225", \ + "0.302055, 0.309205, 0.315195, 0.328875, 0.368405, 0.434005, 0.565345", \ + "0.314245, 0.321395, 0.327385, 0.341065, 0.380595, 0.446195, 0.577535", \ + "0.362735, 0.369885, 0.375875, 0.389555, 0.429085, 0.494685, 0.626025", \ + "0.430285, 0.437435, 0.443425, 0.457105, 0.496635, 0.562235, 0.693575" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.251404, 0.258464, 0.264294, 0.277524, 0.315764, 0.379264, 0.506444", \ + "0.254194, 0.261254, 0.267084, 0.280314, 0.318554, 0.382054, 0.509234", \ + "0.259034, 0.266094, 0.271924, 0.285154, 0.323394, 0.386894, 0.514074", \ + "0.268264, 0.275324, 0.281154, 0.294384, 0.332624, 0.396124, 0.523304", \ + "0.280294, 0.287354, 0.293184, 0.306414, 0.344654, 0.408154, 0.535334", \ + "0.328894, 0.335954, 0.341784, 0.355014, 0.393254, 0.456754, 0.583934", \ + "0.396544, 0.403604, 0.409434, 0.422664, 0.460904, 0.524404, 0.651584" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.320801, 0.326811, 0.331771, 0.342461, 0.371081, 0.417161, 0.508941", \ + "0.323431, 0.329441, 0.334401, 0.345091, 0.373711, 0.419791, 0.511571", \ + "0.327041, 0.333051, 0.338011, 0.348701, 0.377321, 0.423401, 0.515181", \ + "0.339431, 0.345441, 0.350401, 0.361091, 0.389711, 0.435791, 0.527571", \ + "0.352901, 0.358911, 0.363871, 0.374561, 0.403181, 0.449261, 0.541041", \ + "0.414791, 0.420801, 0.425761, 0.436451, 0.465071, 0.511151, 0.602931", \ + "0.510921, 0.516931, 0.521891, 0.532581, 0.561201, 0.607281, 0.699061" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284955, 0.291025, 0.296025, 0.306745, 0.335475, 0.381815, 0.473885", \ + "0.287835, 0.293905, 0.298905, 0.309625, 0.338355, 0.384695, 0.476765", \ + "0.291365, 0.297435, 0.302435, 0.313155, 0.341885, 0.388225, 0.480295", \ + "0.303595, 0.309665, 0.314665, 0.325385, 0.354115, 0.400455, 0.492525", \ + "0.316975, 0.323045, 0.328045, 0.338765, 0.367495, 0.413835, 0.505905", \ + "0.378985, 0.385055, 0.390055, 0.400775, 0.429505, 0.475845, 0.567915", \ + "0.475305, 0.481375, 0.486375, 0.497095, 0.525825, 0.572165, 0.664235" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339515, 0.345385, 0.350315, 0.361215, 0.389725, 0.435765, 0.527205", \ + "0.341445, 0.347315, 0.352245, 0.363145, 0.391655, 0.437695, 0.529135", \ + "0.346455, 0.352325, 0.357255, 0.368155, 0.396665, 0.442705, 0.534145", \ + "0.355825, 0.361695, 0.366625, 0.377525, 0.406035, 0.452075, 0.543515", \ + "0.368585, 0.374455, 0.379385, 0.390285, 0.418795, 0.464835, 0.556275", \ + "0.419315, 0.425185, 0.430115, 0.441015, 0.469525, 0.515565, 0.607005", \ + "0.480855, 0.486725, 0.491655, 0.502555, 0.531065, 0.577105, 0.668545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302107, 0.308097, 0.313047, 0.323827, 0.352597, 0.398827, 0.490687", \ + "0.304157, 0.310147, 0.315097, 0.325877, 0.354647, 0.400877, 0.492737", \ + "0.308947, 0.314937, 0.319887, 0.330667, 0.359437, 0.405667, 0.497527", \ + "0.318387, 0.324377, 0.329327, 0.340107, 0.368877, 0.415107, 0.506967", \ + "0.331177, 0.337167, 0.342117, 0.352897, 0.381667, 0.427897, 0.519757", \ + "0.381957, 0.387947, 0.392897, 0.403677, 0.432447, 0.478677, 0.570537", \ + "0.443327, 0.449317, 0.454267, 0.465047, 0.493817, 0.540047, 0.631907" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311513, 0.318543, 0.324663, 0.338343, 0.377893, 0.443653, 0.575073", \ + "0.313723, 0.320753, 0.326873, 0.340553, 0.380103, 0.445863, 0.577283", \ + "0.318303, 0.325333, 0.331453, 0.345133, 0.384683, 0.450443, 0.581863", \ + "0.329713, 0.336743, 0.342863, 0.356543, 0.396093, 0.461853, 0.593273", \ + "0.344863, 0.351893, 0.358013, 0.371693, 0.411243, 0.477003, 0.608423", \ + "0.404683, 0.411713, 0.417833, 0.431513, 0.471063, 0.536823, 0.668243", \ + "0.500613, 0.507643, 0.513763, 0.527443, 0.566993, 0.632753, 0.764173" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275760, 0.282580, 0.288520, 0.301700, 0.339990, 0.403670, 0.531000", \ + "0.277690, 0.284510, 0.290450, 0.303630, 0.341920, 0.405600, 0.532930", \ + "0.282530, 0.289350, 0.295290, 0.308470, 0.346760, 0.410440, 0.537770", \ + "0.293850, 0.300670, 0.306610, 0.319790, 0.358080, 0.421760, 0.549090", \ + "0.308750, 0.315570, 0.321510, 0.334690, 0.372980, 0.436660, 0.563990", \ + "0.369040, 0.375860, 0.381800, 0.394980, 0.433270, 0.496950, 0.624280", \ + "0.464460, 0.471280, 0.477220, 0.490400, 0.528690, 0.592370, 0.719700" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285215, 0.292365, 0.298355, 0.312035, 0.351565, 0.417165, 0.548505", \ + "0.288115, 0.295265, 0.301255, 0.314935, 0.354465, 0.420065, 0.551405", \ + "0.292935, 0.300085, 0.306075, 0.319755, 0.359285, 0.424885, 0.556225", \ + "0.302055, 0.309205, 0.315195, 0.328875, 0.368405, 0.434005, 0.565345", \ + "0.314245, 0.321395, 0.327385, 0.341065, 0.380595, 0.446195, 0.577535", \ + "0.362735, 0.369885, 0.375875, 0.389555, 0.429085, 0.494685, 0.626025", \ + "0.430285, 0.437435, 0.443425, 0.457105, 0.496635, 0.562235, 0.693575" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.251404, 0.258464, 0.264294, 0.277524, 0.315764, 0.379264, 0.506444", \ + "0.254194, 0.261254, 0.267084, 0.280314, 0.318554, 0.382054, 0.509234", \ + "0.259034, 0.266094, 0.271924, 0.285154, 0.323394, 0.386894, 0.514074", \ + "0.268264, 0.275324, 0.281154, 0.294384, 0.332624, 0.396124, 0.523304", \ + "0.280294, 0.287354, 0.293184, 0.306414, 0.344654, 0.408154, 0.535334", \ + "0.328894, 0.335954, 0.341784, 0.355014, 0.393254, 0.456754, 0.583934", \ + "0.396544, 0.403604, 0.409434, 0.422664, 0.460904, 0.524404, 0.651584" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.320801, 0.326811, 0.331771, 0.342461, 0.371081, 0.417161, 0.508941", \ + "0.323431, 0.329441, 0.334401, 0.345091, 0.373711, 0.419791, 0.511571", \ + "0.327041, 0.333051, 0.338011, 0.348701, 0.377321, 0.423401, 0.515181", \ + "0.339431, 0.345441, 0.350401, 0.361091, 0.389711, 0.435791, 0.527571", \ + "0.352901, 0.358911, 0.363871, 0.374561, 0.403181, 0.449261, 0.541041", \ + "0.414791, 0.420801, 0.425761, 0.436451, 0.465071, 0.511151, 0.602931", \ + "0.510921, 0.516931, 0.521891, 0.532581, 0.561201, 0.607281, 0.699061" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284955, 0.291025, 0.296025, 0.306745, 0.335475, 0.381815, 0.473885", \ + "0.287835, 0.293905, 0.298905, 0.309625, 0.338355, 0.384695, 0.476765", \ + "0.291365, 0.297435, 0.302435, 0.313155, 0.341885, 0.388225, 0.480295", \ + "0.303595, 0.309665, 0.314665, 0.325385, 0.354115, 0.400455, 0.492525", \ + "0.316975, 0.323045, 0.328045, 0.338765, 0.367495, 0.413835, 0.505905", \ + "0.378985, 0.385055, 0.390055, 0.400775, 0.429505, 0.475845, 0.567915", \ + "0.475305, 0.481375, 0.486375, 0.497095, 0.525825, 0.572165, 0.664235" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.339515, 0.345385, 0.350315, 0.361215, 0.389725, 0.435765, 0.527205", \ + "0.341445, 0.347315, 0.352245, 0.363145, 0.391655, 0.437695, 0.529135", \ + "0.346455, 0.352325, 0.357255, 0.368155, 0.396665, 0.442705, 0.534145", \ + "0.355825, 0.361695, 0.366625, 0.377525, 0.406035, 0.452075, 0.543515", \ + "0.368585, 0.374455, 0.379385, 0.390285, 0.418795, 0.464835, 0.556275", \ + "0.419315, 0.425185, 0.430115, 0.441015, 0.469525, 0.515565, 0.607005", \ + "0.480855, 0.486725, 0.491655, 0.502555, 0.531065, 0.577105, 0.668545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.302107, 0.308097, 0.313047, 0.323827, 0.352597, 0.398827, 0.490687", \ + "0.304157, 0.310147, 0.315097, 0.325877, 0.354647, 0.400877, 0.492737", \ + "0.308947, 0.314937, 0.319887, 0.330667, 0.359437, 0.405667, 0.497527", \ + "0.318387, 0.324377, 0.329327, 0.340107, 0.368877, 0.415107, 0.506967", \ + "0.331177, 0.337167, 0.342117, 0.352897, 0.381667, 0.427897, 0.519757", \ + "0.381957, 0.387947, 0.392897, 0.403677, 0.432447, 0.478677, 0.570537", \ + "0.443327, 0.449317, 0.454267, 0.465047, 0.493817, 0.540047, 0.631907" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801", \ + "0.024730, 0.030914, 0.036926, 0.052446, 0.102664, 0.188159, 0.361801" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.311513, 0.318543, 0.324663, 0.338343, 0.377893, 0.443653, 0.575073", \ + "0.313723, 0.320753, 0.326873, 0.340553, 0.380103, 0.445863, 0.577283", \ + "0.318303, 0.325333, 0.331453, 0.345133, 0.384683, 0.450443, 0.581863", \ + "0.329713, 0.336743, 0.342863, 0.356543, 0.396093, 0.461853, 0.593273", \ + "0.344863, 0.351893, 0.358013, 0.371693, 0.411243, 0.477003, 0.608423", \ + "0.404683, 0.411713, 0.417833, 0.431513, 0.471063, 0.536823, 0.668243", \ + "0.500613, 0.507643, 0.513763, 0.527443, 0.566993, 0.632753, 0.764173" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275760, 0.282580, 0.288520, 0.301700, 0.339990, 0.403670, 0.531000", \ + "0.277690, 0.284510, 0.290450, 0.303630, 0.341920, 0.405600, 0.532930", \ + "0.282530, 0.289350, 0.295290, 0.308470, 0.346760, 0.410440, 0.537770", \ + "0.293850, 0.300670, 0.306610, 0.319790, 0.358080, 0.421760, 0.549090", \ + "0.308750, 0.315570, 0.321510, 0.334690, 0.372980, 0.436660, 0.563990", \ + "0.369040, 0.375860, 0.381800, 0.394980, 0.433270, 0.496950, 0.624280", \ + "0.464460, 0.471280, 0.477220, 0.490400, 0.528690, 0.592370, 0.719700" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829", \ + "0.023954, 0.031692, 0.039492, 0.061179, 0.131455, 0.249426, 0.487829" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.285215, 0.292365, 0.298355, 0.312035, 0.351565, 0.417165, 0.548505", \ + "0.288115, 0.295265, 0.301255, 0.314935, 0.354465, 0.420065, 0.551405", \ + "0.292935, 0.300085, 0.306075, 0.319755, 0.359285, 0.424885, 0.556225", \ + "0.302055, 0.309205, 0.315195, 0.328875, 0.368405, 0.434005, 0.565345", \ + "0.314245, 0.321395, 0.327385, 0.341065, 0.380595, 0.446195, 0.577535", \ + "0.362735, 0.369885, 0.375875, 0.389555, 0.429085, 0.494685, 0.626025", \ + "0.430285, 0.437435, 0.443425, 0.457105, 0.496635, 0.562235, 0.693575" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.251404, 0.258464, 0.264294, 0.277524, 0.315764, 0.379264, 0.506444", \ + "0.254194, 0.261254, 0.267084, 0.280314, 0.318554, 0.382054, 0.509234", \ + "0.259034, 0.266094, 0.271924, 0.285154, 0.323394, 0.386894, 0.514074", \ + "0.268264, 0.275324, 0.281154, 0.294384, 0.332624, 0.396124, 0.523304", \ + "0.280294, 0.287354, 0.293184, 0.306414, 0.344654, 0.408154, 0.535334", \ + "0.328894, 0.335954, 0.341784, 0.355014, 0.393254, 0.456754, 0.583934", \ + "0.396544, 0.403604, 0.409434, 0.422664, 0.460904, 0.524404, 0.651584" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352", \ + "0.023960, 0.031485, 0.039612, 0.061415, 0.131835, 0.249477, 0.487352" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.320801, 0.326811, 0.331771, 0.342461, 0.371081, 0.417161, 0.508941", \ + "0.323431, 0.329441, 0.334401, 0.345091, 0.373711, 0.419791, 0.511571", \ + "0.327041, 0.333051, 0.338011, 0.348701, 0.377321, 0.423401, 0.515181", \ + "0.339431, 0.345441, 0.350401, 0.361091, 0.389711, 0.435791, 0.527571", \ + "0.352901, 0.358911, 0.363871, 0.374561, 0.403181, 0.449261, 0.541041", \ + "0.414791, 0.420801, 0.425761, 0.436451, 0.465071, 0.511151, 0.602931", \ + "0.510921, 0.516931, 0.521891, 0.532581, 0.561201, 0.607281, 0.699061" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.284955, 0.291025, 0.296025, 0.306745, 0.335475, 0.381815, 0.473885", \ + "0.287835, 0.293905, 0.298905, 0.309625, 0.338355, 0.384695, 0.476765", \ + "0.291365, 0.297435, 0.302435, 0.313155, 0.341885, 0.388225, 0.480295", \ + "0.303595, 0.309665, 0.314665, 0.325385, 0.354115, 0.400455, 0.492525", \ + "0.316975, 0.323045, 0.328045, 0.338765, 0.367495, 0.413835, 0.505905", \ + "0.378985, 0.385055, 0.390055, 0.400775, 0.429505, 0.475845, 0.567915", \ + "0.475305, 0.481375, 0.486375, 0.497095, 0.525825, 0.572165, 0.664235" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578", \ + "0.024838, 0.030998, 0.037012, 0.052794, 0.102743, 0.188316, 0.362578" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135, 0.012135", \ + "0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160, 0.012160", \ + "0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172, 0.012172", \ + "0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184, 0.012184", \ + "0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196, 0.012196", \ + "0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208, 0.012208", \ + "0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220, 0.012220" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756, 0.013756", \ + "0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757, 0.013757", \ + "0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771, 0.013771", \ + "0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785, 0.013785", \ + "0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798, 0.013798", \ + "0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812, 0.013812", \ + "0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826, 0.013826" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.149360, 0.155950, 0.161630, 0.174070, 0.210100, 0.266400, 0.372000", \ + "0.152690, 0.158210, 0.163700, 0.175840, 0.209530, 0.260700, 0.367000", \ + "0.155990, 0.162210, 0.168170, 0.180410, 0.212960, 0.265980, 0.376790", \ + "0.163730, 0.169910, 0.175980, 0.189550, 0.222870, 0.274210, 0.376150", \ + "0.175000, 0.180930, 0.186270, 0.198580, 0.234040, 0.286840, 0.388840", \ + "0.224020, 0.230630, 0.236220, 0.248280, 0.281930, 0.336330, 0.438540", \ + "0.289750, 0.296480, 0.302440, 0.314820, 0.347100, 0.401400, 0.513870" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134424, 0.141014, 0.146694, 0.159134, 0.195164, 0.251464, 0.357064", \ + "0.137754, 0.143274, 0.148764, 0.160904, 0.194594, 0.245764, 0.352064", \ + "0.141054, 0.147274, 0.153234, 0.165474, 0.198024, 0.251044, 0.361854", \ + "0.148794, 0.154974, 0.161044, 0.174614, 0.207934, 0.259274, 0.361214", \ + "0.160064, 0.165994, 0.171334, 0.183644, 0.219104, 0.271904, 0.373904", \ + "0.209084, 0.215694, 0.221284, 0.233344, 0.266994, 0.321394, 0.423604", \ + "0.274814, 0.281544, 0.287504, 0.299884, 0.332164, 0.386464, 0.498934" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153570, 0.161320, 0.168300, 0.183810, 0.230730, 0.307080, 0.452930", \ + "0.155230, 0.163090, 0.169720, 0.186390, 0.233110, 0.308350, 0.469020", \ + "0.160710, 0.168580, 0.174980, 0.191450, 0.235650, 0.315170, 0.473380", \ + "0.170530, 0.179080, 0.186660, 0.201650, 0.245360, 0.318630, 0.475250", \ + "0.181230, 0.189060, 0.195690, 0.211340, 0.256530, 0.335310, 0.494220", \ + "0.236040, 0.244070, 0.251700, 0.268260, 0.311890, 0.390970, 0.541240", \ + "0.317020, 0.324300, 0.331290, 0.348080, 0.393460, 0.466800, 0.625630" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138213, 0.145963, 0.152943, 0.168453, 0.215373, 0.291723, 0.437573", \ + "0.139873, 0.147733, 0.154363, 0.171033, 0.217753, 0.292993, 0.453663", \ + "0.145353, 0.153223, 0.159623, 0.176093, 0.220293, 0.299813, 0.458023", \ + "0.155173, 0.163723, 0.171303, 0.186293, 0.230003, 0.303273, 0.459893", \ + "0.165873, 0.173703, 0.180333, 0.195983, 0.241173, 0.319953, 0.478863", \ + "0.220683, 0.228713, 0.236343, 0.252903, 0.296533, 0.375613, 0.525883", \ + "0.301663, 0.308943, 0.315933, 0.332723, 0.378103, 0.451443, 0.610273" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151130, 0.157600, 0.163400, 0.175990, 0.208060, 0.261690, 0.369060", \ + "0.152830, 0.159320, 0.165050, 0.177420, 0.211460, 0.264900, 0.369130", \ + "0.157240, 0.163980, 0.169490, 0.181250, 0.215320, 0.269590, 0.379680", \ + "0.165200, 0.171930, 0.177630, 0.190120, 0.222520, 0.276200, 0.382340", \ + "0.176740, 0.183060, 0.188360, 0.200380, 0.233100, 0.284880, 0.394140", \ + "0.224990, 0.231710, 0.237430, 0.250420, 0.283620, 0.334780, 0.442400", \ + "0.295040, 0.301540, 0.307330, 0.321140, 0.353780, 0.404070, 0.506730" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136017, 0.142487, 0.148287, 0.160877, 0.192947, 0.246577, 0.353947", \ + "0.137717, 0.144207, 0.149937, 0.162307, 0.196347, 0.249787, 0.354017", \ + "0.142127, 0.148867, 0.154377, 0.166137, 0.200207, 0.254477, 0.364567", \ + "0.150087, 0.156817, 0.162517, 0.175007, 0.207407, 0.261087, 0.367227", \ + "0.161627, 0.167947, 0.173247, 0.185267, 0.217987, 0.269767, 0.379027", \ + "0.209877, 0.216597, 0.222317, 0.235307, 0.268507, 0.319667, 0.427287", \ + "0.279927, 0.286427, 0.292217, 0.306027, 0.338667, 0.388957, 0.491617" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153650, 0.160740, 0.167480, 0.184300, 0.231120, 0.303750, 0.454710", \ + "0.154670, 0.162570, 0.169310, 0.185170, 0.229680, 0.309510, 0.460370", \ + "0.160100, 0.167910, 0.174540, 0.190400, 0.235550, 0.314450, 0.473470", \ + "0.169750, 0.177650, 0.184440, 0.200370, 0.246310, 0.324080, 0.483170", \ + "0.180780, 0.188530, 0.195420, 0.210800, 0.259620, 0.332780, 0.485840", \ + "0.236210, 0.244410, 0.251900, 0.268450, 0.312650, 0.390150, 0.544840", \ + "0.317820, 0.324950, 0.331900, 0.347690, 0.392490, 0.469420, 0.625510" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138285, 0.145375, 0.152115, 0.168935, 0.215755, 0.288385, 0.439345", \ + "0.139305, 0.147205, 0.153945, 0.169805, 0.214315, 0.294145, 0.445005", \ + "0.144735, 0.152545, 0.159175, 0.175035, 0.220185, 0.299085, 0.458105", \ + "0.154385, 0.162285, 0.169075, 0.185005, 0.230945, 0.308715, 0.467805", \ + "0.165415, 0.173165, 0.180055, 0.195435, 0.244255, 0.317415, 0.470475", \ + "0.220845, 0.229045, 0.236535, 0.253085, 0.297285, 0.374785, 0.529475", \ + "0.302455, 0.309585, 0.316535, 0.332325, 0.377125, 0.454055, 0.610145" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.230105, 0.236205, 0.241745, 0.254445, 0.286805, 0.339065, 0.441455", \ + "0.233035, 0.239135, 0.244675, 0.257375, 0.289735, 0.341995, 0.444385", \ + "0.236845, 0.242945, 0.248485, 0.261185, 0.293545, 0.345805, 0.448195", \ + "0.247255, 0.253355, 0.258895, 0.271595, 0.303955, 0.356215, 0.458605", \ + "0.261385, 0.267485, 0.273025, 0.285725, 0.318085, 0.370345, 0.472735", \ + "0.316515, 0.322615, 0.328155, 0.340855, 0.373215, 0.425475, 0.527865", \ + "0.391515, 0.397615, 0.403155, 0.415855, 0.448215, 0.500475, 0.602865" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.207095, 0.213195, 0.218735, 0.231435, 0.263795, 0.316055, 0.418445", \ + "0.210025, 0.216125, 0.221665, 0.234365, 0.266725, 0.318985, 0.421375", \ + "0.213835, 0.219935, 0.225475, 0.238175, 0.270535, 0.322795, 0.425185", \ + "0.224245, 0.230345, 0.235885, 0.248585, 0.280945, 0.333205, 0.435595", \ + "0.238375, 0.244475, 0.250015, 0.262715, 0.295075, 0.347335, 0.449725", \ + "0.293505, 0.299605, 0.305145, 0.317845, 0.350205, 0.402465, 0.504855", \ + "0.368505, 0.374605, 0.380145, 0.392845, 0.425205, 0.477465, 0.579855" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813", \ + "0.029189, 0.038366, 0.044482, 0.058634, 0.112216, 0.208140, 0.396813" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.245685, 0.253265, 0.259645, 0.274985, 0.319615, 0.394635, 0.542545", \ + "0.245945, 0.253525, 0.259905, 0.275245, 0.319875, 0.394895, 0.542805", \ + "0.251555, 0.259135, 0.265515, 0.280855, 0.325485, 0.400505, 0.548415", \ + "0.262225, 0.269805, 0.276185, 0.291525, 0.336155, 0.411175, 0.559085", \ + "0.276865, 0.284445, 0.290825, 0.306165, 0.350795, 0.425815, 0.573725", \ + "0.334615, 0.342195, 0.348575, 0.363915, 0.408545, 0.483565, 0.631475", \ + "0.421235, 0.428815, 0.435195, 0.450535, 0.495165, 0.570185, 0.718095" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.221116, 0.228696, 0.235076, 0.250416, 0.295046, 0.370066, 0.517976", \ + "0.221376, 0.228956, 0.235336, 0.250676, 0.295306, 0.370326, 0.518236", \ + "0.226986, 0.234566, 0.240946, 0.256286, 0.300916, 0.375936, 0.523846", \ + "0.237656, 0.245236, 0.251616, 0.266956, 0.311586, 0.386606, 0.534516", \ + "0.252296, 0.259876, 0.266256, 0.281596, 0.326226, 0.401246, 0.549156", \ + "0.310046, 0.317626, 0.324006, 0.339346, 0.383976, 0.458996, 0.606906", \ + "0.396666, 0.404246, 0.410626, 0.425966, 0.470596, 0.545616, 0.693526" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635", \ + "0.027960, 0.036883, 0.046016, 0.070158, 0.148123, 0.284287, 0.546635" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.312221, 0.319751, 0.326661, 0.343381, 0.386651, 0.461291, 0.608061", \ + "0.315091, 0.322621, 0.329531, 0.346251, 0.389521, 0.464161, 0.610931", \ + "0.320281, 0.327811, 0.334721, 0.351441, 0.394711, 0.469351, 0.616121", \ + "0.328861, 0.336391, 0.343301, 0.360021, 0.403291, 0.477931, 0.624701", \ + "0.343251, 0.350781, 0.357691, 0.374411, 0.417681, 0.492321, 0.639091", \ + "0.397951, 0.405481, 0.412391, 0.429111, 0.472381, 0.547021, 0.693791", \ + "0.475051, 0.482581, 0.489491, 0.506211, 0.549481, 0.624121, 0.770891" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.280999, 0.288529, 0.295439, 0.312159, 0.355429, 0.430069, 0.576839", \ + "0.283869, 0.291399, 0.298309, 0.315029, 0.358299, 0.432939, 0.579709", \ + "0.289059, 0.296589, 0.303499, 0.320219, 0.363489, 0.438129, 0.584899", \ + "0.297639, 0.305169, 0.312079, 0.328799, 0.372069, 0.446709, 0.593479", \ + "0.312029, 0.319559, 0.326469, 0.343189, 0.386459, 0.461099, 0.607869", \ + "0.366729, 0.374259, 0.381169, 0.397889, 0.441159, 0.515799, 0.662569", \ + "0.443829, 0.451359, 0.458269, 0.474989, 0.518259, 0.592899, 0.739669" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309", \ + "0.028739, 0.037864, 0.046247, 0.069531, 0.149355, 0.280414, 0.545309" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.296296, 0.302946, 0.308696, 0.320516, 0.352596, 0.405066, 0.506916", \ + "0.299216, 0.305866, 0.311616, 0.323436, 0.355516, 0.407986, 0.509836", \ + "0.303116, 0.309766, 0.315516, 0.327336, 0.359416, 0.411886, 0.513736", \ + "0.314616, 0.321266, 0.327016, 0.338836, 0.370916, 0.423386, 0.525236", \ + "0.329436, 0.336086, 0.341836, 0.353656, 0.385736, 0.438206, 0.540056", \ + "0.385736, 0.392386, 0.398136, 0.409956, 0.442036, 0.494506, 0.596356", \ + "0.471116, 0.477766, 0.483516, 0.495336, 0.527416, 0.579886, 0.681736" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.266666, 0.273316, 0.279066, 0.290886, 0.322966, 0.375436, 0.477286", \ + "0.269586, 0.276236, 0.281986, 0.293806, 0.325886, 0.378356, 0.480206", \ + "0.273486, 0.280136, 0.285886, 0.297706, 0.329786, 0.382256, 0.484106", \ + "0.284986, 0.291636, 0.297386, 0.309206, 0.341286, 0.393756, 0.495606", \ + "0.299806, 0.306456, 0.312206, 0.324026, 0.356106, 0.408576, 0.510426", \ + "0.356106, 0.362756, 0.368506, 0.380326, 0.412406, 0.464876, 0.566726", \ + "0.441486, 0.448136, 0.453886, 0.465706, 0.497786, 0.550256, 0.652106" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800", \ + "0.028139, 0.034569, 0.041077, 0.058961, 0.112654, 0.206776, 0.396800" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145409, 0.152269, 0.157399, 0.170609, 0.202339, 0.254149, 0.355759", \ + "0.148089, 0.154949, 0.160079, 0.173289, 0.205019, 0.256829, 0.358439", \ + "0.152149, 0.159009, 0.164139, 0.177349, 0.209079, 0.260889, 0.362499", \ + "0.162259, 0.169119, 0.174249, 0.187459, 0.219189, 0.270999, 0.372609", \ + "0.176159, 0.183019, 0.188149, 0.201359, 0.233089, 0.284899, 0.386509", \ + "0.226559, 0.233419, 0.238549, 0.251759, 0.283489, 0.335299, 0.436909", \ + "0.300749, 0.307609, 0.312739, 0.325949, 0.357679, 0.409489, 0.511099" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130868, 0.137728, 0.142858, 0.156068, 0.187798, 0.239608, 0.341218", \ + "0.133548, 0.140408, 0.145538, 0.158748, 0.190478, 0.242288, 0.343898", \ + "0.137608, 0.144468, 0.149598, 0.162808, 0.194538, 0.246348, 0.347958", \ + "0.147718, 0.154578, 0.159708, 0.172918, 0.204648, 0.256458, 0.358068", \ + "0.161618, 0.168478, 0.173608, 0.186818, 0.218548, 0.270358, 0.371968", \ + "0.212018, 0.218878, 0.224008, 0.237218, 0.268948, 0.320758, 0.422368", \ + "0.286208, 0.293068, 0.298198, 0.311408, 0.343138, 0.394948, 0.496558" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354", \ + "0.027819, 0.034723, 0.043927, 0.059874, 0.111228, 0.207800, 0.396354" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.156456, 0.164356, 0.170286, 0.185406, 0.229226, 0.305456, 0.454046", \ + "0.158676, 0.166576, 0.172506, 0.187626, 0.231446, 0.307676, 0.456266", \ + "0.162666, 0.170566, 0.176496, 0.191616, 0.235436, 0.311666, 0.460256", \ + "0.174196, 0.182096, 0.188026, 0.203146, 0.246966, 0.323196, 0.471786", \ + "0.187836, 0.195736, 0.201666, 0.216786, 0.260606, 0.336836, 0.485426", \ + "0.244756, 0.252656, 0.258586, 0.273706, 0.317526, 0.393756, 0.542346", \ + "0.328826, 0.336726, 0.342656, 0.357776, 0.401596, 0.477826, 0.626416" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140810, 0.148710, 0.154640, 0.169760, 0.213580, 0.289810, 0.438400", \ + "0.143030, 0.150930, 0.156860, 0.171980, 0.215800, 0.292030, 0.440620", \ + "0.147020, 0.154920, 0.160850, 0.175970, 0.219790, 0.296020, 0.444610", \ + "0.158550, 0.166450, 0.172380, 0.187500, 0.231320, 0.307550, 0.456140", \ + "0.172190, 0.180090, 0.186020, 0.201140, 0.244960, 0.321190, 0.469780", \ + "0.229110, 0.237010, 0.242940, 0.258060, 0.301880, 0.378110, 0.526700", \ + "0.313180, 0.321080, 0.327010, 0.342130, 0.385950, 0.462180, 0.610770" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929", \ + "0.028942, 0.037219, 0.046433, 0.070637, 0.148107, 0.281580, 0.545929" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131, 0.045131", \ + "0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176, 0.045176", \ + "0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222, 0.045222", \ + "0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267, 0.045267", \ + "0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866, 0.045866", \ + "0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912, 0.045912", \ + "0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958, 0.045958" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738, 0.025738", \ + "0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906, 0.025906", \ + "0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932, 0.025932", \ + "0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143, 0.026143", \ + "0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169, 0.026169", \ + "0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195, 0.026195", \ + "0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221, 0.026221" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003623, 0.003626, 0.003630, 0.003634, 0.003637, 0.003641, 0.003645", \ + "0.003722, 0.003725, 0.003729, 0.003733, 0.003737, 0.003740, 0.003744", \ + "0.004425, 0.004429, 0.004433, 0.004438, 0.004442, 0.004447, 0.004451", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.005813, 0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848", \ + "0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854", \ + "0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854, 0.005860" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004789, 0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817", \ + "0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822", \ + "0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832, 0.004837", \ + "0.004981, 0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011", \ + "0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011, 0.005016" \ + ); + } + } + } + bus(AYB) { + bus_type : rf2_32x19_wm0_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.160450, 0.166290, 0.171860, 0.183820, 0.213150, 0.258660, 0.349430", \ + "0.162600, 0.168420, 0.173720, 0.186190, 0.215760, 0.262170, 0.351380", \ + "0.169770, 0.175330, 0.180350, 0.191160, 0.220980, 0.267820, 0.368550", \ + "0.177770, 0.183740, 0.188540, 0.199090, 0.228780, 0.274010, 0.369640", \ + "0.188120, 0.193910, 0.199200, 0.210480, 0.240190, 0.284550, 0.380910", \ + "0.236870, 0.245810, 0.250910, 0.257970, 0.290460, 0.336930, 0.426040", \ + "0.313450, 0.321680, 0.327280, 0.335570, 0.364430, 0.409710, 0.508570" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.144405, 0.150245, 0.155815, 0.167775, 0.197105, 0.242615, 0.333385", \ + "0.146555, 0.152375, 0.157675, 0.170145, 0.199715, 0.246125, 0.335335", \ + "0.153725, 0.159285, 0.164305, 0.175115, 0.204935, 0.251775, 0.352505", \ + "0.161725, 0.167695, 0.172495, 0.183045, 0.212735, 0.257965, 0.353595", \ + "0.172075, 0.177865, 0.183155, 0.194435, 0.224145, 0.268505, 0.364865", \ + "0.220825, 0.229765, 0.234865, 0.241925, 0.274415, 0.320885, 0.409995", \ + "0.297405, 0.305635, 0.311235, 0.319525, 0.348385, 0.393665, 0.492525" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.132370, 0.139550, 0.145720, 0.159120, 0.196700, 0.262890, 0.398870", \ + "0.135430, 0.142360, 0.148750, 0.162690, 0.200150, 0.266740, 0.402090", \ + "0.139690, 0.146690, 0.152510, 0.166320, 0.204390, 0.271670, 0.408060", \ + "0.148490, 0.155710, 0.161860, 0.175250, 0.212960, 0.279160, 0.408950", \ + "0.160770, 0.167740, 0.174250, 0.188070, 0.225670, 0.292190, 0.428720", \ + "0.210400, 0.217430, 0.223560, 0.237000, 0.275240, 0.342070, 0.469060", \ + "0.297950, 0.304990, 0.311090, 0.321210, 0.359500, 0.423860, 0.561030" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119133, 0.126313, 0.132483, 0.145883, 0.183463, 0.249653, 0.385633", \ + "0.122193, 0.129123, 0.135513, 0.149453, 0.186913, 0.253503, 0.388853", \ + "0.126453, 0.133453, 0.139273, 0.153083, 0.191153, 0.258433, 0.394823", \ + "0.135253, 0.142473, 0.148623, 0.162013, 0.199723, 0.265923, 0.395713", \ + "0.147533, 0.154503, 0.161013, 0.174833, 0.212433, 0.278953, 0.415483", \ + "0.197163, 0.204193, 0.210323, 0.223763, 0.262003, 0.328833, 0.455823", \ + "0.284713, 0.291753, 0.297853, 0.307973, 0.346263, 0.410623, 0.547793" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.167330, 0.176000, 0.180700, 0.189560, 0.218620, 0.264940, 0.361440", \ + "0.170800, 0.177520, 0.182660, 0.192830, 0.224750, 0.273640, 0.368100", \ + "0.175630, 0.181320, 0.186470, 0.199050, 0.229500, 0.275840, 0.365310", \ + "0.184350, 0.190390, 0.195150, 0.206210, 0.236100, 0.280480, 0.376650", \ + "0.194150, 0.199800, 0.204750, 0.216140, 0.245480, 0.292070, 0.392050", \ + "0.241420, 0.247650, 0.252640, 0.263860, 0.292630, 0.339380, 0.436210", \ + "0.319150, 0.325740, 0.331040, 0.342090, 0.371060, 0.416440, 0.512720" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150597, 0.159267, 0.163967, 0.172827, 0.201887, 0.248207, 0.344707", \ + "0.154067, 0.160787, 0.165927, 0.176097, 0.208017, 0.256907, 0.351367", \ + "0.158897, 0.164587, 0.169737, 0.182317, 0.212767, 0.259107, 0.348577", \ + "0.167617, 0.173657, 0.178417, 0.189477, 0.219367, 0.263747, 0.359917", \ + "0.177417, 0.183067, 0.188017, 0.199407, 0.228747, 0.275337, 0.375317", \ + "0.224687, 0.230917, 0.235907, 0.247127, 0.275897, 0.322647, 0.419477", \ + "0.302417, 0.309007, 0.314307, 0.325357, 0.354327, 0.399707, 0.495987" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136300, 0.143250, 0.149260, 0.163230, 0.200410, 0.266090, 0.397890", \ + "0.137950, 0.145100, 0.151010, 0.164920, 0.202600, 0.269010, 0.399340", \ + "0.143110, 0.150640, 0.156730, 0.170010, 0.207800, 0.273940, 0.408430", \ + "0.153970, 0.161120, 0.167290, 0.180830, 0.219020, 0.285820, 0.412470", \ + "0.161940, 0.169320, 0.175410, 0.188820, 0.226450, 0.292640, 0.422250", \ + "0.212890, 0.220470, 0.226550, 0.240120, 0.277680, 0.344060, 0.473760", \ + "0.301430, 0.308360, 0.314250, 0.323650, 0.362180, 0.429450, 0.565830" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.122670, 0.129620, 0.135630, 0.149600, 0.186780, 0.252460, 0.384260", \ + "0.124320, 0.131470, 0.137380, 0.151290, 0.188970, 0.255380, 0.385710", \ + "0.129480, 0.137010, 0.143100, 0.156380, 0.194170, 0.260310, 0.394800", \ + "0.140340, 0.147490, 0.153660, 0.167200, 0.205390, 0.272190, 0.398840", \ + "0.148310, 0.155690, 0.161780, 0.175190, 0.212820, 0.279010, 0.408620", \ + "0.199260, 0.206840, 0.212920, 0.226490, 0.264050, 0.330430, 0.460130", \ + "0.287800, 0.294730, 0.300620, 0.310020, 0.348550, 0.415820, 0.552200" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139457, 0.145667, 0.151097, 0.161807, 0.189697, 0.235617, 0.326517", \ + "0.141467, 0.147677, 0.153107, 0.163817, 0.191707, 0.237627, 0.328527", \ + "0.146047, 0.152257, 0.157687, 0.168397, 0.196287, 0.242207, 0.333107", \ + "0.156107, 0.162317, 0.167747, 0.178457, 0.206347, 0.252267, 0.343167", \ + "0.169267, 0.175477, 0.180907, 0.191617, 0.219507, 0.265427, 0.356327", \ + "0.219987, 0.226197, 0.231627, 0.242337, 0.270227, 0.316147, 0.407047", \ + "0.293717, 0.299927, 0.305357, 0.316067, 0.343957, 0.389877, 0.480777" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124151, 0.130361, 0.135751, 0.146471, 0.174581, 0.220751, 0.312071", \ + "0.126211, 0.132421, 0.137811, 0.148531, 0.176641, 0.222811, 0.314131", \ + "0.130691, 0.136901, 0.142291, 0.153011, 0.181121, 0.227291, 0.318611", \ + "0.140861, 0.147071, 0.152461, 0.163181, 0.191291, 0.237461, 0.328781", \ + "0.153881, 0.160091, 0.165481, 0.176201, 0.204311, 0.250481, 0.341801", \ + "0.204621, 0.210831, 0.216221, 0.226941, 0.255051, 0.301221, 0.392541", \ + "0.278411, 0.284621, 0.290011, 0.300731, 0.328841, 0.375011, 0.466331" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975", \ + "0.024132, 0.030296, 0.036182, 0.051611, 0.101174, 0.187746, 0.359975" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147599, 0.155869, 0.161099, 0.174899, 0.214279, 0.280349, 0.411889", \ + "0.149859, 0.158129, 0.163359, 0.177159, 0.216539, 0.282609, 0.414149", \ + "0.154679, 0.162949, 0.168179, 0.181979, 0.221359, 0.287429, 0.418969", \ + "0.165729, 0.173999, 0.179229, 0.193029, 0.232409, 0.298479, 0.430019", \ + "0.180969, 0.189239, 0.194469, 0.208269, 0.247649, 0.313719, 0.445259", \ + "0.237669, 0.245939, 0.251169, 0.264969, 0.304349, 0.370419, 0.501959", \ + "0.320309, 0.328579, 0.333809, 0.347609, 0.386989, 0.453059, 0.584599" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130493, 0.138483, 0.143603, 0.156783, 0.195053, 0.258833, 0.385943", \ + "0.133033, 0.141023, 0.146143, 0.159323, 0.197593, 0.261373, 0.388483", \ + "0.137743, 0.145733, 0.150853, 0.164033, 0.202303, 0.266083, 0.393193", \ + "0.148663, 0.156653, 0.161773, 0.174953, 0.213223, 0.277003, 0.404113", \ + "0.164053, 0.172043, 0.177163, 0.190343, 0.228613, 0.292393, 0.419503", \ + "0.220743, 0.228733, 0.233853, 0.247033, 0.285303, 0.349083, 0.476193", \ + "0.303433, 0.311423, 0.316543, 0.329723, 0.367993, 0.431773, 0.558883" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896", \ + "0.023357, 0.031166, 0.038987, 0.059496, 0.130919, 0.248663, 0.486896" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.003623, 0.003626, 0.003630, 0.003634, 0.003637, 0.003641, 0.003645", \ + "0.003722, 0.003725, 0.003729, 0.003733, 0.003737, 0.003740, 0.003744", \ + "0.004425, 0.004429, 0.004433, 0.004438, 0.004442, 0.004447, 0.004451", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.005813, 0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848", \ + "0.005819, 0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854", \ + "0.005825, 0.005830, 0.005836, 0.005842, 0.005848, 0.005854, 0.005860" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004789, 0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817", \ + "0.004793, 0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822", \ + "0.004798, 0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832, 0.004837", \ + "0.004981, 0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011", \ + "0.004986, 0.004991, 0.004996, 0.005001, 0.005006, 0.005011, 0.005016" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358020, 0.364160, 0.369190, 0.380540, 0.409380, 0.455570, 0.546840", \ + "0.359730, 0.365870, 0.370900, 0.382250, 0.411090, 0.457280, 0.548550", \ + "0.364180, 0.370320, 0.375350, 0.386700, 0.415540, 0.461730, 0.553000", \ + "0.376760, 0.382900, 0.387930, 0.399280, 0.428120, 0.474310, 0.565580", \ + "0.391260, 0.397400, 0.402430, 0.413780, 0.442620, 0.488810, 0.580080", \ + "0.442820, 0.448960, 0.453990, 0.465340, 0.494180, 0.540370, 0.631640", \ + "0.518370, 0.524510, 0.529540, 0.540890, 0.569730, 0.615920, 0.707190" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.317230, 0.323280, 0.328150, 0.339620, 0.368130, 0.414020, 0.504410", \ + "0.319160, 0.325210, 0.330080, 0.341550, 0.370060, 0.415950, 0.506340", \ + "0.323700, 0.329750, 0.334620, 0.346090, 0.374600, 0.420490, 0.510880", \ + "0.336050, 0.342100, 0.346970, 0.358440, 0.386950, 0.432840, 0.523230", \ + "0.350670, 0.356720, 0.361590, 0.373060, 0.401570, 0.447460, 0.537850", \ + "0.402340, 0.408390, 0.413260, 0.424730, 0.453240, 0.499130, 0.589520", \ + "0.477660, 0.483710, 0.488580, 0.500050, 0.528560, 0.574450, 0.664840" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313645, 0.321165, 0.327455, 0.341305, 0.381005, 0.446825, 0.578185", \ + "0.315985, 0.323505, 0.329795, 0.343645, 0.383345, 0.449165, 0.580525", \ + "0.320025, 0.327545, 0.333835, 0.347685, 0.387385, 0.453205, 0.584565", \ + "0.333075, 0.340595, 0.346885, 0.360735, 0.400435, 0.466255, 0.597615", \ + "0.347425, 0.354945, 0.361235, 0.375085, 0.414785, 0.480605, 0.611965", \ + "0.404885, 0.412405, 0.418695, 0.432545, 0.472245, 0.538065, 0.669425", \ + "0.488815, 0.496335, 0.502625, 0.516475, 0.556175, 0.621995, 0.753355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275055, 0.282055, 0.288015, 0.301285, 0.339465, 0.403095, 0.530075", \ + "0.277765, 0.284765, 0.290725, 0.303995, 0.342175, 0.405805, 0.532785", \ + "0.281655, 0.288655, 0.294615, 0.307885, 0.346065, 0.409695, 0.536675", \ + "0.294705, 0.301705, 0.307665, 0.320935, 0.359115, 0.422745, 0.549725", \ + "0.309035, 0.316035, 0.321995, 0.335265, 0.373445, 0.437075, 0.564055", \ + "0.366185, 0.373185, 0.379145, 0.392415, 0.430595, 0.494225, 0.621205", \ + "0.450225, 0.457225, 0.463185, 0.476455, 0.514635, 0.578265, 0.705245" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305416, 0.312936, 0.319186, 0.333046, 0.372726, 0.440106, 0.571526", \ + "0.310406, 0.317926, 0.324176, 0.338036, 0.377716, 0.445096, 0.576516", \ + "0.312846, 0.320366, 0.326616, 0.340476, 0.380156, 0.447536, 0.578956", \ + "0.322906, 0.330426, 0.336676, 0.350536, 0.390216, 0.457596, 0.589016", \ + "0.336236, 0.343756, 0.350006, 0.363866, 0.403546, 0.470926, 0.602346", \ + "0.393596, 0.401116, 0.407366, 0.421226, 0.460906, 0.528286, 0.659706", \ + "0.467716, 0.475236, 0.481486, 0.495346, 0.535026, 0.602406, 0.733826" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.267570, 0.274620, 0.280460, 0.293810, 0.331900, 0.396840, 0.523860", \ + "0.272560, 0.279610, 0.285450, 0.298800, 0.336890, 0.401830, 0.528850", \ + "0.274690, 0.281740, 0.287580, 0.300930, 0.339020, 0.403960, 0.530980", \ + "0.285130, 0.292180, 0.298020, 0.311370, 0.349460, 0.414400, 0.541420", \ + "0.298150, 0.305200, 0.311040, 0.324390, 0.362480, 0.427420, 0.554440", \ + "0.355700, 0.362750, 0.368590, 0.381940, 0.420030, 0.484970, 0.611990", \ + "0.429650, 0.436700, 0.442540, 0.455890, 0.493980, 0.558920, 0.685940" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.324348, 0.330448, 0.335518, 0.346398, 0.375228, 0.421518, 0.513298", \ + "0.327828, 0.333928, 0.338998, 0.349878, 0.378708, 0.424998, 0.516778", \ + "0.331688, 0.337788, 0.342858, 0.353738, 0.382568, 0.428858, 0.520638", \ + "0.343508, 0.349608, 0.354678, 0.365558, 0.394388, 0.440678, 0.532458", \ + "0.357388, 0.363488, 0.368558, 0.379438, 0.408268, 0.454558, 0.546338", \ + "0.415368, 0.421468, 0.426538, 0.437418, 0.466248, 0.512538, 0.604318", \ + "0.500708, 0.506808, 0.511878, 0.522758, 0.551588, 0.597878, 0.689658" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287093, 0.293103, 0.298053, 0.308763, 0.337283, 0.383143, 0.474403", \ + "0.290343, 0.296353, 0.301303, 0.312013, 0.340533, 0.386393, 0.477653", \ + "0.294233, 0.300243, 0.305193, 0.315903, 0.344423, 0.390283, 0.481543", \ + "0.306093, 0.312103, 0.317053, 0.327763, 0.356283, 0.402143, 0.493403", \ + "0.319943, 0.325953, 0.330903, 0.341613, 0.370133, 0.415993, 0.507253", \ + "0.378163, 0.384173, 0.389123, 0.399833, 0.428353, 0.474213, 0.565473", \ + "0.463453, 0.469463, 0.474413, 0.485123, 0.513643, 0.559503, 0.650763" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358020, 0.364160, 0.369190, 0.380540, 0.409380, 0.455570, 0.546840", \ + "0.359730, 0.365870, 0.370900, 0.382250, 0.411090, 0.457280, 0.548550", \ + "0.364180, 0.370320, 0.375350, 0.386700, 0.415540, 0.461730, 0.553000", \ + "0.376760, 0.382900, 0.387930, 0.399280, 0.428120, 0.474310, 0.565580", \ + "0.391260, 0.397400, 0.402430, 0.413780, 0.442620, 0.488810, 0.580080", \ + "0.442820, 0.448960, 0.453990, 0.465340, 0.494180, 0.540370, 0.631640", \ + "0.518370, 0.524510, 0.529540, 0.540890, 0.569730, 0.615920, 0.707190" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.317230, 0.323280, 0.328150, 0.339620, 0.368130, 0.414020, 0.504410", \ + "0.319160, 0.325210, 0.330080, 0.341550, 0.370060, 0.415950, 0.506340", \ + "0.323700, 0.329750, 0.334620, 0.346090, 0.374600, 0.420490, 0.510880", \ + "0.336050, 0.342100, 0.346970, 0.358440, 0.386950, 0.432840, 0.523230", \ + "0.350670, 0.356720, 0.361590, 0.373060, 0.401570, 0.447460, 0.537850", \ + "0.402340, 0.408390, 0.413260, 0.424730, 0.453240, 0.499130, 0.589520", \ + "0.477660, 0.483710, 0.488580, 0.500050, 0.528560, 0.574450, 0.664840" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313645, 0.321165, 0.327455, 0.341305, 0.381005, 0.446825, 0.578185", \ + "0.315985, 0.323505, 0.329795, 0.343645, 0.383345, 0.449165, 0.580525", \ + "0.320025, 0.327545, 0.333835, 0.347685, 0.387385, 0.453205, 0.584565", \ + "0.333075, 0.340595, 0.346885, 0.360735, 0.400435, 0.466255, 0.597615", \ + "0.347425, 0.354945, 0.361235, 0.375085, 0.414785, 0.480605, 0.611965", \ + "0.404885, 0.412405, 0.418695, 0.432545, 0.472245, 0.538065, 0.669425", \ + "0.488815, 0.496335, 0.502625, 0.516475, 0.556175, 0.621995, 0.753355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275055, 0.282055, 0.288015, 0.301285, 0.339465, 0.403095, 0.530075", \ + "0.277765, 0.284765, 0.290725, 0.303995, 0.342175, 0.405805, 0.532785", \ + "0.281655, 0.288655, 0.294615, 0.307885, 0.346065, 0.409695, 0.536675", \ + "0.294705, 0.301705, 0.307665, 0.320935, 0.359115, 0.422745, 0.549725", \ + "0.309035, 0.316035, 0.321995, 0.335265, 0.373445, 0.437075, 0.564055", \ + "0.366185, 0.373185, 0.379145, 0.392415, 0.430595, 0.494225, 0.621205", \ + "0.450225, 0.457225, 0.463185, 0.476455, 0.514635, 0.578265, 0.705245" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305416, 0.312936, 0.319186, 0.333046, 0.372726, 0.440106, 0.571526", \ + "0.310406, 0.317926, 0.324176, 0.338036, 0.377716, 0.445096, 0.576516", \ + "0.312846, 0.320366, 0.326616, 0.340476, 0.380156, 0.447536, 0.578956", \ + "0.322906, 0.330426, 0.336676, 0.350536, 0.390216, 0.457596, 0.589016", \ + "0.336236, 0.343756, 0.350006, 0.363866, 0.403546, 0.470926, 0.602346", \ + "0.393596, 0.401116, 0.407366, 0.421226, 0.460906, 0.528286, 0.659706", \ + "0.467716, 0.475236, 0.481486, 0.495346, 0.535026, 0.602406, 0.733826" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.267570, 0.274620, 0.280460, 0.293810, 0.331900, 0.396840, 0.523860", \ + "0.272560, 0.279610, 0.285450, 0.298800, 0.336890, 0.401830, 0.528850", \ + "0.274690, 0.281740, 0.287580, 0.300930, 0.339020, 0.403960, 0.530980", \ + "0.285130, 0.292180, 0.298020, 0.311370, 0.349460, 0.414400, 0.541420", \ + "0.298150, 0.305200, 0.311040, 0.324390, 0.362480, 0.427420, 0.554440", \ + "0.355700, 0.362750, 0.368590, 0.381940, 0.420030, 0.484970, 0.611990", \ + "0.429650, 0.436700, 0.442540, 0.455890, 0.493980, 0.558920, 0.685940" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.324348, 0.330448, 0.335518, 0.346398, 0.375228, 0.421518, 0.513298", \ + "0.327828, 0.333928, 0.338998, 0.349878, 0.378708, 0.424998, 0.516778", \ + "0.331688, 0.337788, 0.342858, 0.353738, 0.382568, 0.428858, 0.520638", \ + "0.343508, 0.349608, 0.354678, 0.365558, 0.394388, 0.440678, 0.532458", \ + "0.357388, 0.363488, 0.368558, 0.379438, 0.408268, 0.454558, 0.546338", \ + "0.415368, 0.421468, 0.426538, 0.437418, 0.466248, 0.512538, 0.604318", \ + "0.500708, 0.506808, 0.511878, 0.522758, 0.551588, 0.597878, 0.689658" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287093, 0.293103, 0.298053, 0.308763, 0.337283, 0.383143, 0.474403", \ + "0.290343, 0.296353, 0.301303, 0.312013, 0.340533, 0.386393, 0.477653", \ + "0.294233, 0.300243, 0.305193, 0.315903, 0.344423, 0.390283, 0.481543", \ + "0.306093, 0.312103, 0.317053, 0.327763, 0.356283, 0.402143, 0.493403", \ + "0.319943, 0.325953, 0.330903, 0.341613, 0.370133, 0.415993, 0.507253", \ + "0.378163, 0.384173, 0.389123, 0.399833, 0.428353, 0.474213, 0.565473", \ + "0.463453, 0.469463, 0.474413, 0.485123, 0.513643, 0.559503, 0.650763" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358020, 0.364160, 0.369190, 0.380540, 0.409380, 0.455570, 0.546840", \ + "0.359730, 0.365870, 0.370900, 0.382250, 0.411090, 0.457280, 0.548550", \ + "0.364180, 0.370320, 0.375350, 0.386700, 0.415540, 0.461730, 0.553000", \ + "0.376760, 0.382900, 0.387930, 0.399280, 0.428120, 0.474310, 0.565580", \ + "0.391260, 0.397400, 0.402430, 0.413780, 0.442620, 0.488810, 0.580080", \ + "0.442820, 0.448960, 0.453990, 0.465340, 0.494180, 0.540370, 0.631640", \ + "0.518370, 0.524510, 0.529540, 0.540890, 0.569730, 0.615920, 0.707190" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.317230, 0.323280, 0.328150, 0.339620, 0.368130, 0.414020, 0.504410", \ + "0.319160, 0.325210, 0.330080, 0.341550, 0.370060, 0.415950, 0.506340", \ + "0.323700, 0.329750, 0.334620, 0.346090, 0.374600, 0.420490, 0.510880", \ + "0.336050, 0.342100, 0.346970, 0.358440, 0.386950, 0.432840, 0.523230", \ + "0.350670, 0.356720, 0.361590, 0.373060, 0.401570, 0.447460, 0.537850", \ + "0.402340, 0.408390, 0.413260, 0.424730, 0.453240, 0.499130, 0.589520", \ + "0.477660, 0.483710, 0.488580, 0.500050, 0.528560, 0.574450, 0.664840" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313645, 0.321165, 0.327455, 0.341305, 0.381005, 0.446825, 0.578185", \ + "0.315985, 0.323505, 0.329795, 0.343645, 0.383345, 0.449165, 0.580525", \ + "0.320025, 0.327545, 0.333835, 0.347685, 0.387385, 0.453205, 0.584565", \ + "0.333075, 0.340595, 0.346885, 0.360735, 0.400435, 0.466255, 0.597615", \ + "0.347425, 0.354945, 0.361235, 0.375085, 0.414785, 0.480605, 0.611965", \ + "0.404885, 0.412405, 0.418695, 0.432545, 0.472245, 0.538065, 0.669425", \ + "0.488815, 0.496335, 0.502625, 0.516475, 0.556175, 0.621995, 0.753355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275055, 0.282055, 0.288015, 0.301285, 0.339465, 0.403095, 0.530075", \ + "0.277765, 0.284765, 0.290725, 0.303995, 0.342175, 0.405805, 0.532785", \ + "0.281655, 0.288655, 0.294615, 0.307885, 0.346065, 0.409695, 0.536675", \ + "0.294705, 0.301705, 0.307665, 0.320935, 0.359115, 0.422745, 0.549725", \ + "0.309035, 0.316035, 0.321995, 0.335265, 0.373445, 0.437075, 0.564055", \ + "0.366185, 0.373185, 0.379145, 0.392415, 0.430595, 0.494225, 0.621205", \ + "0.450225, 0.457225, 0.463185, 0.476455, 0.514635, 0.578265, 0.705245" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305416, 0.312936, 0.319186, 0.333046, 0.372726, 0.440106, 0.571526", \ + "0.310406, 0.317926, 0.324176, 0.338036, 0.377716, 0.445096, 0.576516", \ + "0.312846, 0.320366, 0.326616, 0.340476, 0.380156, 0.447536, 0.578956", \ + "0.322906, 0.330426, 0.336676, 0.350536, 0.390216, 0.457596, 0.589016", \ + "0.336236, 0.343756, 0.350006, 0.363866, 0.403546, 0.470926, 0.602346", \ + "0.393596, 0.401116, 0.407366, 0.421226, 0.460906, 0.528286, 0.659706", \ + "0.467716, 0.475236, 0.481486, 0.495346, 0.535026, 0.602406, 0.733826" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.267570, 0.274620, 0.280460, 0.293810, 0.331900, 0.396840, 0.523860", \ + "0.272560, 0.279610, 0.285450, 0.298800, 0.336890, 0.401830, 0.528850", \ + "0.274690, 0.281740, 0.287580, 0.300930, 0.339020, 0.403960, 0.530980", \ + "0.285130, 0.292180, 0.298020, 0.311370, 0.349460, 0.414400, 0.541420", \ + "0.298150, 0.305200, 0.311040, 0.324390, 0.362480, 0.427420, 0.554440", \ + "0.355700, 0.362750, 0.368590, 0.381940, 0.420030, 0.484970, 0.611990", \ + "0.429650, 0.436700, 0.442540, 0.455890, 0.493980, 0.558920, 0.685940" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.324348, 0.330448, 0.335518, 0.346398, 0.375228, 0.421518, 0.513298", \ + "0.327828, 0.333928, 0.338998, 0.349878, 0.378708, 0.424998, 0.516778", \ + "0.331688, 0.337788, 0.342858, 0.353738, 0.382568, 0.428858, 0.520638", \ + "0.343508, 0.349608, 0.354678, 0.365558, 0.394388, 0.440678, 0.532458", \ + "0.357388, 0.363488, 0.368558, 0.379438, 0.408268, 0.454558, 0.546338", \ + "0.415368, 0.421468, 0.426538, 0.437418, 0.466248, 0.512538, 0.604318", \ + "0.500708, 0.506808, 0.511878, 0.522758, 0.551588, 0.597878, 0.689658" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287093, 0.293103, 0.298053, 0.308763, 0.337283, 0.383143, 0.474403", \ + "0.290343, 0.296353, 0.301303, 0.312013, 0.340533, 0.386393, 0.477653", \ + "0.294233, 0.300243, 0.305193, 0.315903, 0.344423, 0.390283, 0.481543", \ + "0.306093, 0.312103, 0.317053, 0.327763, 0.356283, 0.402143, 0.493403", \ + "0.319943, 0.325953, 0.330903, 0.341613, 0.370133, 0.415993, 0.507253", \ + "0.378163, 0.384173, 0.389123, 0.399833, 0.428353, 0.474213, 0.565473", \ + "0.463453, 0.469463, 0.474413, 0.485123, 0.513643, 0.559503, 0.650763" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358020, 0.364160, 0.369190, 0.380540, 0.409380, 0.455570, 0.546840", \ + "0.359730, 0.365870, 0.370900, 0.382250, 0.411090, 0.457280, 0.548550", \ + "0.364180, 0.370320, 0.375350, 0.386700, 0.415540, 0.461730, 0.553000", \ + "0.376760, 0.382900, 0.387930, 0.399280, 0.428120, 0.474310, 0.565580", \ + "0.391260, 0.397400, 0.402430, 0.413780, 0.442620, 0.488810, 0.580080", \ + "0.442820, 0.448960, 0.453990, 0.465340, 0.494180, 0.540370, 0.631640", \ + "0.518370, 0.524510, 0.529540, 0.540890, 0.569730, 0.615920, 0.707190" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.317230, 0.323280, 0.328150, 0.339620, 0.368130, 0.414020, 0.504410", \ + "0.319160, 0.325210, 0.330080, 0.341550, 0.370060, 0.415950, 0.506340", \ + "0.323700, 0.329750, 0.334620, 0.346090, 0.374600, 0.420490, 0.510880", \ + "0.336050, 0.342100, 0.346970, 0.358440, 0.386950, 0.432840, 0.523230", \ + "0.350670, 0.356720, 0.361590, 0.373060, 0.401570, 0.447460, 0.537850", \ + "0.402340, 0.408390, 0.413260, 0.424730, 0.453240, 0.499130, 0.589520", \ + "0.477660, 0.483710, 0.488580, 0.500050, 0.528560, 0.574450, 0.664840" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313645, 0.321165, 0.327455, 0.341305, 0.381005, 0.446825, 0.578185", \ + "0.315985, 0.323505, 0.329795, 0.343645, 0.383345, 0.449165, 0.580525", \ + "0.320025, 0.327545, 0.333835, 0.347685, 0.387385, 0.453205, 0.584565", \ + "0.333075, 0.340595, 0.346885, 0.360735, 0.400435, 0.466255, 0.597615", \ + "0.347425, 0.354945, 0.361235, 0.375085, 0.414785, 0.480605, 0.611965", \ + "0.404885, 0.412405, 0.418695, 0.432545, 0.472245, 0.538065, 0.669425", \ + "0.488815, 0.496335, 0.502625, 0.516475, 0.556175, 0.621995, 0.753355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275055, 0.282055, 0.288015, 0.301285, 0.339465, 0.403095, 0.530075", \ + "0.277765, 0.284765, 0.290725, 0.303995, 0.342175, 0.405805, 0.532785", \ + "0.281655, 0.288655, 0.294615, 0.307885, 0.346065, 0.409695, 0.536675", \ + "0.294705, 0.301705, 0.307665, 0.320935, 0.359115, 0.422745, 0.549725", \ + "0.309035, 0.316035, 0.321995, 0.335265, 0.373445, 0.437075, 0.564055", \ + "0.366185, 0.373185, 0.379145, 0.392415, 0.430595, 0.494225, 0.621205", \ + "0.450225, 0.457225, 0.463185, 0.476455, 0.514635, 0.578265, 0.705245" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305416, 0.312936, 0.319186, 0.333046, 0.372726, 0.440106, 0.571526", \ + "0.310406, 0.317926, 0.324176, 0.338036, 0.377716, 0.445096, 0.576516", \ + "0.312846, 0.320366, 0.326616, 0.340476, 0.380156, 0.447536, 0.578956", \ + "0.322906, 0.330426, 0.336676, 0.350536, 0.390216, 0.457596, 0.589016", \ + "0.336236, 0.343756, 0.350006, 0.363866, 0.403546, 0.470926, 0.602346", \ + "0.393596, 0.401116, 0.407366, 0.421226, 0.460906, 0.528286, 0.659706", \ + "0.467716, 0.475236, 0.481486, 0.495346, 0.535026, 0.602406, 0.733826" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.267570, 0.274620, 0.280460, 0.293810, 0.331900, 0.396840, 0.523860", \ + "0.272560, 0.279610, 0.285450, 0.298800, 0.336890, 0.401830, 0.528850", \ + "0.274690, 0.281740, 0.287580, 0.300930, 0.339020, 0.403960, 0.530980", \ + "0.285130, 0.292180, 0.298020, 0.311370, 0.349460, 0.414400, 0.541420", \ + "0.298150, 0.305200, 0.311040, 0.324390, 0.362480, 0.427420, 0.554440", \ + "0.355700, 0.362750, 0.368590, 0.381940, 0.420030, 0.484970, 0.611990", \ + "0.429650, 0.436700, 0.442540, 0.455890, 0.493980, 0.558920, 0.685940" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.324348, 0.330448, 0.335518, 0.346398, 0.375228, 0.421518, 0.513298", \ + "0.327828, 0.333928, 0.338998, 0.349878, 0.378708, 0.424998, 0.516778", \ + "0.331688, 0.337788, 0.342858, 0.353738, 0.382568, 0.428858, 0.520638", \ + "0.343508, 0.349608, 0.354678, 0.365558, 0.394388, 0.440678, 0.532458", \ + "0.357388, 0.363488, 0.368558, 0.379438, 0.408268, 0.454558, 0.546338", \ + "0.415368, 0.421468, 0.426538, 0.437418, 0.466248, 0.512538, 0.604318", \ + "0.500708, 0.506808, 0.511878, 0.522758, 0.551588, 0.597878, 0.689658" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287093, 0.293103, 0.298053, 0.308763, 0.337283, 0.383143, 0.474403", \ + "0.290343, 0.296353, 0.301303, 0.312013, 0.340533, 0.386393, 0.477653", \ + "0.294233, 0.300243, 0.305193, 0.315903, 0.344423, 0.390283, 0.481543", \ + "0.306093, 0.312103, 0.317053, 0.327763, 0.356283, 0.402143, 0.493403", \ + "0.319943, 0.325953, 0.330903, 0.341613, 0.370133, 0.415993, 0.507253", \ + "0.378163, 0.384173, 0.389123, 0.399833, 0.428353, 0.474213, 0.565473", \ + "0.463453, 0.469463, 0.474413, 0.485123, 0.513643, 0.559503, 0.650763" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358020, 0.364160, 0.369190, 0.380540, 0.409380, 0.455570, 0.546840", \ + "0.359730, 0.365870, 0.370900, 0.382250, 0.411090, 0.457280, 0.548550", \ + "0.364180, 0.370320, 0.375350, 0.386700, 0.415540, 0.461730, 0.553000", \ + "0.376760, 0.382900, 0.387930, 0.399280, 0.428120, 0.474310, 0.565580", \ + "0.391260, 0.397400, 0.402430, 0.413780, 0.442620, 0.488810, 0.580080", \ + "0.442820, 0.448960, 0.453990, 0.465340, 0.494180, 0.540370, 0.631640", \ + "0.518370, 0.524510, 0.529540, 0.540890, 0.569730, 0.615920, 0.707190" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.317230, 0.323280, 0.328150, 0.339620, 0.368130, 0.414020, 0.504410", \ + "0.319160, 0.325210, 0.330080, 0.341550, 0.370060, 0.415950, 0.506340", \ + "0.323700, 0.329750, 0.334620, 0.346090, 0.374600, 0.420490, 0.510880", \ + "0.336050, 0.342100, 0.346970, 0.358440, 0.386950, 0.432840, 0.523230", \ + "0.350670, 0.356720, 0.361590, 0.373060, 0.401570, 0.447460, 0.537850", \ + "0.402340, 0.408390, 0.413260, 0.424730, 0.453240, 0.499130, 0.589520", \ + "0.477660, 0.483710, 0.488580, 0.500050, 0.528560, 0.574450, 0.664840" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261", \ + "0.024083, 0.030310, 0.036313, 0.051596, 0.101680, 0.188362, 0.361261" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.313645, 0.321165, 0.327455, 0.341305, 0.381005, 0.446825, 0.578185", \ + "0.315985, 0.323505, 0.329795, 0.343645, 0.383345, 0.449165, 0.580525", \ + "0.320025, 0.327545, 0.333835, 0.347685, 0.387385, 0.453205, 0.584565", \ + "0.333075, 0.340595, 0.346885, 0.360735, 0.400435, 0.466255, 0.597615", \ + "0.347425, 0.354945, 0.361235, 0.375085, 0.414785, 0.480605, 0.611965", \ + "0.404885, 0.412405, 0.418695, 0.432545, 0.472245, 0.538065, 0.669425", \ + "0.488815, 0.496335, 0.502625, 0.516475, 0.556175, 0.621995, 0.753355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.275055, 0.282055, 0.288015, 0.301285, 0.339465, 0.403095, 0.530075", \ + "0.277765, 0.284765, 0.290725, 0.303995, 0.342175, 0.405805, 0.532785", \ + "0.281655, 0.288655, 0.294615, 0.307885, 0.346065, 0.409695, 0.536675", \ + "0.294705, 0.301705, 0.307665, 0.320935, 0.359115, 0.422745, 0.549725", \ + "0.309035, 0.316035, 0.321995, 0.335265, 0.373445, 0.437075, 0.564055", \ + "0.366185, 0.373185, 0.379145, 0.392415, 0.430595, 0.494225, 0.621205", \ + "0.450225, 0.457225, 0.463185, 0.476455, 0.514635, 0.578265, 0.705245" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972", \ + "0.024338, 0.031654, 0.039626, 0.061705, 0.131190, 0.249627, 0.488972" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305416, 0.312936, 0.319186, 0.333046, 0.372726, 0.440106, 0.571526", \ + "0.310406, 0.317926, 0.324176, 0.338036, 0.377716, 0.445096, 0.576516", \ + "0.312846, 0.320366, 0.326616, 0.340476, 0.380156, 0.447536, 0.578956", \ + "0.322906, 0.330426, 0.336676, 0.350536, 0.390216, 0.457596, 0.589016", \ + "0.336236, 0.343756, 0.350006, 0.363866, 0.403546, 0.470926, 0.602346", \ + "0.393596, 0.401116, 0.407366, 0.421226, 0.460906, 0.528286, 0.659706", \ + "0.467716, 0.475236, 0.481486, 0.495346, 0.535026, 0.602406, 0.733826" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.267570, 0.274620, 0.280460, 0.293810, 0.331900, 0.396840, 0.523860", \ + "0.272560, 0.279610, 0.285450, 0.298800, 0.336890, 0.401830, 0.528850", \ + "0.274690, 0.281740, 0.287580, 0.300930, 0.339020, 0.403960, 0.530980", \ + "0.285130, 0.292180, 0.298020, 0.311370, 0.349460, 0.414400, 0.541420", \ + "0.298150, 0.305200, 0.311040, 0.324390, 0.362480, 0.427420, 0.554440", \ + "0.355700, 0.362750, 0.368590, 0.381940, 0.420030, 0.484970, 0.611990", \ + "0.429650, 0.436700, 0.442540, 0.455890, 0.493980, 0.558920, 0.685940" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328", \ + "0.024293, 0.031686, 0.039361, 0.060940, 0.131293, 0.250596, 0.488328" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.324348, 0.330448, 0.335518, 0.346398, 0.375228, 0.421518, 0.513298", \ + "0.327828, 0.333928, 0.338998, 0.349878, 0.378708, 0.424998, 0.516778", \ + "0.331688, 0.337788, 0.342858, 0.353738, 0.382568, 0.428858, 0.520638", \ + "0.343508, 0.349608, 0.354678, 0.365558, 0.394388, 0.440678, 0.532458", \ + "0.357388, 0.363488, 0.368558, 0.379438, 0.408268, 0.454558, 0.546338", \ + "0.415368, 0.421468, 0.426538, 0.437418, 0.466248, 0.512538, 0.604318", \ + "0.500708, 0.506808, 0.511878, 0.522758, 0.551588, 0.597878, 0.689658" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.287093, 0.293103, 0.298053, 0.308763, 0.337283, 0.383143, 0.474403", \ + "0.290343, 0.296353, 0.301303, 0.312013, 0.340533, 0.386393, 0.477653", \ + "0.294233, 0.300243, 0.305193, 0.315903, 0.344423, 0.390283, 0.481543", \ + "0.306093, 0.312103, 0.317053, 0.327763, 0.356283, 0.402143, 0.493403", \ + "0.319943, 0.325953, 0.330903, 0.341613, 0.370133, 0.415993, 0.507253", \ + "0.378163, 0.384173, 0.389123, 0.399833, 0.428353, 0.474213, 0.565473", \ + "0.463453, 0.469463, 0.474413, 0.485123, 0.513643, 0.559503, 0.650763" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555", \ + "0.024180, 0.030489, 0.036536, 0.052316, 0.101737, 0.186271, 0.360555" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316, 0.014316", \ + "0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318, 0.014318", \ + "0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332, 0.014332", \ + "0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346, 0.014346", \ + "0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361, 0.014361", \ + "0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375, 0.014375", \ + "0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389, 0.014389" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863, 0.015863", \ + "0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879, 0.015879", \ + "0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895, 0.015895", \ + "0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911, 0.015911", \ + "0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927, 0.015927", \ + "0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943, 0.015943", \ + "0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958, 0.015958" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x19_wm0_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.502800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.590474, 0.596254, 0.606204, 0.621574, 0.653144, 0.708334, 0.816024", \ + "0.590894, 0.596674, 0.606624, 0.621994, 0.653564, 0.708754, 0.816444", \ + "0.595514, 0.601294, 0.611244, 0.626614, 0.658184, 0.713374, 0.821064", \ + "0.604294, 0.610074, 0.620024, 0.635394, 0.666964, 0.722154, 0.829844", \ + "0.615664, 0.621444, 0.631394, 0.646764, 0.678334, 0.733524, 0.841214", \ + "0.661434, 0.667214, 0.677164, 0.692534, 0.724104, 0.779294, 0.886984", \ + "0.731244, 0.737024, 0.746974, 0.762344, 0.793914, 0.849104, 0.956794" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.485810, 0.493200, 0.503550, 0.518790, 0.550860, 0.605480, 0.713570", \ + "0.487970, 0.495360, 0.505710, 0.520950, 0.553020, 0.607640, 0.715730", \ + "0.492190, 0.499580, 0.509930, 0.525170, 0.557240, 0.611860, 0.719950", \ + "0.501420, 0.508810, 0.519160, 0.534400, 0.566470, 0.621090, 0.729180", \ + "0.512180, 0.519570, 0.529920, 0.545160, 0.577230, 0.631850, 0.739940", \ + "0.559450, 0.566840, 0.577190, 0.592430, 0.624500, 0.679120, 0.787210", \ + "0.626980, 0.634370, 0.644720, 0.659960, 0.692030, 0.746650, 0.854740" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.547093, 0.555703, 0.567633, 0.586223, 0.624243, 0.692493, 0.827553", \ + "0.548283, 0.556893, 0.568823, 0.587413, 0.625433, 0.693683, 0.828743", \ + "0.553293, 0.561903, 0.573833, 0.592423, 0.630443, 0.698693, 0.833753", \ + "0.562363, 0.570973, 0.582903, 0.601493, 0.639513, 0.707763, 0.842823", \ + "0.572973, 0.581583, 0.593513, 0.612103, 0.650123, 0.718373, 0.853433", \ + "0.620693, 0.629303, 0.641233, 0.659823, 0.697843, 0.766093, 0.901153", \ + "0.687633, 0.696243, 0.708173, 0.726763, 0.764783, 0.833033, 0.968093" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.452200, 0.460420, 0.472370, 0.491870, 0.530500, 0.597910, 0.733350", \ + "0.453510, 0.461730, 0.473680, 0.493180, 0.531810, 0.599220, 0.734660", \ + "0.458170, 0.466390, 0.478340, 0.497840, 0.536470, 0.603880, 0.739320", \ + "0.466750, 0.474970, 0.486920, 0.506420, 0.545050, 0.612460, 0.747900", \ + "0.477610, 0.485830, 0.497780, 0.517280, 0.555910, 0.623320, 0.758760", \ + "0.525550, 0.533770, 0.545720, 0.565220, 0.603850, 0.671260, 0.806700", \ + "0.592430, 0.600650, 0.612600, 0.632100, 0.670730, 0.738140, 0.873580" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.592986, 0.598766, 0.608716, 0.624086, 0.655656, 0.710846, 0.818536", \ + "0.593406, 0.599186, 0.609136, 0.624506, 0.656076, 0.711266, 0.818956", \ + "0.598026, 0.603806, 0.613756, 0.629126, 0.660696, 0.715886, 0.823576", \ + "0.606806, 0.612586, 0.622536, 0.637906, 0.669476, 0.724666, 0.832356", \ + "0.618176, 0.623956, 0.633906, 0.649276, 0.680846, 0.736036, 0.843726", \ + "0.663946, 0.669726, 0.679676, 0.695046, 0.726616, 0.781806, 0.889496", \ + "0.733756, 0.739536, 0.749486, 0.764856, 0.796426, 0.851616, 0.959306" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487945, 0.495335, 0.505685, 0.520925, 0.552995, 0.607615, 0.715705", \ + "0.490105, 0.497495, 0.507845, 0.523085, 0.555155, 0.609775, 0.717865", \ + "0.494325, 0.501715, 0.512065, 0.527305, 0.559375, 0.613995, 0.722085", \ + "0.503555, 0.510945, 0.521295, 0.536535, 0.568605, 0.623225, 0.731315", \ + "0.514315, 0.521705, 0.532055, 0.547295, 0.579365, 0.633985, 0.742075", \ + "0.561585, 0.568975, 0.579325, 0.594565, 0.626635, 0.681255, 0.789345", \ + "0.629115, 0.636505, 0.646855, 0.662095, 0.694165, 0.748785, 0.856875" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.549605, 0.558215, 0.570145, 0.588735, 0.626755, 0.695005, 0.830065", \ + "0.550795, 0.559405, 0.571335, 0.589925, 0.627945, 0.696195, 0.831255", \ + "0.555805, 0.564415, 0.576345, 0.594935, 0.632955, 0.701205, 0.836265", \ + "0.564875, 0.573485, 0.585415, 0.604005, 0.642025, 0.710275, 0.845335", \ + "0.575485, 0.584095, 0.596025, 0.614615, 0.652635, 0.720885, 0.855945", \ + "0.623205, 0.631815, 0.643745, 0.662335, 0.700355, 0.768605, 0.903665", \ + "0.690145, 0.698755, 0.710685, 0.729275, 0.767295, 0.835545, 0.970605" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.454335, 0.462555, 0.474505, 0.494005, 0.532635, 0.600045, 0.735485", \ + "0.455645, 0.463865, 0.475815, 0.495315, 0.533945, 0.601355, 0.736795", \ + "0.460305, 0.468525, 0.480475, 0.499975, 0.538605, 0.606015, 0.741455", \ + "0.468885, 0.477105, 0.489055, 0.508555, 0.547185, 0.614595, 0.750035", \ + "0.479745, 0.487965, 0.499915, 0.519415, 0.558045, 0.625455, 0.760895", \ + "0.527685, 0.535905, 0.547855, 0.567355, 0.605985, 0.673395, 0.808835", \ + "0.594565, 0.602785, 0.614735, 0.634235, 0.672865, 0.740275, 0.875715" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.595875, 0.601655, 0.611605, 0.626975, 0.658545, 0.713735, 0.821425", \ + "0.596295, 0.602075, 0.612025, 0.627395, 0.658965, 0.714155, 0.821845", \ + "0.600915, 0.606695, 0.616645, 0.632015, 0.663585, 0.718775, 0.826465", \ + "0.609695, 0.615475, 0.625425, 0.640795, 0.672365, 0.727555, 0.835245", \ + "0.621065, 0.626845, 0.636795, 0.652165, 0.683735, 0.738925, 0.846615", \ + "0.666835, 0.672615, 0.682565, 0.697935, 0.729505, 0.784695, 0.892385", \ + "0.736645, 0.742425, 0.752375, 0.767745, 0.799315, 0.854505, 0.962195" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.490400, 0.497790, 0.508140, 0.523380, 0.555451, 0.610071, 0.718161", \ + "0.492561, 0.499951, 0.510301, 0.525541, 0.557610, 0.612230, 0.720321", \ + "0.496781, 0.504171, 0.514521, 0.529761, 0.561830, 0.616450, 0.724541", \ + "0.506011, 0.513401, 0.523750, 0.538991, 0.571061, 0.625681, 0.733770", \ + "0.516770, 0.524161, 0.534510, 0.549751, 0.581821, 0.636441, 0.744531", \ + "0.564041, 0.571431, 0.581781, 0.597021, 0.629090, 0.683710, 0.791800", \ + "0.631571, 0.638961, 0.649310, 0.664551, 0.696621, 0.751241, 0.859330" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.552494, 0.561104, 0.573034, 0.591624, 0.629644, 0.697894, 0.832954", \ + "0.553684, 0.562294, 0.574224, 0.592814, 0.630834, 0.699084, 0.834144", \ + "0.558694, 0.567304, 0.579234, 0.597824, 0.635844, 0.704094, 0.839154", \ + "0.567764, 0.576374, 0.588304, 0.606894, 0.644914, 0.713164, 0.848224", \ + "0.578374, 0.586984, 0.598914, 0.617504, 0.655524, 0.723774, 0.858834", \ + "0.626094, 0.634704, 0.646634, 0.665224, 0.703244, 0.771494, 0.906554", \ + "0.693034, 0.701644, 0.713574, 0.732164, 0.770184, 0.838434, 0.973494" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.456790, 0.465010, 0.476961, 0.496461, 0.535091, 0.602501, 0.737941", \ + "0.458101, 0.466321, 0.478271, 0.497771, 0.536400, 0.603811, 0.739251", \ + "0.462761, 0.470981, 0.482931, 0.502431, 0.541060, 0.608471, 0.743911", \ + "0.471341, 0.479560, 0.491511, 0.511011, 0.549641, 0.617050, 0.752490", \ + "0.482201, 0.490421, 0.502371, 0.521871, 0.560500, 0.627911, 0.763351", \ + "0.530141, 0.538361, 0.550311, 0.569811, 0.608441, 0.675851, 0.811291", \ + "0.597020, 0.605241, 0.617191, 0.636691, 0.675321, 0.742731, 0.878171" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.597937, 0.603717, 0.613667, 0.629037, 0.660607, 0.715797, 0.823487", \ + "0.598357, 0.604137, 0.614087, 0.629457, 0.661027, 0.716217, 0.823907", \ + "0.602977, 0.608757, 0.618707, 0.634077, 0.665647, 0.720837, 0.828527", \ + "0.611757, 0.617537, 0.627487, 0.642857, 0.674427, 0.729617, 0.837307", \ + "0.623127, 0.628907, 0.638857, 0.654227, 0.685797, 0.740987, 0.848677", \ + "0.668897, 0.674677, 0.684627, 0.699997, 0.731567, 0.786757, 0.894447", \ + "0.738707, 0.744487, 0.754437, 0.769807, 0.801377, 0.856567, 0.964257" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.492149, 0.499539, 0.509889, 0.525129, 0.557200, 0.611820, 0.719910", \ + "0.494310, 0.501700, 0.512049, 0.527290, 0.559359, 0.613979, 0.722069", \ + "0.498530, 0.505920, 0.516270, 0.531510, 0.563579, 0.618199, 0.726289", \ + "0.507759, 0.515149, 0.525499, 0.540739, 0.572810, 0.627430, 0.735519", \ + "0.518519, 0.525909, 0.536259, 0.551499, 0.583570, 0.638190, 0.746280", \ + "0.565790, 0.573180, 0.583529, 0.598770, 0.630839, 0.685459, 0.793549", \ + "0.633319, 0.640709, 0.651059, 0.666299, 0.698370, 0.752990, 0.861079" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.554551, 0.563161, 0.575091, 0.593681, 0.631701, 0.699951, 0.835011", \ + "0.555741, 0.564351, 0.576281, 0.594871, 0.632891, 0.701141, 0.836201", \ + "0.560751, 0.569361, 0.581291, 0.599881, 0.637901, 0.706151, 0.841211", \ + "0.569821, 0.578431, 0.590361, 0.608951, 0.646971, 0.715221, 0.850281", \ + "0.580431, 0.589041, 0.600971, 0.619561, 0.657581, 0.725831, 0.860891", \ + "0.628151, 0.636761, 0.648691, 0.667281, 0.705301, 0.773551, 0.908611", \ + "0.695091, 0.703701, 0.715631, 0.734221, 0.772241, 0.840491, 0.975551" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.458543, 0.466763, 0.478713, 0.498213, 0.536843, 0.604253, 0.739693", \ + "0.459853, 0.468073, 0.480023, 0.499523, 0.538153, 0.605563, 0.741003", \ + "0.464513, 0.472733, 0.484683, 0.504183, 0.542813, 0.610223, 0.745663", \ + "0.473093, 0.481313, 0.493263, 0.512763, 0.551393, 0.618803, 0.754243", \ + "0.483953, 0.492173, 0.504123, 0.523623, 0.562253, 0.629663, 0.765103", \ + "0.531893, 0.540113, 0.552063, 0.571563, 0.610193, 0.677603, 0.813043", \ + "0.598773, 0.606993, 0.618943, 0.638443, 0.677073, 0.744483, 0.879923" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.715699, 0.721479, 0.731429, 0.746799, 0.778369, 0.833559, 0.941249", \ + "0.716119, 0.721899, 0.731849, 0.747219, 0.778789, 0.833979, 0.941669", \ + "0.720739, 0.726519, 0.736469, 0.751839, 0.783409, 0.838599, 0.946289", \ + "0.729519, 0.735299, 0.745249, 0.760619, 0.792189, 0.847379, 0.955069", \ + "0.740889, 0.746669, 0.756619, 0.771989, 0.803559, 0.858749, 0.966439", \ + "0.786659, 0.792439, 0.802389, 0.817759, 0.849329, 0.904519, 1.012209", \ + "0.856469, 0.862249, 0.872199, 0.887569, 0.919139, 0.974329, 1.082019" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.592247, 0.599637, 0.609987, 0.625227, 0.657297, 0.711917, 0.820007", \ + "0.594407, 0.601797, 0.612147, 0.627387, 0.659457, 0.714077, 0.822167", \ + "0.598627, 0.606017, 0.616367, 0.631607, 0.663677, 0.718297, 0.826387", \ + "0.607857, 0.615247, 0.625597, 0.640837, 0.672907, 0.727527, 0.835617", \ + "0.618617, 0.626007, 0.636357, 0.651597, 0.683667, 0.738287, 0.846377", \ + "0.665887, 0.673277, 0.683627, 0.698867, 0.730937, 0.785557, 0.893647", \ + "0.733417, 0.740807, 0.751157, 0.766397, 0.798467, 0.853087, 0.961177" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.672313, 0.680923, 0.692853, 0.711443, 0.749463, 0.817713, 0.952773", \ + "0.673503, 0.682113, 0.694043, 0.712633, 0.750653, 0.818903, 0.953963", \ + "0.678513, 0.687123, 0.699053, 0.717643, 0.755663, 0.823913, 0.958973", \ + "0.687583, 0.696193, 0.708123, 0.726713, 0.764733, 0.832983, 0.968043", \ + "0.698193, 0.706803, 0.718733, 0.737323, 0.775343, 0.843593, 0.978653", \ + "0.745913, 0.754523, 0.766453, 0.785043, 0.823063, 0.891313, 1.026373", \ + "0.812853, 0.821463, 0.833393, 0.851983, 0.890003, 0.958253, 1.093313" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.558641, 0.566861, 0.578811, 0.598311, 0.636941, 0.704351, 0.839791", \ + "0.559951, 0.568171, 0.580121, 0.599621, 0.638251, 0.705661, 0.841101", \ + "0.564611, 0.572831, 0.584781, 0.604281, 0.642911, 0.710321, 0.845761", \ + "0.573191, 0.581411, 0.593361, 0.612861, 0.651491, 0.718901, 0.854341", \ + "0.584051, 0.592271, 0.604221, 0.623721, 0.662351, 0.729761, 0.865201", \ + "0.631991, 0.640211, 0.652161, 0.671661, 0.710291, 0.777701, 0.913141", \ + "0.698871, 0.707091, 0.719041, 0.738541, 0.777171, 0.844581, 0.980021" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.830470, 0.836250, 0.846200, 0.861570, 0.893140, 0.948330, 1.056020", \ + "0.830890, 0.836670, 0.846620, 0.861990, 0.893560, 0.948750, 1.056440", \ + "0.835510, 0.841290, 0.851240, 0.866610, 0.898180, 0.953370, 1.061060", \ + "0.844290, 0.850070, 0.860020, 0.875390, 0.906960, 0.962150, 1.069840", \ + "0.855660, 0.861440, 0.871390, 0.886760, 0.918330, 0.973520, 1.081210", \ + "0.901430, 0.907210, 0.917160, 0.932530, 0.964100, 1.019290, 1.126980", \ + "0.971240, 0.977020, 0.986970, 1.002340, 1.033910, 1.089100, 1.196790" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.689802, 0.697193, 0.707542, 0.722783, 0.754853, 0.809473, 0.917563", \ + "0.691963, 0.699353, 0.709703, 0.724943, 0.757012, 0.811632, 0.919723", \ + "0.696183, 0.703573, 0.713923, 0.729163, 0.761232, 0.815852, 0.923942", \ + "0.705413, 0.712803, 0.723152, 0.738393, 0.770463, 0.825083, 0.933172", \ + "0.716172, 0.723563, 0.733912, 0.749153, 0.781223, 0.835843, 0.943933", \ + "0.763443, 0.770833, 0.781183, 0.796423, 0.828492, 0.883112, 0.991202", \ + "0.830973, 0.838363, 0.848712, 0.863952, 0.896022, 0.950643, 1.058733" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.787084, 0.795694, 0.807624, 0.826214, 0.864234, 0.932484, 1.067544", \ + "0.788274, 0.796884, 0.808814, 0.827404, 0.865424, 0.933674, 1.068734", \ + "0.793284, 0.801894, 0.813824, 0.832414, 0.870434, 0.938684, 1.073744", \ + "0.802354, 0.810964, 0.822894, 0.841484, 0.879504, 0.947754, 1.082814", \ + "0.812964, 0.821574, 0.833504, 0.852094, 0.890114, 0.958364, 1.093424", \ + "0.860684, 0.869294, 0.881224, 0.899814, 0.937834, 1.006084, 1.141144", \ + "0.927624, 0.936234, 0.948164, 0.966754, 1.004774, 1.073024, 1.208084" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.656196, 0.664416, 0.676366, 0.695866, 0.734496, 0.801906, 0.937346", \ + "0.657506, 0.665726, 0.677676, 0.697176, 0.735806, 0.803216, 0.938656", \ + "0.662166, 0.670386, 0.682336, 0.701836, 0.740466, 0.807876, 0.943316", \ + "0.670746, 0.678966, 0.690916, 0.710416, 0.749046, 0.816456, 0.951896", \ + "0.681606, 0.689826, 0.701776, 0.721276, 0.759906, 0.827316, 0.962756", \ + "0.729546, 0.737766, 0.749716, 0.769216, 0.807846, 0.875256, 1.010696", \ + "0.796426, 0.804646, 0.816596, 0.836096, 0.874726, 0.942136, 1.077576" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.962109, 0.967889, 0.977839, 0.993209, 1.024779, 1.079969, 1.187659", \ + "0.962529, 0.968309, 0.978259, 0.993629, 1.025199, 1.080389, 1.188079", \ + "0.967149, 0.972929, 0.982879, 0.998249, 1.029819, 1.085009, 1.192699", \ + "0.975929, 0.981709, 0.991659, 1.007029, 1.038599, 1.093789, 1.201479", \ + "0.987299, 0.993079, 1.003029, 1.018399, 1.049969, 1.105159, 1.212849", \ + "1.033069, 1.038849, 1.048799, 1.064169, 1.095739, 1.150929, 1.258619", \ + "1.102879, 1.108659, 1.118609, 1.133979, 1.165549, 1.220739, 1.328429" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.801704, 0.809094, 0.819444, 0.834684, 0.866754, 0.921374, 1.029464", \ + "0.803864, 0.811254, 0.821604, 0.836844, 0.868914, 0.923534, 1.031624", \ + "0.808084, 0.815474, 0.825824, 0.841064, 0.873134, 0.927754, 1.035844", \ + "0.817314, 0.824704, 0.835054, 0.850294, 0.882364, 0.936984, 1.045074", \ + "0.828074, 0.835464, 0.845814, 0.861054, 0.893124, 0.947744, 1.055834", \ + "0.875344, 0.882734, 0.893084, 0.908324, 0.940394, 0.995014, 1.103104", \ + "0.942874, 0.950264, 0.960614, 0.975854, 1.007924, 1.062544, 1.170634" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.918744, 0.927354, 0.939284, 0.957874, 0.995894, 1.064144, 1.199204", \ + "0.919934, 0.928544, 0.940474, 0.959064, 0.997084, 1.065334, 1.200394", \ + "0.924944, 0.933554, 0.945484, 0.964074, 1.002094, 1.070344, 1.205404", \ + "0.934014, 0.942624, 0.954554, 0.973144, 1.011164, 1.079414, 1.214474", \ + "0.944624, 0.953234, 0.965164, 0.983754, 1.021774, 1.090024, 1.225084", \ + "0.992344, 1.000954, 1.012884, 1.031474, 1.069494, 1.137744, 1.272804", \ + "1.059284, 1.067894, 1.079824, 1.098414, 1.136434, 1.204684, 1.339744" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.768107, 0.776327, 0.788277, 0.807777, 0.846407, 0.913817, 1.049257", \ + "0.769417, 0.777637, 0.789587, 0.809087, 0.847717, 0.915127, 1.050567", \ + "0.774077, 0.782297, 0.794247, 0.813747, 0.852377, 0.919787, 1.055227", \ + "0.782657, 0.790877, 0.802827, 0.822327, 0.860957, 0.928367, 1.063807", \ + "0.793517, 0.801737, 0.813687, 0.833187, 0.871817, 0.939227, 1.074667", \ + "0.841457, 0.849677, 0.861627, 0.881127, 0.919757, 0.987167, 1.122607", \ + "0.908337, 0.916557, 0.928507, 0.948007, 0.986637, 1.054047, 1.189487" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.076344, 1.082124, 1.092074, 1.107444, 1.139014, 1.194204, 1.301894", \ + "1.076764, 1.082544, 1.092494, 1.107864, 1.139434, 1.194624, 1.302314", \ + "1.081384, 1.087164, 1.097114, 1.112484, 1.144054, 1.199244, 1.306934", \ + "1.090164, 1.095944, 1.105894, 1.121264, 1.152834, 1.208024, 1.315714", \ + "1.101534, 1.107314, 1.117264, 1.132634, 1.164204, 1.219394, 1.327084", \ + "1.147304, 1.153084, 1.163034, 1.178404, 1.209974, 1.265164, 1.372854", \ + "1.217114, 1.222894, 1.232844, 1.248214, 1.279784, 1.334974, 1.442664" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.898792, 0.906182, 0.916532, 0.931772, 0.963842, 1.018463, 1.126553", \ + "0.900953, 0.908343, 0.918692, 0.933933, 0.966002, 1.020622, 1.128712", \ + "0.905173, 0.912563, 0.922912, 0.938152, 0.970222, 1.024842, 1.132932", \ + "0.914402, 0.921792, 0.932142, 0.947382, 0.979453, 1.034072, 1.142162", \ + "0.925162, 0.932552, 0.942902, 0.958142, 0.990212, 1.044833, 1.152923", \ + "0.972432, 0.979823, 0.990172, 1.005413, 1.037482, 1.092102, 1.200192", \ + "1.039962, 1.047352, 1.057702, 1.072942, 1.105013, 1.159633, 1.267722" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.032943, 1.041553, 1.053483, 1.072073, 1.110093, 1.178343, 1.313403", \ + "1.034133, 1.042743, 1.054673, 1.073263, 1.111283, 1.179533, 1.314593", \ + "1.039143, 1.047753, 1.059683, 1.078273, 1.116293, 1.184543, 1.319603", \ + "1.048213, 1.056823, 1.068753, 1.087343, 1.125363, 1.193613, 1.328673", \ + "1.058823, 1.067433, 1.079363, 1.097953, 1.135973, 1.204223, 1.339283", \ + "1.106543, 1.115153, 1.127083, 1.145673, 1.183693, 1.251943, 1.387003", \ + "1.173483, 1.182093, 1.194023, 1.212613, 1.250633, 1.318883, 1.453943" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.865174, 0.873394, 0.885344, 0.904844, 0.943474, 1.010884, 1.146324", \ + "0.866484, 0.874704, 0.886654, 0.906154, 0.944784, 1.012194, 1.147634", \ + "0.871144, 0.879364, 0.891314, 0.910814, 0.949444, 1.016854, 1.152294", \ + "0.879724, 0.887944, 0.899894, 0.919394, 0.958024, 1.025434, 1.160874", \ + "0.890584, 0.898804, 0.910754, 0.930254, 0.968884, 1.036294, 1.171734", \ + "0.938524, 0.946744, 0.958694, 0.978194, 1.016824, 1.084234, 1.219674", \ + "1.005404, 1.013624, 1.025574, 1.045074, 1.083704, 1.151114, 1.286554" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.590474, 0.596254, 0.606204, 0.621574, 0.653144, 0.708334, 0.816024", \ + "0.590894, 0.596674, 0.606624, 0.621994, 0.653564, 0.708754, 0.816444", \ + "0.595514, 0.601294, 0.611244, 0.626614, 0.658184, 0.713374, 0.821064", \ + "0.604294, 0.610074, 0.620024, 0.635394, 0.666964, 0.722154, 0.829844", \ + "0.615664, 0.621444, 0.631394, 0.646764, 0.678334, 0.733524, 0.841214", \ + "0.661434, 0.667214, 0.677164, 0.692534, 0.724104, 0.779294, 0.886984", \ + "0.731244, 0.737024, 0.746974, 0.762344, 0.793914, 0.849104, 0.956794" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.485810, 0.493200, 0.503550, 0.518790, 0.550860, 0.605480, 0.713570", \ + "0.487970, 0.495360, 0.505710, 0.520950, 0.553020, 0.607640, 0.715730", \ + "0.492190, 0.499580, 0.509930, 0.525170, 0.557240, 0.611860, 0.719950", \ + "0.501420, 0.508810, 0.519160, 0.534400, 0.566470, 0.621090, 0.729180", \ + "0.512180, 0.519570, 0.529920, 0.545160, 0.577230, 0.631850, 0.739940", \ + "0.559450, 0.566840, 0.577190, 0.592430, 0.624500, 0.679120, 0.787210", \ + "0.626980, 0.634370, 0.644720, 0.659960, 0.692030, 0.746650, 0.854740" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.547093, 0.555703, 0.567633, 0.586223, 0.624243, 0.692493, 0.827553", \ + "0.548283, 0.556893, 0.568823, 0.587413, 0.625433, 0.693683, 0.828743", \ + "0.553293, 0.561903, 0.573833, 0.592423, 0.630443, 0.698693, 0.833753", \ + "0.562363, 0.570973, 0.582903, 0.601493, 0.639513, 0.707763, 0.842823", \ + "0.572973, 0.581583, 0.593513, 0.612103, 0.650123, 0.718373, 0.853433", \ + "0.620693, 0.629303, 0.641233, 0.659823, 0.697843, 0.766093, 0.901153", \ + "0.687633, 0.696243, 0.708173, 0.726763, 0.764783, 0.833033, 0.968093" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.452200, 0.460420, 0.472370, 0.491870, 0.530500, 0.597910, 0.733350", \ + "0.453510, 0.461730, 0.473680, 0.493180, 0.531810, 0.599220, 0.734660", \ + "0.458170, 0.466390, 0.478340, 0.497840, 0.536470, 0.603880, 0.739320", \ + "0.466750, 0.474970, 0.486920, 0.506420, 0.545050, 0.612460, 0.747900", \ + "0.477610, 0.485830, 0.497780, 0.517280, 0.555910, 0.623320, 0.758760", \ + "0.525550, 0.533770, 0.545720, 0.565220, 0.603850, 0.671260, 0.806700", \ + "0.592430, 0.600650, 0.612600, 0.632100, 0.670730, 0.738140, 0.873580" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.592986, 0.598766, 0.608716, 0.624086, 0.655656, 0.710846, 0.818536", \ + "0.593406, 0.599186, 0.609136, 0.624506, 0.656076, 0.711266, 0.818956", \ + "0.598026, 0.603806, 0.613756, 0.629126, 0.660696, 0.715886, 0.823576", \ + "0.606806, 0.612586, 0.622536, 0.637906, 0.669476, 0.724666, 0.832356", \ + "0.618176, 0.623956, 0.633906, 0.649276, 0.680846, 0.736036, 0.843726", \ + "0.663946, 0.669726, 0.679676, 0.695046, 0.726616, 0.781806, 0.889496", \ + "0.733756, 0.739536, 0.749486, 0.764856, 0.796426, 0.851616, 0.959306" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.487945, 0.495335, 0.505685, 0.520925, 0.552995, 0.607615, 0.715705", \ + "0.490105, 0.497495, 0.507845, 0.523085, 0.555155, 0.609775, 0.717865", \ + "0.494325, 0.501715, 0.512065, 0.527305, 0.559375, 0.613995, 0.722085", \ + "0.503555, 0.510945, 0.521295, 0.536535, 0.568605, 0.623225, 0.731315", \ + "0.514315, 0.521705, 0.532055, 0.547295, 0.579365, 0.633985, 0.742075", \ + "0.561585, 0.568975, 0.579325, 0.594565, 0.626635, 0.681255, 0.789345", \ + "0.629115, 0.636505, 0.646855, 0.662095, 0.694165, 0.748785, 0.856875" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.549605, 0.558215, 0.570145, 0.588735, 0.626755, 0.695005, 0.830065", \ + "0.550795, 0.559405, 0.571335, 0.589925, 0.627945, 0.696195, 0.831255", \ + "0.555805, 0.564415, 0.576345, 0.594935, 0.632955, 0.701205, 0.836265", \ + "0.564875, 0.573485, 0.585415, 0.604005, 0.642025, 0.710275, 0.845335", \ + "0.575485, 0.584095, 0.596025, 0.614615, 0.652635, 0.720885, 0.855945", \ + "0.623205, 0.631815, 0.643745, 0.662335, 0.700355, 0.768605, 0.903665", \ + "0.690145, 0.698755, 0.710685, 0.729275, 0.767295, 0.835545, 0.970605" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.454335, 0.462555, 0.474505, 0.494005, 0.532635, 0.600045, 0.735485", \ + "0.455645, 0.463865, 0.475815, 0.495315, 0.533945, 0.601355, 0.736795", \ + "0.460305, 0.468525, 0.480475, 0.499975, 0.538605, 0.606015, 0.741455", \ + "0.468885, 0.477105, 0.489055, 0.508555, 0.547185, 0.614595, 0.750035", \ + "0.479745, 0.487965, 0.499915, 0.519415, 0.558045, 0.625455, 0.760895", \ + "0.527685, 0.535905, 0.547855, 0.567355, 0.605985, 0.673395, 0.808835", \ + "0.594565, 0.602785, 0.614735, 0.634235, 0.672865, 0.740275, 0.875715" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.595875, 0.601655, 0.611605, 0.626975, 0.658545, 0.713735, 0.821425", \ + "0.596295, 0.602075, 0.612025, 0.627395, 0.658965, 0.714155, 0.821845", \ + "0.600915, 0.606695, 0.616645, 0.632015, 0.663585, 0.718775, 0.826465", \ + "0.609695, 0.615475, 0.625425, 0.640795, 0.672365, 0.727555, 0.835245", \ + "0.621065, 0.626845, 0.636795, 0.652165, 0.683735, 0.738925, 0.846615", \ + "0.666835, 0.672615, 0.682565, 0.697935, 0.729505, 0.784695, 0.892385", \ + "0.736645, 0.742425, 0.752375, 0.767745, 0.799315, 0.854505, 0.962195" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.490400, 0.497790, 0.508140, 0.523380, 0.555451, 0.610071, 0.718161", \ + "0.492561, 0.499951, 0.510301, 0.525541, 0.557610, 0.612230, 0.720321", \ + "0.496781, 0.504171, 0.514521, 0.529761, 0.561830, 0.616450, 0.724541", \ + "0.506011, 0.513401, 0.523750, 0.538991, 0.571061, 0.625681, 0.733770", \ + "0.516770, 0.524161, 0.534510, 0.549751, 0.581821, 0.636441, 0.744531", \ + "0.564041, 0.571431, 0.581781, 0.597021, 0.629090, 0.683710, 0.791800", \ + "0.631571, 0.638961, 0.649310, 0.664551, 0.696621, 0.751241, 0.859330" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.552494, 0.561104, 0.573034, 0.591624, 0.629644, 0.697894, 0.832954", \ + "0.553684, 0.562294, 0.574224, 0.592814, 0.630834, 0.699084, 0.834144", \ + "0.558694, 0.567304, 0.579234, 0.597824, 0.635844, 0.704094, 0.839154", \ + "0.567764, 0.576374, 0.588304, 0.606894, 0.644914, 0.713164, 0.848224", \ + "0.578374, 0.586984, 0.598914, 0.617504, 0.655524, 0.723774, 0.858834", \ + "0.626094, 0.634704, 0.646634, 0.665224, 0.703244, 0.771494, 0.906554", \ + "0.693034, 0.701644, 0.713574, 0.732164, 0.770184, 0.838434, 0.973494" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.456790, 0.465010, 0.476961, 0.496461, 0.535091, 0.602501, 0.737941", \ + "0.458101, 0.466321, 0.478271, 0.497771, 0.536400, 0.603811, 0.739251", \ + "0.462761, 0.470981, 0.482931, 0.502431, 0.541060, 0.608471, 0.743911", \ + "0.471341, 0.479560, 0.491511, 0.511011, 0.549641, 0.617050, 0.752490", \ + "0.482201, 0.490421, 0.502371, 0.521871, 0.560500, 0.627911, 0.763351", \ + "0.530141, 0.538361, 0.550311, 0.569811, 0.608441, 0.675851, 0.811291", \ + "0.597020, 0.605241, 0.617191, 0.636691, 0.675321, 0.742731, 0.878171" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.597937, 0.603717, 0.613667, 0.629037, 0.660607, 0.715797, 0.823487", \ + "0.598357, 0.604137, 0.614087, 0.629457, 0.661027, 0.716217, 0.823907", \ + "0.602977, 0.608757, 0.618707, 0.634077, 0.665647, 0.720837, 0.828527", \ + "0.611757, 0.617537, 0.627487, 0.642857, 0.674427, 0.729617, 0.837307", \ + "0.623127, 0.628907, 0.638857, 0.654227, 0.685797, 0.740987, 0.848677", \ + "0.668897, 0.674677, 0.684627, 0.699997, 0.731567, 0.786757, 0.894447", \ + "0.738707, 0.744487, 0.754437, 0.769807, 0.801377, 0.856567, 0.964257" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.492149, 0.499539, 0.509889, 0.525129, 0.557200, 0.611820, 0.719910", \ + "0.494310, 0.501700, 0.512049, 0.527290, 0.559359, 0.613979, 0.722069", \ + "0.498530, 0.505920, 0.516270, 0.531510, 0.563579, 0.618199, 0.726289", \ + "0.507759, 0.515149, 0.525499, 0.540739, 0.572810, 0.627430, 0.735519", \ + "0.518519, 0.525909, 0.536259, 0.551499, 0.583570, 0.638190, 0.746280", \ + "0.565790, 0.573180, 0.583529, 0.598770, 0.630839, 0.685459, 0.793549", \ + "0.633319, 0.640709, 0.651059, 0.666299, 0.698370, 0.752990, 0.861079" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.554551, 0.563161, 0.575091, 0.593681, 0.631701, 0.699951, 0.835011", \ + "0.555741, 0.564351, 0.576281, 0.594871, 0.632891, 0.701141, 0.836201", \ + "0.560751, 0.569361, 0.581291, 0.599881, 0.637901, 0.706151, 0.841211", \ + "0.569821, 0.578431, 0.590361, 0.608951, 0.646971, 0.715221, 0.850281", \ + "0.580431, 0.589041, 0.600971, 0.619561, 0.657581, 0.725831, 0.860891", \ + "0.628151, 0.636761, 0.648691, 0.667281, 0.705301, 0.773551, 0.908611", \ + "0.695091, 0.703701, 0.715631, 0.734221, 0.772241, 0.840491, 0.975551" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.458543, 0.466763, 0.478713, 0.498213, 0.536843, 0.604253, 0.739693", \ + "0.459853, 0.468073, 0.480023, 0.499523, 0.538153, 0.605563, 0.741003", \ + "0.464513, 0.472733, 0.484683, 0.504183, 0.542813, 0.610223, 0.745663", \ + "0.473093, 0.481313, 0.493263, 0.512763, 0.551393, 0.618803, 0.754243", \ + "0.483953, 0.492173, 0.504123, 0.523623, 0.562253, 0.629663, 0.765103", \ + "0.531893, 0.540113, 0.552063, 0.571563, 0.610193, 0.677603, 0.813043", \ + "0.598773, 0.606993, 0.618943, 0.638443, 0.677073, 0.744483, 0.879923" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.715699, 0.721479, 0.731429, 0.746799, 0.778369, 0.833559, 0.941249", \ + "0.716119, 0.721899, 0.731849, 0.747219, 0.778789, 0.833979, 0.941669", \ + "0.720739, 0.726519, 0.736469, 0.751839, 0.783409, 0.838599, 0.946289", \ + "0.729519, 0.735299, 0.745249, 0.760619, 0.792189, 0.847379, 0.955069", \ + "0.740889, 0.746669, 0.756619, 0.771989, 0.803559, 0.858749, 0.966439", \ + "0.786659, 0.792439, 0.802389, 0.817759, 0.849329, 0.904519, 1.012209", \ + "0.856469, 0.862249, 0.872199, 0.887569, 0.919139, 0.974329, 1.082019" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.592247, 0.599637, 0.609987, 0.625227, 0.657297, 0.711917, 0.820007", \ + "0.594407, 0.601797, 0.612147, 0.627387, 0.659457, 0.714077, 0.822167", \ + "0.598627, 0.606017, 0.616367, 0.631607, 0.663677, 0.718297, 0.826387", \ + "0.607857, 0.615247, 0.625597, 0.640837, 0.672907, 0.727527, 0.835617", \ + "0.618617, 0.626007, 0.636357, 0.651597, 0.683667, 0.738287, 0.846377", \ + "0.665887, 0.673277, 0.683627, 0.698867, 0.730937, 0.785557, 0.893647", \ + "0.733417, 0.740807, 0.751157, 0.766397, 0.798467, 0.853087, 0.961177" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.672313, 0.680923, 0.692853, 0.711443, 0.749463, 0.817713, 0.952773", \ + "0.673503, 0.682113, 0.694043, 0.712633, 0.750653, 0.818903, 0.953963", \ + "0.678513, 0.687123, 0.699053, 0.717643, 0.755663, 0.823913, 0.958973", \ + "0.687583, 0.696193, 0.708123, 0.726713, 0.764733, 0.832983, 0.968043", \ + "0.698193, 0.706803, 0.718733, 0.737323, 0.775343, 0.843593, 0.978653", \ + "0.745913, 0.754523, 0.766453, 0.785043, 0.823063, 0.891313, 1.026373", \ + "0.812853, 0.821463, 0.833393, 0.851983, 0.890003, 0.958253, 1.093313" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.558641, 0.566861, 0.578811, 0.598311, 0.636941, 0.704351, 0.839791", \ + "0.559951, 0.568171, 0.580121, 0.599621, 0.638251, 0.705661, 0.841101", \ + "0.564611, 0.572831, 0.584781, 0.604281, 0.642911, 0.710321, 0.845761", \ + "0.573191, 0.581411, 0.593361, 0.612861, 0.651491, 0.718901, 0.854341", \ + "0.584051, 0.592271, 0.604221, 0.623721, 0.662351, 0.729761, 0.865201", \ + "0.631991, 0.640211, 0.652161, 0.671661, 0.710291, 0.777701, 0.913141", \ + "0.698871, 0.707091, 0.719041, 0.738541, 0.777171, 0.844581, 0.980021" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.830470, 0.836250, 0.846200, 0.861570, 0.893140, 0.948330, 1.056020", \ + "0.830890, 0.836670, 0.846620, 0.861990, 0.893560, 0.948750, 1.056440", \ + "0.835510, 0.841290, 0.851240, 0.866610, 0.898180, 0.953370, 1.061060", \ + "0.844290, 0.850070, 0.860020, 0.875390, 0.906960, 0.962150, 1.069840", \ + "0.855660, 0.861440, 0.871390, 0.886760, 0.918330, 0.973520, 1.081210", \ + "0.901430, 0.907210, 0.917160, 0.932530, 0.964100, 1.019290, 1.126980", \ + "0.971240, 0.977020, 0.986970, 1.002340, 1.033910, 1.089100, 1.196790" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.689802, 0.697193, 0.707542, 0.722783, 0.754853, 0.809473, 0.917563", \ + "0.691963, 0.699353, 0.709703, 0.724943, 0.757012, 0.811632, 0.919723", \ + "0.696183, 0.703573, 0.713923, 0.729163, 0.761232, 0.815852, 0.923942", \ + "0.705413, 0.712803, 0.723152, 0.738393, 0.770463, 0.825083, 0.933172", \ + "0.716172, 0.723563, 0.733912, 0.749153, 0.781223, 0.835843, 0.943933", \ + "0.763443, 0.770833, 0.781183, 0.796423, 0.828492, 0.883112, 0.991202", \ + "0.830973, 0.838363, 0.848712, 0.863952, 0.896022, 0.950643, 1.058733" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.787084, 0.795694, 0.807624, 0.826214, 0.864234, 0.932484, 1.067544", \ + "0.788274, 0.796884, 0.808814, 0.827404, 0.865424, 0.933674, 1.068734", \ + "0.793284, 0.801894, 0.813824, 0.832414, 0.870434, 0.938684, 1.073744", \ + "0.802354, 0.810964, 0.822894, 0.841484, 0.879504, 0.947754, 1.082814", \ + "0.812964, 0.821574, 0.833504, 0.852094, 0.890114, 0.958364, 1.093424", \ + "0.860684, 0.869294, 0.881224, 0.899814, 0.937834, 1.006084, 1.141144", \ + "0.927624, 0.936234, 0.948164, 0.966754, 1.004774, 1.073024, 1.208084" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.656196, 0.664416, 0.676366, 0.695866, 0.734496, 0.801906, 0.937346", \ + "0.657506, 0.665726, 0.677676, 0.697176, 0.735806, 0.803216, 0.938656", \ + "0.662166, 0.670386, 0.682336, 0.701836, 0.740466, 0.807876, 0.943316", \ + "0.670746, 0.678966, 0.690916, 0.710416, 0.749046, 0.816456, 0.951896", \ + "0.681606, 0.689826, 0.701776, 0.721276, 0.759906, 0.827316, 0.962756", \ + "0.729546, 0.737766, 0.749716, 0.769216, 0.807846, 0.875256, 1.010696", \ + "0.796426, 0.804646, 0.816596, 0.836096, 0.874726, 0.942136, 1.077576" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.962109, 0.967889, 0.977839, 0.993209, 1.024779, 1.079969, 1.187659", \ + "0.962529, 0.968309, 0.978259, 0.993629, 1.025199, 1.080389, 1.188079", \ + "0.967149, 0.972929, 0.982879, 0.998249, 1.029819, 1.085009, 1.192699", \ + "0.975929, 0.981709, 0.991659, 1.007029, 1.038599, 1.093789, 1.201479", \ + "0.987299, 0.993079, 1.003029, 1.018399, 1.049969, 1.105159, 1.212849", \ + "1.033069, 1.038849, 1.048799, 1.064169, 1.095739, 1.150929, 1.258619", \ + "1.102879, 1.108659, 1.118609, 1.133979, 1.165549, 1.220739, 1.328429" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.801704, 0.809094, 0.819444, 0.834684, 0.866754, 0.921374, 1.029464", \ + "0.803864, 0.811254, 0.821604, 0.836844, 0.868914, 0.923534, 1.031624", \ + "0.808084, 0.815474, 0.825824, 0.841064, 0.873134, 0.927754, 1.035844", \ + "0.817314, 0.824704, 0.835054, 0.850294, 0.882364, 0.936984, 1.045074", \ + "0.828074, 0.835464, 0.845814, 0.861054, 0.893124, 0.947744, 1.055834", \ + "0.875344, 0.882734, 0.893084, 0.908324, 0.940394, 0.995014, 1.103104", \ + "0.942874, 0.950264, 0.960614, 0.975854, 1.007924, 1.062544, 1.170634" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.918744, 0.927354, 0.939284, 0.957874, 0.995894, 1.064144, 1.199204", \ + "0.919934, 0.928544, 0.940474, 0.959064, 0.997084, 1.065334, 1.200394", \ + "0.924944, 0.933554, 0.945484, 0.964074, 1.002094, 1.070344, 1.205404", \ + "0.934014, 0.942624, 0.954554, 0.973144, 1.011164, 1.079414, 1.214474", \ + "0.944624, 0.953234, 0.965164, 0.983754, 1.021774, 1.090024, 1.225084", \ + "0.992344, 1.000954, 1.012884, 1.031474, 1.069494, 1.137744, 1.272804", \ + "1.059284, 1.067894, 1.079824, 1.098414, 1.136434, 1.204684, 1.339744" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.768107, 0.776327, 0.788277, 0.807777, 0.846407, 0.913817, 1.049257", \ + "0.769417, 0.777637, 0.789587, 0.809087, 0.847717, 0.915127, 1.050567", \ + "0.774077, 0.782297, 0.794247, 0.813747, 0.852377, 0.919787, 1.055227", \ + "0.782657, 0.790877, 0.802827, 0.822327, 0.860957, 0.928367, 1.063807", \ + "0.793517, 0.801737, 0.813687, 0.833187, 0.871817, 0.939227, 1.074667", \ + "0.841457, 0.849677, 0.861627, 0.881127, 0.919757, 0.987167, 1.122607", \ + "0.908337, 0.916557, 0.928507, 0.948007, 0.986637, 1.054047, 1.189487" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.076344, 1.082124, 1.092074, 1.107444, 1.139014, 1.194204, 1.301894", \ + "1.076764, 1.082544, 1.092494, 1.107864, 1.139434, 1.194624, 1.302314", \ + "1.081384, 1.087164, 1.097114, 1.112484, 1.144054, 1.199244, 1.306934", \ + "1.090164, 1.095944, 1.105894, 1.121264, 1.152834, 1.208024, 1.315714", \ + "1.101534, 1.107314, 1.117264, 1.132634, 1.164204, 1.219394, 1.327084", \ + "1.147304, 1.153084, 1.163034, 1.178404, 1.209974, 1.265164, 1.372854", \ + "1.217114, 1.222894, 1.232844, 1.248214, 1.279784, 1.334974, 1.442664" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.898792, 0.906182, 0.916532, 0.931772, 0.963842, 1.018463, 1.126553", \ + "0.900953, 0.908343, 0.918692, 0.933933, 0.966002, 1.020622, 1.128712", \ + "0.905173, 0.912563, 0.922912, 0.938152, 0.970222, 1.024842, 1.132932", \ + "0.914402, 0.921792, 0.932142, 0.947382, 0.979453, 1.034072, 1.142162", \ + "0.925162, 0.932552, 0.942902, 0.958142, 0.990212, 1.044833, 1.152923", \ + "0.972432, 0.979823, 0.990172, 1.005413, 1.037482, 1.092102, 1.200192", \ + "1.039962, 1.047352, 1.057702, 1.072942, 1.105013, 1.159633, 1.267722" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248", \ + "0.027489, 0.033914, 0.045180, 0.066826, 0.117028, 0.210564, 0.416248" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "1.032943, 1.041553, 1.053483, 1.072073, 1.110093, 1.178343, 1.313403", \ + "1.034133, 1.042743, 1.054673, 1.073263, 1.111283, 1.179533, 1.314593", \ + "1.039143, 1.047753, 1.059683, 1.078273, 1.116293, 1.184543, 1.319603", \ + "1.048213, 1.056823, 1.068753, 1.087343, 1.125363, 1.193613, 1.328673", \ + "1.058823, 1.067433, 1.079363, 1.097953, 1.135973, 1.204223, 1.339283", \ + "1.106543, 1.115153, 1.127083, 1.145673, 1.183693, 1.251943, 1.387003", \ + "1.173483, 1.182093, 1.194023, 1.212613, 1.250633, 1.318883, 1.453943" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.865174, 0.873394, 0.885344, 0.904844, 0.943474, 1.010884, 1.146324", \ + "0.866484, 0.874704, 0.886654, 0.906154, 0.944784, 1.012194, 1.147634", \ + "0.871144, 0.879364, 0.891314, 0.910814, 0.949444, 1.016854, 1.152294", \ + "0.879724, 0.887944, 0.899894, 0.919394, 0.958024, 1.025434, 1.160874", \ + "0.890584, 0.898804, 0.910754, 0.930254, 0.968884, 1.036294, 1.171734", \ + "0.938524, 0.946744, 0.958694, 0.978194, 1.016824, 1.084234, 1.219674", \ + "1.005404, 1.013624, 1.025574, 1.045074, 1.083704, 1.151114, 1.286554" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944", \ + "0.030926, 0.039240, 0.052668, 0.077522, 0.136483, 0.256947, 0.500944" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007224, 0.007291, 0.007298, 0.007361, 0.007369, 0.007376, 0.007383", \ + "0.007231, 0.007298, 0.007305, 0.007369, 0.007376, 0.007383, 0.007391", \ + "0.007238, 0.007305, 0.007313, 0.007376, 0.007383, 0.007391, 0.007398", \ + "0.007245, 0.007313, 0.007320, 0.007383, 0.007391, 0.007398, 0.007406", \ + "0.007252, 0.007320, 0.007327, 0.007391, 0.007398, 0.007406, 0.007413", \ + "0.007260, 0.007327, 0.007335, 0.007398, 0.007406, 0.007413, 0.007420", \ + "0.007267, 0.007335, 0.007342, 0.007406, 0.007413, 0.007420, 0.007428" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.006512, 0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551", \ + "0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558", \ + "0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564", \ + "0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571", \ + "0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577", \ + "0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584", \ + "0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584, 0.006591" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007224, 0.007291, 0.007298, 0.007361, 0.007369, 0.007376, 0.007383", \ + "0.007231, 0.007298, 0.007305, 0.007369, 0.007376, 0.007383, 0.007391", \ + "0.007238, 0.007305, 0.007313, 0.007376, 0.007383, 0.007391, 0.007398", \ + "0.007245, 0.007313, 0.007320, 0.007383, 0.007391, 0.007398, 0.007406", \ + "0.007252, 0.007320, 0.007327, 0.007391, 0.007398, 0.007406, 0.007413", \ + "0.007260, 0.007327, 0.007335, 0.007398, 0.007406, 0.007413, 0.007420", \ + "0.007267, 0.007335, 0.007342, 0.007406, 0.007413, 0.007420, 0.007428" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.006512, 0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551", \ + "0.006518, 0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558", \ + "0.006525, 0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564", \ + "0.006531, 0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571", \ + "0.006538, 0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577", \ + "0.006545, 0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584", \ + "0.006551, 0.006558, 0.006564, 0.006571, 0.006577, 0.006584, 0.006591" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x19_wm0_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.705939, 0.710189, 0.714459, 0.724829, 0.758069, 0.818809, 0.939429", \ + "0.706629, 0.710879, 0.715149, 0.725519, 0.758759, 0.819499, 0.940119", \ + "0.712079, 0.716329, 0.720599, 0.730969, 0.764209, 0.824949, 0.945569", \ + "0.720239, 0.724489, 0.728759, 0.739129, 0.772369, 0.833109, 0.953729", \ + "0.731629, 0.735879, 0.740149, 0.750519, 0.783759, 0.844499, 0.965119", \ + "0.776559, 0.780809, 0.785079, 0.795449, 0.828689, 0.889429, 1.010049", \ + "0.847159, 0.851409, 0.855679, 0.866049, 0.899289, 0.960029, 1.080649" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.600167, 0.604947, 0.608228, 0.617727, 0.652108, 0.710577, 0.831747", \ + "0.600638, 0.605418, 0.608698, 0.618198, 0.652578, 0.711048, 0.832218", \ + "0.605387, 0.610167, 0.613448, 0.622947, 0.657328, 0.715797, 0.836967", \ + "0.613178, 0.617958, 0.621238, 0.630738, 0.665118, 0.723588, 0.844758", \ + "0.624807, 0.629587, 0.632868, 0.642367, 0.676748, 0.735217, 0.856387", \ + "0.671528, 0.676308, 0.679588, 0.689087, 0.723468, 0.781938, 0.903108", \ + "0.740858, 0.745638, 0.748918, 0.758417, 0.792798, 0.851268, 0.972438" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.642979, 0.646669, 0.650929, 0.664729, 0.710799, 0.785909, 0.937259", \ + "0.643239, 0.646929, 0.651189, 0.664989, 0.711059, 0.786169, 0.937519", \ + "0.648479, 0.652169, 0.656429, 0.670229, 0.716299, 0.791409, 0.942759", \ + "0.656879, 0.660569, 0.664829, 0.678629, 0.724699, 0.799809, 0.951159", \ + "0.668039, 0.671729, 0.675989, 0.689789, 0.735859, 0.810969, 0.962319", \ + "0.715749, 0.719439, 0.723699, 0.737499, 0.783569, 0.858679, 1.010029", \ + "0.783299, 0.786989, 0.791249, 0.805049, 0.851119, 0.926229, 1.077579" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.542352, 0.547282, 0.551092, 0.565412, 0.610702, 0.686132, 0.838242", \ + "0.544032, 0.548962, 0.552772, 0.567092, 0.612382, 0.687812, 0.839922", \ + "0.548812, 0.553742, 0.557552, 0.571872, 0.617162, 0.692592, 0.844702", \ + "0.557411, 0.562341, 0.566152, 0.580472, 0.625762, 0.701192, 0.853301", \ + "0.568781, 0.573711, 0.577522, 0.591842, 0.637132, 0.712562, 0.864671", \ + "0.616002, 0.620932, 0.624741, 0.639061, 0.684352, 0.759782, 0.911892", \ + "0.682942, 0.687872, 0.691681, 0.706001, 0.751292, 0.826722, 0.978832" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.708450, 0.712700, 0.716970, 0.727340, 0.760580, 0.821320, 0.941940", \ + "0.709140, 0.713390, 0.717660, 0.728030, 0.761270, 0.822010, 0.942630", \ + "0.714590, 0.718840, 0.723110, 0.733480, 0.766720, 0.827460, 0.948080", \ + "0.722750, 0.727000, 0.731270, 0.741640, 0.774880, 0.835620, 0.956240", \ + "0.734140, 0.738390, 0.742660, 0.753030, 0.786270, 0.847010, 0.967630", \ + "0.779070, 0.783320, 0.787590, 0.797960, 0.831200, 0.891940, 1.012560", \ + "0.849670, 0.853920, 0.858190, 0.868560, 0.901800, 0.962540, 1.083160" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.602302, 0.607082, 0.610363, 0.619862, 0.654243, 0.712713, 0.833883", \ + "0.602773, 0.607553, 0.610833, 0.620333, 0.654713, 0.713183, 0.834353", \ + "0.607522, 0.612302, 0.615583, 0.625082, 0.659463, 0.717933, 0.839103", \ + "0.615313, 0.620093, 0.623373, 0.632873, 0.667253, 0.725723, 0.846893", \ + "0.626942, 0.631722, 0.635003, 0.644502, 0.678883, 0.737353, 0.858523", \ + "0.673663, 0.678443, 0.681723, 0.691222, 0.725603, 0.784073, 0.905243", \ + "0.742993, 0.747773, 0.751053, 0.760552, 0.794933, 0.853403, 0.974572" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.645486, 0.649176, 0.653436, 0.667236, 0.713306, 0.788416, 0.939766", \ + "0.645746, 0.649436, 0.653696, 0.667496, 0.713566, 0.788676, 0.940026", \ + "0.650986, 0.654676, 0.658936, 0.672736, 0.718806, 0.793916, 0.945266", \ + "0.659386, 0.663076, 0.667336, 0.681136, 0.727206, 0.802316, 0.953666", \ + "0.670546, 0.674236, 0.678496, 0.692296, 0.738366, 0.813476, 0.964826", \ + "0.718256, 0.721946, 0.726206, 0.740006, 0.786076, 0.861186, 1.012536", \ + "0.785806, 0.789496, 0.793756, 0.807556, 0.853626, 0.928736, 1.080086" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.544486, 0.549416, 0.553226, 0.567546, 0.612836, 0.688266, 0.840376", \ + "0.546166, 0.551096, 0.554906, 0.569226, 0.614516, 0.689946, 0.842056", \ + "0.550946, 0.555876, 0.559686, 0.574006, 0.619296, 0.694726, 0.846836", \ + "0.559546, 0.564476, 0.568286, 0.582606, 0.627896, 0.703326, 0.855436", \ + "0.570916, 0.575846, 0.579656, 0.593976, 0.639266, 0.714696, 0.866806", \ + "0.618136, 0.623066, 0.626876, 0.641196, 0.686486, 0.761916, 0.914026", \ + "0.685076, 0.690006, 0.693816, 0.708136, 0.753426, 0.828856, 0.980966" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.711339, 0.715589, 0.719859, 0.730229, 0.763469, 0.824209, 0.944829", \ + "0.712029, 0.716279, 0.720549, 0.730919, 0.764159, 0.824899, 0.945519", \ + "0.717479, 0.721729, 0.725999, 0.736369, 0.769609, 0.830349, 0.950969", \ + "0.725639, 0.729889, 0.734159, 0.744529, 0.777769, 0.838509, 0.959129", \ + "0.737029, 0.741279, 0.745549, 0.755919, 0.789159, 0.849899, 0.970519", \ + "0.781959, 0.786209, 0.790479, 0.800849, 0.834089, 0.894829, 1.015449", \ + "0.852559, 0.856809, 0.861079, 0.871449, 0.904689, 0.965429, 1.086049" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.604758, 0.609538, 0.612818, 0.622318, 0.656698, 0.715168, 0.836338", \ + "0.605228, 0.610008, 0.613288, 0.622788, 0.657168, 0.715638, 0.836808", \ + "0.609978, 0.614758, 0.618038, 0.627538, 0.661918, 0.720388, 0.841558", \ + "0.617768, 0.622548, 0.625828, 0.635328, 0.669708, 0.728178, 0.849348", \ + "0.629398, 0.634178, 0.637458, 0.646958, 0.681338, 0.739808, 0.860978", \ + "0.676118, 0.680898, 0.684178, 0.693678, 0.728058, 0.786528, 0.907698", \ + "0.745448, 0.750228, 0.753508, 0.763008, 0.797388, 0.855858, 0.977028" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.648379, 0.652069, 0.656329, 0.670129, 0.716199, 0.791309, 0.942659", \ + "0.648639, 0.652329, 0.656589, 0.670389, 0.716459, 0.791569, 0.942919", \ + "0.653879, 0.657569, 0.661829, 0.675629, 0.721699, 0.796809, 0.948159", \ + "0.662279, 0.665969, 0.670229, 0.684029, 0.730099, 0.805209, 0.956559", \ + "0.673439, 0.677129, 0.681389, 0.695189, 0.741259, 0.816369, 0.967719", \ + "0.721149, 0.724839, 0.729099, 0.742899, 0.788969, 0.864079, 1.015429", \ + "0.788699, 0.792389, 0.796649, 0.810449, 0.856519, 0.931629, 1.082979" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.546942, 0.551872, 0.555682, 0.570002, 0.615292, 0.690722, 0.842832", \ + "0.548622, 0.553552, 0.557362, 0.571682, 0.616972, 0.692402, 0.844512", \ + "0.553402, 0.558332, 0.562142, 0.576462, 0.621752, 0.697182, 0.849292", \ + "0.562001, 0.566931, 0.570742, 0.585062, 0.630352, 0.705782, 0.857891", \ + "0.573371, 0.578301, 0.582112, 0.596432, 0.641722, 0.717152, 0.869261", \ + "0.620592, 0.625522, 0.629331, 0.643651, 0.688942, 0.764372, 0.916482", \ + "0.687532, 0.692462, 0.696271, 0.710591, 0.755882, 0.831312, 0.983422" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.713397, 0.717647, 0.721917, 0.732287, 0.765527, 0.826267, 0.946887", \ + "0.714087, 0.718337, 0.722607, 0.732977, 0.766217, 0.826957, 0.947577", \ + "0.719537, 0.723787, 0.728057, 0.738427, 0.771667, 0.832407, 0.953027", \ + "0.727697, 0.731947, 0.736217, 0.746587, 0.779827, 0.840567, 0.961187", \ + "0.739087, 0.743337, 0.747607, 0.757977, 0.791217, 0.851957, 0.972577", \ + "0.784017, 0.788267, 0.792537, 0.802907, 0.836147, 0.896887, 1.017507", \ + "0.854617, 0.858867, 0.863137, 0.873507, 0.906747, 0.967487, 1.088107" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.606511, 0.611291, 0.614571, 0.624071, 0.658451, 0.716921, 0.838091", \ + "0.606981, 0.611761, 0.615041, 0.624541, 0.658921, 0.717391, 0.838561", \ + "0.611731, 0.616511, 0.619791, 0.629291, 0.663671, 0.722141, 0.843311", \ + "0.619521, 0.624301, 0.627581, 0.637081, 0.671461, 0.729931, 0.851101", \ + "0.631151, 0.635931, 0.639211, 0.648711, 0.683091, 0.741561, 0.862731", \ + "0.677871, 0.682651, 0.685931, 0.695431, 0.729811, 0.788281, 0.909451", \ + "0.747201, 0.751981, 0.755261, 0.764761, 0.799141, 0.857611, 0.978781" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.650437, 0.654127, 0.658387, 0.672187, 0.718257, 0.793367, 0.944717", \ + "0.650697, 0.654387, 0.658647, 0.672447, 0.718517, 0.793627, 0.944977", \ + "0.655937, 0.659627, 0.663887, 0.677687, 0.723757, 0.798867, 0.950217", \ + "0.664337, 0.668027, 0.672287, 0.686087, 0.732157, 0.807267, 0.958617", \ + "0.675497, 0.679187, 0.683447, 0.697247, 0.743317, 0.818427, 0.969777", \ + "0.723207, 0.726897, 0.731157, 0.744957, 0.791027, 0.866137, 1.017487", \ + "0.790757, 0.794447, 0.798707, 0.812507, 0.858577, 0.933687, 1.085037" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.548695, 0.553625, 0.557435, 0.571755, 0.617045, 0.692475, 0.844585", \ + "0.550375, 0.555305, 0.559115, 0.573435, 0.618725, 0.694155, 0.846265", \ + "0.555155, 0.560085, 0.563895, 0.578215, 0.623505, 0.698935, 0.851045", \ + "0.563755, 0.568685, 0.572495, 0.586815, 0.632105, 0.707535, 0.859645", \ + "0.575125, 0.580055, 0.583865, 0.598185, 0.643475, 0.718905, 0.871015", \ + "0.622345, 0.627275, 0.631085, 0.645405, 0.690695, 0.766125, 0.918235", \ + "0.689285, 0.694215, 0.698025, 0.712345, 0.757635, 0.833065, 0.985176" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.831158, 0.835408, 0.839678, 0.850048, 0.883288, 0.944028, 1.064648", \ + "0.831848, 0.836098, 0.840368, 0.850738, 0.883978, 0.944718, 1.065338", \ + "0.837298, 0.841548, 0.845818, 0.856188, 0.889428, 0.950168, 1.070788", \ + "0.845458, 0.849708, 0.853978, 0.864348, 0.897588, 0.958328, 1.078948", \ + "0.856848, 0.861098, 0.865368, 0.875738, 0.908978, 0.969718, 1.090338", \ + "0.901778, 0.906028, 0.910298, 0.920668, 0.953908, 1.014648, 1.135268", \ + "0.972378, 0.976628, 0.980898, 0.991268, 1.024508, 1.085248, 1.205868" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.706604, 0.711384, 0.714664, 0.724164, 0.758544, 0.817014, 0.938184", \ + "0.707074, 0.711854, 0.715134, 0.724634, 0.759014, 0.817484, 0.938654", \ + "0.711824, 0.716604, 0.719884, 0.729384, 0.763764, 0.822234, 0.943404", \ + "0.719614, 0.724394, 0.727674, 0.737174, 0.771554, 0.830024, 0.951194", \ + "0.731244, 0.736024, 0.739304, 0.748804, 0.783184, 0.841654, 0.962824", \ + "0.777964, 0.782744, 0.786024, 0.795524, 0.829904, 0.888374, 1.009544", \ + "0.847294, 0.852074, 0.855354, 0.864854, 0.899234, 0.957704, 1.078874" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.768199, 0.771889, 0.776149, 0.789949, 0.836019, 0.911129, 1.062479", \ + "0.768459, 0.772149, 0.776409, 0.790209, 0.836279, 0.911389, 1.062739", \ + "0.773699, 0.777389, 0.781649, 0.795449, 0.841519, 0.916629, 1.067979", \ + "0.782099, 0.785789, 0.790049, 0.803849, 0.849919, 0.925029, 1.076379", \ + "0.793259, 0.796949, 0.801209, 0.815009, 0.861079, 0.936189, 1.087539", \ + "0.840969, 0.844659, 0.848919, 0.862719, 0.908789, 0.983899, 1.135249", \ + "0.908519, 0.912209, 0.916469, 0.930269, 0.976339, 1.051449, 1.202799" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.648788, 0.653718, 0.657528, 0.671848, 0.717138, 0.792568, 0.944678", \ + "0.650468, 0.655398, 0.659208, 0.673528, 0.718818, 0.794248, 0.946358", \ + "0.655248, 0.660178, 0.663988, 0.678308, 0.723598, 0.799028, 0.951138", \ + "0.663848, 0.668778, 0.672588, 0.686908, 0.732198, 0.807628, 0.959738", \ + "0.675218, 0.680148, 0.683958, 0.698278, 0.743568, 0.818998, 0.971108", \ + "0.722438, 0.727368, 0.731178, 0.745498, 0.790788, 0.866218, 1.018328", \ + "0.789378, 0.794308, 0.798118, 0.812438, 0.857728, 0.933158, 1.085268" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.945951, 0.950201, 0.954471, 0.964841, 0.998081, 1.058821, 1.179441", \ + "0.946641, 0.950891, 0.955161, 0.965531, 0.998771, 1.059511, 1.180131", \ + "0.952091, 0.956341, 0.960611, 0.970981, 1.004221, 1.064961, 1.185581", \ + "0.960251, 0.964501, 0.968771, 0.979141, 1.012381, 1.073121, 1.193741", \ + "0.971641, 0.975891, 0.980161, 0.990531, 1.023771, 1.084511, 1.205131", \ + "1.016571, 1.020821, 1.025091, 1.035461, 1.068701, 1.129441, 1.250061", \ + "1.087171, 1.091421, 1.095691, 1.106061, 1.139301, 1.200041, 1.320661" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.804146, 0.808926, 0.812206, 0.821706, 0.856086, 0.914556, 1.035726", \ + "0.804616, 0.809396, 0.812676, 0.822176, 0.856556, 0.915026, 1.036196", \ + "0.809366, 0.814146, 0.817426, 0.826926, 0.861306, 0.919776, 1.040946", \ + "0.817156, 0.821936, 0.825216, 0.834716, 0.869096, 0.927566, 1.048736", \ + "0.828786, 0.833566, 0.836846, 0.846346, 0.880726, 0.939196, 1.060366", \ + "0.875506, 0.880286, 0.883566, 0.893066, 0.927447, 0.985916, 1.107087", \ + "0.944836, 0.949617, 0.952896, 0.962396, 0.996776, 1.055246, 1.176416" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.882970, 0.886660, 0.890920, 0.904720, 0.950790, 1.025900, 1.177250", \ + "0.883230, 0.886920, 0.891180, 0.904980, 0.951050, 1.026160, 1.177510", \ + "0.888470, 0.892160, 0.896420, 0.910220, 0.956290, 1.031400, 1.182750", \ + "0.896870, 0.900560, 0.904820, 0.918620, 0.964690, 1.039800, 1.191150", \ + "0.908030, 0.911720, 0.915980, 0.929780, 0.975850, 1.050960, 1.202310", \ + "0.955740, 0.959430, 0.963690, 0.977490, 1.023560, 1.098670, 1.250020", \ + "1.023290, 1.026980, 1.031240, 1.045040, 1.091110, 1.166220, 1.317570" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.746344, 0.751274, 0.755083, 0.769403, 0.814694, 0.890124, 1.042233", \ + "0.748024, 0.752954, 0.756763, 0.771083, 0.816374, 0.891804, 1.043914", \ + "0.752804, 0.757734, 0.761544, 0.775864, 0.821154, 0.896583, 1.048693", \ + "0.761403, 0.766333, 0.770144, 0.784464, 0.829753, 0.905183, 1.057293", \ + "0.772773, 0.777703, 0.781514, 0.795834, 0.841123, 0.916553, 1.068663", \ + "0.819994, 0.824923, 0.828733, 0.843054, 0.888344, 0.963774, 1.115883", \ + "0.886934, 0.891864, 0.895673, 0.909993, 0.955283, 1.030713, 1.182824" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.077592, 1.081842, 1.086112, 1.096482, 1.129722, 1.190462, 1.311082", \ + "1.078282, 1.082532, 1.086802, 1.097172, 1.130412, 1.191152, 1.311772", \ + "1.083732, 1.087982, 1.092252, 1.102622, 1.135862, 1.196602, 1.317222", \ + "1.091892, 1.096142, 1.100412, 1.110782, 1.144022, 1.204762, 1.325382", \ + "1.103282, 1.107532, 1.111802, 1.122172, 1.155412, 1.216152, 1.336772", \ + "1.148212, 1.152462, 1.156732, 1.167102, 1.200342, 1.261082, 1.381702", \ + "1.218812, 1.223062, 1.227332, 1.237702, 1.270942, 1.331682, 1.452302" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.916055, 0.920835, 0.924115, 0.933616, 0.967996, 1.026465, 1.147635", \ + "0.916525, 0.921305, 0.924585, 0.934085, 0.968466, 1.026935, 1.148106", \ + "0.921275, 0.926055, 0.929335, 0.938836, 0.973216, 1.031685, 1.152855", \ + "0.929065, 0.933845, 0.937125, 0.946625, 0.981006, 1.039475, 1.160646", \ + "0.940695, 0.945475, 0.948755, 0.958255, 0.992635, 1.051105, 1.172275", \ + "0.987415, 0.992196, 0.995475, 1.004975, 1.039356, 1.097825, 1.218996", \ + "1.056745, 1.061526, 1.064805, 1.074305, 1.108685, 1.167156, 1.288325" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.014618, 1.018308, 1.022568, 1.036368, 1.082438, 1.157548, 1.308898", \ + "1.014878, 1.018568, 1.022828, 1.036628, 1.082698, 1.157808, 1.309158", \ + "1.020118, 1.023808, 1.028068, 1.041868, 1.087938, 1.163048, 1.314398", \ + "1.028518, 1.032208, 1.036468, 1.050268, 1.096338, 1.171448, 1.322798", \ + "1.039678, 1.043368, 1.047628, 1.061428, 1.107498, 1.182608, 1.333958", \ + "1.087388, 1.091078, 1.095338, 1.109138, 1.155208, 1.230318, 1.381668", \ + "1.154938, 1.158628, 1.162888, 1.176688, 1.222758, 1.297868, 1.449218" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.858280, 0.863210, 0.867020, 0.881340, 0.926630, 1.002060, 1.154170", \ + "0.859960, 0.864890, 0.868700, 0.883020, 0.928310, 1.003740, 1.155850", \ + "0.864740, 0.869670, 0.873480, 0.887800, 0.933090, 1.008520, 1.160630", \ + "0.873340, 0.878270, 0.882080, 0.896400, 0.941690, 1.017120, 1.169230", \ + "0.884710, 0.889640, 0.893450, 0.907770, 0.953060, 1.028490, 1.180600", \ + "0.931930, 0.936860, 0.940670, 0.954990, 1.000280, 1.075710, 1.227820", \ + "0.998870, 1.003800, 1.007610, 1.021930, 1.067220, 1.142650, 1.294760" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.191781, 1.196031, 1.200301, 1.210671, 1.243911, 1.304651, 1.425271", \ + "1.192471, 1.196721, 1.200991, 1.211361, 1.244601, 1.305341, 1.425961", \ + "1.197921, 1.202171, 1.206441, 1.216811, 1.250051, 1.310791, 1.431411", \ + "1.206081, 1.210331, 1.214601, 1.224971, 1.258211, 1.318951, 1.439571", \ + "1.217471, 1.221721, 1.225991, 1.236361, 1.269601, 1.330341, 1.450961", \ + "1.262401, 1.266651, 1.270921, 1.281291, 1.314531, 1.375271, 1.495891", \ + "1.333001, 1.337251, 1.341521, 1.351891, 1.385131, 1.445871, 1.566491" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.013155, 1.017936, 1.021215, 1.030715, 1.065096, 1.123565, 1.244736", \ + "1.013625, 1.018406, 1.021685, 1.031185, 1.065565, 1.124036, 1.245206", \ + "1.018375, 1.023156, 1.026435, 1.035935, 1.070316, 1.128785, 1.249956", \ + "1.026165, 1.030946, 1.034225, 1.043725, 1.078105, 1.136576, 1.257745", \ + "1.037796, 1.042575, 1.045856, 1.055356, 1.089736, 1.148206, 1.269375", \ + "1.084516, 1.089296, 1.092576, 1.102075, 1.136455, 1.194926, 1.316095", \ + "1.153846, 1.158625, 1.161906, 1.171406, 1.205786, 1.264256, 1.385425" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.128807, 1.132497, 1.136757, 1.150557, 1.196627, 1.271737, 1.423087", \ + "1.129067, 1.132757, 1.137017, 1.150817, 1.196887, 1.271997, 1.423347", \ + "1.134307, 1.137997, 1.142257, 1.156057, 1.202127, 1.277237, 1.428587", \ + "1.142707, 1.146397, 1.150657, 1.164457, 1.210527, 1.285637, 1.436987", \ + "1.153867, 1.157557, 1.161817, 1.175617, 1.221687, 1.296797, 1.448147", \ + "1.201577, 1.205267, 1.209527, 1.223327, 1.269397, 1.344507, 1.495857", \ + "1.269127, 1.272817, 1.277077, 1.290877, 1.336947, 1.412057, 1.563407" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.955295, 0.960225, 0.964035, 0.978355, 1.023645, 1.099075, 1.251185", \ + "0.956975, 0.961905, 0.965715, 0.980035, 1.025325, 1.100755, 1.252865", \ + "0.961755, 0.966685, 0.970495, 0.984815, 1.030105, 1.105535, 1.257645", \ + "0.970355, 0.975285, 0.979095, 0.993415, 1.038705, 1.114135, 1.266245", \ + "0.981725, 0.986655, 0.990465, 1.004785, 1.050075, 1.125505, 1.277615", \ + "1.028945, 1.033875, 1.037685, 1.052005, 1.097295, 1.172725, 1.324835", \ + "1.095885, 1.100815, 1.104625, 1.118945, 1.164235, 1.239665, 1.391775" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.705939, 0.710189, 0.714459, 0.724829, 0.758069, 0.818809, 0.939429", \ + "0.706629, 0.710879, 0.715149, 0.725519, 0.758759, 0.819499, 0.940119", \ + "0.712079, 0.716329, 0.720599, 0.730969, 0.764209, 0.824949, 0.945569", \ + "0.720239, 0.724489, 0.728759, 0.739129, 0.772369, 0.833109, 0.953729", \ + "0.731629, 0.735879, 0.740149, 0.750519, 0.783759, 0.844499, 0.965119", \ + "0.776559, 0.780809, 0.785079, 0.795449, 0.828689, 0.889429, 1.010049", \ + "0.847159, 0.851409, 0.855679, 0.866049, 0.899289, 0.960029, 1.080649" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.600167, 0.604947, 0.608228, 0.617727, 0.652108, 0.710577, 0.831747", \ + "0.600638, 0.605418, 0.608698, 0.618198, 0.652578, 0.711048, 0.832218", \ + "0.605387, 0.610167, 0.613448, 0.622947, 0.657328, 0.715797, 0.836967", \ + "0.613178, 0.617958, 0.621238, 0.630738, 0.665118, 0.723588, 0.844758", \ + "0.624807, 0.629587, 0.632868, 0.642367, 0.676748, 0.735217, 0.856387", \ + "0.671528, 0.676308, 0.679588, 0.689087, 0.723468, 0.781938, 0.903108", \ + "0.740858, 0.745638, 0.748918, 0.758417, 0.792798, 0.851268, 0.972438" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.642979, 0.646669, 0.650929, 0.664729, 0.710799, 0.785909, 0.937259", \ + "0.643239, 0.646929, 0.651189, 0.664989, 0.711059, 0.786169, 0.937519", \ + "0.648479, 0.652169, 0.656429, 0.670229, 0.716299, 0.791409, 0.942759", \ + "0.656879, 0.660569, 0.664829, 0.678629, 0.724699, 0.799809, 0.951159", \ + "0.668039, 0.671729, 0.675989, 0.689789, 0.735859, 0.810969, 0.962319", \ + "0.715749, 0.719439, 0.723699, 0.737499, 0.783569, 0.858679, 1.010029", \ + "0.783299, 0.786989, 0.791249, 0.805049, 0.851119, 0.926229, 1.077579" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.542352, 0.547282, 0.551092, 0.565412, 0.610702, 0.686132, 0.838242", \ + "0.544032, 0.548962, 0.552772, 0.567092, 0.612382, 0.687812, 0.839922", \ + "0.548812, 0.553742, 0.557552, 0.571872, 0.617162, 0.692592, 0.844702", \ + "0.557411, 0.562341, 0.566152, 0.580472, 0.625762, 0.701192, 0.853301", \ + "0.568781, 0.573711, 0.577522, 0.591842, 0.637132, 0.712562, 0.864671", \ + "0.616002, 0.620932, 0.624741, 0.639061, 0.684352, 0.759782, 0.911892", \ + "0.682942, 0.687872, 0.691681, 0.706001, 0.751292, 0.826722, 0.978832" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.708450, 0.712700, 0.716970, 0.727340, 0.760580, 0.821320, 0.941940", \ + "0.709140, 0.713390, 0.717660, 0.728030, 0.761270, 0.822010, 0.942630", \ + "0.714590, 0.718840, 0.723110, 0.733480, 0.766720, 0.827460, 0.948080", \ + "0.722750, 0.727000, 0.731270, 0.741640, 0.774880, 0.835620, 0.956240", \ + "0.734140, 0.738390, 0.742660, 0.753030, 0.786270, 0.847010, 0.967630", \ + "0.779070, 0.783320, 0.787590, 0.797960, 0.831200, 0.891940, 1.012560", \ + "0.849670, 0.853920, 0.858190, 0.868560, 0.901800, 0.962540, 1.083160" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.602302, 0.607082, 0.610363, 0.619862, 0.654243, 0.712713, 0.833883", \ + "0.602773, 0.607553, 0.610833, 0.620333, 0.654713, 0.713183, 0.834353", \ + "0.607522, 0.612302, 0.615583, 0.625082, 0.659463, 0.717933, 0.839103", \ + "0.615313, 0.620093, 0.623373, 0.632873, 0.667253, 0.725723, 0.846893", \ + "0.626942, 0.631722, 0.635003, 0.644502, 0.678883, 0.737353, 0.858523", \ + "0.673663, 0.678443, 0.681723, 0.691222, 0.725603, 0.784073, 0.905243", \ + "0.742993, 0.747773, 0.751053, 0.760552, 0.794933, 0.853403, 0.974572" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.645486, 0.649176, 0.653436, 0.667236, 0.713306, 0.788416, 0.939766", \ + "0.645746, 0.649436, 0.653696, 0.667496, 0.713566, 0.788676, 0.940026", \ + "0.650986, 0.654676, 0.658936, 0.672736, 0.718806, 0.793916, 0.945266", \ + "0.659386, 0.663076, 0.667336, 0.681136, 0.727206, 0.802316, 0.953666", \ + "0.670546, 0.674236, 0.678496, 0.692296, 0.738366, 0.813476, 0.964826", \ + "0.718256, 0.721946, 0.726206, 0.740006, 0.786076, 0.861186, 1.012536", \ + "0.785806, 0.789496, 0.793756, 0.807556, 0.853626, 0.928736, 1.080086" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.544486, 0.549416, 0.553226, 0.567546, 0.612836, 0.688266, 0.840376", \ + "0.546166, 0.551096, 0.554906, 0.569226, 0.614516, 0.689946, 0.842056", \ + "0.550946, 0.555876, 0.559686, 0.574006, 0.619296, 0.694726, 0.846836", \ + "0.559546, 0.564476, 0.568286, 0.582606, 0.627896, 0.703326, 0.855436", \ + "0.570916, 0.575846, 0.579656, 0.593976, 0.639266, 0.714696, 0.866806", \ + "0.618136, 0.623066, 0.626876, 0.641196, 0.686486, 0.761916, 0.914026", \ + "0.685076, 0.690006, 0.693816, 0.708136, 0.753426, 0.828856, 0.980966" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.711339, 0.715589, 0.719859, 0.730229, 0.763469, 0.824209, 0.944829", \ + "0.712029, 0.716279, 0.720549, 0.730919, 0.764159, 0.824899, 0.945519", \ + "0.717479, 0.721729, 0.725999, 0.736369, 0.769609, 0.830349, 0.950969", \ + "0.725639, 0.729889, 0.734159, 0.744529, 0.777769, 0.838509, 0.959129", \ + "0.737029, 0.741279, 0.745549, 0.755919, 0.789159, 0.849899, 0.970519", \ + "0.781959, 0.786209, 0.790479, 0.800849, 0.834089, 0.894829, 1.015449", \ + "0.852559, 0.856809, 0.861079, 0.871449, 0.904689, 0.965429, 1.086049" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.604758, 0.609538, 0.612818, 0.622318, 0.656698, 0.715168, 0.836338", \ + "0.605228, 0.610008, 0.613288, 0.622788, 0.657168, 0.715638, 0.836808", \ + "0.609978, 0.614758, 0.618038, 0.627538, 0.661918, 0.720388, 0.841558", \ + "0.617768, 0.622548, 0.625828, 0.635328, 0.669708, 0.728178, 0.849348", \ + "0.629398, 0.634178, 0.637458, 0.646958, 0.681338, 0.739808, 0.860978", \ + "0.676118, 0.680898, 0.684178, 0.693678, 0.728058, 0.786528, 0.907698", \ + "0.745448, 0.750228, 0.753508, 0.763008, 0.797388, 0.855858, 0.977028" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.648379, 0.652069, 0.656329, 0.670129, 0.716199, 0.791309, 0.942659", \ + "0.648639, 0.652329, 0.656589, 0.670389, 0.716459, 0.791569, 0.942919", \ + "0.653879, 0.657569, 0.661829, 0.675629, 0.721699, 0.796809, 0.948159", \ + "0.662279, 0.665969, 0.670229, 0.684029, 0.730099, 0.805209, 0.956559", \ + "0.673439, 0.677129, 0.681389, 0.695189, 0.741259, 0.816369, 0.967719", \ + "0.721149, 0.724839, 0.729099, 0.742899, 0.788969, 0.864079, 1.015429", \ + "0.788699, 0.792389, 0.796649, 0.810449, 0.856519, 0.931629, 1.082979" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.546942, 0.551872, 0.555682, 0.570002, 0.615292, 0.690722, 0.842832", \ + "0.548622, 0.553552, 0.557362, 0.571682, 0.616972, 0.692402, 0.844512", \ + "0.553402, 0.558332, 0.562142, 0.576462, 0.621752, 0.697182, 0.849292", \ + "0.562001, 0.566931, 0.570742, 0.585062, 0.630352, 0.705782, 0.857891", \ + "0.573371, 0.578301, 0.582112, 0.596432, 0.641722, 0.717152, 0.869261", \ + "0.620592, 0.625522, 0.629331, 0.643651, 0.688942, 0.764372, 0.916482", \ + "0.687532, 0.692462, 0.696271, 0.710591, 0.755882, 0.831312, 0.983422" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.713397, 0.717647, 0.721917, 0.732287, 0.765527, 0.826267, 0.946887", \ + "0.714087, 0.718337, 0.722607, 0.732977, 0.766217, 0.826957, 0.947577", \ + "0.719537, 0.723787, 0.728057, 0.738427, 0.771667, 0.832407, 0.953027", \ + "0.727697, 0.731947, 0.736217, 0.746587, 0.779827, 0.840567, 0.961187", \ + "0.739087, 0.743337, 0.747607, 0.757977, 0.791217, 0.851957, 0.972577", \ + "0.784017, 0.788267, 0.792537, 0.802907, 0.836147, 0.896887, 1.017507", \ + "0.854617, 0.858867, 0.863137, 0.873507, 0.906747, 0.967487, 1.088107" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.606511, 0.611291, 0.614571, 0.624071, 0.658451, 0.716921, 0.838091", \ + "0.606981, 0.611761, 0.615041, 0.624541, 0.658921, 0.717391, 0.838561", \ + "0.611731, 0.616511, 0.619791, 0.629291, 0.663671, 0.722141, 0.843311", \ + "0.619521, 0.624301, 0.627581, 0.637081, 0.671461, 0.729931, 0.851101", \ + "0.631151, 0.635931, 0.639211, 0.648711, 0.683091, 0.741561, 0.862731", \ + "0.677871, 0.682651, 0.685931, 0.695431, 0.729811, 0.788281, 0.909451", \ + "0.747201, 0.751981, 0.755261, 0.764761, 0.799141, 0.857611, 0.978781" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.650437, 0.654127, 0.658387, 0.672187, 0.718257, 0.793367, 0.944717", \ + "0.650697, 0.654387, 0.658647, 0.672447, 0.718517, 0.793627, 0.944977", \ + "0.655937, 0.659627, 0.663887, 0.677687, 0.723757, 0.798867, 0.950217", \ + "0.664337, 0.668027, 0.672287, 0.686087, 0.732157, 0.807267, 0.958617", \ + "0.675497, 0.679187, 0.683447, 0.697247, 0.743317, 0.818427, 0.969777", \ + "0.723207, 0.726897, 0.731157, 0.744957, 0.791027, 0.866137, 1.017487", \ + "0.790757, 0.794447, 0.798707, 0.812507, 0.858577, 0.933687, 1.085037" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.548695, 0.553625, 0.557435, 0.571755, 0.617045, 0.692475, 0.844585", \ + "0.550375, 0.555305, 0.559115, 0.573435, 0.618725, 0.694155, 0.846265", \ + "0.555155, 0.560085, 0.563895, 0.578215, 0.623505, 0.698935, 0.851045", \ + "0.563755, 0.568685, 0.572495, 0.586815, 0.632105, 0.707535, 0.859645", \ + "0.575125, 0.580055, 0.583865, 0.598185, 0.643475, 0.718905, 0.871015", \ + "0.622345, 0.627275, 0.631085, 0.645405, 0.690695, 0.766125, 0.918235", \ + "0.689285, 0.694215, 0.698025, 0.712345, 0.757635, 0.833065, 0.985176" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.831158, 0.835408, 0.839678, 0.850048, 0.883288, 0.944028, 1.064648", \ + "0.831848, 0.836098, 0.840368, 0.850738, 0.883978, 0.944718, 1.065338", \ + "0.837298, 0.841548, 0.845818, 0.856188, 0.889428, 0.950168, 1.070788", \ + "0.845458, 0.849708, 0.853978, 0.864348, 0.897588, 0.958328, 1.078948", \ + "0.856848, 0.861098, 0.865368, 0.875738, 0.908978, 0.969718, 1.090338", \ + "0.901778, 0.906028, 0.910298, 0.920668, 0.953908, 1.014648, 1.135268", \ + "0.972378, 0.976628, 0.980898, 0.991268, 1.024508, 1.085248, 1.205868" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.706604, 0.711384, 0.714664, 0.724164, 0.758544, 0.817014, 0.938184", \ + "0.707074, 0.711854, 0.715134, 0.724634, 0.759014, 0.817484, 0.938654", \ + "0.711824, 0.716604, 0.719884, 0.729384, 0.763764, 0.822234, 0.943404", \ + "0.719614, 0.724394, 0.727674, 0.737174, 0.771554, 0.830024, 0.951194", \ + "0.731244, 0.736024, 0.739304, 0.748804, 0.783184, 0.841654, 0.962824", \ + "0.777964, 0.782744, 0.786024, 0.795524, 0.829904, 0.888374, 1.009544", \ + "0.847294, 0.852074, 0.855354, 0.864854, 0.899234, 0.957704, 1.078874" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.768199, 0.771889, 0.776149, 0.789949, 0.836019, 0.911129, 1.062479", \ + "0.768459, 0.772149, 0.776409, 0.790209, 0.836279, 0.911389, 1.062739", \ + "0.773699, 0.777389, 0.781649, 0.795449, 0.841519, 0.916629, 1.067979", \ + "0.782099, 0.785789, 0.790049, 0.803849, 0.849919, 0.925029, 1.076379", \ + "0.793259, 0.796949, 0.801209, 0.815009, 0.861079, 0.936189, 1.087539", \ + "0.840969, 0.844659, 0.848919, 0.862719, 0.908789, 0.983899, 1.135249", \ + "0.908519, 0.912209, 0.916469, 0.930269, 0.976339, 1.051449, 1.202799" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.648788, 0.653718, 0.657528, 0.671848, 0.717138, 0.792568, 0.944678", \ + "0.650468, 0.655398, 0.659208, 0.673528, 0.718818, 0.794248, 0.946358", \ + "0.655248, 0.660178, 0.663988, 0.678308, 0.723598, 0.799028, 0.951138", \ + "0.663848, 0.668778, 0.672588, 0.686908, 0.732198, 0.807628, 0.959738", \ + "0.675218, 0.680148, 0.683958, 0.698278, 0.743568, 0.818998, 0.971108", \ + "0.722438, 0.727368, 0.731178, 0.745498, 0.790788, 0.866218, 1.018328", \ + "0.789378, 0.794308, 0.798118, 0.812438, 0.857728, 0.933158, 1.085268" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.945951, 0.950201, 0.954471, 0.964841, 0.998081, 1.058821, 1.179441", \ + "0.946641, 0.950891, 0.955161, 0.965531, 0.998771, 1.059511, 1.180131", \ + "0.952091, 0.956341, 0.960611, 0.970981, 1.004221, 1.064961, 1.185581", \ + "0.960251, 0.964501, 0.968771, 0.979141, 1.012381, 1.073121, 1.193741", \ + "0.971641, 0.975891, 0.980161, 0.990531, 1.023771, 1.084511, 1.205131", \ + "1.016571, 1.020821, 1.025091, 1.035461, 1.068701, 1.129441, 1.250061", \ + "1.087171, 1.091421, 1.095691, 1.106061, 1.139301, 1.200041, 1.320661" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.804146, 0.808926, 0.812206, 0.821706, 0.856086, 0.914556, 1.035726", \ + "0.804616, 0.809396, 0.812676, 0.822176, 0.856556, 0.915026, 1.036196", \ + "0.809366, 0.814146, 0.817426, 0.826926, 0.861306, 0.919776, 1.040946", \ + "0.817156, 0.821936, 0.825216, 0.834716, 0.869096, 0.927566, 1.048736", \ + "0.828786, 0.833566, 0.836846, 0.846346, 0.880726, 0.939196, 1.060366", \ + "0.875506, 0.880286, 0.883566, 0.893066, 0.927447, 0.985916, 1.107087", \ + "0.944836, 0.949617, 0.952896, 0.962396, 0.996776, 1.055246, 1.176416" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.882970, 0.886660, 0.890920, 0.904720, 0.950790, 1.025900, 1.177250", \ + "0.883230, 0.886920, 0.891180, 0.904980, 0.951050, 1.026160, 1.177510", \ + "0.888470, 0.892160, 0.896420, 0.910220, 0.956290, 1.031400, 1.182750", \ + "0.896870, 0.900560, 0.904820, 0.918620, 0.964690, 1.039800, 1.191150", \ + "0.908030, 0.911720, 0.915980, 0.929780, 0.975850, 1.050960, 1.202310", \ + "0.955740, 0.959430, 0.963690, 0.977490, 1.023560, 1.098670, 1.250020", \ + "1.023290, 1.026980, 1.031240, 1.045040, 1.091110, 1.166220, 1.317570" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.746344, 0.751274, 0.755083, 0.769403, 0.814694, 0.890124, 1.042233", \ + "0.748024, 0.752954, 0.756763, 0.771083, 0.816374, 0.891804, 1.043914", \ + "0.752804, 0.757734, 0.761544, 0.775864, 0.821154, 0.896583, 1.048693", \ + "0.761403, 0.766333, 0.770144, 0.784464, 0.829753, 0.905183, 1.057293", \ + "0.772773, 0.777703, 0.781514, 0.795834, 0.841123, 0.916553, 1.068663", \ + "0.819994, 0.824923, 0.828733, 0.843054, 0.888344, 0.963774, 1.115883", \ + "0.886934, 0.891864, 0.895673, 0.909993, 0.955283, 1.030713, 1.182824" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.077592, 1.081842, 1.086112, 1.096482, 1.129722, 1.190462, 1.311082", \ + "1.078282, 1.082532, 1.086802, 1.097172, 1.130412, 1.191152, 1.311772", \ + "1.083732, 1.087982, 1.092252, 1.102622, 1.135862, 1.196602, 1.317222", \ + "1.091892, 1.096142, 1.100412, 1.110782, 1.144022, 1.204762, 1.325382", \ + "1.103282, 1.107532, 1.111802, 1.122172, 1.155412, 1.216152, 1.336772", \ + "1.148212, 1.152462, 1.156732, 1.167102, 1.200342, 1.261082, 1.381702", \ + "1.218812, 1.223062, 1.227332, 1.237702, 1.270942, 1.331682, 1.452302" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.916055, 0.920835, 0.924115, 0.933616, 0.967996, 1.026465, 1.147635", \ + "0.916525, 0.921305, 0.924585, 0.934085, 0.968466, 1.026935, 1.148106", \ + "0.921275, 0.926055, 0.929335, 0.938836, 0.973216, 1.031685, 1.152855", \ + "0.929065, 0.933845, 0.937125, 0.946625, 0.981006, 1.039475, 1.160646", \ + "0.940695, 0.945475, 0.948755, 0.958255, 0.992635, 1.051105, 1.172275", \ + "0.987415, 0.992196, 0.995475, 1.004975, 1.039356, 1.097825, 1.218996", \ + "1.056745, 1.061526, 1.064805, 1.074305, 1.108685, 1.167156, 1.288325" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.014618, 1.018308, 1.022568, 1.036368, 1.082438, 1.157548, 1.308898", \ + "1.014878, 1.018568, 1.022828, 1.036628, 1.082698, 1.157808, 1.309158", \ + "1.020118, 1.023808, 1.028068, 1.041868, 1.087938, 1.163048, 1.314398", \ + "1.028518, 1.032208, 1.036468, 1.050268, 1.096338, 1.171448, 1.322798", \ + "1.039678, 1.043368, 1.047628, 1.061428, 1.107498, 1.182608, 1.333958", \ + "1.087388, 1.091078, 1.095338, 1.109138, 1.155208, 1.230318, 1.381668", \ + "1.154938, 1.158628, 1.162888, 1.176688, 1.222758, 1.297868, 1.449218" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.858280, 0.863210, 0.867020, 0.881340, 0.926630, 1.002060, 1.154170", \ + "0.859960, 0.864890, 0.868700, 0.883020, 0.928310, 1.003740, 1.155850", \ + "0.864740, 0.869670, 0.873480, 0.887800, 0.933090, 1.008520, 1.160630", \ + "0.873340, 0.878270, 0.882080, 0.896400, 0.941690, 1.017120, 1.169230", \ + "0.884710, 0.889640, 0.893450, 0.907770, 0.953060, 1.028490, 1.180600", \ + "0.931930, 0.936860, 0.940670, 0.954990, 1.000280, 1.075710, 1.227820", \ + "0.998870, 1.003800, 1.007610, 1.021930, 1.067220, 1.142650, 1.294760" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.191781, 1.196031, 1.200301, 1.210671, 1.243911, 1.304651, 1.425271", \ + "1.192471, 1.196721, 1.200991, 1.211361, 1.244601, 1.305341, 1.425961", \ + "1.197921, 1.202171, 1.206441, 1.216811, 1.250051, 1.310791, 1.431411", \ + "1.206081, 1.210331, 1.214601, 1.224971, 1.258211, 1.318951, 1.439571", \ + "1.217471, 1.221721, 1.225991, 1.236361, 1.269601, 1.330341, 1.450961", \ + "1.262401, 1.266651, 1.270921, 1.281291, 1.314531, 1.375271, 1.495891", \ + "1.333001, 1.337251, 1.341521, 1.351891, 1.385131, 1.445871, 1.566491" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.013155, 1.017936, 1.021215, 1.030715, 1.065096, 1.123565, 1.244736", \ + "1.013625, 1.018406, 1.021685, 1.031185, 1.065565, 1.124036, 1.245206", \ + "1.018375, 1.023156, 1.026435, 1.035935, 1.070316, 1.128785, 1.249956", \ + "1.026165, 1.030946, 1.034225, 1.043725, 1.078105, 1.136576, 1.257745", \ + "1.037796, 1.042575, 1.045856, 1.055356, 1.089736, 1.148206, 1.269375", \ + "1.084516, 1.089296, 1.092576, 1.102075, 1.136455, 1.194926, 1.316095", \ + "1.153846, 1.158625, 1.161906, 1.171406, 1.205786, 1.264256, 1.385425" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820", \ + "0.030425, 0.038772, 0.047095, 0.071207, 0.136298, 0.249921, 0.477820" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "1.128807, 1.132497, 1.136757, 1.150557, 1.196627, 1.271737, 1.423087", \ + "1.129067, 1.132757, 1.137017, 1.150817, 1.196887, 1.271997, 1.423347", \ + "1.134307, 1.137997, 1.142257, 1.156057, 1.202127, 1.277237, 1.428587", \ + "1.142707, 1.146397, 1.150657, 1.164457, 1.210527, 1.285637, 1.436987", \ + "1.153867, 1.157557, 1.161817, 1.175617, 1.221687, 1.296797, 1.448147", \ + "1.201577, 1.205267, 1.209527, 1.223327, 1.269397, 1.344507, 1.495857", \ + "1.269127, 1.272817, 1.277077, 1.290877, 1.336947, 1.412057, 1.563407" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.955295, 0.960225, 0.964035, 0.978355, 1.023645, 1.099075, 1.251185", \ + "0.956975, 0.961905, 0.965715, 0.980035, 1.025325, 1.100755, 1.252865", \ + "0.961755, 0.966685, 0.970495, 0.984815, 1.030105, 1.105535, 1.257645", \ + "0.970355, 0.975285, 0.979095, 0.993415, 1.038705, 1.114135, 1.266245", \ + "0.981725, 0.986655, 0.990465, 1.004785, 1.050075, 1.125505, 1.277615", \ + "1.028945, 1.033875, 1.037685, 1.052005, 1.097295, 1.172725, 1.324835", \ + "1.095885, 1.100815, 1.104625, 1.118945, 1.164235, 1.239665, 1.391775" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173", \ + "0.035060, 0.042843, 0.053568, 0.079072, 0.160946, 0.297708, 0.572173" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x19_wm0_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.502800; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.360470, 0.366850, 0.371520, 0.384360, 0.420560, 0.480190, 0.599320", \ + "0.362700, 0.369080, 0.373750, 0.386590, 0.422790, 0.482420, 0.601550", \ + "0.367370, 0.373750, 0.378420, 0.391260, 0.427460, 0.487090, 0.606220", \ + "0.377530, 0.383910, 0.388580, 0.401420, 0.437620, 0.497250, 0.616380", \ + "0.387680, 0.394060, 0.398730, 0.411570, 0.447770, 0.507400, 0.626530", \ + "0.435320, 0.441700, 0.446370, 0.459210, 0.495410, 0.555040, 0.674170", \ + "0.500140, 0.506520, 0.511190, 0.524030, 0.560230, 0.619860, 0.738990" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.306185, 0.312355, 0.317185, 0.330025, 0.366075, 0.425875, 0.545005", \ + "0.308375, 0.314545, 0.319375, 0.332215, 0.368265, 0.428065, 0.547195", \ + "0.313085, 0.319255, 0.324085, 0.336925, 0.372975, 0.432775, 0.551905", \ + "0.323185, 0.329355, 0.334185, 0.347025, 0.383075, 0.442875, 0.562005", \ + "0.333305, 0.339475, 0.344305, 0.357145, 0.393195, 0.452995, 0.572125", \ + "0.380925, 0.387095, 0.391925, 0.404765, 0.440815, 0.500615, 0.619745", \ + "0.445845, 0.452015, 0.456845, 0.469685, 0.505735, 0.565535, 0.684665" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195", \ + "0.024706, 0.032911, 0.042034, 0.063599, 0.132497, 0.239089, 0.463195" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.350729, 0.357789, 0.364589, 0.380419, 0.427429, 0.505259, 0.660619", \ + "0.352539, 0.359599, 0.366399, 0.382229, 0.429239, 0.507069, 0.662429", \ + "0.357099, 0.364159, 0.370959, 0.386789, 0.433799, 0.511629, 0.666989", \ + "0.367249, 0.374309, 0.381109, 0.396939, 0.443949, 0.521779, 0.677139", \ + "0.377249, 0.384309, 0.391109, 0.406939, 0.453949, 0.531779, 0.687139", \ + "0.423409, 0.430469, 0.437269, 0.453099, 0.500109, 0.577939, 0.733299", \ + "0.490569, 0.497629, 0.504429, 0.520259, 0.567269, 0.645099, 0.800459" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.298089, 0.305159, 0.311919, 0.327669, 0.374759, 0.452579, 0.607949", \ + "0.299899, 0.306969, 0.313728, 0.329479, 0.376569, 0.454389, 0.609759", \ + "0.304409, 0.311479, 0.318239, 0.333988, 0.381079, 0.458899, 0.614269", \ + "0.314629, 0.321699, 0.328459, 0.344209, 0.391299, 0.469118, 0.624489", \ + "0.324629, 0.331699, 0.338459, 0.354209, 0.401299, 0.479118, 0.634489", \ + "0.370749, 0.377819, 0.384579, 0.400329, 0.447419, 0.525239, 0.680609", \ + "0.437948, 0.445019, 0.451779, 0.467528, 0.514619, 0.592439, 0.747809" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909", \ + "0.027965, 0.037437, 0.046995, 0.075221, 0.158290, 0.298892, 0.580909" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589", \ + "0.004561, 0.004566, 0.004571, 0.004575, 0.004580, 0.004584, 0.004589" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832", \ + "0.004803, 0.004808, 0.004813, 0.004817, 0.004822, 0.004827, 0.004832" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.008689; + clock : true; + max_transition : 0.419000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875712, 0.877421, 0.878288, 0.879167, 0.880047, 0.880927, 0.881808"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875795, 0.877504, 0.878371, 0.879251, 0.880130, 0.881011, 0.881891"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875837, 0.877546, 0.878413, 0.879292, 0.880172, 0.881053, 0.881933"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875837, 0.877546, 0.878413, 0.879292, 0.880172, 0.881053, 0.881933"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875837, 0.877546, 0.878413, 0.879292, 0.880172, 0.881053, 0.881933"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.875837, 0.877546, 0.878413, 0.879292, 0.880172, 0.881053, 0.881933"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.876195, 0.877905, 0.878772, 0.879652, 0.880532, 0.881413, 0.882294"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.876205, 0.877914, 0.878782, 0.879662, 0.880542, 0.881423, 0.882304"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008969, 0.008978, 0.008987, 0.009061, 0.009070, 0.009080, 0.009089"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005641, 0.005647, 0.005652, 0.005658, 0.005664, 0.005669, 0.005675"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006268, 0.006274, 0.006280, 0.006287, 0.006293, 0.006299, 0.006306"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005641, 0.005647, 0.005652, 0.005658, 0.005664, 0.005669, 0.005675"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006268, 0.006274, 0.006280, 0.006287, 0.006293, 0.006299, 0.006306"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.742312, 0.743064, 0.743805, 0.744551, 0.745292, 0.746039, 0.746785"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008960, 0.008969, 0.008978, 0.008987, 0.009021, 0.009030, 0.009039"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.425453, 0.426973, 0.431533, 0.440123, 0.451393, 0.499173, 0.669923", \ + "0.420753, 0.422273, 0.426833, 0.435423, 0.446693, 0.494473, 0.665223", \ + "0.417043, 0.418563, 0.423123, 0.431713, 0.442983, 0.490763, 0.661513", \ + "0.406713, 0.408233, 0.412793, 0.421383, 0.432653, 0.480433, 0.651183", \ + "0.398833, 0.400353, 0.404913, 0.413503, 0.424773, 0.472553, 0.643303", \ + "0.348753, 0.350273, 0.354833, 0.363423, 0.374693, 0.422473, 0.593223", \ + "0.391953, 0.393473, 0.398033, 0.406623, 0.417893, 0.465673, 0.636423" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.427959, 0.429479, 0.434039, 0.442629, 0.453899, 0.501679, 0.672429", \ + "0.423259, 0.424779, 0.429339, 0.437929, 0.449199, 0.496979, 0.667729", \ + "0.419549, 0.421069, 0.425629, 0.434219, 0.445489, 0.493269, 0.664019", \ + "0.409219, 0.410739, 0.415299, 0.423889, 0.435159, 0.482939, 0.653689", \ + "0.401339, 0.402859, 0.407419, 0.416009, 0.427279, 0.475059, 0.645809", \ + "0.351259, 0.352779, 0.357339, 0.365929, 0.377199, 0.424979, 0.595729", \ + "0.394459, 0.395979, 0.400539, 0.409129, 0.420399, 0.468179, 0.638929" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.430853, 0.432373, 0.436933, 0.445523, 0.456793, 0.504573, 0.675323", \ + "0.426153, 0.427673, 0.432233, 0.440823, 0.452093, 0.499873, 0.670623", \ + "0.422443, 0.423963, 0.428523, 0.437113, 0.448383, 0.496163, 0.666913", \ + "0.412113, 0.413633, 0.418193, 0.426783, 0.438053, 0.485833, 0.656583", \ + "0.404233, 0.405753, 0.410313, 0.418903, 0.430173, 0.477953, 0.648703", \ + "0.354153, 0.355673, 0.360233, 0.368823, 0.380093, 0.427873, 0.598623", \ + "0.397353, 0.398873, 0.403433, 0.412023, 0.423293, 0.471073, 0.641823" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.432911, 0.434431, 0.438991, 0.447581, 0.458851, 0.506631, 0.677381", \ + "0.428211, 0.429731, 0.434291, 0.442881, 0.454151, 0.501931, 0.672681", \ + "0.424501, 0.426021, 0.430581, 0.439171, 0.450441, 0.498221, 0.668971", \ + "0.414171, 0.415691, 0.420251, 0.428841, 0.440111, 0.487891, 0.658641", \ + "0.406291, 0.407811, 0.412371, 0.420961, 0.432231, 0.480011, 0.650761", \ + "0.356211, 0.357731, 0.362291, 0.370881, 0.382151, 0.429931, 0.600681", \ + "0.399411, 0.400931, 0.405491, 0.414081, 0.425351, 0.473131, 0.643881" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.550673, 0.552192, 0.556752, 0.565342, 0.576612, 0.624393, 0.795142", \ + "0.545972, 0.547493, 0.552052, 0.560643, 0.571913, 0.619692, 0.790443", \ + "0.542262, 0.543782, 0.548342, 0.556933, 0.568203, 0.615982, 0.786733", \ + "0.531933, 0.533452, 0.538013, 0.546602, 0.557872, 0.605653, 0.776402", \ + "0.524053, 0.525572, 0.530133, 0.538722, 0.549992, 0.597773, 0.768522", \ + "0.473973, 0.475492, 0.480052, 0.488642, 0.499912, 0.547693, 0.718442", \ + "0.517173, 0.518693, 0.523253, 0.531842, 0.543112, 0.590893, 0.761643" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.665444, 0.666964, 0.671524, 0.680114, 0.691384, 0.739164, 0.909914", \ + "0.660744, 0.662264, 0.666824, 0.675414, 0.686684, 0.734464, 0.905214", \ + "0.657034, 0.658554, 0.663114, 0.671704, 0.682974, 0.730754, 0.901504", \ + "0.646704, 0.648224, 0.652784, 0.661374, 0.672644, 0.720424, 0.891174", \ + "0.638824, 0.640344, 0.644904, 0.653494, 0.664764, 0.712544, 0.883294", \ + "0.588744, 0.590264, 0.594824, 0.603414, 0.614684, 0.662464, 0.833214", \ + "0.631944, 0.633464, 0.638024, 0.646614, 0.657884, 0.705664, 0.876414" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.797125, 0.798645, 0.803205, 0.811795, 0.823065, 0.870845, 1.041595", \ + "0.792425, 0.793945, 0.798505, 0.807095, 0.818365, 0.866145, 1.036895", \ + "0.788715, 0.790235, 0.794795, 0.803385, 0.814655, 0.862435, 1.033185", \ + "0.778385, 0.779905, 0.784465, 0.793055, 0.804325, 0.852105, 1.022855", \ + "0.770505, 0.772025, 0.776585, 0.785175, 0.796445, 0.844225, 1.014975", \ + "0.720425, 0.721945, 0.726505, 0.735095, 0.746365, 0.794145, 0.964895", \ + "0.763625, 0.765145, 0.769705, 0.778295, 0.789565, 0.837345, 1.008095" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.911294, 0.912814, 0.917374, 0.925964, 0.937234, 0.985014, 1.155764", \ + "0.906594, 0.908114, 0.912674, 0.921264, 0.932534, 0.980314, 1.151064", \ + "0.902884, 0.904404, 0.908964, 0.917554, 0.928824, 0.976604, 1.147354", \ + "0.892554, 0.894074, 0.898634, 0.907224, 0.918494, 0.966274, 1.137024", \ + "0.884674, 0.886194, 0.890754, 0.899344, 0.910614, 0.958394, 1.129144", \ + "0.834594, 0.836114, 0.840674, 0.849264, 0.860534, 0.908314, 1.079064", \ + "0.877794, 0.879314, 0.883874, 0.892464, 0.903734, 0.951514, 1.122264" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.944873; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.947422; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.950354; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.952447; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.071970; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.188488; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.322095; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 1.437997; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 1.132993; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.135527; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.138460; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.140540; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.260057; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.376575; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 1.510236; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 1.626131; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.135610, 0.137030, 0.141130, 0.150730, 0.161520, 0.208530, 0.275170"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + min_pulse_width_high : 0.179035; + min_pulse_width_low : 0.193580; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001414; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.186170, 0.187150, 0.191780, 0.199530, 0.209390, 0.256430, 0.428980", \ + "0.184870, 0.185850, 0.190480, 0.198230, 0.208090, 0.255130, 0.427680", \ + "0.181160, 0.182140, 0.186770, 0.194520, 0.204380, 0.251420, 0.423970", \ + "0.176090, 0.177070, 0.181700, 0.189450, 0.199310, 0.246350, 0.418900", \ + "0.174370, 0.175350, 0.179980, 0.187730, 0.197590, 0.244630, 0.417180", \ + "0.157350, 0.158330, 0.162960, 0.170710, 0.180570, 0.227610, 0.400160", \ + "0.270120, 0.271100, 0.275730, 0.283480, 0.293340, 0.340380, 0.512930" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.209610, 0.211080, 0.214700, 0.223440, 0.238500, 0.288740, 0.468340", \ + "0.208300, 0.209770, 0.213390, 0.222130, 0.237190, 0.287430, 0.467030", \ + "0.204190, 0.205660, 0.209280, 0.218020, 0.233080, 0.283320, 0.462920", \ + "0.194500, 0.195970, 0.199590, 0.208330, 0.223390, 0.273630, 0.453230", \ + "0.183650, 0.185120, 0.188740, 0.197480, 0.212540, 0.262780, 0.442380", \ + "0.139970, 0.141360, 0.145830, 0.154190, 0.168700, 0.218150, 0.404630", \ + "0.252740, 0.254130, 0.258600, 0.266960, 0.281470, 0.330920, 0.517400" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.084115, 0.082504, 0.077959, 0.069585, 0.060215, 0.016194, 0.119750", \ + "0.085075, 0.083464, 0.078919, 0.070545, 0.061175, 0.017154, 0.119750", \ + "0.089681, 0.088070, 0.083525, 0.075151, 0.065781, 0.021760, 0.119750", \ + "0.099317, 0.097706, 0.093161, 0.084787, 0.075417, 0.031396, 0.119750", \ + "0.109317, 0.107706, 0.103161, 0.094787, 0.085417, 0.041396, 0.119750", \ + "0.156944, 0.155333, 0.150788, 0.142414, 0.133044, 0.089023, 0.130219", \ + "0.324424, 0.322813, 0.318268, 0.309894, 0.300524, 0.256503, 0.297699" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.059535, 0.058313, 0.053200, 0.045329, 0.030815, 0.015000, 0.119750", \ + "0.060251, 0.059029, 0.053916, 0.046045, 0.031531, 0.015000, 0.119750", \ + "0.065022, 0.063800, 0.058687, 0.050816, 0.036302, 0.015000, 0.119750", \ + "0.074668, 0.073446, 0.068333, 0.060462, 0.045948, 0.015000, 0.119750", \ + "0.084550, 0.083328, 0.078215, 0.070344, 0.055830, 0.015000, 0.119750", \ + "0.132235, 0.131013, 0.125900, 0.118029, 0.103515, 0.054152, 0.119750", \ + "0.299915, 0.298693, 0.293580, 0.285709, 0.271195, 0.221832, 0.246525" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.604242, 0.600082, 0.599432, 0.587042, 0.579252, 0.532812, 0.452552", \ + "0.612642, 0.608482, 0.607832, 0.595442, 0.587652, 0.541212, 0.460952", \ + "0.613942, 0.609782, 0.609132, 0.596742, 0.588952, 0.542512, 0.462252", \ + "0.638642, 0.634482, 0.633832, 0.621442, 0.613652, 0.567212, 0.486952", \ + "0.654242, 0.650082, 0.649432, 0.637042, 0.629252, 0.582812, 0.502552", \ + "0.747142, 0.742982, 0.742332, 0.729942, 0.722152, 0.675712, 0.595452", \ + "0.907642, 0.903482, 0.902832, 0.890442, 0.882652, 0.836212, 0.755952" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(AA) { + bus_type : rf2_32x19_wm0_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001718; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.251950, 0.251690, 0.257060, 0.268440, 0.275150, 0.329520, 0.521350", \ + "0.250460, 0.250200, 0.255570, 0.266950, 0.273660, 0.328030, 0.519860", \ + "0.244480, 0.244220, 0.249590, 0.260970, 0.267680, 0.322050, 0.513880", \ + "0.235050, 0.234790, 0.240160, 0.251540, 0.258250, 0.312620, 0.504450", \ + "0.226980, 0.226720, 0.232090, 0.243470, 0.250180, 0.304550, 0.496380", \ + "0.179130, 0.178870, 0.184240, 0.195620, 0.202330, 0.256700, 0.448530", \ + "0.217150, 0.216890, 0.222260, 0.233640, 0.240350, 0.294720, 0.486550" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.008763; + clock : true; + max_transition : 0.419000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908044, 0.910235, 0.911160, 0.912073, 0.912982, 0.913896, 0.914809"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908126, 0.910318, 0.911242, 0.912156, 0.913065, 0.913979, 0.914892"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908168, 0.910360, 0.911284, 0.912198, 0.913107, 0.914021, 0.914934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908168, 0.910360, 0.911284, 0.912198, 0.913107, 0.914021, 0.914934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908168, 0.910360, 0.911284, 0.912198, 0.913107, 0.914021, 0.914934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908168, 0.910360, 0.911284, 0.912198, 0.913107, 0.914021, 0.914934"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908531, 0.910723, 0.911647, 0.912561, 0.913470, 0.914385, 0.915299"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.908541, 0.910733, 0.911657, 0.912570, 0.913480, 0.914394, 0.915308"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008468, 0.008838, 0.008847, 0.008856, 0.008865, 0.008874, 0.008991"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005426, 0.005432, 0.005437, 0.005443, 0.005472, 0.005478, 0.005483"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006029, 0.006035, 0.006041, 0.006047, 0.006080, 0.006086, 0.006092"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005426, 0.005432, 0.005437, 0.005443, 0.005472, 0.005478, 0.005483"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.006029, 0.006035, 0.006041, 0.006047, 0.006080, 0.006086, 0.006092"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.587371, 0.587640, 0.588232, 0.588837, 0.589426, 0.590016, 0.590614"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008726, 0.008735, 0.008744, 0.008855, 0.009012, 0.009021, 0.009030"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.646312, 0.647922, 0.652382, 0.661252, 0.671942, 0.719642, 0.889282", \ + "0.644882, 0.646492, 0.650952, 0.659822, 0.670512, 0.718212, 0.887852", \ + "0.639092, 0.640702, 0.645162, 0.654032, 0.664722, 0.712422, 0.882062", \ + "0.631182, 0.632792, 0.637252, 0.646122, 0.656812, 0.704512, 0.874152", \ + "0.620552, 0.622162, 0.626622, 0.635492, 0.646182, 0.693882, 0.863522", \ + "0.572832, 0.574442, 0.578902, 0.587772, 0.598462, 0.646162, 0.815802", \ + "0.612542, 0.614152, 0.618612, 0.627482, 0.638172, 0.685872, 0.855512" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.658123, 0.659733, 0.664193, 0.673063, 0.683753, 0.731453, 0.901093", \ + "0.656693, 0.658303, 0.662763, 0.671633, 0.682323, 0.730023, 0.899663", \ + "0.650903, 0.652513, 0.656973, 0.665843, 0.676533, 0.724233, 0.893873", \ + "0.642993, 0.644603, 0.649063, 0.657933, 0.668623, 0.716323, 0.885963", \ + "0.632363, 0.633973, 0.638433, 0.647303, 0.657993, 0.705693, 0.875333", \ + "0.584643, 0.586253, 0.590713, 0.599583, 0.610273, 0.657973, 0.827613", \ + "0.624353, 0.625963, 0.630423, 0.639293, 0.649983, 0.697683, 0.867323" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.674466, 0.676076, 0.680536, 0.689406, 0.700096, 0.747796, 0.917436", \ + "0.673036, 0.674646, 0.679106, 0.687976, 0.698666, 0.746366, 0.916006", \ + "0.667246, 0.668856, 0.673316, 0.682186, 0.692876, 0.740576, 0.910216", \ + "0.659336, 0.660946, 0.665406, 0.674276, 0.684966, 0.732666, 0.902306", \ + "0.648706, 0.650316, 0.654776, 0.663646, 0.674336, 0.722036, 0.891676", \ + "0.600986, 0.602596, 0.607056, 0.615926, 0.626616, 0.674316, 0.843956", \ + "0.640696, 0.642306, 0.646766, 0.655636, 0.666326, 0.714026, 0.883666" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.694528, 0.696138, 0.700598, 0.709468, 0.720158, 0.767858, 0.937498", \ + "0.693098, 0.694708, 0.699168, 0.708038, 0.718728, 0.766428, 0.936068", \ + "0.687308, 0.688918, 0.693378, 0.702248, 0.712938, 0.760638, 0.930278", \ + "0.679398, 0.681008, 0.685468, 0.694338, 0.705028, 0.752728, 0.922368", \ + "0.668768, 0.670378, 0.674838, 0.683708, 0.694398, 0.742098, 0.911738", \ + "0.621048, 0.622658, 0.627118, 0.635988, 0.646678, 0.694378, 0.864018", \ + "0.660758, 0.662368, 0.666828, 0.675698, 0.686388, 0.734088, 0.903728" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.830691, 0.832301, 0.836761, 0.845631, 0.856321, 0.904021, 1.073661", \ + "0.829261, 0.830871, 0.835331, 0.844201, 0.854891, 0.902591, 1.072231", \ + "0.823471, 0.825081, 0.829541, 0.838411, 0.849101, 0.896801, 1.066441", \ + "0.815561, 0.817171, 0.821631, 0.830501, 0.841191, 0.888891, 1.058531", \ + "0.804931, 0.806541, 0.811001, 0.819871, 0.830561, 0.878261, 1.047901", \ + "0.757211, 0.758821, 0.763281, 0.772151, 0.782841, 0.830541, 1.000181", \ + "0.796921, 0.798531, 0.802991, 0.811861, 0.822551, 0.870251, 1.039891" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.943249, 0.944859, 0.949319, 0.958189, 0.968879, 1.016579, 1.186219", \ + "0.941819, 0.943429, 0.947889, 0.956759, 0.967449, 1.015149, 1.184789", \ + "0.936029, 0.937639, 0.942099, 0.950969, 0.961659, 1.009359, 1.178999", \ + "0.928119, 0.929729, 0.934189, 0.943059, 0.953749, 1.001449, 1.171089", \ + "0.917489, 0.919099, 0.923559, 0.932429, 0.943119, 0.990819, 1.160459", \ + "0.869769, 0.871379, 0.875839, 0.884709, 0.895399, 0.943099, 1.112739", \ + "0.909479, 0.911089, 0.915549, 0.924419, 0.935109, 0.982809, 1.152449" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.091235, 1.092845, 1.097305, 1.106175, 1.116865, 1.164565, 1.334205", \ + "1.089805, 1.091415, 1.095875, 1.104745, 1.115435, 1.163135, 1.332775", \ + "1.084015, 1.085625, 1.090085, 1.098955, 1.109645, 1.157345, 1.326985", \ + "1.076105, 1.077715, 1.082175, 1.091045, 1.101735, 1.149435, 1.319075", \ + "1.065475, 1.067085, 1.071545, 1.080415, 1.091105, 1.138805, 1.308445", \ + "1.017755, 1.019365, 1.023825, 1.032695, 1.043385, 1.091085, 1.260725", \ + "1.057465, 1.059075, 1.063535, 1.072405, 1.083095, 1.130795, 1.300435" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.203870, 1.205480, 1.209940, 1.218810, 1.229500, 1.277200, 1.446840", \ + "1.202440, 1.204050, 1.208510, 1.217380, 1.228070, 1.275770, 1.445410", \ + "1.196650, 1.198260, 1.202720, 1.211590, 1.222280, 1.269980, 1.439620", \ + "1.188740, 1.190350, 1.194810, 1.203680, 1.214370, 1.262070, 1.431710", \ + "1.178110, 1.179720, 1.184180, 1.193050, 1.203740, 1.251440, 1.421080", \ + "1.130390, 1.132000, 1.136460, 1.145330, 1.156020, 1.203720, 1.373360", \ + "1.170100, 1.171710, 1.176170, 1.185040, 1.195730, 1.243430, 1.413070" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 1.200509; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 1.212497; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 1.229069; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.249448; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 1.387618; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 1.501882; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 1.652088; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 1.766431; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.126620, 0.129360, 0.133140, 0.143360, 0.154130, 0.201400, 0.267310"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.208654, 0.209704, 0.215504, 0.225454, 0.235764, 0.282024, 0.346564"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.208654, 0.209704, 0.215504, 0.225454, 0.235764, 0.282024, 0.346564"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.208654, 0.209704, 0.215504, 0.225454, 0.235764, 0.282024, 0.346564"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.039578, 0.040232, 0.039551, 0.039785, 0.039471, 0.039622, 0.039629"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.208654, 0.209704, 0.215504, 0.225454, 0.235764, 0.282024, 0.346564"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.034379, 0.034410, 0.034524, 0.034480, 0.034818, 0.034933, 0.034321"); + } + } + min_pulse_width_high : 0.181340; + min_pulse_width_low : 0.175960; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001143; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.193090, 0.194380, 0.198570, 0.208390, 0.217170, 0.264650, 0.431010", \ + "0.191750, 0.193040, 0.197230, 0.207050, 0.215830, 0.263310, 0.429670", \ + "0.188180, 0.189470, 0.193660, 0.203480, 0.212260, 0.259740, 0.426100", \ + "0.183040, 0.184330, 0.188520, 0.198340, 0.207120, 0.254600, 0.420960", \ + "0.181330, 0.182620, 0.186810, 0.196630, 0.205410, 0.252890, 0.419250", \ + "0.165400, 0.166690, 0.170880, 0.180700, 0.189480, 0.236960, 0.403320", \ + "0.278980, 0.280270, 0.284460, 0.294280, 0.303060, 0.350540, 0.516900" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.214130, 0.217020, 0.220530, 0.229670, 0.241040, 0.294870, 0.474800", \ + "0.211730, 0.214620, 0.218130, 0.227270, 0.238640, 0.292470, 0.472400", \ + "0.207320, 0.210210, 0.213720, 0.222860, 0.234230, 0.288060, 0.467990", \ + "0.197290, 0.200180, 0.203690, 0.212830, 0.224200, 0.278030, 0.457960", \ + "0.187170, 0.190060, 0.193570, 0.202710, 0.214080, 0.267910, 0.447840", \ + "0.146800, 0.148410, 0.154530, 0.163870, 0.175990, 0.226060, 0.412550", \ + "0.260370, 0.261980, 0.268100, 0.277440, 0.289560, 0.339630, 0.526120" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.084396, 0.082422, 0.077850, 0.068274, 0.058717, 0.015000, 0.119750", \ + "0.086341, 0.084367, 0.079795, 0.070219, 0.060662, 0.016255, 0.119750", \ + "0.091137, 0.089163, 0.084591, 0.075015, 0.065458, 0.021051, 0.119750", \ + "0.101094, 0.099120, 0.094548, 0.084972, 0.075415, 0.031008, 0.119750", \ + "0.111368, 0.109394, 0.104822, 0.095246, 0.085689, 0.041282, 0.119750", \ + "0.158628, 0.156654, 0.152082, 0.142506, 0.132949, 0.088542, 0.138388", \ + "0.325198, 0.323224, 0.318652, 0.309076, 0.299519, 0.255112, 0.304958" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.050347, 0.048834, 0.043232, 0.033858, 0.021832, 0.015000, 0.119750", \ + "0.052461, 0.050948, 0.045346, 0.035972, 0.023946, 0.015000, 0.119750", \ + "0.056877, 0.055364, 0.049762, 0.040388, 0.028362, 0.015000, 0.119750", \ + "0.067101, 0.065588, 0.059986, 0.050612, 0.038586, 0.015000, 0.119750", \ + "0.077236, 0.075723, 0.070121, 0.060747, 0.048721, 0.015000, 0.119750", \ + "0.124961, 0.123448, 0.117846, 0.108472, 0.096446, 0.045184, 0.119750", \ + "0.291631, 0.290118, 0.284516, 0.275142, 0.263116, 0.211854, 0.237555" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.604242, 0.600082, 0.599432, 0.587042, 0.579252, 0.532812, 0.452552", \ + "0.612642, 0.608482, 0.607832, 0.595442, 0.587652, 0.541212, 0.460952", \ + "0.613942, 0.609782, 0.609132, 0.596742, 0.588952, 0.542512, 0.462252", \ + "0.638642, 0.634482, 0.633832, 0.621442, 0.613652, 0.567212, 0.486952", \ + "0.654242, 0.650082, 0.649432, 0.637042, 0.629252, 0.582812, 0.502552", \ + "0.747142, 0.742982, 0.742332, 0.729942, 0.722152, 0.675712, 0.595452", \ + "0.907642, 0.903482, 0.902832, 0.890442, 0.882652, 0.836212, 0.755952" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(AB) { + bus_type : rf2_32x19_wm0_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001473; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.256640, 0.258870, 0.263550, 0.272220, 0.282640, 0.332360, 0.527260", \ + "0.254990, 0.257220, 0.261900, 0.270570, 0.280990, 0.330710, 0.525610", \ + "0.251060, 0.253290, 0.257970, 0.266640, 0.277060, 0.326780, 0.521680", \ + "0.241030, 0.243260, 0.247940, 0.256610, 0.267030, 0.316750, 0.511650", \ + "0.230150, 0.232380, 0.237060, 0.245730, 0.256150, 0.305870, 0.500770", \ + "0.182790, 0.185020, 0.189700, 0.198370, 0.208790, 0.258510, 0.453410", \ + "0.222320, 0.224550, 0.229230, 0.237900, 0.248320, 0.298040, 0.492940" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + } + bus(DB) { + bus_type : rf2_32x19_wm0_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001824; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.192591, 0.192011, 0.197151, 0.205421, 0.219661, 0.270781, 0.458201", \ + "0.189501, 0.188921, 0.194061, 0.202331, 0.216571, 0.267691, 0.455111", \ + "0.183911, 0.183331, 0.188471, 0.196741, 0.210981, 0.262101, 0.449521", \ + "0.174021, 0.173441, 0.178581, 0.186851, 0.201091, 0.252211, 0.439631", \ + "0.164131, 0.163551, 0.168691, 0.176961, 0.191201, 0.242321, 0.429741", \ + "0.117731, 0.117151, 0.122291, 0.130561, 0.144801, 0.195921, 0.383341", \ + "0.157320, 0.156740, 0.161880, 0.170150, 0.184390, 0.235510, 0.422930" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.212045, 0.214495, 0.220015, 0.234135, 0.244185, 0.304305, 0.505065", \ + "0.209785, 0.212235, 0.217755, 0.231875, 0.241925, 0.302045, 0.502805", \ + "0.204245, 0.206695, 0.212215, 0.226335, 0.236385, 0.296505, 0.497265", \ + "0.194515, 0.196965, 0.202485, 0.216605, 0.226655, 0.286775, 0.487535", \ + "0.184515, 0.186965, 0.192485, 0.206605, 0.216655, 0.276775, 0.477535", \ + "0.138115, 0.140565, 0.146085, 0.160205, 0.170255, 0.230375, 0.431135", \ + "0.177580, 0.180030, 0.185550, 0.199670, 0.209720, 0.269840, 0.470600" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.188962, 0.186512, 0.180602, 0.170442, 0.158432, 0.113192, 0.156878", \ + "0.190022, 0.187572, 0.181662, 0.171502, 0.159492, 0.114252, 0.157938", \ + "0.195822, 0.193372, 0.187462, 0.177302, 0.165292, 0.120052, 0.163738", \ + "0.205792, 0.203342, 0.197432, 0.187272, 0.175262, 0.130022, 0.173708", \ + "0.216092, 0.213642, 0.207732, 0.197572, 0.185562, 0.140322, 0.184008", \ + "0.262362, 0.259912, 0.254002, 0.243842, 0.231832, 0.186592, 0.230278", \ + "0.431642, 0.429192, 0.423282, 0.413122, 0.401112, 0.355872, 0.399558" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.192515, 0.190045, 0.183755, 0.172545, 0.159275, 0.105633, 0.136182", \ + "0.193555, 0.191085, 0.184795, 0.173585, 0.160315, 0.106673, 0.137222", \ + "0.199355, 0.196885, 0.190595, 0.179385, 0.166115, 0.112473, 0.143022", \ + "0.209295, 0.206825, 0.200535, 0.189325, 0.176055, 0.122413, 0.152962", \ + "0.219605, 0.217135, 0.210845, 0.199635, 0.186365, 0.132723, 0.163272", \ + "0.265895, 0.263425, 0.257135, 0.245925, 0.232655, 0.179013, 0.209562", \ + "0.435185, 0.432715, 0.426425, 0.415215, 0.401945, 0.348303, 0.378852" \ + ); + } + } + internal_power() { + when : "TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + bus(EMAA) { + bus_type : rf2_32x19_wm0_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005565; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002060; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x19_wm0_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005386; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.332403, 1.333723, 1.338193, 1.349873, 1.359193, 1.406943, 1.579273", \ + "1.330873, 1.332193, 1.336663, 1.348343, 1.357663, 1.405413, 1.577743", \ + "1.326053, 1.327373, 1.331843, 1.343523, 1.352843, 1.400593, 1.572923", \ + "1.316653, 1.317973, 1.322443, 1.334123, 1.343443, 1.391193, 1.563523", \ + "1.306023, 1.307343, 1.311813, 1.323493, 1.332813, 1.380563, 1.552893", \ + "1.257879, 1.259199, 1.263669, 1.275349, 1.284669, 1.332419, 1.504749", \ + "1.299087, 1.300407, 1.304877, 1.316557, 1.325877, 1.373627, 1.545957" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.332403, 1.333723, 1.338193, 1.349873, 1.359193, 1.406943, 1.579273", \ + "1.330873, 1.332193, 1.336663, 1.348343, 1.357663, 1.405413, 1.577743", \ + "1.326053, 1.327373, 1.331843, 1.343523, 1.352843, 1.400593, 1.572923", \ + "1.316653, 1.317973, 1.322443, 1.334123, 1.343443, 1.391193, 1.563523", \ + "1.306023, 1.307343, 1.311813, 1.323493, 1.332813, 1.380563, 1.552893", \ + "1.257879, 1.259199, 1.263669, 1.275349, 1.284669, 1.332419, 1.504749", \ + "1.299087, 1.300407, 1.304877, 1.316557, 1.325877, 1.373627, 1.545957" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.822771, 1.820511, 1.817491, 1.809591, 1.804937, 1.784194, 1.862220", \ + "1.824161, 1.821901, 1.818881, 1.810981, 1.806327, 1.785584, 1.863610", \ + "1.828291, 1.826031, 1.823011, 1.815111, 1.810457, 1.789714, 1.867740", \ + "1.838181, 1.835921, 1.832901, 1.825001, 1.820347, 1.799604, 1.877630", \ + "1.848431, 1.846171, 1.843151, 1.835251, 1.830597, 1.809854, 1.887880", \ + "1.896451, 1.894191, 1.891171, 1.883271, 1.878617, 1.857874, 1.935900", \ + "2.065421, 2.063161, 2.060141, 2.052241, 2.047587, 2.026844, 2.104870" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.822771, 1.820511, 1.817491, 1.809591, 1.804937, 1.784194, 1.862220", \ + "1.824161, 1.821901, 1.818881, 1.810981, 1.806327, 1.785584, 1.863610", \ + "1.828291, 1.826031, 1.823011, 1.815111, 1.810457, 1.789714, 1.867740", \ + "1.838181, 1.835921, 1.832901, 1.825001, 1.820347, 1.799604, 1.877630", \ + "1.848431, 1.846171, 1.843151, 1.835251, 1.830597, 1.809854, 1.887880", \ + "1.896451, 1.894191, 1.891171, 1.883271, 1.878617, 1.857874, 1.935900", \ + "2.065421, 2.063161, 2.060141, 2.052241, 2.047587, 2.026844, 2.104870" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000831; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.408908, 0.410559, 0.421001, 0.445989, 0.465939, 0.584401, 0.878501", \ + "0.406935, 0.408586, 0.419028, 0.444016, 0.463966, 0.582428, 0.876528", \ + "0.400955, 0.402606, 0.413048, 0.438036, 0.457986, 0.576448, 0.870548", \ + "0.391987, 0.393638, 0.404080, 0.429068, 0.449018, 0.567480, 0.861580", \ + "0.383718, 0.385369, 0.395810, 0.420798, 0.440749, 0.559211, 0.853311", \ + "0.336193, 0.337844, 0.348286, 0.373274, 0.393224, 0.511686, 0.805786", \ + "0.419357, 0.422248, 0.431949, 0.453307, 0.476408, 0.587540, 0.866830" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.408908, 0.410559, 0.421001, 0.445989, 0.465939, 0.584401, 0.878501", \ + "0.406935, 0.408586, 0.419028, 0.444016, 0.463966, 0.582428, 0.876528", \ + "0.400955, 0.402606, 0.413048, 0.438036, 0.457986, 0.576448, 0.870548", \ + "0.391987, 0.393638, 0.404080, 0.429068, 0.449018, 0.567480, 0.861580", \ + "0.383718, 0.385369, 0.395810, 0.420798, 0.440749, 0.559211, 0.853311", \ + "0.336193, 0.337844, 0.348286, 0.373274, 0.393224, 0.511686, 0.805786", \ + "0.419357, 0.422248, 0.431949, 0.453307, 0.476408, 0.587540, 0.866830" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.142461, 0.140580, 0.135762, 0.126698, 0.124597, 0.088101, 0.160429", \ + "0.144023, 0.142131, 0.137324, 0.128260, 0.126159, 0.089663, 0.161991", \ + "0.148533, 0.146641, 0.141834, 0.132770, 0.130669, 0.094173, 0.166501", \ + "0.159093, 0.157201, 0.152394, 0.143330, 0.141229, 0.104733, 0.177061", \ + "0.170962, 0.169070, 0.164263, 0.155199, 0.153098, 0.116602, 0.188930", \ + "0.222673, 0.220792, 0.215974, 0.206910, 0.204809, 0.168313, 0.240641", \ + "0.400727, 0.398835, 0.394028, 0.384964, 0.382863, 0.346367, 0.418695" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.142461, 0.140580, 0.135762, 0.126698, 0.124597, 0.088101, 0.160429", \ + "0.144023, 0.142131, 0.137324, 0.128260, 0.126159, 0.089663, 0.161991", \ + "0.148533, 0.146641, 0.141834, 0.132770, 0.130669, 0.094173, 0.166501", \ + "0.159093, 0.157201, 0.152394, 0.143330, 0.141229, 0.104733, 0.177061", \ + "0.170962, 0.169070, 0.164263, 0.155199, 0.153098, 0.116602, 0.188930", \ + "0.222673, 0.220792, 0.215974, 0.206910, 0.204809, 0.168313, 0.240641", \ + "0.400727, 0.398835, 0.394028, 0.384964, 0.382863, 0.346367, 0.418695" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011473, 0.011485, 0.011496, 0.011508, 0.011519, 0.011531, 0.011543"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011470, 0.011534, 0.011546, 0.011557, 0.011569, 0.011580, 0.011592"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001231; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.187380, 0.188360, 0.192990, 0.200740, 0.210600, 0.257640, 0.430190", \ + "0.186080, 0.187060, 0.191690, 0.199440, 0.209300, 0.256340, 0.428890", \ + "0.182370, 0.183350, 0.187980, 0.195730, 0.205590, 0.252630, 0.425180", \ + "0.177300, 0.178280, 0.182910, 0.190660, 0.200520, 0.247560, 0.420110", \ + "0.175580, 0.176560, 0.181190, 0.188940, 0.198800, 0.245840, 0.418390", \ + "0.158560, 0.159540, 0.164170, 0.171920, 0.181780, 0.228820, 0.401370", \ + "0.271330, 0.272310, 0.276940, 0.284690, 0.294550, 0.341590, 0.514140" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.210820, 0.212290, 0.215910, 0.224650, 0.239710, 0.289950, 0.469550", \ + "0.209510, 0.210980, 0.214600, 0.223340, 0.238400, 0.288640, 0.468240", \ + "0.205400, 0.206870, 0.210490, 0.219230, 0.234290, 0.284530, 0.464130", \ + "0.195710, 0.197180, 0.200800, 0.209540, 0.224600, 0.274840, 0.454440", \ + "0.184860, 0.186330, 0.189950, 0.198690, 0.213750, 0.263990, 0.443590", \ + "0.141180, 0.142570, 0.147040, 0.155400, 0.169910, 0.219360, 0.405840", \ + "0.253950, 0.255340, 0.259810, 0.268170, 0.282680, 0.332130, 0.518610" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085785, 0.084174, 0.079629, 0.071255, 0.061885, 0.017864, 0.121420", \ + "0.086745, 0.085134, 0.080589, 0.072215, 0.062845, 0.018824, 0.121420", \ + "0.091351, 0.089740, 0.085195, 0.076821, 0.067451, 0.023430, 0.121420", \ + "0.100987, 0.099376, 0.094831, 0.086457, 0.077087, 0.033066, 0.121420", \ + "0.110987, 0.109376, 0.104831, 0.096457, 0.087087, 0.043066, 0.121420", \ + "0.158614, 0.157003, 0.152458, 0.144084, 0.134714, 0.090693, 0.131889", \ + "0.326094, 0.324483, 0.319938, 0.311564, 0.302194, 0.258173, 0.299369" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.061205, 0.059983, 0.054870, 0.046999, 0.032485, 0.016670, 0.121420", \ + "0.061921, 0.060699, 0.055586, 0.047715, 0.033201, 0.016670, 0.121420", \ + "0.066692, 0.065470, 0.060357, 0.052486, 0.037972, 0.016670, 0.121420", \ + "0.076338, 0.075116, 0.070003, 0.062132, 0.047618, 0.016670, 0.121420", \ + "0.086220, 0.084998, 0.079885, 0.072014, 0.057500, 0.016670, 0.121420", \ + "0.133905, 0.132683, 0.127570, 0.119699, 0.105185, 0.055822, 0.121420", \ + "0.301585, 0.300363, 0.295250, 0.287379, 0.272865, 0.223502, 0.248195" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.604242, 0.600082, 0.599432, 0.587042, 0.579252, 0.532812, 0.452552", \ + "0.612642, 0.608482, 0.607832, 0.595442, 0.587652, 0.541212, 0.460952", \ + "0.613942, 0.609782, 0.609132, 0.596742, 0.588952, 0.542512, 0.462252", \ + "0.638642, 0.634482, 0.633832, 0.621442, 0.613652, 0.567212, 0.486952", \ + "0.654242, 0.650082, 0.649432, 0.637042, 0.629252, 0.582812, 0.502552", \ + "0.747142, 0.742982, 0.742332, 0.729942, 0.722152, 0.675712, 0.595452", \ + "0.907642, 0.903482, 0.902832, 0.890442, 0.882652, 0.836212, 0.755952" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + } + bus(TAA) { + bus_type : rf2_32x19_wm0_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001629; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.260640, 0.260380, 0.265750, 0.277130, 0.283840, 0.338210, 0.530040", \ + "0.259150, 0.258890, 0.264260, 0.275640, 0.282350, 0.336720, 0.528550", \ + "0.253170, 0.252910, 0.258280, 0.269660, 0.276370, 0.330740, 0.522570", \ + "0.243740, 0.243480, 0.248850, 0.260230, 0.266940, 0.321310, 0.513140", \ + "0.235670, 0.235410, 0.240780, 0.252160, 0.258870, 0.313240, 0.505070", \ + "0.187820, 0.187560, 0.192930, 0.204310, 0.211020, 0.265390, 0.457220", \ + "0.225840, 0.225580, 0.230950, 0.242330, 0.249040, 0.303410, 0.495240" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129510, 0.127700, 0.123420, 0.115180, 0.113270, 0.080092, 0.155367", \ + "0.130930, 0.129120, 0.124840, 0.116600, 0.114690, 0.081512, 0.156787", \ + "0.135030, 0.133220, 0.128940, 0.120700, 0.118790, 0.085612, 0.160887", \ + "0.144630, 0.142820, 0.138540, 0.130300, 0.128390, 0.095212, 0.170487", \ + "0.155420, 0.153610, 0.149330, 0.141090, 0.139180, 0.106002, 0.181277", \ + "0.202430, 0.200620, 0.196340, 0.188100, 0.186190, 0.153012, 0.228287", \ + "0.373820, 0.372010, 0.367730, 0.359490, 0.357580, 0.324402, 0.399677" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.129500, 0.127800, 0.123410, 0.114320, 0.105541, 0.078367, 0.126361", \ + "0.130910, 0.129210, 0.124820, 0.115730, 0.106951, 0.079777, 0.127771", \ + "0.135010, 0.133310, 0.128920, 0.119830, 0.111051, 0.083877, 0.131871", \ + "0.144610, 0.142910, 0.138520, 0.129430, 0.120651, 0.093477, 0.141471", \ + "0.155400, 0.153700, 0.149310, 0.140220, 0.131441, 0.104267, 0.152261", \ + "0.202420, 0.200720, 0.196330, 0.187240, 0.178461, 0.151287, 0.199281", \ + "0.373800, 0.372100, 0.367710, 0.358620, 0.349841, 0.322667, 0.370661" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011463, 0.011464, 0.011476, 0.011487, 0.011499, 0.011510, 0.011522"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.010113, 0.010133, 0.010143, 0.010153, 0.010163, 0.010174, 0.010184"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000862; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.538626, 0.543260, 0.553243, 0.571898, 0.595958, 0.702252, 0.977708", \ + "0.536923, 0.541558, 0.551540, 0.570196, 0.594255, 0.700549, 0.976005", \ + "0.533109, 0.537743, 0.547726, 0.566381, 0.590441, 0.696735, 0.972191", \ + "0.523005, 0.527640, 0.537622, 0.556278, 0.580337, 0.686631, 0.962087", \ + "0.511842, 0.516476, 0.526459, 0.545114, 0.569174, 0.675468, 0.950924", \ + "0.464681, 0.469316, 0.479298, 0.497954, 0.522013, 0.628307, 0.903763", \ + "0.552715, 0.556409, 0.565902, 0.585707, 0.608127, 0.712181, 0.968317" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.538626, 0.543260, 0.553243, 0.571898, 0.595958, 0.702252, 0.977708", \ + "0.536923, 0.541558, 0.551540, 0.570196, 0.594255, 0.700549, 0.976005", \ + "0.533109, 0.537743, 0.547726, 0.566381, 0.590441, 0.696735, 0.972191", \ + "0.523005, 0.527640, 0.537622, 0.556278, 0.580337, 0.686631, 0.962087", \ + "0.511842, 0.516476, 0.526459, 0.545114, 0.569174, 0.675468, 0.950924", \ + "0.464681, 0.469316, 0.479298, 0.497954, 0.522013, 0.628307, 0.903763", \ + "0.552715, 0.556409, 0.565902, 0.585707, 0.608127, 0.712181, 0.968317" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.211767, 0.209050, 0.202131, 0.189800, 0.175203, 0.124511, 0.162091", \ + "0.212911, 0.210194, 0.203275, 0.190944, 0.176347, 0.125677, 0.163257", \ + "0.219291, 0.216574, 0.209655, 0.197324, 0.182727, 0.132057, 0.169637", \ + "0.230225, 0.227508, 0.220589, 0.208258, 0.193661, 0.143024, 0.180604", \ + "0.241566, 0.238849, 0.231930, 0.219599, 0.205002, 0.154354, 0.191934", \ + "0.292485, 0.289768, 0.282849, 0.270518, 0.255921, 0.205251, 0.242831", \ + "0.468229, 0.465512, 0.458593, 0.446262, 0.431665, 0.380984, 0.418564" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.211767, 0.209050, 0.202131, 0.189800, 0.175203, 0.124511, 0.162091", \ + "0.212911, 0.210194, 0.203275, 0.190944, 0.176347, 0.125677, 0.163257", \ + "0.219291, 0.216574, 0.209655, 0.197324, 0.182727, 0.132057, 0.169637", \ + "0.230225, 0.227508, 0.220589, 0.208258, 0.193661, 0.143024, 0.180604", \ + "0.241566, 0.238849, 0.231930, 0.219599, 0.205002, 0.154354, 0.191934", \ + "0.292485, 0.289768, 0.282849, 0.270518, 0.255921, 0.205251, 0.242831", \ + "0.468229, 0.465512, 0.458593, 0.446262, 0.431665, 0.380984, 0.418564" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.070024, 0.070227, 0.070297, 0.070368, 0.070438, 0.070509, 0.070579"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.076358, 0.076482, 0.076558, 0.076782, 0.076925, 0.077002, 0.077079"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001233; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.193660, 0.194950, 0.199140, 0.208960, 0.217740, 0.265220, 0.431580", \ + "0.192320, 0.193610, 0.197800, 0.207620, 0.216400, 0.263880, 0.430240", \ + "0.188750, 0.190040, 0.194230, 0.204050, 0.212830, 0.260310, 0.426670", \ + "0.183610, 0.184900, 0.189090, 0.198910, 0.207690, 0.255170, 0.421530", \ + "0.181900, 0.183190, 0.187380, 0.197200, 0.205980, 0.253460, 0.419820", \ + "0.165970, 0.167260, 0.171450, 0.181270, 0.190050, 0.237530, 0.403890", \ + "0.279550, 0.280840, 0.285030, 0.294850, 0.303630, 0.351110, 0.517470" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.214700, 0.217590, 0.221100, 0.230240, 0.241610, 0.295440, 0.475370", \ + "0.212300, 0.215190, 0.218700, 0.227840, 0.239210, 0.293040, 0.472970", \ + "0.207890, 0.210780, 0.214290, 0.223430, 0.234800, 0.288630, 0.468560", \ + "0.197860, 0.200750, 0.204260, 0.213400, 0.224770, 0.278600, 0.458530", \ + "0.187740, 0.190630, 0.194140, 0.203280, 0.214650, 0.268480, 0.448410", \ + "0.147370, 0.148980, 0.155100, 0.164440, 0.176560, 0.226630, 0.413120", \ + "0.260940, 0.262550, 0.268670, 0.278010, 0.290130, 0.340200, 0.526690" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.085676, 0.083702, 0.079130, 0.069554, 0.059997, 0.016280, 0.121030", \ + "0.087621, 0.085647, 0.081075, 0.071499, 0.061942, 0.017535, 0.121030", \ + "0.092417, 0.090443, 0.085871, 0.076295, 0.066738, 0.022331, 0.121030", \ + "0.102374, 0.100400, 0.095828, 0.086252, 0.076695, 0.032288, 0.121030", \ + "0.112648, 0.110674, 0.106102, 0.096526, 0.086969, 0.042562, 0.121030", \ + "0.159908, 0.157934, 0.153362, 0.143786, 0.134229, 0.089822, 0.139668", \ + "0.326478, 0.324504, 0.319932, 0.310356, 0.300799, 0.256392, 0.306238" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.051627, 0.050114, 0.044512, 0.035138, 0.023112, 0.016280, 0.121030", \ + "0.053741, 0.052228, 0.046626, 0.037252, 0.025226, 0.016280, 0.121030", \ + "0.058157, 0.056644, 0.051042, 0.041668, 0.029642, 0.016280, 0.121030", \ + "0.068381, 0.066868, 0.061266, 0.051892, 0.039866, 0.016280, 0.121030", \ + "0.078516, 0.077003, 0.071401, 0.062027, 0.050001, 0.016280, 0.121030", \ + "0.126241, 0.124728, 0.119126, 0.109752, 0.097726, 0.046464, 0.121030", \ + "0.292911, 0.291398, 0.285796, 0.276422, 0.264396, 0.213134, 0.238835" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.021448, 0.021588, 0.021610, 0.021786, 0.021807, 0.021829, 0.021851"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.037609, 0.037647, 0.037685, 0.037722, 0.038222, 0.038260, 0.038298"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.604242, 0.600082, 0.599432, 0.587042, 0.579252, 0.532812, 0.452552", \ + "0.612642, 0.608482, 0.607832, 0.595442, 0.587652, 0.541212, 0.460952", \ + "0.613942, 0.609782, 0.609132, 0.596742, 0.588952, 0.542512, 0.462252", \ + "0.638642, 0.634482, 0.633832, 0.621442, 0.613652, 0.567212, 0.486952", \ + "0.654242, 0.650082, 0.649432, 0.637042, 0.629252, 0.582812, 0.502552", \ + "0.747142, 0.742982, 0.742332, 0.729942, 0.722152, 0.675712, 0.595452", \ + "0.907642, 0.903482, 0.902832, 0.890442, 0.882652, 0.836212, 0.755952" \ + ); + } + } + } + bus(TAB) { + bus_type : rf2_32x19_wm0_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001442; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.263760, 0.265990, 0.270670, 0.279340, 0.289760, 0.339480, 0.534380", \ + "0.262110, 0.264340, 0.269020, 0.277690, 0.288110, 0.337830, 0.532730", \ + "0.258180, 0.260410, 0.265090, 0.273760, 0.284180, 0.333900, 0.528800", \ + "0.248150, 0.250380, 0.255060, 0.263730, 0.274150, 0.323870, 0.518770", \ + "0.237270, 0.239500, 0.244180, 0.252850, 0.263270, 0.312990, 0.507890", \ + "0.189910, 0.192140, 0.196820, 0.205490, 0.215910, 0.265630, 0.460530", \ + "0.229440, 0.231670, 0.236350, 0.245020, 0.255440, 0.305160, 0.500060" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120561, 0.118751, 0.114461, 0.106210, 0.098763, 0.071555, 0.140846", \ + "0.123311, 0.121501, 0.117211, 0.108960, 0.101513, 0.074305, 0.143596", \ + "0.127091, 0.125281, 0.120991, 0.112740, 0.105293, 0.078085, 0.147376", \ + "0.137291, 0.135481, 0.131191, 0.122940, 0.115493, 0.088285, 0.157576", \ + "0.148071, 0.146261, 0.141971, 0.133720, 0.126273, 0.099065, 0.168356", \ + "0.195351, 0.193541, 0.189251, 0.181000, 0.173553, 0.146345, 0.215636", \ + "0.366001, 0.364191, 0.359901, 0.351650, 0.344203, 0.316995, 0.386286" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.120360, 0.118670, 0.114300, 0.105270, 0.095091, 0.061692, 0.119750", \ + "0.123100, 0.121410, 0.117040, 0.108010, 0.097831, 0.064432, 0.119750", \ + "0.126880, 0.125190, 0.120820, 0.111790, 0.101611, 0.068212, 0.123368", \ + "0.137100, 0.135410, 0.131040, 0.122010, 0.111831, 0.078432, 0.133588", \ + "0.147880, 0.146190, 0.141820, 0.132790, 0.122611, 0.089212, 0.144368", \ + "0.195140, 0.193450, 0.189080, 0.180050, 0.169871, 0.136472, 0.191628", \ + "0.365810, 0.364120, 0.359750, 0.350720, 0.340541, 0.307142, 0.362298" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.013219, 0.013232, 0.013246, 0.013259, 0.013272, 0.013285, 0.013299"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.011930, 0.011931, 0.011943, 0.011955, 0.011967, 0.011979, 0.011991"); + } + } + } + bus(TDB) { + bus_type : rf2_32x19_wm0_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001472; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.196532, 0.195952, 0.201092, 0.209362, 0.223602, 0.274722, 0.462142", \ + "0.193442, 0.192862, 0.198002, 0.206272, 0.220512, 0.271632, 0.459052", \ + "0.187852, 0.187272, 0.192412, 0.200682, 0.214922, 0.266042, 0.453462", \ + "0.177962, 0.177382, 0.182522, 0.190792, 0.205032, 0.256152, 0.443572", \ + "0.168072, 0.167492, 0.172632, 0.180902, 0.195142, 0.246262, 0.433682", \ + "0.121672, 0.121092, 0.126232, 0.134502, 0.148742, 0.199862, 0.387282", \ + "0.161261, 0.160681, 0.165821, 0.174091, 0.188331, 0.239451, 0.426871" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.215987, 0.218437, 0.223957, 0.238077, 0.248127, 0.308247, 0.509007", \ + "0.213727, 0.216177, 0.221697, 0.235817, 0.245867, 0.305987, 0.506747", \ + "0.208187, 0.210637, 0.216157, 0.230277, 0.240327, 0.300447, 0.501207", \ + "0.198457, 0.200907, 0.206427, 0.220547, 0.230597, 0.290717, 0.491477", \ + "0.188457, 0.190907, 0.196427, 0.210547, 0.220597, 0.280717, 0.481477", \ + "0.142057, 0.144507, 0.150027, 0.164147, 0.174197, 0.234317, 0.435077", \ + "0.181522, 0.183972, 0.189492, 0.203612, 0.213662, 0.273782, 0.474542" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.188962, 0.186512, 0.180602, 0.170442, 0.158432, 0.113192, 0.156878", \ + "0.190022, 0.187572, 0.181662, 0.171502, 0.159492, 0.114252, 0.157938", \ + "0.195822, 0.193372, 0.187462, 0.177302, 0.165292, 0.120052, 0.163738", \ + "0.205792, 0.203342, 0.197432, 0.187272, 0.175262, 0.130022, 0.173708", \ + "0.216092, 0.213642, 0.207732, 0.197572, 0.185562, 0.140322, 0.184008", \ + "0.262362, 0.259912, 0.254002, 0.243842, 0.231832, 0.186592, 0.230278", \ + "0.431642, 0.429192, 0.423282, 0.413122, 0.401112, 0.355872, 0.399558" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.192515, 0.190045, 0.183755, 0.172545, 0.159275, 0.105633, 0.136182", \ + "0.193555, 0.191085, 0.184795, 0.173585, 0.160315, 0.106673, 0.137222", \ + "0.199355, 0.196885, 0.190595, 0.179385, 0.166115, 0.112473, 0.143022", \ + "0.209295, 0.206825, 0.200535, 0.189325, 0.176055, 0.122413, 0.152962", \ + "0.219605, 0.217135, 0.210845, 0.199635, 0.186365, 0.132723, 0.163272", \ + "0.265895, 0.263425, 0.257135, 0.245925, 0.232655, 0.179013, 0.209562", \ + "0.435185, 0.432715, 0.426425, 0.415215, 0.401945, 0.348303, 0.378852" \ + ); + } + } + internal_power() { + when : "!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003927, 0.003992, 0.003996, 0.004000, 0.004020, 0.004024, 0.004028"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004466, 0.004470, 0.004475, 0.004479, 0.004484, 0.004488, 0.004493"); + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003223; + max_transition : 0.419000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.517667, 0.520095, 0.520615, 0.521135, 0.521657, 0.522179, 0.522701"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.121458, 0.121580, 0.121701, 0.121823, 0.121925, 0.122046, 0.122169"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.052705, 0.053073, 0.053978, 0.056163, 0.059928, 0.072488, 0.091200", \ + "0.052378, 0.052745, 0.053650, 0.055835, 0.059600, 0.072160, 0.090872", \ + "0.051350, 0.051718, 0.052623, 0.054808, 0.058573, 0.071133, 0.089845", \ + "0.048928, 0.049295, 0.050200, 0.052385, 0.056150, 0.068710, 0.087423", \ + "0.046215, 0.046583, 0.047488, 0.049673, 0.053438, 0.065998, 0.084710", \ + "0.039640, 0.039885, 0.041043, 0.042980, 0.045445, 0.057205, 0.075273", \ + "0.041645, 0.041890, 0.043048, 0.044985, 0.047450, 0.059210, 0.077277" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.052705, 0.053073, 0.053978, 0.056163, 0.059928, 0.072488, 0.091200", \ + "0.052378, 0.052745, 0.053650, 0.055835, 0.059600, 0.072160, 0.090872", \ + "0.051350, 0.051718, 0.052623, 0.054808, 0.058573, 0.071133, 0.089845", \ + "0.048928, 0.049295, 0.050200, 0.052385, 0.056150, 0.068710, 0.087423", \ + "0.046215, 0.046583, 0.047488, 0.049673, 0.053438, 0.065998, 0.084710", \ + "0.039640, 0.039885, 0.041043, 0.042980, 0.045445, 0.057205, 0.075273", \ + "0.041645, 0.041890, 0.043048, 0.044985, 0.047450, 0.059210, 0.077277" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.053675, 0.054398, 0.055275, 0.057560, 0.060403, 0.073860, 0.092655", \ + "0.053075, 0.053798, 0.054675, 0.056960, 0.059803, 0.073260, 0.092055", \ + "0.051973, 0.052695, 0.053573, 0.055858, 0.058700, 0.072157, 0.090953", \ + "0.049465, 0.050188, 0.051065, 0.053350, 0.056193, 0.069650, 0.088445", \ + "0.046935, 0.047658, 0.048535, 0.050820, 0.053663, 0.067120, 0.085915", \ + "0.041493, 0.041815, 0.042863, 0.045318, 0.047513, 0.059383, 0.077093", \ + "0.043700, 0.044023, 0.045070, 0.047525, 0.049720, 0.061590, 0.079298" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.008787, 1.006527, 1.003507, 0.995607, 0.990953, 0.970210, 0.943486", \ + "1.010177, 1.007917, 1.004897, 0.996997, 0.992343, 0.971600, 0.944876", \ + "1.014307, 1.012047, 1.009027, 1.001127, 0.996473, 0.975730, 0.949006", \ + "1.024197, 1.021937, 1.018917, 1.011017, 1.006363, 0.985620, 0.958896", \ + "1.034447, 1.032187, 1.029167, 1.021267, 1.016613, 0.995870, 0.969146", \ + "1.082467, 1.080207, 1.077187, 1.069287, 1.064633, 1.043890, 1.017166", \ + "1.146687, 1.144427, 1.141407, 1.133507, 1.128853, 1.108110, 1.081386" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.008787, 1.006527, 1.003507, 0.995607, 0.990953, 0.970210, 0.943486", \ + "1.010177, 1.007917, 1.004897, 0.996997, 0.992343, 0.971600, 0.944876", \ + "1.014307, 1.012047, 1.009027, 1.001127, 0.996473, 0.975730, 0.949006", \ + "1.024197, 1.021937, 1.018917, 1.011017, 1.006363, 0.985620, 0.958896", \ + "1.034447, 1.032187, 1.029167, 1.021267, 1.016613, 0.995870, 0.969146", \ + "1.082467, 1.080207, 1.077187, 1.069287, 1.064633, 1.043890, 1.017166", \ + "1.146687, 1.144427, 1.141407, 1.133507, 1.128853, 1.108110, 1.081386" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x19_wm0_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001140; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449799, 0.451615, 0.463101, 0.490588, 0.512533, 0.642841, 0.955876", \ + "0.447629, 0.449445, 0.460931, 0.488417, 0.510363, 0.640671, 0.953706", \ + "0.441051, 0.442867, 0.454353, 0.481839, 0.503785, 0.634093, 0.947128", \ + "0.431186, 0.433002, 0.444488, 0.471975, 0.493920, 0.624228, 0.937263", \ + "0.422090, 0.423906, 0.435391, 0.462878, 0.484824, 0.615132, 0.928167", \ + "0.369813, 0.371629, 0.383114, 0.410601, 0.432547, 0.562855, 0.875890", \ + "0.450817, 0.453998, 0.464669, 0.488163, 0.513574, 0.635819, 0.932563" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449799, 0.451615, 0.463101, 0.490588, 0.512533, 0.642841, 0.955876", \ + "0.447629, 0.449445, 0.460931, 0.488417, 0.510363, 0.640671, 0.953706", \ + "0.441051, 0.442867, 0.454353, 0.481839, 0.503785, 0.634093, 0.947128", \ + "0.431186, 0.433002, 0.444488, 0.471975, 0.493920, 0.624228, 0.937263", \ + "0.422090, 0.423906, 0.435391, 0.462878, 0.484824, 0.615132, 0.928167", \ + "0.369813, 0.371629, 0.383114, 0.410601, 0.432547, 0.562855, 0.875890", \ + "0.450817, 0.453998, 0.464669, 0.488163, 0.513574, 0.635819, 0.932563" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.128698, 0.127136, 0.121999, 0.108621, 0.095963, 0.056623, 0.110250", \ + "0.130799, 0.129237, 0.124100, 0.110722, 0.098064, 0.058724, 0.110531", \ + "0.134803, 0.133241, 0.128104, 0.114726, 0.102068, 0.062728, 0.114535", \ + "0.145649, 0.144087, 0.138950, 0.125572, 0.112914, 0.073574, 0.125381", \ + "0.157397, 0.155835, 0.150698, 0.137320, 0.124662, 0.085322, 0.137129", \ + "0.208349, 0.206787, 0.201650, 0.188272, 0.175614, 0.136274, 0.188080", \ + "0.386458, 0.384896, 0.379759, 0.366381, 0.353723, 0.314383, 0.366189" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.126477, 0.125014, 0.119745, 0.106932, 0.091515, 0.045289, 0.110250", \ + "0.128688, 0.127225, 0.121956, 0.109143, 0.093726, 0.047500, 0.110250", \ + "0.132626, 0.131163, 0.125894, 0.113081, 0.097664, 0.051438, 0.110250", \ + "0.143505, 0.142042, 0.136773, 0.123960, 0.108543, 0.062317, 0.110250", \ + "0.155143, 0.153680, 0.148411, 0.135598, 0.120181, 0.073955, 0.110250", \ + "0.206249, 0.204786, 0.199517, 0.186704, 0.171287, 0.125061, 0.158766", \ + "0.384303, 0.382840, 0.377571, 0.364758, 0.349341, 0.303115, 0.336820" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005319, 0.005325, 0.005330, 0.005335, 0.005341, 0.005346, 0.005351"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008905, 0.008987, 0.008996, 0.009005, 0.009014, 0.009023, 0.009032"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001560; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449799, 0.451615, 0.463101, 0.490588, 0.512533, 0.642841, 0.955876", \ + "0.447629, 0.449445, 0.460931, 0.488417, 0.510363, 0.640671, 0.953706", \ + "0.441051, 0.442867, 0.454353, 0.481839, 0.503785, 0.634093, 0.947128", \ + "0.431186, 0.433002, 0.444488, 0.471975, 0.493920, 0.624228, 0.937263", \ + "0.422090, 0.423906, 0.435391, 0.462878, 0.484824, 0.615132, 0.928167", \ + "0.369813, 0.371629, 0.383114, 0.410601, 0.432547, 0.562855, 0.875890", \ + "0.450817, 0.453998, 0.464669, 0.488163, 0.513574, 0.635819, 0.932563" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.449799, 0.451615, 0.463101, 0.490588, 0.512533, 0.642841, 0.955876", \ + "0.447629, 0.449445, 0.460931, 0.488417, 0.510363, 0.640671, 0.953706", \ + "0.441051, 0.442867, 0.454353, 0.481839, 0.503785, 0.634093, 0.947128", \ + "0.431186, 0.433002, 0.444488, 0.471975, 0.493920, 0.624228, 0.937263", \ + "0.422090, 0.423906, 0.435391, 0.462878, 0.484824, 0.615132, 0.928167", \ + "0.369813, 0.371629, 0.383114, 0.410601, 0.432547, 0.562855, 0.875890", \ + "0.450817, 0.453998, 0.464669, 0.488163, 0.513574, 0.635819, 0.932563" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.005319, 0.005325, 0.005330, 0.005335, 0.005341, 0.005346, 0.005351"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.008905, 0.008987, 0.008996, 0.009005, 0.009014, 0.009023, 0.009032"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001615; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.309606, 0.311116, 0.316046, 0.326736, 0.339386, 0.392106, 0.569996", \ + "0.309026, 0.310536, 0.315466, 0.326156, 0.338806, 0.391526, 0.569416", \ + "0.304136, 0.305646, 0.310576, 0.321266, 0.333916, 0.386636, 0.564526", \ + "0.294516, 0.296026, 0.300956, 0.311646, 0.324296, 0.377016, 0.554906", \ + "0.284586, 0.286096, 0.291026, 0.301716, 0.314366, 0.367086, 0.544976", \ + "0.238906, 0.240416, 0.245346, 0.256036, 0.268686, 0.321406, 0.499296", \ + "0.274946, 0.276456, 0.281386, 0.292076, 0.304726, 0.357446, 0.535336" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.405900, 0.407210, 0.412750, 0.425850, 0.439060, 0.491990, 0.683800", \ + "0.405310, 0.406620, 0.412160, 0.425260, 0.438470, 0.491400, 0.683210", \ + "0.400350, 0.401660, 0.407200, 0.420300, 0.433510, 0.486440, 0.678250", \ + "0.390810, 0.392120, 0.397660, 0.410760, 0.423970, 0.476900, 0.668710", \ + "0.380890, 0.382200, 0.387740, 0.400840, 0.414050, 0.466980, 0.658790", \ + "0.335200, 0.336510, 0.342050, 0.355150, 0.368360, 0.421290, 0.613100", \ + "0.372050, 0.373360, 0.378900, 0.392000, 0.405210, 0.458140, 0.649950" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.309606, 0.311116, 0.316046, 0.326736, 0.339386, 0.392106, 0.569996", \ + "0.309026, 0.310536, 0.315466, 0.326156, 0.338806, 0.391526, 0.569416", \ + "0.304136, 0.305646, 0.310576, 0.321266, 0.333916, 0.386636, 0.564526", \ + "0.294516, 0.296026, 0.300956, 0.311646, 0.324296, 0.377016, 0.554906", \ + "0.284586, 0.286096, 0.291026, 0.301716, 0.314366, 0.367086, 0.544976", \ + "0.238906, 0.240416, 0.245346, 0.256036, 0.268686, 0.321406, 0.499296", \ + "0.274946, 0.276456, 0.281386, 0.292076, 0.304726, 0.357446, 0.535336" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.405900, 0.407210, 0.412750, 0.425850, 0.439060, 0.491990, 0.683800", \ + "0.405310, 0.406620, 0.412160, 0.425260, 0.438470, 0.491400, 0.683210", \ + "0.400350, 0.401660, 0.407200, 0.420300, 0.433510, 0.486440, 0.678250", \ + "0.390810, 0.392120, 0.397660, 0.410760, 0.423970, 0.476900, 0.668710", \ + "0.380890, 0.382200, 0.387740, 0.400840, 0.414050, 0.466980, 0.658790", \ + "0.335200, 0.336510, 0.342050, 0.355150, 0.368360, 0.421290, 0.613100", \ + "0.372050, 0.373360, 0.378900, 0.392000, 0.405210, 0.458140, 0.649950" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.345237", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.346627", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.350757", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.360647", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.370897", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.418917", \ + "1.548438, 1.546178, 1.543158, 1.535258, 1.530604, 1.509861, 1.587887" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.345237", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.346627", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.350757", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.360647", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.370897", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.418917", \ + "1.548438, 1.546178, 1.543158, 1.535258, 1.530604, 1.509861, 1.587887" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.172473, 0.173104, 0.173277, 0.173505, 0.173679, 0.173853, 0.174005"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.181228, 0.181961, 0.182143, 0.182325, 0.182507, 0.182690, 0.182873"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.305788, 1.303528, 1.300508, 1.292608, 1.287954, 1.267211, 1.240487", \ + "1.307178, 1.304918, 1.301898, 1.293998, 1.289344, 1.268601, 1.241877", \ + "1.311308, 1.309048, 1.306028, 1.298128, 1.293474, 1.272731, 1.246007", \ + "1.321198, 1.318938, 1.315918, 1.308018, 1.303364, 1.282621, 1.255897", \ + "1.331448, 1.329188, 1.326168, 1.318268, 1.313614, 1.292871, 1.266147", \ + "1.379468, 1.377208, 1.374188, 1.366288, 1.361634, 1.340891, 1.314167", \ + "1.443688, 1.441428, 1.438408, 1.430508, 1.425854, 1.405111, 1.378387" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.604242, 0.600082, 0.599432, 0.587042, 0.579252, 0.532812, 0.452552", \ + "0.612642, 0.608482, 0.607832, 0.595442, 0.587652, 0.541212, 0.460952", \ + "0.613942, 0.609782, 0.609132, 0.596742, 0.588952, 0.542512, 0.462252", \ + "0.638642, 0.634482, 0.633832, 0.621442, 0.613652, 0.567212, 0.486952", \ + "0.654242, 0.650082, 0.649432, 0.637042, 0.629252, 0.582812, 0.502552", \ + "0.747142, 0.742982, 0.742332, 0.729942, 0.722152, 0.675712, 0.595452", \ + "0.907642, 0.903482, 0.902832, 0.890442, 0.882652, 0.836212, 0.755952" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x19_wm0_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005450; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.192591, 0.192011, 0.197151, 0.205421, 0.219661, 0.270781, 0.458201", \ + "0.189501, 0.188921, 0.194061, 0.202331, 0.216571, 0.267691, 0.455111", \ + "0.183911, 0.183331, 0.188471, 0.196741, 0.210981, 0.262101, 0.449521", \ + "0.174021, 0.173441, 0.178581, 0.186851, 0.201091, 0.252211, 0.439631", \ + "0.164131, 0.163551, 0.168691, 0.176961, 0.191201, 0.242321, 0.429741", \ + "0.117731, 0.117151, 0.122291, 0.130561, 0.144801, 0.195921, 0.383341", \ + "0.157320, 0.156740, 0.161880, 0.170150, 0.184390, 0.235510, 0.422930" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.212045, 0.214495, 0.220015, 0.234135, 0.244185, 0.304305, 0.505065", \ + "0.209785, 0.212235, 0.217755, 0.231875, 0.241925, 0.302045, 0.502805", \ + "0.204245, 0.206695, 0.212215, 0.226335, 0.236385, 0.296505, 0.497265", \ + "0.194515, 0.196965, 0.202485, 0.216605, 0.226655, 0.286775, 0.487535", \ + "0.184515, 0.186965, 0.192485, 0.206605, 0.216655, 0.276775, 0.477535", \ + "0.138115, 0.140565, 0.146085, 0.160205, 0.170255, 0.230375, 0.431135", \ + "0.177580, 0.180030, 0.185550, 0.199670, 0.209720, 0.269840, 0.470600" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.188962, 0.186512, 0.180602, 0.170442, 0.158432, 0.113192, 0.156878", \ + "0.190022, 0.187572, 0.181662, 0.171502, 0.159492, 0.114252, 0.157938", \ + "0.195822, 0.193372, 0.187462, 0.177302, 0.165292, 0.120052, 0.163738", \ + "0.205792, 0.203342, 0.197432, 0.187272, 0.175262, 0.130022, 0.173708", \ + "0.216092, 0.213642, 0.207732, 0.197572, 0.185562, 0.140322, 0.184008", \ + "0.262362, 0.259912, 0.254002, 0.243842, 0.231832, 0.186592, 0.230278", \ + "0.431642, 0.429192, 0.423282, 0.413122, 0.401112, 0.355872, 0.399558" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.192515, 0.190045, 0.183755, 0.172545, 0.159275, 0.105633, 0.136182", \ + "0.193555, 0.191085, 0.184795, 0.173585, 0.160315, 0.106673, 0.137222", \ + "0.199355, 0.196885, 0.190595, 0.179385, 0.166115, 0.112473, 0.143022", \ + "0.209295, 0.206825, 0.200535, 0.189325, 0.176055, 0.122413, 0.152962", \ + "0.219605, 0.217135, 0.210845, 0.199635, 0.186365, 0.132723, 0.163272", \ + "0.265895, 0.263425, 0.257135, 0.245925, 0.232655, 0.179013, 0.209562", \ + "0.435185, 0.432715, 0.426425, 0.415215, 0.401945, 0.348303, 0.378852" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.003942, 0.003947, 0.003951, 0.003955, 0.004022, 0.004026, 0.004030"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.004430, 0.004435, 0.004444, 0.004448, 0.004452, 0.004457, 0.004461"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001746; + max_transition : 0.419000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.538626, 0.543260, 0.553243, 0.571898, 0.595958, 0.702252, 0.977708", \ + "0.536923, 0.541558, 0.551540, 0.570196, 0.594255, 0.700549, 0.976005", \ + "0.533109, 0.537743, 0.547726, 0.566381, 0.590441, 0.696735, 0.972191", \ + "0.523005, 0.527640, 0.537622, 0.556278, 0.580337, 0.686631, 0.962087", \ + "0.511842, 0.516476, 0.526459, 0.545114, 0.569174, 0.675468, 0.950924", \ + "0.464681, 0.469316, 0.479298, 0.497954, 0.522013, 0.628307, 0.903763", \ + "0.552715, 0.556409, 0.565902, 0.585707, 0.608127, 0.712181, 0.968317" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.538626, 0.543260, 0.553243, 0.571898, 0.595958, 0.702252, 0.977708", \ + "0.536923, 0.541558, 0.551540, 0.570196, 0.594255, 0.700549, 0.976005", \ + "0.533109, 0.537743, 0.547726, 0.566381, 0.590441, 0.696735, 0.972191", \ + "0.523005, 0.527640, 0.537622, 0.556278, 0.580337, 0.686631, 0.962087", \ + "0.511842, 0.516476, 0.526459, 0.545114, 0.569174, 0.675468, 0.950924", \ + "0.464681, 0.469316, 0.479298, 0.497954, 0.522013, 0.628307, 0.903763", \ + "0.552715, 0.556409, 0.565902, 0.585707, 0.608127, 0.712181, 0.968317" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.211767, 0.209050, 0.202131, 0.189800, 0.175203, 0.124511, 0.162091", \ + "0.212911, 0.210194, 0.203275, 0.190944, 0.176347, 0.125677, 0.163257", \ + "0.219291, 0.216574, 0.209655, 0.197324, 0.182727, 0.132057, 0.169637", \ + "0.230225, 0.227508, 0.220589, 0.208258, 0.193661, 0.143024, 0.180604", \ + "0.241566, 0.238849, 0.231930, 0.219599, 0.205002, 0.154354, 0.191934", \ + "0.292485, 0.289768, 0.282849, 0.270518, 0.255921, 0.205251, 0.242831", \ + "0.468229, 0.465512, 0.458593, 0.446262, 0.431665, 0.380984, 0.418564" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "0.211767, 0.209050, 0.202131, 0.189800, 0.175203, 0.124511, 0.162091", \ + "0.212911, 0.210194, 0.203275, 0.190944, 0.176347, 0.125677, 0.163257", \ + "0.219291, 0.216574, 0.209655, 0.197324, 0.182727, 0.132057, 0.169637", \ + "0.230225, 0.227508, 0.220589, 0.208258, 0.193661, 0.143024, 0.180604", \ + "0.241566, 0.238849, 0.231930, 0.219599, 0.205002, 0.154354, 0.191934", \ + "0.292485, 0.289768, 0.282849, 0.270518, 0.255921, 0.205251, 0.242831", \ + "0.468229, 0.465512, 0.458593, 0.446262, 0.431665, 0.380984, 0.418564" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.070024, 0.070227, 0.070297, 0.070368, 0.070438, 0.070509, 0.070579"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values ("0.076358, 0.076482, 0.076558, 0.076782, 0.076925, 0.077002, 0.077079"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002074; + max_transition : 0.419000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.035402, 1.036722, 1.041192, 1.052872, 1.062192, 1.109942, 1.282272", \ + "1.033872, 1.035192, 1.039662, 1.051342, 1.060662, 1.108412, 1.280742", \ + "1.029052, 1.030372, 1.034842, 1.046522, 1.055842, 1.103592, 1.275922", \ + "1.019652, 1.020972, 1.025442, 1.037122, 1.046442, 1.094192, 1.266522", \ + "1.009022, 1.010342, 1.014812, 1.026492, 1.035812, 1.083562, 1.255892", \ + "0.960878, 0.962198, 0.966668, 0.978348, 0.987668, 1.035418, 1.207748", \ + "1.002086, 1.003406, 1.007876, 1.019556, 1.028876, 1.076626, 1.248956" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.682471, 1.680211, 1.677191, 1.669291, 1.664637, 1.643894, 1.721920", \ + "1.683861, 1.681601, 1.678581, 1.670681, 1.666027, 1.645284, 1.723310", \ + "1.687991, 1.685731, 1.682711, 1.674811, 1.670157, 1.649414, 1.727440", \ + "1.697881, 1.695621, 1.692601, 1.684701, 1.680047, 1.659304, 1.737330", \ + "1.708131, 1.705871, 1.702851, 1.694951, 1.690297, 1.669554, 1.747580", \ + "1.756151, 1.753891, 1.750871, 1.742971, 1.738317, 1.717574, 1.795600", \ + "1.925121, 1.922861, 1.919841, 1.911941, 1.907287, 1.886544, 1.964570" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.332403, 1.333723, 1.338193, 1.349873, 1.359193, 1.406943, 1.579273", \ + "1.330873, 1.332193, 1.336663, 1.348343, 1.357663, 1.405413, 1.577743", \ + "1.326053, 1.327373, 1.331843, 1.343523, 1.352843, 1.400593, 1.572923", \ + "1.316653, 1.317973, 1.322443, 1.334123, 1.343443, 1.391193, 1.563523", \ + "1.306023, 1.307343, 1.311813, 1.323493, 1.332813, 1.380563, 1.552893", \ + "1.257879, 1.259199, 1.263669, 1.275349, 1.284669, 1.332419, 1.504749", \ + "1.299087, 1.300407, 1.304877, 1.316557, 1.325877, 1.373627, 1.545957" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.332403, 1.333723, 1.338193, 1.349873, 1.359193, 1.406943, 1.579273", \ + "1.330873, 1.332193, 1.336663, 1.348343, 1.357663, 1.405413, 1.577743", \ + "1.326053, 1.327373, 1.331843, 1.343523, 1.352843, 1.400593, 1.572923", \ + "1.316653, 1.317973, 1.322443, 1.334123, 1.343443, 1.391193, 1.563523", \ + "1.306023, 1.307343, 1.311813, 1.323493, 1.332813, 1.380563, 1.552893", \ + "1.257879, 1.259199, 1.263669, 1.275349, 1.284669, 1.332419, 1.504749", \ + "1.299087, 1.300407, 1.304877, 1.316557, 1.325877, 1.373627, 1.545957" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.822771, 1.820511, 1.817491, 1.809591, 1.804937, 1.784194, 1.862220", \ + "1.824161, 1.821901, 1.818881, 1.810981, 1.806327, 1.785584, 1.863610", \ + "1.828291, 1.826031, 1.823011, 1.815111, 1.810457, 1.789714, 1.867740", \ + "1.838181, 1.835921, 1.832901, 1.825001, 1.820347, 1.799604, 1.877630", \ + "1.848431, 1.846171, 1.843151, 1.835251, 1.830597, 1.809854, 1.887880", \ + "1.896451, 1.894191, 1.891171, 1.883271, 1.878617, 1.857874, 1.935900", \ + "2.065421, 2.063161, 2.060141, 2.052241, 2.047587, 2.026844, 2.104870" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + index_2 ("0.007000, 0.013000, 0.026000, 0.052000, 0.080000, 0.209000, 0.419000"); + values (\ + "1.822771, 1.820511, 1.817491, 1.809591, 1.804937, 1.784194, 1.862220", \ + "1.824161, 1.821901, 1.818881, 1.810981, 1.806327, 1.785584, 1.863610", \ + "1.828291, 1.826031, 1.823011, 1.815111, 1.810457, 1.789714, 1.867740", \ + "1.838181, 1.835921, 1.832901, 1.825001, 1.820347, 1.799604, 1.877630", \ + "1.848431, 1.846171, 1.843151, 1.835251, 1.830597, 1.809854, 1.887880", \ + "1.896451, 1.894191, 1.891171, 1.883271, 1.878617, 1.857874, 1.935900", \ + "2.065421, 2.063161, 2.060141, 2.052241, 2.047587, 2.026844, 2.104870" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 3.583e-05; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 5.926e-05; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 3.518e-05; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 4.925e-05; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.ps b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.ps new file mode 100644 index 00000000..1291b0cf --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_ss_0p81v_0p81v_m40c.ps @@ -0,0 +1,5288 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Mon Nov 11 12:00:59 2019 +% +% Instance Options: +% Instance Name: rf2_32x19_wm0 +% Number of Words: 32 +% Number of Bits: 19 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: off +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (ss Process) (0.81) (-40) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ss Process) (0.81) (-40) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (ss Process) (0.81) (-40) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x19_wm0 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + newpath + 109.056 193.374 moveto + 164.056 193.374 lineto + stroke + 109.056 193.374 ArrowLeft + 164.056 193.374 ArrowRight + newpath + 274.056 205.874 moveto + 274.056 160.116 lineto + stroke + newpath + 219.056 198.374 moveto + 219.056 173.503 lineto + stroke + newpath + 164.056 205.874 moveto + 164.056 167.238 lineto + stroke + newpath + 164.056 193.374 moveto + 219.056 193.374 lineto + stroke + 164.056 193.374 ArrowLeft + 219.056 193.374 ArrowRight + newpath + 219.056 193.374 moveto + 274.056 193.374 lineto + stroke + 219.056 193.374 ArrowLeft + 274.056 193.374 ArrowRight + newpath + 296.556 63.7808 moveto + 296.556 41.4104 lineto + stroke + newpath + 76.556 63.7808 moveto + 76.556 41.4104 lineto + stroke + newpath + 71.556 56.2808 moveto + 16.556 56.2808 lineto + stroke + newpath + 16.556 56.2808 moveto + 71.556 56.2808 lineto + 81.556 41.2808 lineto + 161.556 41.2808 lineto + stroke + newpath + 16.556 41.2808 moveto + 71.556 41.2808 lineto + 81.556 56.2808 lineto + 161.556 56.2808 lineto + stroke + newpath + 281.556 56.2808 moveto + 291.556 56.2808 lineto + 301.556 41.2808 lineto + 311.556 41.2808 lineto + stroke + newpath + 281.556 41.2808 moveto + 291.556 41.2808 lineto + 301.556 56.2808 lineto + 311.556 56.2808 lineto + stroke + newpath + 160.635 56.2808 moveto + 288.635 56.2808 lineto + stroke + newpath + 160.635 41.2808 moveto + 288.635 41.2808 lineto + stroke + newpath + 306.556 56.2808 moveto + 346.556 56.2808 lineto + stroke + newpath + 306.556 41.2808 moveto + 346.556 41.2808 lineto + stroke + newpath + 54.056 69.4576 moveto + 54.056 58.7808 lineto + stroke + newpath + 274.056 70.708 moveto + 274.056 58.7808 lineto + stroke + newpath + 274.068 61.3056 moveto + 296.548 61.3056 lineto + stroke + 274.068 61.3056 ArrowLeft + 296.548 61.3056 ArrowRight + newpath + 54.068 61.3056 moveto + 76.548 61.3056 lineto + stroke + 54.068 61.3056 ArrowLeft + 76.548 61.3056 ArrowRight + newpath + 164.1 203.374 moveto + 274.056 203.374 lineto + stroke + 164.1 203.374 ArrowLeft + 274.056 203.374 ArrowRight + newpath + 54.388 203.368 moveto + 164.344 203.368 lineto + stroke + 54.388 203.368 ArrowLeft + 164.344 203.368 ArrowRight + newpath + 44.58 22.3712 moveto + 44.58 0 lineto + stroke + newpath + 19.58 15 moveto + 29.58 0 lineto + stroke + newpath + 29.58 15 moveto + 39.58 0 lineto + stroke + newpath + 19.58 0 moveto + 29.58 15 lineto + stroke + newpath + 29.58 0 moveto + 39.58 15 lineto + stroke + newpath + 39.4744 0.3128 moveto + 44.6552 8.1304 lineto + stroke + newpath + 56.6336 22.3712 moveto + 56.6336 0.3208 lineto + stroke + newpath + 19.4472 15.112 moveto + 39.6552 15.112 lineto + stroke + newpath + 39.6552 14.904 moveto + 49.0304 0.3208 lineto + stroke + newpath + 49.2384 0.3208 moveto + 346.322 0.3208 lineto + stroke + newpath + 19.7944 0.0432 moveto + 39.3776 0.0432 lineto + stroke + newpath + 44.0936 19.1072 moveto + 56.5936 19.1072 lineto + stroke + 44.0936 19.1072 ArrowLeft + 56.5936 19.1072 ArrowRight + newpath + 17.0584 142.309 moveto + 27.0584 127.309 lineto + stroke + newpath + 27.0584 142.309 moveto + 37.0584 127.309 lineto + stroke + newpath + 17.0584 127.309 moveto + 27.0584 142.309 lineto + stroke + newpath + 27.0584 127.309 moveto + 37.0584 142.309 lineto + stroke + newpath + 42.0584 147.309 moveto + 54.7592 147.309 lineto + stroke + 42.0584 147.309 ArrowLeft + 54.7592 147.309 ArrowRight + newpath + 37.0512 142.145 moveto + 47.712 127.514 lineto + stroke + newpath + 280.423 127.352 moveto + 47.6088 127.352 lineto + stroke + newpath + 36.9128 142.076 moveto + 16.7032 142.076 lineto + stroke + newpath + 37.1552 127.354 moveto + 16.9456 127.354 lineto + stroke + newpath + 37.2592 127.353 moveto + 42.2952 134.18 lineto + stroke + newpath + 280.628 127.238 moveto + 293.337 143.14 lineto + stroke + newpath + 42.2496 155.602 moveto + 42.2496 124.337 lineto + stroke + newpath + 286.695 154.179 moveto + 286.695 126.264 lineto + stroke + newpath + 17.7008 93.3248 moveto + 27.7008 78.3248 lineto + stroke + newpath + 27.7008 93.3248 moveto + 37.7008 78.3248 lineto + stroke + newpath + 17.7008 78.3248 moveto + 27.7008 93.3248 lineto + stroke + newpath + 27.7008 78.3248 moveto + 37.7008 93.3248 lineto + stroke + newpath + 42.7008 98.3248 moveto + 55.2008 98.3248 lineto + stroke + 42.7008 98.3248 ArrowLeft + 55.2008 98.3248 ArrowRight + newpath + 55.2008 115.954 moveto + 55.2008 95.8248 lineto + stroke + newpath + 37.1032 93.0912 moveto + 16.8936 93.0912 lineto + stroke + newpath + 37.2424 78.7864 moveto + 17.0328 78.7864 lineto + stroke + newpath + 37.624 78.924 moveto + 47.9784 94.4352 lineto + stroke + newpath + 181.046 94.34 moveto + 47.8336 94.34 lineto + stroke + newpath + 37.4232 92.7688 moveto + 47.4232 77.7688 lineto + stroke + newpath + 180.63 78.368 moveto + 46.7224 78.368 lineto + stroke + newpath + 181.174 78.6232 moveto + 191.826 94.8952 lineto + stroke + newpath + 181.174 94.4248 moveto + 192.296 77.7912 lineto + stroke + newpath + 192.283 78.0568 moveto + 202.882 94.296 lineto + stroke + newpath + 213.481 78.0568 moveto + 224.08 94.296 lineto + stroke + newpath + 224.08 78.0568 moveto + 234.678 94.296 lineto + stroke + newpath + 234.678 78.0568 moveto + 245.278 94.156 lineto + stroke + newpath + 202.882 78.0568 moveto + 213.481 94.296 lineto + stroke + newpath + 192.283 94.296 moveto + 202.882 78.0568 lineto + stroke + newpath + 202.882 94.296 moveto + 213.481 78.0568 lineto + stroke + newpath + 213.481 94.296 moveto + 224.08 78.0568 lineto + stroke + newpath + 224.08 94.296 moveto + 234.678 78.0568 lineto + stroke + newpath + 234.678 94.4352 moveto + 245.278 78.0568 lineto + stroke + newpath + 257.435 77.6736 moveto + 191.602 77.6736 lineto + stroke + newpath + 256.879 94.4576 moveto + 191.462 94.4576 lineto + stroke + newpath + 41.9712 106.297 moveto + 41.9712 80.736 lineto + stroke + newpath + 273.962 157.514 moveto + 273.962 123.453 lineto + stroke + newpath + 333.028 142.932 moveto + 293.13 142.932 lineto + stroke + newpath + 266.046 94.664 moveto + 347.714 94.664 lineto + stroke + newpath + 267.296 78.3096 moveto + 346.88 78.3096 lineto + stroke + newpath + 163.778 110.17 moveto + 163.778 92.1296 lineto + stroke + newpath + 185.895 106.701 moveto + 185.895 83.368 lineto + stroke + newpath + 262.84 99.436 moveto + 275.34 99.436 lineto + stroke + 262.84 99.436 ArrowLeft + 275.34 99.436 ArrowRight + newpath + 275.34 117.065 moveto + 275.34 96.936 lineto + stroke + newpath + 262.111 107.408 moveto + 262.111 81.8464 lineto + stroke + newpath + 256.879 78.208 moveto + 267.001 94.7568 lineto + stroke + newpath + 257.146 94.2968 moveto + 267.435 78.0688 lineto + stroke + newpath + 245.291 78.208 moveto + 257.007 94.436 lineto + stroke + newpath + 245.428 94.0192 moveto + 255.979 78.208 lineto + stroke + newpath + 163.307 99.7368 moveto + 185.926 100.227 lineto + stroke + 163.307 99.7368 ArrowLeft + 185.926 100.227 ArrowRight + newpath + 273.326 140.852 moveto + 286.027 140.852 lineto + stroke + 273.326 140.852 ArrowLeft + 286.027 140.852 ArrowRight + /Times-Roman findfont 10 scalefont setfont + (CLKA) () 0 177.754 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (CENA) () 0.6944 132.111 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (AA[J]) () 0 85.532 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (QA[I]) () 0 44.9864 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 81.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 136.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 191.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 246.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 109.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 219.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (Q1) () 86.556 47.8232 RightLabel + /Times-Roman findfont 7 scalefont setfont + (Q2) () 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+/leftmargin 165 def +/rightmargin 570 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 18 sub def +/Helvetica-Bold findfont title_size scalefont setfont +(High Density Two Port Register File SVT MVT Compiler) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(CLN28HPM 28nm Process) rightmargin pagey LeftShow +/pagey pagey 18 sub def +( 256 Rows Per Bit line, 0.389um^2 Bit Cell) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(32 Words X 19 Bits, Mux 2 Instance) rightmargin pagey LeftShow +/pagey pagey 18 sub def + +0.35 50 650 ARMlogo +/pagey pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.81V) TextPiece +( and a junction temperature of ) TextPiece +(-40.01C) TextReserveSpace +(-40.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x19_wm0) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (19) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (off) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 572 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 518 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 464 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 422 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 368 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 314 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 224 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 176 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (100.94) (2136.4) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 22 8 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(AB[4:0]) SymbolInput +(DB[18:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[18:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(QA[18:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[18:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[18:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[18:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=64 +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.5515) (0.6542) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.6487) (0.7580) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.9524) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.2494) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.4322) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.6944) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.3571) (0.4116) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.1790) () TableT1CornerRow +(Min. Low pulse width CLKA) () (t) (ckal) (0.1936) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.1813) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.1760) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=206 +% headerEstimate=110 +% estimate=98 +% tailEstimate=64 +% spaceLeft=206 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (3.3060) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (2.7500) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (3.3440) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (2.7720) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (1.1471) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(SOA load factor) () (K) (load_soa) () (2.8640) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (3.1660) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=476 +% headerEstimate=110 +% estimate=1036 +% tailEstimate=14 +% spaceLeft=476 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.2502) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.1392) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.2561) () TableT1CornerDRow +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.1263) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.2589) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.1392) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.2633) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.1263) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.2125) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0854) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (1.3136) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.2141) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0857) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (1.3136) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.2167) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.1864) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Setup Btw. CLKA and EMAA) () (t) (emaas) (1.0358) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (1.6903) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (1.0358) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (1.6903) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (1.3328) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (1.8306) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.4407) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.1531) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.2138) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0871) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (1.3136) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.5692) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.2050) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.2147) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0870) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (1.3136) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.2206) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.1864) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0537) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (1.3136) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0537) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0534) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0534) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0537) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (1.3136) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (1.0166) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (1.3136) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (1.0166) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.4848) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.1247) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.4848) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (1.6903) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.4140) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (1.6903) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.4140) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (1.3136) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (1.3136) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.6293) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.2167) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.1864) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.5692) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.2050) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (1.0358) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (1.6903) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (1.3328) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (1.8306) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=414 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=414 +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.5452) (0.6468) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.5473) (0.6493) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.5498) (0.6522) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.5515) (0.6542) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.6516) (0.7720) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (0.7492) (0.8868) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (0.8611) (1.0184) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (0.9581) (1.1326) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.5452) (0.6468) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.5473) (0.6493) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.5498) (0.6522) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.5515) (0.6542) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.6516) (0.7720) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (0.7492) (0.8868) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (0.8611) (1.0184) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (0.9581) (1.1326) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.6424) (0.7505) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.6445) (0.7530) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.6470) (0.7559) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.6487) (0.7580) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (0.7488) (0.8757) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (0.8463) (0.9905) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (0.9583) (1.1222) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (1.0554) (1.2364) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.6424) (0.7505) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.6445) (0.7530) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.6470) (0.7559) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.6487) (0.7580) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (0.7488) (0.8757) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (0.8463) (0.9905) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (0.9583) (1.1222) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (1.0554) (1.2364) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (0.9449) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (0.9474) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (0.9504) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.9524) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (1.0720) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (1.1885) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (1.3221) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (1.4380) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (1.2005) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (1.2125) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (1.2291) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (1.2494) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (1.3876) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (1.5019) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (1.6521) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (1.7664) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.4248) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.4273) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.4302) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.4322) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.5500) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (0.6648) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (0.7964) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (0.9106) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (0.6462) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (0.6580) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (0.6743) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.6944) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (0.8306) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (0.9431) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (1.0911) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (1.2037) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.3571) (0.4116) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.1790) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.1936) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.1813) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.1760) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=56 +% headerEstimate=82 +% estimate=280 +% tailEstimate=84 +% spaceLeft=56 +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.1995) (0.2145) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.1959) (0.2108) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.2791) (0.3031) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.3238) (0.3532) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.2024) (0.2178) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.1950) (0.2110) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.2013) (0.2184) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.3529) (0.3903) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.3388) (0.3746) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.1908) (0.2078) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.1960) (0.2113) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.1954) (0.2108) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.2816) (0.3062) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.3432) (0.3744) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.2011) (0.2168) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.1944) (0.2105) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.1994) (0.2161) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.3731) (0.4138) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.3416) (0.3794) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.1903) (0.2083) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=224 +% headerEstimate=77 +% estimate=336 +% tailEstimate=0 +% spaceLeft=224 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (8.6890) Table1CornerRow +(CENA) () (1.4140) Table1CornerRow +(AA) () (1.7180) Table1CornerRow +(CLKB) () (8.7630) Table1CornerRow +(CENB) () (1.1430) Table1CornerRow +(AB) () (1.4730) Table1CornerRow +(DB) () (1.8240) Table1CornerRow +(EMAA) () (5.5650) Table1CornerRow +(EMASA) () (2.0600) Table1CornerRow +(EMAB) () (5.3860) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(TENA) () (0.8311) Table1CornerRow +(TCENA) () (1.2310) Table1CornerRow +(TAA) () (1.6290) Table1CornerRow +(TENB) () (0.8624) Table1CornerRow +(TCENB) () (1.2330) Table1CornerRow +(TAB) () (1.4420) Table1CornerRow +(TDB) () (1.4720) Table1CornerRow +(SIA) () (1.1400) Table1CornerRow +(SEA) () (1.5600) Table1CornerRow +(DFTRAMBYP) () (1.6150) Table1CornerRow +(SIB) () (5.4500) Table1CornerRow +(SEB) () (1.7460) Table1CornerRow +(COLLDISN) () (2.0740) Table1CornerRow +(RET1N) () (3.2230) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=315 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=315 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (4.424e-05) Table1CornerRow +(Peri Standby std Curr.) (3) (7.316e-05) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (4.397e-05) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (4.152e-07) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (4.344e-05) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (6.081e-05) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (2.630e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (2.635e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (2.637e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (2.637e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (2.637e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (2.637e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (2.659e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (2.659e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (5.954e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Peri Read AC (EMAA=2) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (5.954e-04) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (3.317e-05) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (3.322e-05) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (3.325e-05) Table1CornerRow +(Core Write AC (EMAB=3) Curr.) (1,4) (3.325e-05) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (3.325e-05) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (3.325e-05) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (3.346e-05) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (3.347e-05) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (6.212e-04) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (6.213e-04) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (6.213e-04) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (4.150e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (9.250e-05) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (1.25799) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (5.123099) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (0.896377) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (4.158242) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=79 +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0895) (0.1620) TableD1CornerRow +(CLKB) (0.0907) (0.1620) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0810) Table1CornerRow +(Ground) () (0.0810) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 16 +%%EOF diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.avm b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.avm new file mode 100644 index 00000000..faed220e --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.avm @@ -0,0 +1,162 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:23 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: avm +# AMCI Version: 1.4.3-EAC +# avm_memcomp Version: 2.1.1-EAC +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +rf2_32x19_wm0 { + MEMORY_TYPE RegFile + EQUIV_GATE_COUNT 669 + VDD_PIN VDDCE VDDPE + GND_PIN VSSE + #This file is for PROCESS TT, CORNER TT_0P90V_0P90V_25C + #However, RedHawk needs the process to be specified as 'PROCESS XX' + PROCESS XX + Cload 3.5e-05nF + VDD 0.9 0.9 + + state_boolean avm_into_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!RET1N&!DFTRAMBYP)" "!RET1N" "NA" + state_boolean avm_outof_lowpwr "(((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&RET1N&!DFTRAMBYP)" "RET1N" "NA" + state_boolean avm_read_write "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_read_desel "RET1N&!DFTRAMBYP&((CLKA&TENA&!CENA)|(CLKA&!TENA&!TCENA))&((CLKB&TENB&CENB)|(CLKB&!TENB&TCENB))" "CLKA CLKB" "NA" + state_boolean avm_desel_write "RET1N&!DFTRAMBYP&((CLKA&TENA&CENA)|(CLKA&!TENA&TCENA))&((CLKB&TENB&!CENB)|(CLKB&!TENB&!TCENB))" "CLKA CLKB" "NA" + state_boolean avm_scan_capture "((CLKA&!SEA&RET1N&DFTRAMBYP)&(CLKB&!SEB&RET1N&DFTRAMBYP))" "DFTRAMBYP" "NA" + state_boolean avm_scan_shift "(CLKA&SEA&RET1N&DFTRAMBYP)&(CLKB&SEB&RET1N&DFTRAMBYP)" "DFTRAMBYP" "NA" + state_boolean standby_trig "RET1N&((CLKA&CENA&TENA)|(CLKA&TCENA&!TENA))&((CLKB&CENB&TENB)|(CLKB&TCENB&!TENB))&!DFTRAMBYP" "CLKA CLKB" "NA" + state_boolean standby_ntrig "RET1N&((!CLKA&CENA&TENA)|(!CLKA&TCENA&!TENA))&((!CLKB&CENB&TENB)|(!CLKB&TCENB&!TENB))&!DFTRAMBYP" "!CLKA !CLKB" "NA" + + Cpd avm_into_lowpwr { + VDDCE VSSE 5.98446e-05nF + VDDPE VSSE 1.30733e-04nF + } + PEAK_I avm_into_lowpwr { + VDDCE VSSE 1.43021mA + VDDPE VSSE 1.70642mA + } + Cpd avm_outof_lowpwr { + VDDCE VSSE 6.58291e-05nF + VDDPE VSSE 7.54664e-04nF + } + PEAK_I avm_outof_lowpwr { + VDDCE VSSE 1.57323mA + VDDPE VSSE 7.73124mA + } + Cpd avm_read_write { + VDDCE VSSE 7.64447e-05nF + VDDPE VSSE 1.56253e-03nF + } + PEAK_I avm_read_write { + VDDCE VSSE 2.11022mA + VDDPE VSSE 10.03899mA + } + Cpd avm_read_desel { + VDDCE VSSE 3.33525e-05nF + VDDPE VSSE 7.72578e-04nF + } + PEAK_I avm_read_desel { + VDDCE VSSE 1.06661mA + VDDPE VSSE 6.66464mA + } + Cpd avm_desel_write { + VDDCE VSSE 4.30921e-05nF + VDDPE VSSE 7.89953e-04nF + } + PEAK_I avm_desel_write { + VDDCE VSSE 1.03387mA + VDDPE VSSE 6.82145mA + } + Cpd avm_scan_capture { + VDDCE VSSE 8.40553e-06nF + VDDPE VSSE 2.14259e-03nF + } + PEAK_I avm_scan_capture { + VDDCE VSSE 0.27129mA + VDDPE VSSE 6.93612mA + } + Cpd avm_scan_shift { + VDDCE VSSE 8.40553e-06nF + VDDPE VSSE 2.14259e-03nF + } + PEAK_I avm_scan_shift { + VDDCE VSSE 0.27129mA + VDDPE VSSE 6.93612mA + } + Cpd standby_trig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.77000e-05nF + } + Cpd standby_ntrig { + VDDCE VSSE 0.00000e+00nF + VDDPE VSSE 1.96666e-05nF + } + LEAKAGE_I { + VDDCE VSSE 3.86400e-04mA + VDDPE VSSE 2.12300e-03mA + } + tsu 0.126538ns + ck2q_delay 0.353328ns + tr_q 0.0186942ns + tf_q 0.0218482ns + CHARACTERIZATION_MODE accurate +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.dat b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.dat new file mode 100644 index 00000000..f10a1153 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.dat @@ -0,0 +1,322 @@ +# +# CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +# +# Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +# +# Use of this Software is subject to the terms and conditions of the +# applicable license agreement with ARM Physical IP, Inc. +# In addition, this Software is protected by patents, copyright law +# and international treaties. +# +# The copyright notice(s) in this Software does not indicate actual or +# intended publication of this Software. +# +# Compiler Name: High Density Two Port Register File SVT MVT Compiler +# +# Creation Date: Mon Nov 11 11:59:43 2019 +# +# Instance Options: +# Instance Name: rf2_32x19_wm0 +# Number of Words: 32 +# Number of Bits: 19 +# Multiplexer Width: 2 +# Multi-Vt selection: BASE +# Frequency : 1 +# Activity Factor <%>: 50 +# Pipeline: off +# Word-Write Mask: off +# Word Partition Size: 1 +# Write through: off +# Top Metal Layer: m5-m10 +# Power Type: otc +# Redundancy: off +# Redundant Columns: 2 +# Redundant Rows: 0 +# BIST MUXes: on +# Soft Error Repair (SER): none +# Power Gating: off +# Back Biasing: off +# Retention: on +# Extra Margin Adjustment: on +# Advanced Test Features: off +# Customer Comment: This is a memory instance +# Bus-notation: on +# Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +# Name Case: upper +# Check Instance Name: off +# Diodes: on +# Drive Strength: 6 +# Site Definitions: off +# Library Name: USERLIB +# Liberty setting: nldm +# +# Compiler Versions: +# Memory Version: r4p0 +# Lang compiler Version: 4.1.6-EAC2 +# View Name: datatable +# AMCI Version: 1.4.3-EAC +# datatable_memcomp Version: 1.3.0-amci +# +# Modeling Assumptions: N/A +# +# Modeling Limitations: N/A +# +# Known Bugs: N/A +# +# Known Work Arounds: N/A +# +# Units used in Datatable : +# geomx: micron +# geomy: micron +# Voltage: volts +# Temprature: Degree Celsius +# Current: mA +# Time: ns +# +name tt_0p90v_0p90v_25c +S N +geomx 21.1650 +geomy 100.9400 +volt 0.9000 +temp 25.0000 +# High Density Two Port Register File SVT MVT Compiler : Propagation Delay specific information. +tcenacenya 0.1187 +ttcenacenya 0.1176 +ttenacenyapu 0.1613 +ttenacenyanu 0.1884 +tdftrambypcenya 0.1213 +taaaya 0.1038 +ttaaaya 0.1082 +ttenaayapu 0.1878 +ttenaayanu 0.1834 +tdftrambypaya 0.1113 +tcenbcenyb 0.1195 +ttcenbcenyb 0.1185 +ttenbcenybpu 0.1658 +ttenbcenybnu 0.2026 +tdftrambypcenyb 0.1187 +tabayb 0.1040 +ttabayb 0.1062 +ttenbaybpu 0.2038 +ttenbaybnu 0.1937 +tdftrambypayb 0.1118 +taccqa_rd0 0.3506 +taccqa_rd1 0.3517 +taccqa_rd2 0.3527 +taccqa_rd3 0.3533 +taccqa_rd4 0.4111 +taccqa_rd5 0.4628 +taccqa_rd6 0.5189 +taccqa_rd7 0.5701 +taccqa_scan0 0.3506 +taccqa_scan1 0.3517 +taccqa_scan2 0.3527 +taccqa_scan3 0.3533 +taccqa_scan4 0.4111 +taccqa_scan5 0.4628 +taccqa_scan6 0.5189 +taccqa_scan7 0.5701 +tclkasoa_rd0 0.3843 +tclkasoa_rd1 0.3853 +tclkasoa_rd2 0.3863 +tclkasoa_rd3 0.3870 +tclkasoa_rd4 0.4447 +tclkasoa_rd5 0.4965 +tclkasoa_rd6 0.5526 +tclkasoa_rd7 0.6037 +tclkasoa_scan0 0.3843 +tclkasoa_scan1 0.3853 +tclkasoa_scan2 0.3863 +tclkasoa_scan3 0.3870 +tclkasoa_scan4 0.4447 +tclkasoa_scan5 0.4965 +tclkasoa_scan6 0.5526 +tclkasoa_scan7 0.6037 +tclkbsob 0.2155 +# High Density Two Port Register File SVT MVT Compiler : Kload specific information. +kload_cenya 2.0800 +kload_aya 1.6620 +kload_cenyb 1.9640 +kload_ayb 1.6740 +kload_qa 0.6365 +kload_soa 1.7020 +kload_sob 1.8420 +# High Density Two Port Register File SVT MVT Compiler : Cycle time specific information. +tcyca_ema0 0.4965 +tcyca_ema1 0.4976 +tcyca_ema2 0.4986 +tcyca_ema3 0.4992 +tcyca_ema4 0.5578 +tcyca_ema5 0.6103 +tcyca_ema6 0.6673 +tcyca_ema7 0.7193 +tcycb_ema0 0.5696 +tcycb_ema1 0.5756 +tcycb_ema2 0.5818 +tcycb_ema3 0.5909 +tcycb_ema4 0.6613 +tcycb_ema5 0.7136 +tcycb_ema6 0.7812 +tcycb_ema7 0.8325 +# High Density Two Port Register File SVT MVT Compiler : Clock collision specific information. +tcracwb_rd0 0.2328 +tcracwb_rd1 0.2338 +tcracwb_rd2 0.2348 +tcracwb_rd3 0.2355 +tcracwb_rd4 0.2932 +tcracwb_rd5 0.3449 +tcracwb_rd6 0.4011 +tcracwb_rd7 0.4522 +tcwbcra_wr0 0.3248 +tcwbcra_wr1 0.3307 +tcwbcra_wr2 0.3369 +tcwbcra_wr3 0.3458 +tcwbcra_wr4 0.4152 +tcwbcra_wr5 0.4667 +tcwbcra_wr6 0.5333 +tcwbcra_wr7 0.5838 +# High Density Two Port Register File SVT MVT Compiler : Pulse width specific information. +tckah 0.1133 +tckal 0.1131 +tckbh 0.1159 +tckbl 0.1128 +# High Density Two Port Register File SVT MVT Compiler : Setup time specific information. +tcenas 0.1176 +taas 0.1265 +tcenbs 0.1240 +tabs 0.1337 +tdbs 0.0714 +temaas 0.5390 +temasas 0.5390 +temabs 0.6306 +ttenas 0.2339 +ttcenas 0.1176 +ttaas 0.1310 +ttenbs 0.3090 +ttcenbs 0.1252 +ttabs 0.1373 +ttdbs 0.0737 +tsias 0.2573 +tseas 0.2573 +tdftrambypas 0.2083 +tdftrambypbs 0.2083 +tsibs 0.0714 +tsebs 0.3090 +tcolldisnas 0.5390 +tcolldisnbs 0.6306 +# High Density Two Port Register File SVT MVT Compiler : Hold time specific information. +tcenah 0.0489 +tcenaf_ret1nfh 0.6340 +tcenaf_ret1nrh 0.3362 +taah 0.0821 +tcenbh 0.0492 +tcenbf_ret1nfh 0.6340 +tcenbf_ret1nrh 0.3362 +tabh 0.0765 +tdbh 0.1126 +temaah 0.8454 +temasah 0.8454 +temabh 0.8756 +ttenah 0.0903 +ttcenah 0.0517 +ttcenaf_ret1nfh 0.6340 +ttcenaf_ret1nrh 0.3362 +ttaah 0.0821 +ttenbh 0.1239 +ttcenbh 0.0507 +ttcenbf_ret1nfh 0.6340 +ttcenbf_ret1nrh 0.3362 +ttabh 0.0765 +ttdbh 0.1126 +tret1nf_dftrambypfh 0.0313 +tret1nr_dftrambypfh 0.6340 +tret1nf_cenbrh 0.0313 +tret1nf_cenarh 0.0294 +tret1nf_tcenarh 0.0294 +tret1nf_tcenbrh 0.0313 +tret1nr_tcenbrh 0.6340 +tret1nr_tcenarh 0.5424 +tret1nr_cenbrh 0.6340 +tret1nr_cenarh 0.5424 +tsiah 0.0817 +tseah 0.8454 +tdftrambypah 0.8454 +tdftrambypbh 0.6340 +tdftrambypr_ret1nfh 0.6340 +tdftrambypr_ret1nrh 0.3362 +tsibh 0.1126 +tsebh 0.1239 +tcolldisnah 0.8454 +tcolldisnbh 0.8756 +# High Density Two Port Register File SVT MVT Compiler : Input Capacitance specific information. +icap_clka 0.0091 +icap_cena 0.0013 +icap_aa 0.0016 +icap_clkb 0.0097 +icap_cenb 0.0013 +icap_ab 0.0016 +icap_db 0.0019 +icap_emaa 0.0058 +icap_emasa 0.0025 +icap_emab 0.0056 +icap_tena 0.0009 +icap_tcena 0.0014 +icap_taa 0.0015 +icap_tenb 0.0010 +icap_tcenb 0.0014 +icap_tab 0.0016 +icap_tdb 0.0016 +icap_sia 0.0012 +icap_sea 0.0016 +icap_dftrambyp 0.0021 +icap_sib 0.0058 +icap_seb 0.0019 +icap_colldisn 0.0021 +icap_ret1n 0.0034 +# High Density Two Port Register File SVT MVT Compiler : current specific information. +icc_standby_c_chipdisable 3.864e-04 +icc_standby_p_chipdisable 2.123e-03 +icc_standby_c_ret1 3.727e-04 +icc_standby_p_ret1 1.273e-04 +icc_standby_c_selective_precharge 3.566e-04 +icc_standby_p_selective_precharge 2.022e-03 +icc_c_rd0_a 2.999e-05 +icc_c_rd1_a 3.000e-05 +icc_c_rd2_a 3.000e-05 +icc_c_rd3_a 3.002e-05 +icc_c_rd4_a 3.019e-05 +icc_c_rd5_a 3.019e-05 +icc_c_rd6_a 3.019e-05 +icc_c_rd7_a 3.028e-05 +icc_p_rd0_a 6.947e-04 +icc_p_rd1_a 6.947e-04 +icc_p_rd2_a 6.953e-04 +icc_p_rd3_a 6.953e-04 +icc_p_rd4_a 6.965e-04 +icc_p_rd5_a 6.968e-04 +icc_p_rd6_a 6.972e-04 +icc_p_rd7_a 6.990e-04 +icc_c_wr0_b 3.875e-05 +icc_c_wr1_b 3.877e-05 +icc_c_wr2_b 3.877e-05 +icc_c_wr3_b 3.878e-05 +icc_c_wr4_b 3.896e-05 +icc_c_wr5_b 3.896e-05 +icc_c_wr6_b 3.896e-05 +icc_c_wr7_b 3.904e-05 +icc_p_wr0_b 7.104e-04 +icc_p_wr1_b 7.104e-04 +icc_p_wr2_b 7.110e-04 +icc_p_wr3_b 7.110e-04 +icc_p_wr4_b 7.122e-04 +icc_p_wr5_b 7.125e-04 +icc_p_wr6_b 7.128e-04 +icc_p_wr7_b 7.146e-04 +icc_c_desela 0.000e+00 +icc_p_desela 4.837e-05 +icc_c_deselb 0.000e+00 +icc_p_deselb 1.066e-04 +icc_c_peak 2.110219 +icc_p_peak 10.038987 +icc_c_inrush 1.662267 +icc_p_inrush 7.731237 diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.lib b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.lib new file mode 100644 index 00000000..3872e876 --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.lib @@ -0,0 +1,13667 @@ +/* + * CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. + * + * Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. + * + * Use of this Software is subject to the terms and conditions of the + * applicable license agreement with ARM Physical IP, Inc. + * In addition, this Software is protected by patents, copyright law + * and international treaties. + * + * The copyright notice(s) in this Software does not indicate actual or + * intended publication of this Software. + * + * Compiler Name: High Density Two Port Register File SVT MVT Compiler + * + * Creation Date: Mon Nov 11 12:00:34 2019 + * + * Instance Options: + * Instance Name: rf2_32x19_wm0 + * Number of Words: 32 + * Number of Bits: 19 + * Multiplexer Width: 2 + * Multi-Vt selection: BASE + * Frequency : 1 + * Activity Factor <%>: 50 + * Pipeline: off + * Word-Write Mask: off + * Word Partition Size: 1 + * Write through: off + * Top Metal Layer: m5-m10 + * Power Type: otc + * Redundancy: off + * Redundant Columns: 2 + * Redundant Rows: 0 + * BIST MUXes: on + * Soft Error Repair (SER): none + * Power Gating: off + * Back Biasing: off + * Retention: on + * Extra Margin Adjustment: on + * Advanced Test Features: off + * Customer Comment: This is a memory instance + * Bus-notation: on + * Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE + * Name Case: upper + * Check Instance Name: off + * Diodes: on + * Drive Strength: 6 + * Site Definitions: off + * Library Name: USERLIB + * Liberty setting: nldm + * + * Compiler Versions: + * Memory Version: r4p0 + * Lang compiler Version: 4.1.6-EAC2 + * View Name: Liberty + * AMCI Version: 1.4.3-EAC + * RTE Version: 2.1.0-EAC + * liberty_memcomp Version: 2.2.1-EAC + * + * Verified With: + * Synopsys Primetime, Cadence Encounter Timing System, Synopsys Design Compiler, + * Cadence RTL Compiler. + * + * Modeling Assumptions: + * This library contains a black box description for a memory element. At + * the library level, a default_max_transition constraint is set to the + * maximum characterized input slew. Each output has a max_capacitance + * constraint set to the highest characterized output load. These two + * constraints force Design Compiler to synthesize circuits that operate + * within the characterization space. The user can tighten these constraints, + * if desired. When writing SDF from Synopsys Design Compiler or Synopsys + * Primetime, use the version 3.0 or 2.1 option. This ensures the SDF will + * annotate to simulation models provided with this generator. + * + * Modeling Limitations: + * Due to limitations of the .lib format, some data reduction was necessary. + * When reducing data, minimum values were chosen for the fast case corner + * and maximum values were used for the typical and best case corners. It + * is recommended that critical timing and setup and hold times be checked + * at all corners. + * + * Known Bugs: N/A + * + * Known Work Arounds: N/A + * +*/ + +library(USERLIB_tt_0p90v_0p90v_25c) { + delay_model : table_lookup; + library_features(report_delay_calculation,report_power_calculation); + revision : 1.1; + date : "Mon Nov 11 12:00:34 2019"; + comment : "Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved."; + + /* unit attributes */ + time_unit : "1ns"; + voltage_unit : "1V"; + current_unit : "1mA"; + leakage_power_unit : "1mW"; + nom_process : 1; + nom_temperature : 25; + nom_voltage : 0.9; + capacitive_load_unit(1,pf); + pulling_resistance_unit : "1kohm"; + + /* default attributes */ + default_fanout_load : 1.000; + default_cell_leakage_power : 0.000; + default_inout_pin_cap : 0.005; + default_input_pin_cap : 0.005; + default_output_pin_cap : 0.000; + + /* threshold definitions */ + default_leakage_power_density : 0.000; + slew_derate_from_library : 0.500; + slew_lower_threshold_pct_fall : 30.000; + slew_upper_threshold_pct_fall : 70.000; + slew_lower_threshold_pct_rise : 30.000; + slew_upper_threshold_pct_rise : 70.000; + input_threshold_pct_fall : 50.000; + input_threshold_pct_rise : 50.000; + output_threshold_pct_fall : 50.000; + output_threshold_pct_rise : 50.000; + + /* k-factors */ + k_process_cell_fall : 0.000; + k_process_cell_leakage_power : 0.000; + k_process_cell_rise : 0.000; + k_process_fall_transition : 0.000; + k_process_hold_fall : 0.000; + k_process_hold_rise : 0.000; + k_process_internal_power : 0.000; + k_process_min_pulse_width_high : 0.000; + k_process_min_pulse_width_low : 0.000; + k_process_pin_cap : 0.000; + k_process_recovery_fall : 0.000; + k_process_recovery_rise : 0.000; + k_process_rise_transition : 0.000; + k_process_setup_fall : 0.000; + k_process_setup_rise : 0.000; + k_process_wire_cap : 0.000; + k_process_wire_res : 0.000; + k_temp_cell_fall : 0.000; + k_temp_cell_rise : 0.000; + k_temp_hold_fall : 0.000; + k_temp_hold_rise : 0.000; + k_temp_min_pulse_width_high : 0.000; + k_temp_min_pulse_width_low : 0.000; + k_temp_min_period : 0.000; + k_temp_rise_propagation : 0.000; + k_temp_fall_propagation : 0.000; + k_temp_rise_transition : 0.000; + k_temp_fall_transition : 0.000; + k_temp_recovery_fall : 0.000; + k_temp_recovery_rise : 0.000; + k_temp_setup_fall : 0.000; + k_temp_setup_rise : 0.000; + k_volt_cell_fall : 0.000; + k_volt_cell_rise : 0.000; + k_volt_hold_fall : 0.000; + k_volt_hold_rise : 0.000; + k_volt_min_pulse_width_high : 0.000; + k_volt_min_pulse_width_low : 0.000; + k_volt_min_period : 0.000; + k_volt_rise_propagation : 0.000; + k_volt_fall_propagation : 0.000; + k_volt_rise_transition : 0.000; + k_volt_fall_transition : 0.000; + k_volt_recovery_fall : 0.000; + k_volt_recovery_rise : 0.000; + k_volt_setup_fall : 0.000; + k_volt_setup_rise : 0.000; + + /* Additional instance information */ + define ("peak_current", "cell", "float"); + define ("retention_current", "cell", "float"); + define ("inrush_current", "cell", "float"); + + /* templates */ + lu_table_template(rf2_32x19_wm0_inputslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_delay_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_retain_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_bistload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_outputload_slew_template) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setuphold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_clockslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + variable_1 : related_pin_transition; + variable_2 : constrained_pin_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_delay_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + lu_table_template(rf2_32x19_wm0_cts1x7_inputslew_slew_template) { + variable_1 : input_net_transition; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_outputload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_bistload_energy_template) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + index_2 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_outputload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_bistload_energy_template) { + variable_1 : total_output_net_capacitance; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_clockslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + power_lut_template(rf2_32x19_wm0_inputslew_energy_template) { + variable_1 : input_transition_time; + index_1 ("1000, 1001, 1002, 1003, 1004, 1005, 1006"); + } + + type (rf2_32x19_wm0_AYA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AYB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_QA) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SOB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_AB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_DB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAA) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_EMAB) { + base_type : array ; + data_type : bit ; + bit_width : 3; + bit_from : 2; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAA) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TAB) { + base_type : array ; + data_type : bit ; + bit_width : 5; + bit_from : 4; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_TDB) { + base_type : array ; + data_type : bit ; + bit_width : 19; + bit_from : 18; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIA) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + type (rf2_32x19_wm0_SIB) { + base_type : array ; + data_type : bit ; + bit_width : 2; + bit_from : 1; + bit_to : 0 ; + downto : true ; + } + + /* voltage-maps */ + voltage_map (VDDCE, 0.9); + voltage_map (VDDPE, 0.9); + voltage_map (VSSE, 0.0); + + /* operating-conditions */ + operating_conditions(tt_0p90v_0p90v_25c) { + process : 1; + temperature : 25; + voltage : 0.9; + tree_type : balanced_tree; + } + default_operating_conditions : tt_0p90v_0p90v_25c; + + /* wire-loads */ + wire_load("sample") { + resistance : 1.6e-05; + capacitance : 0.0002; + area : 1.7; + slope : 500; + fanout_length(1,500); + } + + cell(rf2_32x19_wm0) { + area : 2136.395100; + dont_use : true; + dont_touch : true; + interface_timing : true; + is_memory_cell : true; + /* Peak current of all modes. */ + peak_current : 12.149206; + /* Peak current when entering or exiting the power modes. */ + inrush_current : 9.393504; + /* leakage current in retention mode (RET1N=0) */ + retention_current : 0.0005; + memory() { + type : ram; + address_width : 5; + word_width : 19; + } + pg_pin(VDDCE) { + voltage_name : VDDCE; + pg_type : backup_power; + direction : inout; + } + pg_pin(VDDPE) { + voltage_name : VDDPE; + pg_type : primary_power; + direction : inout; + } + pg_pin(VSSE) { + voltage_name : VSSE; + pg_type : primary_ground; + direction : inout; + } + pin(CENYA) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.076450, 0.080193, 0.083528, 0.090830, 0.110170, 0.141570, 0.203580", \ + "0.077118, 0.081332, 0.084870, 0.092484, 0.111290, 0.142070, 0.201190", \ + "0.080461, 0.084349, 0.087037, 0.094191, 0.113600, 0.143090, 0.201820", \ + "0.086294, 0.090051, 0.093403, 0.101140, 0.120420, 0.149690, 0.208480", \ + "0.099676, 0.103100, 0.106260, 0.113530, 0.132450, 0.162790, 0.222980", \ + "0.117120, 0.120950, 0.124450, 0.131940, 0.150570, 0.180450, 0.240920", \ + "0.138020, 0.142000, 0.145010, 0.152300, 0.171030, 0.201170, 0.260770" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.068805, 0.072548, 0.075883, 0.083185, 0.102525, 0.133925, 0.195935", \ + "0.069473, 0.073687, 0.077225, 0.084839, 0.103645, 0.134425, 0.193545", \ + "0.072816, 0.076704, 0.079392, 0.086546, 0.105955, 0.135445, 0.194175", \ + "0.078649, 0.082406, 0.085758, 0.093495, 0.112775, 0.142045, 0.200835", \ + "0.092031, 0.095455, 0.098615, 0.105885, 0.124805, 0.155145, 0.215335", \ + "0.109475, 0.113305, 0.116805, 0.124295, 0.142925, 0.172805, 0.233275", \ + "0.130375, 0.134355, 0.137365, 0.144655, 0.163385, 0.193525, 0.253125" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077003, 0.081780, 0.086063, 0.095776, 0.124710, 0.172220, 0.265080", \ + "0.077995, 0.082763, 0.086981, 0.096849, 0.125440, 0.174360, 0.270650", \ + "0.081114, 0.085575, 0.089842, 0.099835, 0.127610, 0.176870, 0.271060", \ + "0.088047, 0.092815, 0.097368, 0.107800, 0.135820, 0.181770, 0.276310", \ + "0.099902, 0.104580, 0.108890, 0.118730, 0.147380, 0.194790, 0.285930", \ + "0.121490, 0.125690, 0.130010, 0.139780, 0.168110, 0.216430, 0.309190", \ + "0.154260, 0.159250, 0.163610, 0.173170, 0.200560, 0.247210, 0.339670" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069303, 0.074080, 0.078363, 0.088076, 0.117010, 0.164520, 0.257380", \ + "0.070295, 0.075063, 0.079281, 0.089149, 0.117740, 0.166660, 0.262950", \ + "0.073414, 0.077875, 0.082142, 0.092135, 0.119910, 0.169170, 0.263360", \ + "0.080347, 0.085115, 0.089668, 0.100100, 0.128120, 0.174070, 0.268610", \ + "0.092202, 0.096880, 0.101190, 0.111030, 0.139680, 0.187090, 0.278230", \ + "0.113790, 0.117990, 0.122310, 0.132080, 0.160410, 0.208730, 0.301490", \ + "0.146560, 0.151550, 0.155910, 0.165470, 0.192860, 0.239510, 0.331970" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077040, 0.080414, 0.083644, 0.090898, 0.109860, 0.140530, 0.201790", \ + "0.078287, 0.082417, 0.085836, 0.092530, 0.111280, 0.140960, 0.202770", \ + "0.080219, 0.083964, 0.087273, 0.094509, 0.113450, 0.143180, 0.203420", \ + "0.086348, 0.090129, 0.093425, 0.100660, 0.119720, 0.149410, 0.209440", \ + "0.099047, 0.103220, 0.106890, 0.113400, 0.132510, 0.162380, 0.221680", \ + "0.115990, 0.119830, 0.123210, 0.130440, 0.149440, 0.180110, 0.238430", \ + "0.138850, 0.142520, 0.145750, 0.153010, 0.171810, 0.202000, 0.262960" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069336, 0.072710, 0.075940, 0.083194, 0.102156, 0.132826, 0.194086", \ + "0.070583, 0.074713, 0.078132, 0.084826, 0.103576, 0.133256, 0.195066", \ + "0.072515, 0.076260, 0.079569, 0.086805, 0.105746, 0.135476, 0.195716", \ + "0.078644, 0.082425, 0.085721, 0.092956, 0.112016, 0.141706, 0.201736", \ + "0.091343, 0.095516, 0.099186, 0.105696, 0.124806, 0.154676, 0.213976", \ + "0.108286, 0.112126, 0.115506, 0.122736, 0.141736, 0.172406, 0.230726", \ + "0.131146, 0.134816, 0.138046, 0.145306, 0.164106, 0.194296, 0.255256" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075143, 0.079884, 0.084173, 0.094093, 0.122090, 0.170260, 0.263380", \ + "0.076596, 0.081314, 0.085591, 0.095725, 0.125320, 0.173920, 0.266920", \ + "0.079411, 0.084220, 0.088546, 0.098336, 0.126870, 0.175860, 0.268850", \ + "0.086033, 0.090703, 0.095020, 0.104980, 0.132810, 0.181520, 0.275560", \ + "0.098343, 0.102990, 0.107200, 0.117600, 0.146960, 0.195280, 0.292020", \ + "0.119500, 0.124590, 0.128970, 0.138300, 0.166420, 0.214120, 0.306590", \ + "0.152620, 0.157380, 0.161740, 0.171640, 0.199670, 0.247280, 0.340490" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.067629, 0.072370, 0.076659, 0.086579, 0.114576, 0.162746, 0.255866", \ + "0.069082, 0.073800, 0.078077, 0.088211, 0.117806, 0.166406, 0.259406", \ + "0.071897, 0.076706, 0.081032, 0.090822, 0.119356, 0.168346, 0.261336", \ + "0.078519, 0.083189, 0.087506, 0.097466, 0.125296, 0.174006, 0.268046", \ + "0.090829, 0.095476, 0.099686, 0.110086, 0.139446, 0.187766, 0.284506", \ + "0.111986, 0.117076, 0.121456, 0.130786, 0.158906, 0.206606, 0.299076", \ + "0.145106, 0.149866, 0.154226, 0.164126, 0.192156, 0.239766, 0.332976" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENA&CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b0 && CENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107549, 0.111419, 0.114669, 0.121689, 0.140129, 0.169459, 0.227869", \ + "0.108339, 0.112209, 0.115459, 0.122479, 0.140919, 0.170249, 0.228659", \ + "0.111119, 0.114989, 0.118239, 0.125259, 0.143699, 0.173029, 0.231439", \ + "0.115749, 0.119619, 0.122869, 0.129889, 0.148329, 0.177659, 0.236069", \ + "0.124669, 0.128539, 0.131789, 0.138809, 0.157249, 0.186579, 0.244989", \ + "0.131749, 0.135619, 0.138869, 0.145889, 0.164329, 0.193659, 0.252069", \ + "0.139689, 0.143559, 0.146809, 0.153829, 0.172269, 0.201599, 0.260009" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.096794, 0.100664, 0.103914, 0.110934, 0.129374, 0.158704, 0.217114", \ + "0.097584, 0.101454, 0.104704, 0.111724, 0.130164, 0.159494, 0.217904", \ + "0.100364, 0.104234, 0.107484, 0.114504, 0.132944, 0.162274, 0.220684", \ + "0.104994, 0.108864, 0.112114, 0.119134, 0.137574, 0.166904, 0.225314", \ + "0.113914, 0.117784, 0.121034, 0.128054, 0.146494, 0.175824, 0.234234", \ + "0.120994, 0.124864, 0.128114, 0.135134, 0.153574, 0.182904, 0.241314", \ + "0.128934, 0.132804, 0.136054, 0.143074, 0.161514, 0.190844, 0.249254" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267", \ + "0.014629, 0.018483, 0.022186, 0.031492, 0.061427, 0.113655, 0.219267" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.119085, 0.123815, 0.128015, 0.137705, 0.165645, 0.211965, 0.304485", \ + "0.119945, 0.124675, 0.128875, 0.138565, 0.166505, 0.212825, 0.305345", \ + "0.123615, 0.128345, 0.132545, 0.142235, 0.170175, 0.216495, 0.309015", \ + "0.129455, 0.134185, 0.138385, 0.148075, 0.176015, 0.222335, 0.314855", \ + "0.142705, 0.147435, 0.151635, 0.161325, 0.189265, 0.235585, 0.328105", \ + "0.159985, 0.164715, 0.168915, 0.178605, 0.206545, 0.252865, 0.345385", \ + "0.190265, 0.194995, 0.199195, 0.208885, 0.236825, 0.283145, 0.375665" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.107176, 0.111906, 0.116106, 0.125796, 0.153736, 0.200056, 0.292576", \ + "0.108036, 0.112766, 0.116966, 0.126656, 0.154596, 0.200916, 0.293436", \ + "0.111706, 0.116436, 0.120636, 0.130326, 0.158266, 0.204586, 0.297106", \ + "0.117546, 0.122276, 0.126476, 0.136166, 0.164106, 0.210426, 0.302946", \ + "0.130796, 0.135526, 0.139726, 0.149416, 0.177356, 0.223676, 0.316196", \ + "0.148076, 0.152806, 0.157006, 0.166696, 0.194636, 0.240956, 0.333476", \ + "0.178356, 0.183086, 0.187286, 0.196976, 0.224916, 0.271236, 0.363756" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499", \ + "0.015480, 0.021076, 0.026873, 0.042496, 0.091183, 0.174208, 0.339499" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENA&!CENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENA == 1'b1 && CENA == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153210, 0.157890, 0.162050, 0.171720, 0.199730, 0.246060, 0.338720", \ + "0.154340, 0.159020, 0.163180, 0.172850, 0.200860, 0.247190, 0.339850", \ + "0.156870, 0.161550, 0.165710, 0.175380, 0.203390, 0.249720, 0.342380", \ + "0.161930, 0.166610, 0.170770, 0.180440, 0.208450, 0.254780, 0.347440", \ + "0.169900, 0.174580, 0.178740, 0.188410, 0.216420, 0.262750, 0.355410", \ + "0.177790, 0.182470, 0.186630, 0.196300, 0.224310, 0.270640, 0.363300", \ + "0.188200, 0.192880, 0.197040, 0.206710, 0.234720, 0.281050, 0.373710" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.137889, 0.142569, 0.146729, 0.156399, 0.184409, 0.230739, 0.323399", \ + "0.139019, 0.143699, 0.147859, 0.157529, 0.185539, 0.231869, 0.324529", \ + "0.141549, 0.146229, 0.150389, 0.160059, 0.188069, 0.234399, 0.327059", \ + "0.146609, 0.151289, 0.155449, 0.165119, 0.193129, 0.239459, 0.332119", \ + "0.154579, 0.159259, 0.163419, 0.173089, 0.201099, 0.247429, 0.340089", \ + "0.162469, 0.167149, 0.171309, 0.180979, 0.208989, 0.255319, 0.347979", \ + "0.172879, 0.177559, 0.181719, 0.191389, 0.219399, 0.265729, 0.358389" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153", \ + "0.015302, 0.021146, 0.027037, 0.042874, 0.091433, 0.174087, 0.341153" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.143831, 0.147621, 0.150831, 0.157851, 0.176331, 0.205701, 0.264111", \ + "0.145291, 0.149081, 0.152291, 0.159311, 0.177791, 0.207161, 0.265571", \ + "0.148661, 0.152451, 0.155661, 0.162681, 0.181161, 0.210531, 0.268941", \ + "0.154171, 0.157961, 0.161171, 0.168191, 0.186671, 0.216041, 0.274451", \ + "0.168271, 0.172061, 0.175271, 0.182291, 0.200771, 0.230141, 0.288551", \ + "0.184061, 0.187851, 0.191061, 0.198081, 0.216561, 0.245931, 0.304341", \ + "0.215511, 0.219301, 0.222511, 0.229531, 0.248011, 0.277381, 0.335791" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.129448, 0.133238, 0.136448, 0.143468, 0.161948, 0.191318, 0.249728", \ + "0.130908, 0.134698, 0.137908, 0.144928, 0.163408, 0.192778, 0.251188", \ + "0.134278, 0.138068, 0.141278, 0.148298, 0.166778, 0.196148, 0.254558", \ + "0.139788, 0.143578, 0.146788, 0.153808, 0.172288, 0.201658, 0.260068", \ + "0.153888, 0.157678, 0.160888, 0.167908, 0.186388, 0.215758, 0.274168", \ + "0.169678, 0.173468, 0.176678, 0.183698, 0.202178, 0.231548, 0.289958", \ + "0.201128, 0.204918, 0.208128, 0.215148, 0.233628, 0.262998, 0.321408" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162", \ + "0.014465, 0.018326, 0.022130, 0.031627, 0.061387, 0.113442, 0.220162" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.076360, 0.079853, 0.083170, 0.090040, 0.108570, 0.137975, 0.196595", \ + "0.077325, 0.080818, 0.084135, 0.091005, 0.109535, 0.138940, 0.197560", \ + "0.080158, 0.083651, 0.086968, 0.093838, 0.112368, 0.141773, 0.200393", \ + "0.086042, 0.089535, 0.092852, 0.099722, 0.118252, 0.147657, 0.206277", \ + "0.096551, 0.100044, 0.103361, 0.110231, 0.128761, 0.158166, 0.216786", \ + "0.109721, 0.113214, 0.116531, 0.123401, 0.141931, 0.171336, 0.229956", \ + "0.130395, 0.133888, 0.137205, 0.144075, 0.162605, 0.192010, 0.250630" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.068724, 0.072217, 0.075534, 0.082404, 0.100934, 0.130339, 0.188959", \ + "0.069689, 0.073182, 0.076499, 0.083369, 0.101899, 0.131304, 0.189924", \ + "0.072522, 0.076015, 0.079332, 0.086202, 0.104732, 0.134137, 0.192757", \ + "0.078406, 0.081899, 0.085216, 0.092086, 0.110616, 0.140021, 0.198641", \ + "0.088915, 0.092408, 0.095725, 0.102595, 0.121125, 0.150530, 0.209150", \ + "0.102085, 0.105578, 0.108895, 0.115765, 0.134295, 0.163700, 0.222320", \ + "0.122759, 0.126252, 0.129569, 0.136439, 0.154969, 0.184374, 0.242994" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014", \ + "0.014564, 0.018350, 0.022151, 0.031465, 0.061410, 0.113373, 0.219014" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.080015, 0.084588, 0.088959, 0.098661, 0.126537, 0.173027, 0.265077", \ + "0.080793, 0.085366, 0.089737, 0.099439, 0.127315, 0.173805, 0.265855", \ + "0.084285, 0.088858, 0.093229, 0.102931, 0.130807, 0.177297, 0.269347", \ + "0.090884, 0.095457, 0.099828, 0.109530, 0.137406, 0.183896, 0.275946", \ + "0.102704, 0.107277, 0.111648, 0.121350, 0.149226, 0.195716, 0.287766", \ + "0.117957, 0.122530, 0.126901, 0.136603, 0.164479, 0.210969, 0.303019", \ + "0.142377, 0.146950, 0.151321, 0.161023, 0.188899, 0.235389, 0.327439" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.072013, 0.076586, 0.080957, 0.090659, 0.118536, 0.165026, 0.257076", \ + "0.072791, 0.077364, 0.081735, 0.091438, 0.119314, 0.165804, 0.257854", \ + "0.076283, 0.080856, 0.085227, 0.094929, 0.122806, 0.169296, 0.261346", \ + "0.082882, 0.087456, 0.091827, 0.101528, 0.129405, 0.175895, 0.267944", \ + "0.094702, 0.099275, 0.103646, 0.113348, 0.141224, 0.187715, 0.279764", \ + "0.109955, 0.114528, 0.118900, 0.128602, 0.156478, 0.202967, 0.295017", \ + "0.134376, 0.138948, 0.143320, 0.153021, 0.180898, 0.227387, 0.319437" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144", \ + "0.014696, 0.020266, 0.025857, 0.041875, 0.090536, 0.172803, 0.337144" \ + ); + } + } + internal_power() { + related_pin : CENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TCENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENA&CENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENA&!CENA"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004770, 0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799", \ + "0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804", \ + "0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804, 0.004809", \ + "0.005010, 0.005015, 0.005020, 0.005025, 0.005030, 0.005035, 0.005040", \ + "0.005477, 0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510", \ + "0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516", \ + "0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516, 0.005521" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005763, 0.005768, 0.005774, 0.005780, 0.005786, 0.005792, 0.005797", \ + "0.007000, 0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042", \ + "0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042, 0.007049", \ + "0.007389, 0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433", \ + "0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441", \ + "0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448", \ + "0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448, 0.007456" \ + ); + } + } + } + bus(AYA) { + bus_type : rf2_32x19_wm0_AYA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : AA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069431, 0.072806, 0.075626, 0.082081, 0.098378, 0.123790, 0.177190", \ + "0.070772, 0.074063, 0.076725, 0.083076, 0.099376, 0.124460, 0.175930", \ + "0.073296, 0.076872, 0.079843, 0.086072, 0.102950, 0.130390, 0.182290", \ + "0.079184, 0.082738, 0.085732, 0.091970, 0.108960, 0.134680, 0.190250", \ + "0.091419, 0.094912, 0.097672, 0.103760, 0.120080, 0.145620, 0.200320", \ + "0.108460, 0.111910, 0.114750, 0.121000, 0.136830, 0.162500, 0.213500", \ + "0.140110, 0.143540, 0.146380, 0.152080, 0.167910, 0.193870, 0.247740" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062488, 0.065863, 0.068683, 0.075138, 0.091435, 0.116847, 0.170247", \ + "0.063829, 0.067120, 0.069782, 0.076133, 0.092433, 0.117517, 0.168987", \ + "0.066353, 0.069929, 0.072900, 0.079129, 0.096007, 0.123447, 0.175347", \ + "0.072241, 0.075795, 0.078789, 0.085027, 0.102017, 0.127737, 0.183307", \ + "0.084476, 0.087969, 0.090729, 0.096817, 0.113137, 0.138677, 0.193377", \ + "0.101517, 0.104967, 0.107807, 0.114057, 0.129887, 0.155557, 0.206557", \ + "0.133167, 0.136597, 0.139437, 0.145137, 0.160967, 0.186927, 0.240797" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061135, 0.065085, 0.068524, 0.076773, 0.099774, 0.140530, 0.222170", \ + "0.061593, 0.065831, 0.069445, 0.077299, 0.100640, 0.140590, 0.217290", \ + "0.064746, 0.068773, 0.072269, 0.080453, 0.103240, 0.143670, 0.219510", \ + "0.070800, 0.074898, 0.078369, 0.086625, 0.109730, 0.149260, 0.227520", \ + "0.083837, 0.087850, 0.091217, 0.099449, 0.122910, 0.162820, 0.238330", \ + "0.101600, 0.105580, 0.109030, 0.117060, 0.140350, 0.179080, 0.256230", \ + "0.139440, 0.143400, 0.146920, 0.154870, 0.178240, 0.217490, 0.293840" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.055022, 0.058972, 0.062411, 0.070659, 0.093661, 0.134416, 0.216057", \ + "0.055480, 0.059717, 0.063332, 0.071186, 0.094526, 0.134476, 0.211177", \ + "0.058632, 0.062660, 0.066156, 0.074340, 0.097127, 0.137556, 0.213397", \ + "0.064687, 0.068784, 0.072256, 0.080511, 0.103617, 0.143147, 0.221407", \ + "0.077724, 0.081736, 0.085103, 0.093335, 0.116796, 0.156706, 0.232216", \ + "0.095487, 0.099466, 0.102916, 0.110947, 0.134237, 0.172966, 0.250117", \ + "0.133327, 0.137287, 0.140807, 0.148757, 0.172127, 0.211376, 0.287726" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + timing() { + related_pin : TAA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENA"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENA == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074165, 0.077564, 0.080626, 0.086863, 0.103580, 0.128590, 0.182420", \ + "0.075528, 0.078832, 0.081495, 0.087803, 0.103700, 0.130150, 0.184870", \ + "0.078327, 0.081613, 0.084296, 0.090658, 0.106780, 0.132050, 0.186190", \ + "0.083784, 0.087167, 0.090027, 0.096405, 0.112200, 0.137850, 0.188890", \ + "0.095953, 0.099347, 0.102160, 0.108210, 0.123680, 0.149960, 0.204560", \ + "0.113920, 0.117280, 0.120290, 0.126360, 0.142420, 0.168390, 0.221990", \ + "0.144880, 0.148130, 0.150970, 0.156390, 0.173700, 0.199790, 0.252820" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.066748, 0.070148, 0.073210, 0.079447, 0.096164, 0.121174, 0.175004", \ + "0.068111, 0.071415, 0.074078, 0.080386, 0.096283, 0.122733, 0.177454", \ + "0.070910, 0.074196, 0.076879, 0.083241, 0.099363, 0.124634, 0.178774", \ + "0.076368, 0.079751, 0.082611, 0.088988, 0.104784, 0.130434, 0.181474", \ + "0.088536, 0.091930, 0.094744, 0.100794, 0.116263, 0.142544, 0.197143", \ + "0.106504, 0.109864, 0.112873, 0.118944, 0.135003, 0.160974, 0.214574", \ + "0.137464, 0.140714, 0.143554, 0.148974, 0.166284, 0.192374, 0.245403" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.063216, 0.067149, 0.070662, 0.078772, 0.101930, 0.140250, 0.220140", \ + "0.064791, 0.068790, 0.072334, 0.080468, 0.103800, 0.142930, 0.220650", \ + "0.067207, 0.071071, 0.074657, 0.082544, 0.105690, 0.145960, 0.223450", \ + "0.073795, 0.077993, 0.081537, 0.089505, 0.113050, 0.152480, 0.229550", \ + "0.086428, 0.090344, 0.094004, 0.102000, 0.125130, 0.164810, 0.243420", \ + "0.103900, 0.107930, 0.111460, 0.119500, 0.142700, 0.181130, 0.260650", \ + "0.141630, 0.145770, 0.149120, 0.157110, 0.180220, 0.217390, 0.297270" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056894, 0.060827, 0.064340, 0.072450, 0.095608, 0.133928, 0.213818", \ + "0.058469, 0.062468, 0.066012, 0.074146, 0.097478, 0.136608, 0.214328", \ + "0.060885, 0.064749, 0.068335, 0.076222, 0.099368, 0.139638, 0.217128", \ + "0.067473, 0.071671, 0.075215, 0.083183, 0.106728, 0.146158, 0.223228", \ + "0.080106, 0.084022, 0.087682, 0.095678, 0.118808, 0.158488, 0.237098", \ + "0.097578, 0.101608, 0.105138, 0.113178, 0.136378, 0.174808, 0.254328", \ + "0.135308, 0.139448, 0.142798, 0.150788, 0.173898, 0.211068, 0.290948" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069787, 0.072987, 0.076024, 0.082271, 0.098817, 0.125069, 0.177539", \ + "0.070769, 0.073969, 0.077006, 0.083253, 0.099799, 0.126051, 0.178521", \ + "0.073600, 0.076800, 0.079837, 0.086084, 0.102630, 0.128882, 0.181352", \ + "0.079314, 0.082514, 0.085551, 0.091798, 0.108344, 0.134596, 0.187066", \ + "0.089777, 0.092977, 0.096014, 0.102261, 0.118807, 0.145059, 0.197529", \ + "0.102794, 0.105994, 0.109031, 0.115278, 0.131824, 0.158076, 0.210546", \ + "0.123479, 0.126679, 0.129716, 0.135963, 0.152509, 0.178761, 0.231231" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062860, 0.065995, 0.068946, 0.074963, 0.090830, 0.116052, 0.166302", \ + "0.063851, 0.066986, 0.069937, 0.075954, 0.091821, 0.117043, 0.167293", \ + "0.066650, 0.069785, 0.072736, 0.078753, 0.094620, 0.119842, 0.170092", \ + "0.072400, 0.075535, 0.078486, 0.084503, 0.100370, 0.125592, 0.175842", \ + "0.082865, 0.086000, 0.088951, 0.094968, 0.110835, 0.136057, 0.186307", \ + "0.095889, 0.099024, 0.101975, 0.107992, 0.123859, 0.149081, 0.199331", \ + "0.116592, 0.119727, 0.122678, 0.128695, 0.144562, 0.169784, 0.220034" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340", \ + "0.012818, 0.016137, 0.019570, 0.027841, 0.055044, 0.102133, 0.198340" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.072261, 0.076557, 0.080328, 0.088559, 0.112192, 0.151656, 0.229886", \ + "0.073127, 0.077423, 0.081194, 0.089425, 0.113058, 0.152522, 0.230752", \ + "0.076584, 0.080880, 0.084651, 0.092882, 0.116515, 0.155979, 0.234209", \ + "0.083204, 0.087500, 0.091271, 0.099502, 0.123135, 0.162599, 0.240829", \ + "0.094977, 0.099273, 0.103044, 0.111275, 0.134908, 0.174372, 0.252602", \ + "0.110130, 0.114426, 0.118197, 0.126428, 0.150061, 0.189525, 0.267755", \ + "0.134186, 0.138482, 0.142253, 0.150484, 0.174117, 0.213581, 0.291811" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.064271, 0.068438, 0.072190, 0.080270, 0.103328, 0.141836, 0.218206", \ + "0.065084, 0.069251, 0.073003, 0.081083, 0.104141, 0.142649, 0.219019", \ + "0.068591, 0.072758, 0.076510, 0.084590, 0.107648, 0.146156, 0.222526", \ + "0.075182, 0.079349, 0.083101, 0.091181, 0.114239, 0.152747, 0.229117", \ + "0.086932, 0.091099, 0.094851, 0.102931, 0.125989, 0.164497, 0.240867", \ + "0.102134, 0.106301, 0.110053, 0.118133, 0.141191, 0.179699, 0.256069", \ + "0.126196, 0.130363, 0.134115, 0.142195, 0.165253, 0.203761, 0.280131" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995", \ + "0.012296, 0.016681, 0.021447, 0.034187, 0.076206, 0.147197, 0.288995" \ + ); + } + } + internal_power() { + related_pin : AA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TAA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENA"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004770, 0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799", \ + "0.004775, 0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804", \ + "0.004780, 0.004785, 0.004789, 0.004794, 0.004799, 0.004804, 0.004809", \ + "0.005010, 0.005015, 0.005020, 0.005025, 0.005030, 0.005035, 0.005040", \ + "0.005477, 0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510", \ + "0.005483, 0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516", \ + "0.005488, 0.005494, 0.005499, 0.005505, 0.005510, 0.005516, 0.005521" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005763, 0.005768, 0.005774, 0.005780, 0.005786, 0.005792, 0.005797", \ + "0.007000, 0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042", \ + "0.007007, 0.007014, 0.007021, 0.007028, 0.007035, 0.007042, 0.007049", \ + "0.007389, 0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433", \ + "0.007396, 0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441", \ + "0.007404, 0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448", \ + "0.007411, 0.007419, 0.007426, 0.007433, 0.007441, 0.007448, 0.007456" \ + ); + } + } + pin(AYA[4]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b0 && AA[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157994, 0.161474, 0.164204, 0.170704, 0.187034, 0.213284, 0.265564", \ + "0.158894, 0.162374, 0.165104, 0.171604, 0.187934, 0.214184, 0.266464", \ + "0.162124, 0.165604, 0.168334, 0.174834, 0.191164, 0.217414, 0.269694", \ + "0.166094, 0.169574, 0.172304, 0.178804, 0.195134, 0.221384, 0.273664", \ + "0.175124, 0.178604, 0.181334, 0.187834, 0.204164, 0.230414, 0.282694", \ + "0.182214, 0.185694, 0.188424, 0.194924, 0.211254, 0.237504, 0.289784", \ + "0.191484, 0.194964, 0.197694, 0.204194, 0.220524, 0.246774, 0.299054" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140227, 0.143677, 0.146367, 0.152607, 0.168337, 0.193527, 0.243627", \ + "0.141207, 0.144657, 0.147347, 0.153587, 0.169317, 0.194507, 0.244607", \ + "0.144357, 0.147807, 0.150497, 0.156737, 0.172467, 0.197657, 0.247757", \ + "0.148477, 0.151927, 0.154617, 0.160857, 0.176587, 0.201777, 0.251877", \ + "0.157407, 0.160857, 0.163547, 0.169787, 0.185517, 0.210707, 0.260807", \ + "0.164497, 0.167947, 0.170637, 0.176877, 0.192607, 0.217797, 0.267897", \ + "0.173807, 0.177257, 0.179947, 0.186187, 0.201917, 0.227107, 0.277207" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147952, 0.152202, 0.155823, 0.164002, 0.187702, 0.227022, 0.305693", \ + "0.148792, 0.153042, 0.156663, 0.164843, 0.188543, 0.227862, 0.306533", \ + "0.152523, 0.156773, 0.160392, 0.168572, 0.192273, 0.231593, 0.310262", \ + "0.158622, 0.162873, 0.166492, 0.174673, 0.198373, 0.237693, 0.316362", \ + "0.171613, 0.175863, 0.179482, 0.187663, 0.211363, 0.250683, 0.329352", \ + "0.189122, 0.193373, 0.196992, 0.205173, 0.228873, 0.268193, 0.346863", \ + "0.218652, 0.222903, 0.226522, 0.234703, 0.258403, 0.297723, 0.376393" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130693, 0.134814, 0.138383, 0.146373, 0.169504, 0.207953, 0.284774", \ + "0.131413, 0.135534, 0.139103, 0.147093, 0.170223, 0.208674, 0.285494", \ + "0.135124, 0.139243, 0.142814, 0.150804, 0.173933, 0.212384, 0.289204", \ + "0.141284, 0.145403, 0.148974, 0.156964, 0.180093, 0.218544, 0.295364", \ + "0.154203, 0.158324, 0.161893, 0.169883, 0.193014, 0.231463, 0.308283", \ + "0.171834, 0.175953, 0.179524, 0.187513, 0.210644, 0.249093, 0.325914", \ + "0.201374, 0.205493, 0.209063, 0.217054, 0.240183, 0.278633, 0.355453" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[4] == 1'b1 && AA[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141000, 0.145180, 0.148830, 0.157140, 0.180890, 0.220230, 0.298900", \ + "0.142040, 0.146220, 0.149870, 0.158180, 0.181930, 0.221270, 0.299940", \ + "0.144510, 0.148690, 0.152340, 0.160650, 0.184400, 0.223740, 0.302410", \ + "0.149610, 0.153790, 0.157440, 0.165750, 0.189500, 0.228840, 0.307510", \ + "0.157960, 0.162140, 0.165790, 0.174100, 0.197850, 0.237190, 0.315860", \ + "0.165720, 0.169900, 0.173550, 0.181860, 0.205610, 0.244950, 0.323620", \ + "0.176240, 0.180420, 0.184070, 0.192380, 0.216130, 0.255470, 0.334140" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124071, 0.128151, 0.131661, 0.139681, 0.162821, 0.201251, 0.278051", \ + "0.125321, 0.129401, 0.132911, 0.140931, 0.164071, 0.202501, 0.279301", \ + "0.127601, 0.131681, 0.135191, 0.143211, 0.166351, 0.204781, 0.281581", \ + "0.132731, 0.136811, 0.140321, 0.148341, 0.171481, 0.209911, 0.286711", \ + "0.141141, 0.145221, 0.148731, 0.156751, 0.179891, 0.218321, 0.295121", \ + "0.148871, 0.152951, 0.156461, 0.164481, 0.187621, 0.226051, 0.302851", \ + "0.159171, 0.163251, 0.166761, 0.174781, 0.197921, 0.236351, 0.313151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146325, 0.149815, 0.152735, 0.159055, 0.175595, 0.201885, 0.254165", \ + "0.147995, 0.151485, 0.154405, 0.160725, 0.177265, 0.203555, 0.255835", \ + "0.150975, 0.154465, 0.157385, 0.163705, 0.180245, 0.206535, 0.258815", \ + "0.156855, 0.160345, 0.163265, 0.169585, 0.186125, 0.212415, 0.264695", \ + "0.170645, 0.174135, 0.177055, 0.183375, 0.199915, 0.226205, 0.278485", \ + "0.186725, 0.190215, 0.193135, 0.199455, 0.215995, 0.242285, 0.294565", \ + "0.217705, 0.221195, 0.224115, 0.230435, 0.246975, 0.273265, 0.325545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130143, 0.133553, 0.136383, 0.142493, 0.158343, 0.183543, 0.233583", \ + "0.131963, 0.135373, 0.138203, 0.144313, 0.160163, 0.185363, 0.235403", \ + "0.134903, 0.138313, 0.141143, 0.147253, 0.163103, 0.188303, 0.238343", \ + "0.140583, 0.143993, 0.146823, 0.152933, 0.168783, 0.193983, 0.244023", \ + "0.154543, 0.157953, 0.160783, 0.166893, 0.182743, 0.207943, 0.257983", \ + "0.170633, 0.174043, 0.176873, 0.182983, 0.198833, 0.224033, 0.274073", \ + "0.201653, 0.205063, 0.207893, 0.214003, 0.229853, 0.255053, 0.305093" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[4]&AA[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[4]&!AA[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[3]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b0 && AA[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157994, 0.161474, 0.164204, 0.170704, 0.187034, 0.213284, 0.265564", \ + "0.158894, 0.162374, 0.165104, 0.171604, 0.187934, 0.214184, 0.266464", \ + "0.162124, 0.165604, 0.168334, 0.174834, 0.191164, 0.217414, 0.269694", \ + "0.166094, 0.169574, 0.172304, 0.178804, 0.195134, 0.221384, 0.273664", \ + "0.175124, 0.178604, 0.181334, 0.187834, 0.204164, 0.230414, 0.282694", \ + "0.182214, 0.185694, 0.188424, 0.194924, 0.211254, 0.237504, 0.289784", \ + "0.191484, 0.194964, 0.197694, 0.204194, 0.220524, 0.246774, 0.299054" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140227, 0.143677, 0.146367, 0.152607, 0.168337, 0.193527, 0.243627", \ + "0.141207, 0.144657, 0.147347, 0.153587, 0.169317, 0.194507, 0.244607", \ + "0.144357, 0.147807, 0.150497, 0.156737, 0.172467, 0.197657, 0.247757", \ + "0.148477, 0.151927, 0.154617, 0.160857, 0.176587, 0.201777, 0.251877", \ + "0.157407, 0.160857, 0.163547, 0.169787, 0.185517, 0.210707, 0.260807", \ + "0.164497, 0.167947, 0.170637, 0.176877, 0.192607, 0.217797, 0.267897", \ + "0.173807, 0.177257, 0.179947, 0.186187, 0.201917, 0.227107, 0.277207" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147952, 0.152202, 0.155823, 0.164002, 0.187702, 0.227022, 0.305693", \ + "0.148792, 0.153042, 0.156663, 0.164843, 0.188543, 0.227862, 0.306533", \ + "0.152523, 0.156773, 0.160392, 0.168572, 0.192273, 0.231593, 0.310262", \ + "0.158622, 0.162873, 0.166492, 0.174673, 0.198373, 0.237693, 0.316362", \ + "0.171613, 0.175863, 0.179482, 0.187663, 0.211363, 0.250683, 0.329352", \ + "0.189122, 0.193373, 0.196992, 0.205173, 0.228873, 0.268193, 0.346863", \ + "0.218652, 0.222903, 0.226522, 0.234703, 0.258403, 0.297723, 0.376393" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130693, 0.134814, 0.138383, 0.146373, 0.169504, 0.207953, 0.284774", \ + "0.131413, 0.135534, 0.139103, 0.147093, 0.170223, 0.208674, 0.285494", \ + "0.135124, 0.139243, 0.142814, 0.150804, 0.173933, 0.212384, 0.289204", \ + "0.141284, 0.145403, 0.148974, 0.156964, 0.180093, 0.218544, 0.295364", \ + "0.154203, 0.158324, 0.161893, 0.169883, 0.193014, 0.231463, 0.308283", \ + "0.171834, 0.175953, 0.179524, 0.187513, 0.210644, 0.249093, 0.325914", \ + "0.201374, 0.205493, 0.209063, 0.217054, 0.240183, 0.278633, 0.355453" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[3] == 1'b1 && AA[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141000, 0.145180, 0.148830, 0.157140, 0.180890, 0.220230, 0.298900", \ + "0.142040, 0.146220, 0.149870, 0.158180, 0.181930, 0.221270, 0.299940", \ + "0.144510, 0.148690, 0.152340, 0.160650, 0.184400, 0.223740, 0.302410", \ + "0.149610, 0.153790, 0.157440, 0.165750, 0.189500, 0.228840, 0.307510", \ + "0.157960, 0.162140, 0.165790, 0.174100, 0.197850, 0.237190, 0.315860", \ + "0.165720, 0.169900, 0.173550, 0.181860, 0.205610, 0.244950, 0.323620", \ + "0.176240, 0.180420, 0.184070, 0.192380, 0.216130, 0.255470, 0.334140" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124071, 0.128151, 0.131661, 0.139681, 0.162821, 0.201251, 0.278051", \ + "0.125321, 0.129401, 0.132911, 0.140931, 0.164071, 0.202501, 0.279301", \ + "0.127601, 0.131681, 0.135191, 0.143211, 0.166351, 0.204781, 0.281581", \ + "0.132731, 0.136811, 0.140321, 0.148341, 0.171481, 0.209911, 0.286711", \ + "0.141141, 0.145221, 0.148731, 0.156751, 0.179891, 0.218321, 0.295121", \ + "0.148871, 0.152951, 0.156461, 0.164481, 0.187621, 0.226051, 0.302851", \ + "0.159171, 0.163251, 0.166761, 0.174781, 0.197921, 0.236351, 0.313151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146325, 0.149815, 0.152735, 0.159055, 0.175595, 0.201885, 0.254165", \ + "0.147995, 0.151485, 0.154405, 0.160725, 0.177265, 0.203555, 0.255835", \ + "0.150975, 0.154465, 0.157385, 0.163705, 0.180245, 0.206535, 0.258815", \ + "0.156855, 0.160345, 0.163265, 0.169585, 0.186125, 0.212415, 0.264695", \ + "0.170645, 0.174135, 0.177055, 0.183375, 0.199915, 0.226205, 0.278485", \ + "0.186725, 0.190215, 0.193135, 0.199455, 0.215995, 0.242285, 0.294565", \ + "0.217705, 0.221195, 0.224115, 0.230435, 0.246975, 0.273265, 0.325545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130143, 0.133553, 0.136383, 0.142493, 0.158343, 0.183543, 0.233583", \ + "0.131963, 0.135373, 0.138203, 0.144313, 0.160163, 0.185363, 0.235403", \ + "0.134903, 0.138313, 0.141143, 0.147253, 0.163103, 0.188303, 0.238343", \ + "0.140583, 0.143993, 0.146823, 0.152933, 0.168783, 0.193983, 0.244023", \ + "0.154543, 0.157953, 0.160783, 0.166893, 0.182743, 0.207943, 0.257983", \ + "0.170633, 0.174043, 0.176873, 0.182983, 0.198833, 0.224033, 0.274073", \ + "0.201653, 0.205063, 0.207893, 0.214003, 0.229853, 0.255053, 0.305093" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[3]&AA[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[3]&!AA[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[2]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b0 && AA[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157994, 0.161474, 0.164204, 0.170704, 0.187034, 0.213284, 0.265564", \ + "0.158894, 0.162374, 0.165104, 0.171604, 0.187934, 0.214184, 0.266464", \ + "0.162124, 0.165604, 0.168334, 0.174834, 0.191164, 0.217414, 0.269694", \ + "0.166094, 0.169574, 0.172304, 0.178804, 0.195134, 0.221384, 0.273664", \ + "0.175124, 0.178604, 0.181334, 0.187834, 0.204164, 0.230414, 0.282694", \ + "0.182214, 0.185694, 0.188424, 0.194924, 0.211254, 0.237504, 0.289784", \ + "0.191484, 0.194964, 0.197694, 0.204194, 0.220524, 0.246774, 0.299054" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140227, 0.143677, 0.146367, 0.152607, 0.168337, 0.193527, 0.243627", \ + "0.141207, 0.144657, 0.147347, 0.153587, 0.169317, 0.194507, 0.244607", \ + "0.144357, 0.147807, 0.150497, 0.156737, 0.172467, 0.197657, 0.247757", \ + "0.148477, 0.151927, 0.154617, 0.160857, 0.176587, 0.201777, 0.251877", \ + "0.157407, 0.160857, 0.163547, 0.169787, 0.185517, 0.210707, 0.260807", \ + "0.164497, 0.167947, 0.170637, 0.176877, 0.192607, 0.217797, 0.267897", \ + "0.173807, 0.177257, 0.179947, 0.186187, 0.201917, 0.227107, 0.277207" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147952, 0.152202, 0.155823, 0.164002, 0.187702, 0.227022, 0.305693", \ + "0.148792, 0.153042, 0.156663, 0.164843, 0.188543, 0.227862, 0.306533", \ + "0.152523, 0.156773, 0.160392, 0.168572, 0.192273, 0.231593, 0.310262", \ + "0.158622, 0.162873, 0.166492, 0.174673, 0.198373, 0.237693, 0.316362", \ + "0.171613, 0.175863, 0.179482, 0.187663, 0.211363, 0.250683, 0.329352", \ + "0.189122, 0.193373, 0.196992, 0.205173, 0.228873, 0.268193, 0.346863", \ + "0.218652, 0.222903, 0.226522, 0.234703, 0.258403, 0.297723, 0.376393" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130693, 0.134814, 0.138383, 0.146373, 0.169504, 0.207953, 0.284774", \ + "0.131413, 0.135534, 0.139103, 0.147093, 0.170223, 0.208674, 0.285494", \ + "0.135124, 0.139243, 0.142814, 0.150804, 0.173933, 0.212384, 0.289204", \ + "0.141284, 0.145403, 0.148974, 0.156964, 0.180093, 0.218544, 0.295364", \ + "0.154203, 0.158324, 0.161893, 0.169883, 0.193014, 0.231463, 0.308283", \ + "0.171834, 0.175953, 0.179524, 0.187513, 0.210644, 0.249093, 0.325914", \ + "0.201374, 0.205493, 0.209063, 0.217054, 0.240183, 0.278633, 0.355453" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[2] == 1'b1 && AA[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141000, 0.145180, 0.148830, 0.157140, 0.180890, 0.220230, 0.298900", \ + "0.142040, 0.146220, 0.149870, 0.158180, 0.181930, 0.221270, 0.299940", \ + "0.144510, 0.148690, 0.152340, 0.160650, 0.184400, 0.223740, 0.302410", \ + "0.149610, 0.153790, 0.157440, 0.165750, 0.189500, 0.228840, 0.307510", \ + "0.157960, 0.162140, 0.165790, 0.174100, 0.197850, 0.237190, 0.315860", \ + "0.165720, 0.169900, 0.173550, 0.181860, 0.205610, 0.244950, 0.323620", \ + "0.176240, 0.180420, 0.184070, 0.192380, 0.216130, 0.255470, 0.334140" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124071, 0.128151, 0.131661, 0.139681, 0.162821, 0.201251, 0.278051", \ + "0.125321, 0.129401, 0.132911, 0.140931, 0.164071, 0.202501, 0.279301", \ + "0.127601, 0.131681, 0.135191, 0.143211, 0.166351, 0.204781, 0.281581", \ + "0.132731, 0.136811, 0.140321, 0.148341, 0.171481, 0.209911, 0.286711", \ + "0.141141, 0.145221, 0.148731, 0.156751, 0.179891, 0.218321, 0.295121", \ + "0.148871, 0.152951, 0.156461, 0.164481, 0.187621, 0.226051, 0.302851", \ + "0.159171, 0.163251, 0.166761, 0.174781, 0.197921, 0.236351, 0.313151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146325, 0.149815, 0.152735, 0.159055, 0.175595, 0.201885, 0.254165", \ + "0.147995, 0.151485, 0.154405, 0.160725, 0.177265, 0.203555, 0.255835", \ + "0.150975, 0.154465, 0.157385, 0.163705, 0.180245, 0.206535, 0.258815", \ + "0.156855, 0.160345, 0.163265, 0.169585, 0.186125, 0.212415, 0.264695", \ + "0.170645, 0.174135, 0.177055, 0.183375, 0.199915, 0.226205, 0.278485", \ + "0.186725, 0.190215, 0.193135, 0.199455, 0.215995, 0.242285, 0.294565", \ + "0.217705, 0.221195, 0.224115, 0.230435, 0.246975, 0.273265, 0.325545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130143, 0.133553, 0.136383, 0.142493, 0.158343, 0.183543, 0.233583", \ + "0.131963, 0.135373, 0.138203, 0.144313, 0.160163, 0.185363, 0.235403", \ + "0.134903, 0.138313, 0.141143, 0.147253, 0.163103, 0.188303, 0.238343", \ + "0.140583, 0.143993, 0.146823, 0.152933, 0.168783, 0.193983, 0.244023", \ + "0.154543, 0.157953, 0.160783, 0.166893, 0.182743, 0.207943, 0.257983", \ + "0.170633, 0.174043, 0.176873, 0.182983, 0.198833, 0.224033, 0.274073", \ + "0.201653, 0.205063, 0.207893, 0.214003, 0.229853, 0.255053, 0.305093" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[2]&AA[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[2]&!AA[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[1]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b0 && AA[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157994, 0.161474, 0.164204, 0.170704, 0.187034, 0.213284, 0.265564", \ + "0.158894, 0.162374, 0.165104, 0.171604, 0.187934, 0.214184, 0.266464", \ + "0.162124, 0.165604, 0.168334, 0.174834, 0.191164, 0.217414, 0.269694", \ + "0.166094, 0.169574, 0.172304, 0.178804, 0.195134, 0.221384, 0.273664", \ + "0.175124, 0.178604, 0.181334, 0.187834, 0.204164, 0.230414, 0.282694", \ + "0.182214, 0.185694, 0.188424, 0.194924, 0.211254, 0.237504, 0.289784", \ + "0.191484, 0.194964, 0.197694, 0.204194, 0.220524, 0.246774, 0.299054" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140227, 0.143677, 0.146367, 0.152607, 0.168337, 0.193527, 0.243627", \ + "0.141207, 0.144657, 0.147347, 0.153587, 0.169317, 0.194507, 0.244607", \ + "0.144357, 0.147807, 0.150497, 0.156737, 0.172467, 0.197657, 0.247757", \ + "0.148477, 0.151927, 0.154617, 0.160857, 0.176587, 0.201777, 0.251877", \ + "0.157407, 0.160857, 0.163547, 0.169787, 0.185517, 0.210707, 0.260807", \ + "0.164497, 0.167947, 0.170637, 0.176877, 0.192607, 0.217797, 0.267897", \ + "0.173807, 0.177257, 0.179947, 0.186187, 0.201917, 0.227107, 0.277207" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147952, 0.152202, 0.155823, 0.164002, 0.187702, 0.227022, 0.305693", \ + "0.148792, 0.153042, 0.156663, 0.164843, 0.188543, 0.227862, 0.306533", \ + "0.152523, 0.156773, 0.160392, 0.168572, 0.192273, 0.231593, 0.310262", \ + "0.158622, 0.162873, 0.166492, 0.174673, 0.198373, 0.237693, 0.316362", \ + "0.171613, 0.175863, 0.179482, 0.187663, 0.211363, 0.250683, 0.329352", \ + "0.189122, 0.193373, 0.196992, 0.205173, 0.228873, 0.268193, 0.346863", \ + "0.218652, 0.222903, 0.226522, 0.234703, 0.258403, 0.297723, 0.376393" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130693, 0.134814, 0.138383, 0.146373, 0.169504, 0.207953, 0.284774", \ + "0.131413, 0.135534, 0.139103, 0.147093, 0.170223, 0.208674, 0.285494", \ + "0.135124, 0.139243, 0.142814, 0.150804, 0.173933, 0.212384, 0.289204", \ + "0.141284, 0.145403, 0.148974, 0.156964, 0.180093, 0.218544, 0.295364", \ + "0.154203, 0.158324, 0.161893, 0.169883, 0.193014, 0.231463, 0.308283", \ + "0.171834, 0.175953, 0.179524, 0.187513, 0.210644, 0.249093, 0.325914", \ + "0.201374, 0.205493, 0.209063, 0.217054, 0.240183, 0.278633, 0.355453" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[1] == 1'b1 && AA[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141000, 0.145180, 0.148830, 0.157140, 0.180890, 0.220230, 0.298900", \ + "0.142040, 0.146220, 0.149870, 0.158180, 0.181930, 0.221270, 0.299940", \ + "0.144510, 0.148690, 0.152340, 0.160650, 0.184400, 0.223740, 0.302410", \ + "0.149610, 0.153790, 0.157440, 0.165750, 0.189500, 0.228840, 0.307510", \ + "0.157960, 0.162140, 0.165790, 0.174100, 0.197850, 0.237190, 0.315860", \ + "0.165720, 0.169900, 0.173550, 0.181860, 0.205610, 0.244950, 0.323620", \ + "0.176240, 0.180420, 0.184070, 0.192380, 0.216130, 0.255470, 0.334140" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124071, 0.128151, 0.131661, 0.139681, 0.162821, 0.201251, 0.278051", \ + "0.125321, 0.129401, 0.132911, 0.140931, 0.164071, 0.202501, 0.279301", \ + "0.127601, 0.131681, 0.135191, 0.143211, 0.166351, 0.204781, 0.281581", \ + "0.132731, 0.136811, 0.140321, 0.148341, 0.171481, 0.209911, 0.286711", \ + "0.141141, 0.145221, 0.148731, 0.156751, 0.179891, 0.218321, 0.295121", \ + "0.148871, 0.152951, 0.156461, 0.164481, 0.187621, 0.226051, 0.302851", \ + "0.159171, 0.163251, 0.166761, 0.174781, 0.197921, 0.236351, 0.313151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146325, 0.149815, 0.152735, 0.159055, 0.175595, 0.201885, 0.254165", \ + "0.147995, 0.151485, 0.154405, 0.160725, 0.177265, 0.203555, 0.255835", \ + "0.150975, 0.154465, 0.157385, 0.163705, 0.180245, 0.206535, 0.258815", \ + "0.156855, 0.160345, 0.163265, 0.169585, 0.186125, 0.212415, 0.264695", \ + "0.170645, 0.174135, 0.177055, 0.183375, 0.199915, 0.226205, 0.278485", \ + "0.186725, 0.190215, 0.193135, 0.199455, 0.215995, 0.242285, 0.294565", \ + "0.217705, 0.221195, 0.224115, 0.230435, 0.246975, 0.273265, 0.325545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130143, 0.133553, 0.136383, 0.142493, 0.158343, 0.183543, 0.233583", \ + "0.131963, 0.135373, 0.138203, 0.144313, 0.160163, 0.185363, 0.235403", \ + "0.134903, 0.138313, 0.141143, 0.147253, 0.163103, 0.188303, 0.238343", \ + "0.140583, 0.143993, 0.146823, 0.152933, 0.168783, 0.193983, 0.244023", \ + "0.154543, 0.157953, 0.160783, 0.166893, 0.182743, 0.207943, 0.257983", \ + "0.170633, 0.174043, 0.176873, 0.182983, 0.198833, 0.224033, 0.274073", \ + "0.201653, 0.205063, 0.207893, 0.214003, 0.229853, 0.255053, 0.305093" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[1]&AA[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[1]&!AA[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + pin(AYA[0]) { + direction : output; + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b0 && AA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157994, 0.161474, 0.164204, 0.170704, 0.187034, 0.213284, 0.265564", \ + "0.158894, 0.162374, 0.165104, 0.171604, 0.187934, 0.214184, 0.266464", \ + "0.162124, 0.165604, 0.168334, 0.174834, 0.191164, 0.217414, 0.269694", \ + "0.166094, 0.169574, 0.172304, 0.178804, 0.195134, 0.221384, 0.273664", \ + "0.175124, 0.178604, 0.181334, 0.187834, 0.204164, 0.230414, 0.282694", \ + "0.182214, 0.185694, 0.188424, 0.194924, 0.211254, 0.237504, 0.289784", \ + "0.191484, 0.194964, 0.197694, 0.204194, 0.220524, 0.246774, 0.299054" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.140227, 0.143677, 0.146367, 0.152607, 0.168337, 0.193527, 0.243627", \ + "0.141207, 0.144657, 0.147347, 0.153587, 0.169317, 0.194507, 0.244607", \ + "0.144357, 0.147807, 0.150497, 0.156737, 0.172467, 0.197657, 0.247757", \ + "0.148477, 0.151927, 0.154617, 0.160857, 0.176587, 0.201777, 0.251877", \ + "0.157407, 0.160857, 0.163547, 0.169787, 0.185517, 0.210707, 0.260807", \ + "0.164497, 0.167947, 0.170637, 0.176877, 0.192607, 0.217797, 0.267897", \ + "0.173807, 0.177257, 0.179947, 0.186187, 0.201917, 0.227107, 0.277207" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262", \ + "0.012884, 0.016399, 0.019797, 0.028496, 0.055344, 0.102055, 0.198262" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.147952, 0.152202, 0.155823, 0.164002, 0.187702, 0.227022, 0.305693", \ + "0.148792, 0.153042, 0.156663, 0.164843, 0.188543, 0.227862, 0.306533", \ + "0.152523, 0.156773, 0.160392, 0.168572, 0.192273, 0.231593, 0.310262", \ + "0.158622, 0.162873, 0.166492, 0.174673, 0.198373, 0.237693, 0.316362", \ + "0.171613, 0.175863, 0.179482, 0.187663, 0.211363, 0.250683, 0.329352", \ + "0.189122, 0.193373, 0.196992, 0.205173, 0.228873, 0.268193, 0.346863", \ + "0.218652, 0.222903, 0.226522, 0.234703, 0.258403, 0.297723, 0.376393" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130693, 0.134814, 0.138383, 0.146373, 0.169504, 0.207953, 0.284774", \ + "0.131413, 0.135534, 0.139103, 0.147093, 0.170223, 0.208674, 0.285494", \ + "0.135124, 0.139243, 0.142814, 0.150804, 0.173933, 0.212384, 0.289204", \ + "0.141284, 0.145403, 0.148974, 0.156964, 0.180093, 0.218544, 0.295364", \ + "0.154203, 0.158324, 0.161893, 0.169883, 0.193014, 0.231463, 0.308283", \ + "0.171834, 0.175953, 0.179524, 0.187513, 0.210644, 0.249093, 0.325914", \ + "0.201374, 0.205493, 0.209063, 0.217054, 0.240183, 0.278633, 0.355453" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704", \ + "0.012582, 0.017159, 0.022026, 0.034945, 0.076765, 0.148012, 0.291704" \ + ); + } + } + timing() { + related_pin : TENA; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAA[0] == 1'b1 && AA[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.141000, 0.145180, 0.148830, 0.157140, 0.180890, 0.220230, 0.298900", \ + "0.142040, 0.146220, 0.149870, 0.158180, 0.181930, 0.221270, 0.299940", \ + "0.144510, 0.148690, 0.152340, 0.160650, 0.184400, 0.223740, 0.302410", \ + "0.149610, 0.153790, 0.157440, 0.165750, 0.189500, 0.228840, 0.307510", \ + "0.157960, 0.162140, 0.165790, 0.174100, 0.197850, 0.237190, 0.315860", \ + "0.165720, 0.169900, 0.173550, 0.181860, 0.205610, 0.244950, 0.323620", \ + "0.176240, 0.180420, 0.184070, 0.192380, 0.216130, 0.255470, 0.334140" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.124071, 0.128151, 0.131661, 0.139681, 0.162821, 0.201251, 0.278051", \ + "0.125321, 0.129401, 0.132911, 0.140931, 0.164071, 0.202501, 0.279301", \ + "0.127601, 0.131681, 0.135191, 0.143211, 0.166351, 0.204781, 0.281581", \ + "0.132731, 0.136811, 0.140321, 0.148341, 0.171481, 0.209911, 0.286711", \ + "0.141141, 0.145221, 0.148731, 0.156751, 0.179891, 0.218321, 0.295121", \ + "0.148871, 0.152951, 0.156461, 0.164481, 0.187621, 0.226051, 0.302851", \ + "0.159171, 0.163251, 0.166761, 0.174781, 0.197921, 0.236351, 0.313151" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365", \ + "0.012378, 0.017104, 0.022065, 0.035135, 0.076658, 0.148414, 0.291365" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.146325, 0.149815, 0.152735, 0.159055, 0.175595, 0.201885, 0.254165", \ + "0.147995, 0.151485, 0.154405, 0.160725, 0.177265, 0.203555, 0.255835", \ + "0.150975, 0.154465, 0.157385, 0.163705, 0.180245, 0.206535, 0.258815", \ + "0.156855, 0.160345, 0.163265, 0.169585, 0.186125, 0.212415, 0.264695", \ + "0.170645, 0.174135, 0.177055, 0.183375, 0.199915, 0.226205, 0.278485", \ + "0.186725, 0.190215, 0.193135, 0.199455, 0.215995, 0.242285, 0.294565", \ + "0.217705, 0.221195, 0.224115, 0.230435, 0.246975, 0.273265, 0.325545" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.130143, 0.133553, 0.136383, 0.142493, 0.158343, 0.183543, 0.233583", \ + "0.131963, 0.135373, 0.138203, 0.144313, 0.160163, 0.185363, 0.235403", \ + "0.134903, 0.138313, 0.141143, 0.147253, 0.163103, 0.188303, 0.238343", \ + "0.140583, 0.143993, 0.146823, 0.152933, 0.168783, 0.193983, 0.244023", \ + "0.154543, 0.157953, 0.160783, 0.166893, 0.182743, 0.207943, 0.257983", \ + "0.170633, 0.174043, 0.176873, 0.182983, 0.198833, 0.224033, 0.274073", \ + "0.201653, 0.205063, 0.207893, 0.214003, 0.229853, 0.255053, 0.305093" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161", \ + "0.012793, 0.016328, 0.019779, 0.028277, 0.055283, 0.102052, 0.199161" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAA[0]&AA[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + } + internal_power() { + related_pin : TENA; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAA[0]&!AA[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769, 0.015769", \ + "0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785, 0.015785", \ + "0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801, 0.015801", \ + "0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816, 0.015816", \ + "0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832, 0.015832", \ + "0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848, 0.015848", \ + "0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864, 0.015864" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818, 0.017818", \ + "0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863, 0.017863", \ + "0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880, 0.017880", \ + "0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898, 0.017898", \ + "0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916, 0.017916", \ + "0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934, 0.017934", \ + "0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952, 0.017952" \ + ); + } + } + } + } + pin(CENYB) { + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074354, 0.078586, 0.082186, 0.089757, 0.108730, 0.139860, 0.204460", \ + "0.074750, 0.078774, 0.082114, 0.089481, 0.109650, 0.141540, 0.202700", \ + "0.078933, 0.082371, 0.085596, 0.093093, 0.112390, 0.144040, 0.209730", \ + "0.084346, 0.087763, 0.090939, 0.098445, 0.117810, 0.149330, 0.211760", \ + "0.097264, 0.100990, 0.104410, 0.112000, 0.131230, 0.162950, 0.225190", \ + "0.113090, 0.116980, 0.120480, 0.127780, 0.147700, 0.180880, 0.239500", \ + "0.135460, 0.139220, 0.142470, 0.150060, 0.169230, 0.200360, 0.262760" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.066919, 0.071151, 0.074751, 0.082322, 0.101295, 0.132425, 0.197025", \ + "0.067315, 0.071339, 0.074679, 0.082046, 0.102215, 0.134105, 0.195265", \ + "0.071498, 0.074936, 0.078161, 0.085658, 0.104955, 0.136605, 0.202295", \ + "0.076911, 0.080328, 0.083504, 0.091010, 0.110375, 0.141895, 0.204325", \ + "0.089829, 0.093555, 0.096975, 0.104565, 0.123795, 0.155515, 0.217755", \ + "0.105655, 0.109545, 0.113045, 0.120345, 0.140265, 0.173445, 0.232065", \ + "0.128025, 0.131785, 0.135035, 0.142625, 0.161795, 0.192925, 0.255325" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077755, 0.082467, 0.086772, 0.096041, 0.124450, 0.170550, 0.266080", \ + "0.079502, 0.083764, 0.087923, 0.097638, 0.125570, 0.174270, 0.266550", \ + "0.082250, 0.087017, 0.091081, 0.100770, 0.129720, 0.175630, 0.265560", \ + "0.089540, 0.093457, 0.097542, 0.107220, 0.134650, 0.182380, 0.275380", \ + "0.101150, 0.105840, 0.109740, 0.119490, 0.147090, 0.194030, 0.284420", \ + "0.122420, 0.127040, 0.130940, 0.140460, 0.167980, 0.215680, 0.308220", \ + "0.154650, 0.159420, 0.163390, 0.172890, 0.200540, 0.246820, 0.342410" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069980, 0.074691, 0.078996, 0.088265, 0.116675, 0.162775, 0.258304", \ + "0.071726, 0.075989, 0.080147, 0.089862, 0.117794, 0.166495, 0.258775", \ + "0.074474, 0.079241, 0.083305, 0.092994, 0.121944, 0.167855, 0.257785", \ + "0.081764, 0.085681, 0.089766, 0.099444, 0.126875, 0.174604, 0.267605", \ + "0.093374, 0.098064, 0.101964, 0.111714, 0.139315, 0.186255, 0.276645", \ + "0.114644, 0.119264, 0.123164, 0.132685, 0.160204, 0.207905, 0.300445", \ + "0.146875, 0.151645, 0.155615, 0.165114, 0.192765, 0.239045, 0.334635" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.075234, 0.079321, 0.082633, 0.089974, 0.109340, 0.141740, 0.206660", \ + "0.075616, 0.079652, 0.083012, 0.090375, 0.109640, 0.142200, 0.204380", \ + "0.078831, 0.082825, 0.086198, 0.094040, 0.113030, 0.144080, 0.208900", \ + "0.085057, 0.088980, 0.092364, 0.099659, 0.118710, 0.149790, 0.214040", \ + "0.096931, 0.100760, 0.104230, 0.111650, 0.130950, 0.162390, 0.225570", \ + "0.113930, 0.117690, 0.120950, 0.128270, 0.147580, 0.178350, 0.243250", \ + "0.136560, 0.140450, 0.143710, 0.151250, 0.170330, 0.201940, 0.264250" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.067711, 0.071798, 0.075110, 0.082451, 0.101817, 0.134217, 0.199137", \ + "0.068093, 0.072129, 0.075489, 0.082852, 0.102117, 0.134677, 0.196857", \ + "0.071308, 0.075302, 0.078675, 0.086517, 0.105507, 0.136557, 0.201377", \ + "0.077534, 0.081457, 0.084841, 0.092136, 0.111187, 0.142267, 0.206517", \ + "0.089408, 0.093237, 0.096707, 0.104127, 0.123427, 0.154867, 0.218047", \ + "0.106407, 0.110167, 0.113427, 0.120747, 0.140057, 0.170827, 0.235727", \ + "0.129037, 0.132927, 0.136187, 0.143727, 0.162807, 0.194417, 0.256727" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.077264, 0.081550, 0.085738, 0.095431, 0.123360, 0.172280, 0.263650", \ + "0.077882, 0.082652, 0.087047, 0.096344, 0.124780, 0.172110, 0.262590", \ + "0.081033, 0.085633, 0.089650, 0.099270, 0.126570, 0.174830, 0.266390", \ + "0.087553, 0.092232, 0.096330, 0.105810, 0.133490, 0.181070, 0.275930", \ + "0.100230, 0.104840, 0.108670, 0.118490, 0.145740, 0.193970, 0.289160", \ + "0.121900, 0.126550, 0.130410, 0.140160, 0.167960, 0.216570, 0.310680", \ + "0.155280, 0.160100, 0.164260, 0.173710, 0.200950, 0.247950, 0.341160" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069538, 0.073824, 0.078012, 0.087705, 0.115634, 0.164554, 0.255924", \ + "0.070156, 0.074926, 0.079321, 0.088618, 0.117054, 0.164384, 0.254864", \ + "0.073307, 0.077907, 0.081924, 0.091544, 0.118844, 0.167104, 0.258664", \ + "0.079827, 0.084506, 0.088604, 0.098084, 0.125764, 0.173344, 0.268204", \ + "0.092504, 0.097114, 0.100944, 0.110764, 0.138014, 0.186244, 0.281434", \ + "0.114174, 0.118824, 0.122684, 0.132434, 0.160234, 0.208844, 0.302954", \ + "0.147554, 0.152374, 0.156534, 0.165984, 0.193224, 0.240224, 0.333434" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TCENB&CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b0 && CENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.113992, 0.117552, 0.120902, 0.128212, 0.147462, 0.178312, 0.239792", \ + "0.115022, 0.118582, 0.121932, 0.129242, 0.148492, 0.179342, 0.240822", \ + "0.117742, 0.121302, 0.124652, 0.131962, 0.151212, 0.182062, 0.243542", \ + "0.124602, 0.128162, 0.131512, 0.138822, 0.158072, 0.188922, 0.250402", \ + "0.134782, 0.138342, 0.141692, 0.149002, 0.168252, 0.199102, 0.260582", \ + "0.147372, 0.150932, 0.154282, 0.161592, 0.180842, 0.211692, 0.273172", \ + "0.167432, 0.170992, 0.174342, 0.181652, 0.200902, 0.231752, 0.293232" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.102593, 0.106153, 0.109503, 0.116813, 0.136063, 0.166913, 0.228393", \ + "0.103623, 0.107183, 0.110533, 0.117843, 0.137093, 0.167943, 0.229423", \ + "0.106343, 0.109903, 0.113253, 0.120563, 0.139813, 0.170663, 0.232143", \ + "0.113203, 0.116763, 0.120113, 0.127423, 0.146673, 0.177523, 0.239003", \ + "0.123383, 0.126943, 0.130293, 0.137603, 0.156853, 0.187703, 0.249183", \ + "0.135973, 0.139533, 0.142883, 0.150193, 0.169443, 0.200293, 0.261773", \ + "0.156033, 0.159593, 0.162943, 0.170253, 0.189503, 0.220353, 0.281833" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991", \ + "0.015249, 0.020235, 0.023863, 0.033533, 0.064152, 0.118735, 0.231991" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.123601, 0.128711, 0.132821, 0.142541, 0.170451, 0.215461, 0.308731", \ + "0.124701, 0.129811, 0.133921, 0.143641, 0.171551, 0.216561, 0.309831", \ + "0.128521, 0.133631, 0.137741, 0.147461, 0.175371, 0.220381, 0.313651", \ + "0.134741, 0.139851, 0.143961, 0.153681, 0.181591, 0.226601, 0.319871", \ + "0.146891, 0.152001, 0.156111, 0.165831, 0.193741, 0.238751, 0.332021", \ + "0.160451, 0.165561, 0.169671, 0.179391, 0.207301, 0.252311, 0.345581", \ + "0.183751, 0.188861, 0.192971, 0.202691, 0.230601, 0.275611, 0.368881" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.111241, 0.116351, 0.120461, 0.130181, 0.158091, 0.203101, 0.296371", \ + "0.112341, 0.117451, 0.121561, 0.131281, 0.159191, 0.204201, 0.297471", \ + "0.116161, 0.121271, 0.125381, 0.135101, 0.163011, 0.208021, 0.301291", \ + "0.122381, 0.127491, 0.131601, 0.141321, 0.169231, 0.214241, 0.307511", \ + "0.134531, 0.139641, 0.143751, 0.153471, 0.181381, 0.226391, 0.319661", \ + "0.148091, 0.153201, 0.157311, 0.167031, 0.194941, 0.239951, 0.333221", \ + "0.171391, 0.176501, 0.180611, 0.190331, 0.218241, 0.263251, 0.356521" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776", \ + "0.018084, 0.022367, 0.027863, 0.043689, 0.091752, 0.172142, 0.335776" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TCENB&!CENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TCENB == 1'b1 && CENB == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.161406, 0.166236, 0.170586, 0.180216, 0.207766, 0.254586, 0.346596", \ + "0.162196, 0.167026, 0.171376, 0.181006, 0.208556, 0.255376, 0.347386", \ + "0.166316, 0.171146, 0.175496, 0.185126, 0.212676, 0.259496, 0.351506", \ + "0.171836, 0.176666, 0.181016, 0.190646, 0.218196, 0.265016, 0.357026", \ + "0.183756, 0.188586, 0.192936, 0.202566, 0.230116, 0.276936, 0.368946", \ + "0.196696, 0.201526, 0.205876, 0.215506, 0.243056, 0.289876, 0.381886", \ + "0.216626, 0.221456, 0.225806, 0.235436, 0.262986, 0.309806, 0.401816" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.145266, 0.150096, 0.154446, 0.164076, 0.191626, 0.238446, 0.330456", \ + "0.146056, 0.150886, 0.155236, 0.164866, 0.192416, 0.239236, 0.331246", \ + "0.150176, 0.155006, 0.159356, 0.168986, 0.196536, 0.243356, 0.335366", \ + "0.155696, 0.160526, 0.164876, 0.174506, 0.202056, 0.248876, 0.340886", \ + "0.167616, 0.172446, 0.176796, 0.186426, 0.213976, 0.260796, 0.352806", \ + "0.180556, 0.185386, 0.189736, 0.199366, 0.226916, 0.273736, 0.365746", \ + "0.200486, 0.205316, 0.209666, 0.219296, 0.246846, 0.293666, 0.385676" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623", \ + "0.016751, 0.022613, 0.027772, 0.042983, 0.092346, 0.174805, 0.335623" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.151676, 0.155566, 0.158956, 0.166126, 0.185316, 0.216156, 0.278576", \ + "0.153186, 0.157076, 0.160466, 0.167636, 0.186826, 0.217666, 0.280086", \ + "0.157076, 0.160966, 0.164356, 0.171526, 0.190716, 0.221556, 0.283976", \ + "0.162896, 0.166786, 0.170176, 0.177346, 0.196536, 0.227376, 0.289796", \ + "0.174596, 0.178486, 0.181876, 0.189046, 0.208236, 0.239076, 0.301496", \ + "0.188406, 0.192296, 0.195686, 0.202856, 0.222046, 0.252886, 0.315306", \ + "0.212406, 0.216296, 0.219686, 0.226856, 0.246046, 0.276886, 0.339306" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.136508, 0.140398, 0.143788, 0.150958, 0.170148, 0.200988, 0.263408", \ + "0.138018, 0.141908, 0.145298, 0.152468, 0.171658, 0.202498, 0.264918", \ + "0.141908, 0.145798, 0.149188, 0.156358, 0.175548, 0.206388, 0.268808", \ + "0.147728, 0.151618, 0.155008, 0.162178, 0.181368, 0.212208, 0.274628", \ + "0.159428, 0.163318, 0.166708, 0.173878, 0.193068, 0.223908, 0.286328", \ + "0.173238, 0.177128, 0.180518, 0.187688, 0.206878, 0.237718, 0.300138", \ + "0.197238, 0.201128, 0.204518, 0.211688, 0.230878, 0.261718, 0.324138" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581", \ + "0.015616, 0.019722, 0.023493, 0.033160, 0.064657, 0.119543, 0.231581" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.074269, 0.077549, 0.081359, 0.088496, 0.107676, 0.138927, 0.199927", \ + "0.075020, 0.078300, 0.082110, 0.089247, 0.108427, 0.139678, 0.200678", \ + "0.078331, 0.081611, 0.085421, 0.092558, 0.111738, 0.142989, 0.203989", \ + "0.083502, 0.086782, 0.090592, 0.097729, 0.116909, 0.148160, 0.209160", \ + "0.094352, 0.097632, 0.101442, 0.108579, 0.127759, 0.159010, 0.220010", \ + "0.108033, 0.111313, 0.115123, 0.122260, 0.141440, 0.172691, 0.233691", \ + "0.129457, 0.132737, 0.136547, 0.143684, 0.162864, 0.194115, 0.255115" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.066842, 0.070122, 0.073932, 0.081069, 0.100249, 0.131500, 0.192500", \ + "0.067593, 0.070873, 0.074683, 0.081820, 0.101000, 0.132251, 0.193251", \ + "0.070904, 0.074184, 0.077994, 0.085131, 0.104311, 0.135562, 0.196562", \ + "0.076075, 0.079355, 0.083165, 0.090302, 0.109482, 0.140733, 0.201733", \ + "0.086925, 0.090205, 0.094015, 0.101152, 0.120332, 0.151583, 0.212583", \ + "0.100606, 0.103886, 0.107696, 0.114833, 0.134013, 0.165264, 0.226264", \ + "0.122030, 0.125310, 0.129120, 0.136257, 0.155437, 0.186688, 0.247688" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713", \ + "0.015050, 0.020357, 0.022753, 0.032596, 0.063910, 0.119234, 0.231713" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.078368, 0.083532, 0.087483, 0.096993, 0.124908, 0.170958, 0.261588", \ + "0.079742, 0.084906, 0.088857, 0.098367, 0.126282, 0.172332, 0.262962", \ + "0.082575, 0.087739, 0.091690, 0.101200, 0.129115, 0.175165, 0.265795", \ + "0.089624, 0.094788, 0.098739, 0.108249, 0.136164, 0.182214, 0.272844", \ + "0.100108, 0.105272, 0.109223, 0.118733, 0.146648, 0.192698, 0.283328", \ + "0.117028, 0.122192, 0.126143, 0.135653, 0.163568, 0.209618, 0.300248", \ + "0.141678, 0.146842, 0.150793, 0.160303, 0.188218, 0.234268, 0.324898" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.070531, 0.075695, 0.079646, 0.089156, 0.117071, 0.163121, 0.253751", \ + "0.071905, 0.077069, 0.081020, 0.090530, 0.118445, 0.164495, 0.255125", \ + "0.074738, 0.079902, 0.083853, 0.093363, 0.121278, 0.167328, 0.257958", \ + "0.081787, 0.086951, 0.090902, 0.100412, 0.128327, 0.174377, 0.265007", \ + "0.092271, 0.097435, 0.101386, 0.110896, 0.138811, 0.184861, 0.275491", \ + "0.109191, 0.114355, 0.118306, 0.127816, 0.155731, 0.201781, 0.292411", \ + "0.133841, 0.139005, 0.142956, 0.152466, 0.180381, 0.226431, 0.317061" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539", \ + "0.015473, 0.020630, 0.026284, 0.041535, 0.089640, 0.171259, 0.338539" \ + ); + } + } + internal_power() { + related_pin : CENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TCENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TCENB&CENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TCENB&!CENB"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681, 0.061681", \ + "0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743, 0.061743", \ + "0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805, 0.061805", \ + "0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867, 0.061867", \ + "0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928, 0.061928", \ + "0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990, 0.061990", \ + "0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052, 0.062052" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904, 0.034904", \ + "0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006, 0.035006", \ + "0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041, 0.035041", \ + "0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076, 0.035076", \ + "0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111, 0.035111", \ + "0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146, 0.035146", \ + "0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182, 0.035182" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004818, 0.004822, 0.004827, 0.004832", \ + "0.005570, 0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603", \ + "0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620", \ + "0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620, 0.005626", \ + "0.005972, 0.005978, 0.005984, 0.005990, 0.005996, 0.006002, 0.006008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004742, 0.004746, 0.004751, 0.004756, 0.004761, 0.004765, 0.004770", \ + "0.005440, 0.005445, 0.005451, 0.005456, 0.005462, 0.005467, 0.005473", \ + "0.006200, 0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250", \ + "0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256", \ + "0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256, 0.006263" \ + ); + } + } + } + bus(AYB) { + bus_type : rf2_32x19_wm0_AYB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : AB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069396, 0.072858, 0.075926, 0.082251, 0.097876, 0.123210, 0.177680", \ + "0.070873, 0.074163, 0.076859, 0.083184, 0.099238, 0.124460, 0.178190", \ + "0.073350, 0.077094, 0.080105, 0.085995, 0.103140, 0.129110, 0.179990", \ + "0.078912, 0.082403, 0.085405, 0.091377, 0.107510, 0.132990, 0.187760", \ + "0.091596, 0.095079, 0.097848, 0.103960, 0.120100, 0.145670, 0.199940", \ + "0.108600, 0.112060, 0.114910, 0.121100, 0.136900, 0.162440, 0.213150", \ + "0.139910, 0.143260, 0.146080, 0.152050, 0.168170, 0.193730, 0.246410" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062456, 0.065918, 0.068986, 0.075311, 0.090936, 0.116270, 0.170740", \ + "0.063933, 0.067223, 0.069919, 0.076244, 0.092298, 0.117520, 0.171250", \ + "0.066410, 0.070154, 0.073165, 0.079055, 0.096200, 0.122170, 0.173050", \ + "0.071972, 0.075463, 0.078465, 0.084437, 0.100570, 0.126050, 0.180820", \ + "0.084656, 0.088139, 0.090908, 0.097020, 0.113160, 0.138730, 0.193000", \ + "0.101660, 0.105120, 0.107970, 0.114160, 0.129960, 0.155500, 0.206210", \ + "0.132970, 0.136320, 0.139140, 0.145110, 0.161230, 0.186790, 0.239470" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.060772, 0.064806, 0.068368, 0.076624, 0.099632, 0.140660, 0.219350", \ + "0.061390, 0.065566, 0.069030, 0.077121, 0.100390, 0.140730, 0.219410", \ + "0.064872, 0.068940, 0.072501, 0.080763, 0.103770, 0.144380, 0.224830", \ + "0.071097, 0.075168, 0.078596, 0.086912, 0.109890, 0.150970, 0.229420", \ + "0.083785, 0.087855, 0.091391, 0.099693, 0.122710, 0.163680, 0.242400", \ + "0.101220, 0.105280, 0.108750, 0.116790, 0.140330, 0.178920, 0.258850", \ + "0.139050, 0.143040, 0.146600, 0.154600, 0.177970, 0.216680, 0.293170" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.054695, 0.058729, 0.062291, 0.070547, 0.093555, 0.134583, 0.213273", \ + "0.055313, 0.059489, 0.062953, 0.071044, 0.094313, 0.134653, 0.213333", \ + "0.058795, 0.062863, 0.066424, 0.074686, 0.097693, 0.138303, 0.218753", \ + "0.065020, 0.069091, 0.072519, 0.080835, 0.103813, 0.144893, 0.223343", \ + "0.077708, 0.081778, 0.085314, 0.093616, 0.116633, 0.157603, 0.236323", \ + "0.095143, 0.099203, 0.102673, 0.110713, 0.134253, 0.172843, 0.252773", \ + "0.132973, 0.136963, 0.140523, 0.148523, 0.171893, 0.210603, 0.287093" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + timing() { + related_pin : TAB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TENB"; + sdf_cond : "DFTRAMBYP == 1'b1 && TENB == 1'b0"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.072819, 0.075962, 0.078907, 0.085262, 0.101430, 0.126580, 0.180040", \ + "0.073438, 0.076822, 0.079710, 0.086153, 0.101880, 0.128730, 0.180680", \ + "0.076259, 0.079948, 0.082707, 0.088645, 0.105030, 0.131110, 0.183410", \ + "0.082542, 0.085802, 0.088523, 0.094912, 0.110960, 0.137150, 0.188920", \ + "0.093829, 0.097329, 0.100310, 0.106240, 0.122450, 0.147950, 0.202290", \ + "0.112320, 0.115800, 0.118690, 0.124690, 0.141000, 0.166340, 0.220740", \ + "0.142960, 0.146370, 0.149010, 0.154520, 0.170610, 0.196520, 0.249040" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.065537, 0.068680, 0.071625, 0.077980, 0.094148, 0.119298, 0.172758", \ + "0.066156, 0.069540, 0.072428, 0.078871, 0.094598, 0.121448, 0.173398", \ + "0.068977, 0.072666, 0.075425, 0.081363, 0.097748, 0.123828, 0.176128", \ + "0.075260, 0.078520, 0.081241, 0.087630, 0.103678, 0.129868, 0.181638", \ + "0.086547, 0.090047, 0.093028, 0.098958, 0.115168, 0.140668, 0.195008", \ + "0.105038, 0.108518, 0.111408, 0.117408, 0.133718, 0.159058, 0.213458", \ + "0.135678, 0.139088, 0.141728, 0.147238, 0.163328, 0.189238, 0.241758" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062520, 0.066785, 0.070303, 0.078412, 0.101590, 0.142410, 0.221390", \ + "0.064132, 0.068059, 0.071688, 0.079685, 0.102760, 0.141270, 0.223660", \ + "0.066331, 0.070585, 0.074068, 0.082115, 0.105780, 0.146500, 0.224920", \ + "0.072453, 0.076384, 0.080042, 0.088035, 0.111080, 0.149600, 0.231990", \ + "0.085276, 0.089153, 0.092701, 0.101010, 0.124040, 0.165110, 0.246740", \ + "0.102830, 0.106860, 0.110400, 0.118440, 0.141750, 0.180160, 0.259810", \ + "0.140650, 0.144630, 0.148220, 0.156250, 0.179570, 0.216010, 0.294270" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.056268, 0.060533, 0.064051, 0.072160, 0.095338, 0.136158, 0.215138", \ + "0.057880, 0.061807, 0.065436, 0.073433, 0.096508, 0.135018, 0.217408", \ + "0.060079, 0.064333, 0.067816, 0.075863, 0.099528, 0.140248, 0.218668", \ + "0.066201, 0.070132, 0.073790, 0.081783, 0.104828, 0.143348, 0.225738", \ + "0.079024, 0.082901, 0.086449, 0.094758, 0.117788, 0.158858, 0.240488", \ + "0.096578, 0.100608, 0.104148, 0.112188, 0.135498, 0.173908, 0.253558", \ + "0.134398, 0.138378, 0.141968, 0.149998, 0.173318, 0.209758, 0.288018" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : combinational; + timing_sense : positive_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.069877, 0.073008, 0.076086, 0.082327, 0.098879, 0.125134, 0.177604", \ + "0.070850, 0.073981, 0.077059, 0.083300, 0.099852, 0.126107, 0.178577", \ + "0.073662, 0.076793, 0.079871, 0.086112, 0.102664, 0.128919, 0.181389", \ + "0.079399, 0.082530, 0.085608, 0.091849, 0.108401, 0.134656, 0.187126", \ + "0.089860, 0.092991, 0.096069, 0.102310, 0.118862, 0.145117, 0.197587", \ + "0.102889, 0.106020, 0.109098, 0.115339, 0.131891, 0.158146, 0.210616", \ + "0.123584, 0.126715, 0.129793, 0.136034, 0.152586, 0.178841, 0.231311" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.062491, 0.065748, 0.068789, 0.075004, 0.090883, 0.115951, 0.166041", \ + "0.063492, 0.066748, 0.069789, 0.076004, 0.091883, 0.116951, 0.167041", \ + "0.066296, 0.069552, 0.072593, 0.078808, 0.094687, 0.119756, 0.169845", \ + "0.072034, 0.075290, 0.078331, 0.084546, 0.100424, 0.125493, 0.175584", \ + "0.082506, 0.085762, 0.088803, 0.095018, 0.110897, 0.135965, 0.186055", \ + "0.095519, 0.098775, 0.101816, 0.108031, 0.123910, 0.148978, 0.199068", \ + "0.116201, 0.119458, 0.122498, 0.128713, 0.144592, 0.169661, 0.219751" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149", \ + "0.012608, 0.015930, 0.019335, 0.027625, 0.054821, 0.101758, 0.198149" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.072585, 0.076957, 0.080802, 0.089088, 0.112756, 0.152195, 0.230435", \ + "0.073440, 0.077812, 0.081657, 0.089943, 0.113611, 0.153050, 0.231290", \ + "0.076911, 0.081283, 0.085128, 0.093414, 0.117082, 0.156521, 0.234761", \ + "0.083502, 0.087874, 0.091719, 0.100005, 0.123673, 0.163112, 0.241352", \ + "0.095266, 0.099638, 0.103483, 0.111769, 0.135437, 0.174876, 0.253116", \ + "0.110473, 0.114845, 0.118690, 0.126976, 0.150644, 0.190083, 0.268323", \ + "0.134505, 0.138877, 0.142722, 0.151008, 0.174676, 0.214115, 0.292355" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.064158, 0.068355, 0.072118, 0.080210, 0.103335, 0.141889, 0.218389", \ + "0.064978, 0.069175, 0.072938, 0.081030, 0.104155, 0.142709, 0.219209", \ + "0.068486, 0.072683, 0.076446, 0.084538, 0.107663, 0.146217, 0.222717", \ + "0.075065, 0.079262, 0.083025, 0.091117, 0.114242, 0.152796, 0.229296", \ + "0.086822, 0.091019, 0.094782, 0.102874, 0.125999, 0.164553, 0.241053", \ + "0.102025, 0.106222, 0.109985, 0.118077, 0.141202, 0.179756, 0.256256", \ + "0.126069, 0.130266, 0.134029, 0.142121, 0.165246, 0.203800, 0.280300" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092", \ + "0.012235, 0.016742, 0.021420, 0.034280, 0.076128, 0.147195, 0.289092" \ + ); + } + } + internal_power() { + related_pin : AB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TAB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TENB"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : DFTRAMBYP; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004803, 0.004808, 0.004813, 0.004818, 0.004822, 0.004827, 0.004832", \ + "0.005570, 0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603", \ + "0.005575, 0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620", \ + "0.005592, 0.005598, 0.005603, 0.005609, 0.005615, 0.005620, 0.005626", \ + "0.005972, 0.005978, 0.005984, 0.005990, 0.005996, 0.006002, 0.006008" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.004742, 0.004746, 0.004751, 0.004756, 0.004761, 0.004765, 0.004770", \ + "0.005440, 0.005445, 0.005451, 0.005456, 0.005462, 0.005467, 0.005473", \ + "0.006200, 0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250", \ + "0.006219, 0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256", \ + "0.006225, 0.006231, 0.006238, 0.006244, 0.006250, 0.006256, 0.006263" \ + ); + } + } + pin(AYB[4]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b0 && AB[4] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.169116, 0.172736, 0.175466, 0.182126, 0.198576, 0.224916, 0.277246", \ + "0.170126, 0.173746, 0.176476, 0.183136, 0.199586, 0.225926, 0.278256", \ + "0.173926, 0.177546, 0.180276, 0.186936, 0.203386, 0.229726, 0.282056", \ + "0.178596, 0.182216, 0.184946, 0.191606, 0.208056, 0.234396, 0.286726", \ + "0.190786, 0.194406, 0.197136, 0.203796, 0.220246, 0.246586, 0.298916", \ + "0.202926, 0.206546, 0.209276, 0.215936, 0.232386, 0.258726, 0.311056", \ + "0.222956, 0.226576, 0.229306, 0.235966, 0.252416, 0.278756, 0.331086" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150085, 0.153545, 0.156165, 0.162455, 0.178105, 0.203175, 0.252995", \ + "0.151035, 0.154495, 0.157115, 0.163405, 0.179055, 0.204125, 0.253945", \ + "0.154925, 0.158385, 0.161005, 0.167295, 0.182945, 0.208015, 0.257835", \ + "0.159565, 0.163025, 0.165645, 0.171935, 0.187585, 0.212655, 0.262475", \ + "0.171785, 0.175245, 0.177865, 0.184155, 0.199805, 0.224875, 0.274695", \ + "0.183895, 0.187355, 0.189975, 0.196265, 0.211915, 0.236985, 0.286805", \ + "0.203905, 0.207365, 0.209985, 0.216275, 0.231925, 0.256995, 0.306815" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157511, 0.161921, 0.165651, 0.173971, 0.197741, 0.237071, 0.315771", \ + "0.158571, 0.162981, 0.166711, 0.175031, 0.198801, 0.238131, 0.316831", \ + "0.162341, 0.166751, 0.170481, 0.178801, 0.202571, 0.241901, 0.320601", \ + "0.168011, 0.172421, 0.176151, 0.184471, 0.208241, 0.247571, 0.326271", \ + "0.179501, 0.183911, 0.187641, 0.195961, 0.219731, 0.259061, 0.337761", \ + "0.192821, 0.197231, 0.200961, 0.209281, 0.233051, 0.272381, 0.351081", \ + "0.215441, 0.219851, 0.223581, 0.231901, 0.255671, 0.295001, 0.373701" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138430, 0.142560, 0.146090, 0.154110, 0.177280, 0.215800, 0.292720", \ + "0.139510, 0.143640, 0.147170, 0.155190, 0.178360, 0.216880, 0.293800", \ + "0.143080, 0.147210, 0.150740, 0.158760, 0.181930, 0.220450, 0.297370", \ + "0.148840, 0.152970, 0.156500, 0.164520, 0.187690, 0.226210, 0.303130", \ + "0.160300, 0.164430, 0.167960, 0.175980, 0.199150, 0.237670, 0.314590", \ + "0.173720, 0.177850, 0.181380, 0.189400, 0.212570, 0.251090, 0.328010", \ + "0.196330, 0.200460, 0.203990, 0.212010, 0.235180, 0.273700, 0.350620" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[4] == 1'b1 && AB[4] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153271, 0.157611, 0.161321, 0.169691, 0.193531, 0.232861, 0.311511", \ + "0.154691, 0.159031, 0.162741, 0.171111, 0.194951, 0.234281, 0.312931", \ + "0.157501, 0.161841, 0.165551, 0.173921, 0.197761, 0.237091, 0.315741", \ + "0.162941, 0.167281, 0.170991, 0.179361, 0.203201, 0.242531, 0.321181", \ + "0.174461, 0.178801, 0.182511, 0.190881, 0.214721, 0.254051, 0.332701", \ + "0.187571, 0.191911, 0.195621, 0.203991, 0.227831, 0.267161, 0.345811", \ + "0.207691, 0.212031, 0.215741, 0.224111, 0.247951, 0.287281, 0.365931" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134466, 0.138626, 0.142146, 0.150096, 0.173286, 0.211786, 0.288756", \ + "0.135916, 0.140076, 0.143596, 0.151546, 0.174736, 0.213236, 0.290206", \ + "0.138706, 0.142866, 0.146386, 0.154336, 0.177526, 0.216026, 0.292996", \ + "0.144066, 0.148226, 0.151746, 0.159696, 0.182886, 0.221386, 0.298356", \ + "0.155736, 0.159896, 0.163416, 0.171366, 0.194556, 0.233056, 0.310026", \ + "0.168636, 0.172796, 0.176316, 0.184266, 0.207456, 0.245956, 0.322926", \ + "0.188826, 0.192986, 0.196506, 0.204456, 0.227646, 0.266146, 0.343116" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157753, 0.161333, 0.164313, 0.170753, 0.187433, 0.213783, 0.266063", \ + "0.159413, 0.162993, 0.165973, 0.172413, 0.189093, 0.215443, 0.267723", \ + "0.162793, 0.166373, 0.169353, 0.175793, 0.192473, 0.218823, 0.271103", \ + "0.168123, 0.171703, 0.174683, 0.181123, 0.197803, 0.224153, 0.276433", \ + "0.180703, 0.184283, 0.187263, 0.193703, 0.210383, 0.236733, 0.289013", \ + "0.193253, 0.196833, 0.199813, 0.206253, 0.222933, 0.249283, 0.301563", \ + "0.216173, 0.219753, 0.222733, 0.229173, 0.245853, 0.272203, 0.324483" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139581, 0.143021, 0.145871, 0.151971, 0.167831, 0.192921, 0.242771", \ + "0.141331, 0.144771, 0.147621, 0.153721, 0.169581, 0.194671, 0.244521", \ + "0.144731, 0.148171, 0.151021, 0.157121, 0.172981, 0.198071, 0.247921", \ + "0.150011, 0.153451, 0.156301, 0.162401, 0.178261, 0.203351, 0.253201", \ + "0.162611, 0.166051, 0.168901, 0.175001, 0.190861, 0.215951, 0.265801", \ + "0.175101, 0.178541, 0.181391, 0.187491, 0.203351, 0.228441, 0.278291", \ + "0.198021, 0.201461, 0.204311, 0.210411, 0.226271, 0.251361, 0.301211" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[4]&AB[4]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[4]&!AB[4]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[3]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b0 && AB[3] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.169116, 0.172736, 0.175466, 0.182126, 0.198576, 0.224916, 0.277246", \ + "0.170126, 0.173746, 0.176476, 0.183136, 0.199586, 0.225926, 0.278256", \ + "0.173926, 0.177546, 0.180276, 0.186936, 0.203386, 0.229726, 0.282056", \ + "0.178596, 0.182216, 0.184946, 0.191606, 0.208056, 0.234396, 0.286726", \ + "0.190786, 0.194406, 0.197136, 0.203796, 0.220246, 0.246586, 0.298916", \ + "0.202926, 0.206546, 0.209276, 0.215936, 0.232386, 0.258726, 0.311056", \ + "0.222956, 0.226576, 0.229306, 0.235966, 0.252416, 0.278756, 0.331086" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150085, 0.153545, 0.156165, 0.162455, 0.178105, 0.203175, 0.252995", \ + "0.151035, 0.154495, 0.157115, 0.163405, 0.179055, 0.204125, 0.253945", \ + "0.154925, 0.158385, 0.161005, 0.167295, 0.182945, 0.208015, 0.257835", \ + "0.159565, 0.163025, 0.165645, 0.171935, 0.187585, 0.212655, 0.262475", \ + "0.171785, 0.175245, 0.177865, 0.184155, 0.199805, 0.224875, 0.274695", \ + "0.183895, 0.187355, 0.189975, 0.196265, 0.211915, 0.236985, 0.286805", \ + "0.203905, 0.207365, 0.209985, 0.216275, 0.231925, 0.256995, 0.306815" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157511, 0.161921, 0.165651, 0.173971, 0.197741, 0.237071, 0.315771", \ + "0.158571, 0.162981, 0.166711, 0.175031, 0.198801, 0.238131, 0.316831", \ + "0.162341, 0.166751, 0.170481, 0.178801, 0.202571, 0.241901, 0.320601", \ + "0.168011, 0.172421, 0.176151, 0.184471, 0.208241, 0.247571, 0.326271", \ + "0.179501, 0.183911, 0.187641, 0.195961, 0.219731, 0.259061, 0.337761", \ + "0.192821, 0.197231, 0.200961, 0.209281, 0.233051, 0.272381, 0.351081", \ + "0.215441, 0.219851, 0.223581, 0.231901, 0.255671, 0.295001, 0.373701" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138430, 0.142560, 0.146090, 0.154110, 0.177280, 0.215800, 0.292720", \ + "0.139510, 0.143640, 0.147170, 0.155190, 0.178360, 0.216880, 0.293800", \ + "0.143080, 0.147210, 0.150740, 0.158760, 0.181930, 0.220450, 0.297370", \ + "0.148840, 0.152970, 0.156500, 0.164520, 0.187690, 0.226210, 0.303130", \ + "0.160300, 0.164430, 0.167960, 0.175980, 0.199150, 0.237670, 0.314590", \ + "0.173720, 0.177850, 0.181380, 0.189400, 0.212570, 0.251090, 0.328010", \ + "0.196330, 0.200460, 0.203990, 0.212010, 0.235180, 0.273700, 0.350620" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[3] == 1'b1 && AB[3] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153271, 0.157611, 0.161321, 0.169691, 0.193531, 0.232861, 0.311511", \ + "0.154691, 0.159031, 0.162741, 0.171111, 0.194951, 0.234281, 0.312931", \ + "0.157501, 0.161841, 0.165551, 0.173921, 0.197761, 0.237091, 0.315741", \ + "0.162941, 0.167281, 0.170991, 0.179361, 0.203201, 0.242531, 0.321181", \ + "0.174461, 0.178801, 0.182511, 0.190881, 0.214721, 0.254051, 0.332701", \ + "0.187571, 0.191911, 0.195621, 0.203991, 0.227831, 0.267161, 0.345811", \ + "0.207691, 0.212031, 0.215741, 0.224111, 0.247951, 0.287281, 0.365931" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134466, 0.138626, 0.142146, 0.150096, 0.173286, 0.211786, 0.288756", \ + "0.135916, 0.140076, 0.143596, 0.151546, 0.174736, 0.213236, 0.290206", \ + "0.138706, 0.142866, 0.146386, 0.154336, 0.177526, 0.216026, 0.292996", \ + "0.144066, 0.148226, 0.151746, 0.159696, 0.182886, 0.221386, 0.298356", \ + "0.155736, 0.159896, 0.163416, 0.171366, 0.194556, 0.233056, 0.310026", \ + "0.168636, 0.172796, 0.176316, 0.184266, 0.207456, 0.245956, 0.322926", \ + "0.188826, 0.192986, 0.196506, 0.204456, 0.227646, 0.266146, 0.343116" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157753, 0.161333, 0.164313, 0.170753, 0.187433, 0.213783, 0.266063", \ + "0.159413, 0.162993, 0.165973, 0.172413, 0.189093, 0.215443, 0.267723", \ + "0.162793, 0.166373, 0.169353, 0.175793, 0.192473, 0.218823, 0.271103", \ + "0.168123, 0.171703, 0.174683, 0.181123, 0.197803, 0.224153, 0.276433", \ + "0.180703, 0.184283, 0.187263, 0.193703, 0.210383, 0.236733, 0.289013", \ + "0.193253, 0.196833, 0.199813, 0.206253, 0.222933, 0.249283, 0.301563", \ + "0.216173, 0.219753, 0.222733, 0.229173, 0.245853, 0.272203, 0.324483" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139581, 0.143021, 0.145871, 0.151971, 0.167831, 0.192921, 0.242771", \ + "0.141331, 0.144771, 0.147621, 0.153721, 0.169581, 0.194671, 0.244521", \ + "0.144731, 0.148171, 0.151021, 0.157121, 0.172981, 0.198071, 0.247921", \ + "0.150011, 0.153451, 0.156301, 0.162401, 0.178261, 0.203351, 0.253201", \ + "0.162611, 0.166051, 0.168901, 0.175001, 0.190861, 0.215951, 0.265801", \ + "0.175101, 0.178541, 0.181391, 0.187491, 0.203351, 0.228441, 0.278291", \ + "0.198021, 0.201461, 0.204311, 0.210411, 0.226271, 0.251361, 0.301211" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[3]&AB[3]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[3]&!AB[3]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[2]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b0 && AB[2] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.169116, 0.172736, 0.175466, 0.182126, 0.198576, 0.224916, 0.277246", \ + "0.170126, 0.173746, 0.176476, 0.183136, 0.199586, 0.225926, 0.278256", \ + "0.173926, 0.177546, 0.180276, 0.186936, 0.203386, 0.229726, 0.282056", \ + "0.178596, 0.182216, 0.184946, 0.191606, 0.208056, 0.234396, 0.286726", \ + "0.190786, 0.194406, 0.197136, 0.203796, 0.220246, 0.246586, 0.298916", \ + "0.202926, 0.206546, 0.209276, 0.215936, 0.232386, 0.258726, 0.311056", \ + "0.222956, 0.226576, 0.229306, 0.235966, 0.252416, 0.278756, 0.331086" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150085, 0.153545, 0.156165, 0.162455, 0.178105, 0.203175, 0.252995", \ + "0.151035, 0.154495, 0.157115, 0.163405, 0.179055, 0.204125, 0.253945", \ + "0.154925, 0.158385, 0.161005, 0.167295, 0.182945, 0.208015, 0.257835", \ + "0.159565, 0.163025, 0.165645, 0.171935, 0.187585, 0.212655, 0.262475", \ + "0.171785, 0.175245, 0.177865, 0.184155, 0.199805, 0.224875, 0.274695", \ + "0.183895, 0.187355, 0.189975, 0.196265, 0.211915, 0.236985, 0.286805", \ + "0.203905, 0.207365, 0.209985, 0.216275, 0.231925, 0.256995, 0.306815" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157511, 0.161921, 0.165651, 0.173971, 0.197741, 0.237071, 0.315771", \ + "0.158571, 0.162981, 0.166711, 0.175031, 0.198801, 0.238131, 0.316831", \ + "0.162341, 0.166751, 0.170481, 0.178801, 0.202571, 0.241901, 0.320601", \ + "0.168011, 0.172421, 0.176151, 0.184471, 0.208241, 0.247571, 0.326271", \ + "0.179501, 0.183911, 0.187641, 0.195961, 0.219731, 0.259061, 0.337761", \ + "0.192821, 0.197231, 0.200961, 0.209281, 0.233051, 0.272381, 0.351081", \ + "0.215441, 0.219851, 0.223581, 0.231901, 0.255671, 0.295001, 0.373701" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138430, 0.142560, 0.146090, 0.154110, 0.177280, 0.215800, 0.292720", \ + "0.139510, 0.143640, 0.147170, 0.155190, 0.178360, 0.216880, 0.293800", \ + "0.143080, 0.147210, 0.150740, 0.158760, 0.181930, 0.220450, 0.297370", \ + "0.148840, 0.152970, 0.156500, 0.164520, 0.187690, 0.226210, 0.303130", \ + "0.160300, 0.164430, 0.167960, 0.175980, 0.199150, 0.237670, 0.314590", \ + "0.173720, 0.177850, 0.181380, 0.189400, 0.212570, 0.251090, 0.328010", \ + "0.196330, 0.200460, 0.203990, 0.212010, 0.235180, 0.273700, 0.350620" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[2] == 1'b1 && AB[2] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153271, 0.157611, 0.161321, 0.169691, 0.193531, 0.232861, 0.311511", \ + "0.154691, 0.159031, 0.162741, 0.171111, 0.194951, 0.234281, 0.312931", \ + "0.157501, 0.161841, 0.165551, 0.173921, 0.197761, 0.237091, 0.315741", \ + "0.162941, 0.167281, 0.170991, 0.179361, 0.203201, 0.242531, 0.321181", \ + "0.174461, 0.178801, 0.182511, 0.190881, 0.214721, 0.254051, 0.332701", \ + "0.187571, 0.191911, 0.195621, 0.203991, 0.227831, 0.267161, 0.345811", \ + "0.207691, 0.212031, 0.215741, 0.224111, 0.247951, 0.287281, 0.365931" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134466, 0.138626, 0.142146, 0.150096, 0.173286, 0.211786, 0.288756", \ + "0.135916, 0.140076, 0.143596, 0.151546, 0.174736, 0.213236, 0.290206", \ + "0.138706, 0.142866, 0.146386, 0.154336, 0.177526, 0.216026, 0.292996", \ + "0.144066, 0.148226, 0.151746, 0.159696, 0.182886, 0.221386, 0.298356", \ + "0.155736, 0.159896, 0.163416, 0.171366, 0.194556, 0.233056, 0.310026", \ + "0.168636, 0.172796, 0.176316, 0.184266, 0.207456, 0.245956, 0.322926", \ + "0.188826, 0.192986, 0.196506, 0.204456, 0.227646, 0.266146, 0.343116" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157753, 0.161333, 0.164313, 0.170753, 0.187433, 0.213783, 0.266063", \ + "0.159413, 0.162993, 0.165973, 0.172413, 0.189093, 0.215443, 0.267723", \ + "0.162793, 0.166373, 0.169353, 0.175793, 0.192473, 0.218823, 0.271103", \ + "0.168123, 0.171703, 0.174683, 0.181123, 0.197803, 0.224153, 0.276433", \ + "0.180703, 0.184283, 0.187263, 0.193703, 0.210383, 0.236733, 0.289013", \ + "0.193253, 0.196833, 0.199813, 0.206253, 0.222933, 0.249283, 0.301563", \ + "0.216173, 0.219753, 0.222733, 0.229173, 0.245853, 0.272203, 0.324483" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139581, 0.143021, 0.145871, 0.151971, 0.167831, 0.192921, 0.242771", \ + "0.141331, 0.144771, 0.147621, 0.153721, 0.169581, 0.194671, 0.244521", \ + "0.144731, 0.148171, 0.151021, 0.157121, 0.172981, 0.198071, 0.247921", \ + "0.150011, 0.153451, 0.156301, 0.162401, 0.178261, 0.203351, 0.253201", \ + "0.162611, 0.166051, 0.168901, 0.175001, 0.190861, 0.215951, 0.265801", \ + "0.175101, 0.178541, 0.181391, 0.187491, 0.203351, 0.228441, 0.278291", \ + "0.198021, 0.201461, 0.204311, 0.210411, 0.226271, 0.251361, 0.301211" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[2]&AB[2]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[2]&!AB[2]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[1]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b0 && AB[1] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.169116, 0.172736, 0.175466, 0.182126, 0.198576, 0.224916, 0.277246", \ + "0.170126, 0.173746, 0.176476, 0.183136, 0.199586, 0.225926, 0.278256", \ + "0.173926, 0.177546, 0.180276, 0.186936, 0.203386, 0.229726, 0.282056", \ + "0.178596, 0.182216, 0.184946, 0.191606, 0.208056, 0.234396, 0.286726", \ + "0.190786, 0.194406, 0.197136, 0.203796, 0.220246, 0.246586, 0.298916", \ + "0.202926, 0.206546, 0.209276, 0.215936, 0.232386, 0.258726, 0.311056", \ + "0.222956, 0.226576, 0.229306, 0.235966, 0.252416, 0.278756, 0.331086" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150085, 0.153545, 0.156165, 0.162455, 0.178105, 0.203175, 0.252995", \ + "0.151035, 0.154495, 0.157115, 0.163405, 0.179055, 0.204125, 0.253945", \ + "0.154925, 0.158385, 0.161005, 0.167295, 0.182945, 0.208015, 0.257835", \ + "0.159565, 0.163025, 0.165645, 0.171935, 0.187585, 0.212655, 0.262475", \ + "0.171785, 0.175245, 0.177865, 0.184155, 0.199805, 0.224875, 0.274695", \ + "0.183895, 0.187355, 0.189975, 0.196265, 0.211915, 0.236985, 0.286805", \ + "0.203905, 0.207365, 0.209985, 0.216275, 0.231925, 0.256995, 0.306815" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157511, 0.161921, 0.165651, 0.173971, 0.197741, 0.237071, 0.315771", \ + "0.158571, 0.162981, 0.166711, 0.175031, 0.198801, 0.238131, 0.316831", \ + "0.162341, 0.166751, 0.170481, 0.178801, 0.202571, 0.241901, 0.320601", \ + "0.168011, 0.172421, 0.176151, 0.184471, 0.208241, 0.247571, 0.326271", \ + "0.179501, 0.183911, 0.187641, 0.195961, 0.219731, 0.259061, 0.337761", \ + "0.192821, 0.197231, 0.200961, 0.209281, 0.233051, 0.272381, 0.351081", \ + "0.215441, 0.219851, 0.223581, 0.231901, 0.255671, 0.295001, 0.373701" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138430, 0.142560, 0.146090, 0.154110, 0.177280, 0.215800, 0.292720", \ + "0.139510, 0.143640, 0.147170, 0.155190, 0.178360, 0.216880, 0.293800", \ + "0.143080, 0.147210, 0.150740, 0.158760, 0.181930, 0.220450, 0.297370", \ + "0.148840, 0.152970, 0.156500, 0.164520, 0.187690, 0.226210, 0.303130", \ + "0.160300, 0.164430, 0.167960, 0.175980, 0.199150, 0.237670, 0.314590", \ + "0.173720, 0.177850, 0.181380, 0.189400, 0.212570, 0.251090, 0.328010", \ + "0.196330, 0.200460, 0.203990, 0.212010, 0.235180, 0.273700, 0.350620" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[1] == 1'b1 && AB[1] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153271, 0.157611, 0.161321, 0.169691, 0.193531, 0.232861, 0.311511", \ + "0.154691, 0.159031, 0.162741, 0.171111, 0.194951, 0.234281, 0.312931", \ + "0.157501, 0.161841, 0.165551, 0.173921, 0.197761, 0.237091, 0.315741", \ + "0.162941, 0.167281, 0.170991, 0.179361, 0.203201, 0.242531, 0.321181", \ + "0.174461, 0.178801, 0.182511, 0.190881, 0.214721, 0.254051, 0.332701", \ + "0.187571, 0.191911, 0.195621, 0.203991, 0.227831, 0.267161, 0.345811", \ + "0.207691, 0.212031, 0.215741, 0.224111, 0.247951, 0.287281, 0.365931" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134466, 0.138626, 0.142146, 0.150096, 0.173286, 0.211786, 0.288756", \ + "0.135916, 0.140076, 0.143596, 0.151546, 0.174736, 0.213236, 0.290206", \ + "0.138706, 0.142866, 0.146386, 0.154336, 0.177526, 0.216026, 0.292996", \ + "0.144066, 0.148226, 0.151746, 0.159696, 0.182886, 0.221386, 0.298356", \ + "0.155736, 0.159896, 0.163416, 0.171366, 0.194556, 0.233056, 0.310026", \ + "0.168636, 0.172796, 0.176316, 0.184266, 0.207456, 0.245956, 0.322926", \ + "0.188826, 0.192986, 0.196506, 0.204456, 0.227646, 0.266146, 0.343116" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157753, 0.161333, 0.164313, 0.170753, 0.187433, 0.213783, 0.266063", \ + "0.159413, 0.162993, 0.165973, 0.172413, 0.189093, 0.215443, 0.267723", \ + "0.162793, 0.166373, 0.169353, 0.175793, 0.192473, 0.218823, 0.271103", \ + "0.168123, 0.171703, 0.174683, 0.181123, 0.197803, 0.224153, 0.276433", \ + "0.180703, 0.184283, 0.187263, 0.193703, 0.210383, 0.236733, 0.289013", \ + "0.193253, 0.196833, 0.199813, 0.206253, 0.222933, 0.249283, 0.301563", \ + "0.216173, 0.219753, 0.222733, 0.229173, 0.245853, 0.272203, 0.324483" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139581, 0.143021, 0.145871, 0.151971, 0.167831, 0.192921, 0.242771", \ + "0.141331, 0.144771, 0.147621, 0.153721, 0.169581, 0.194671, 0.244521", \ + "0.144731, 0.148171, 0.151021, 0.157121, 0.172981, 0.198071, 0.247921", \ + "0.150011, 0.153451, 0.156301, 0.162401, 0.178261, 0.203351, 0.253201", \ + "0.162611, 0.166051, 0.168901, 0.175001, 0.190861, 0.215951, 0.265801", \ + "0.175101, 0.178541, 0.181391, 0.187491, 0.203351, 0.228441, 0.278291", \ + "0.198021, 0.201461, 0.204311, 0.210411, 0.226271, 0.251361, 0.301211" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[1]&AB[1]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[1]&!AB[1]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + pin(AYB[0]) { + direction : output; + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : positive_unate; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b0 && AB[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.169116, 0.172736, 0.175466, 0.182126, 0.198576, 0.224916, 0.277246", \ + "0.170126, 0.173746, 0.176476, 0.183136, 0.199586, 0.225926, 0.278256", \ + "0.173926, 0.177546, 0.180276, 0.186936, 0.203386, 0.229726, 0.282056", \ + "0.178596, 0.182216, 0.184946, 0.191606, 0.208056, 0.234396, 0.286726", \ + "0.190786, 0.194406, 0.197136, 0.203796, 0.220246, 0.246586, 0.298916", \ + "0.202926, 0.206546, 0.209276, 0.215936, 0.232386, 0.258726, 0.311056", \ + "0.222956, 0.226576, 0.229306, 0.235966, 0.252416, 0.278756, 0.331086" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150085, 0.153545, 0.156165, 0.162455, 0.178105, 0.203175, 0.252995", \ + "0.151035, 0.154495, 0.157115, 0.163405, 0.179055, 0.204125, 0.253945", \ + "0.154925, 0.158385, 0.161005, 0.167295, 0.182945, 0.208015, 0.257835", \ + "0.159565, 0.163025, 0.165645, 0.171935, 0.187585, 0.212655, 0.262475", \ + "0.171785, 0.175245, 0.177865, 0.184155, 0.199805, 0.224875, 0.274695", \ + "0.183895, 0.187355, 0.189975, 0.196265, 0.211915, 0.236985, 0.286805", \ + "0.203905, 0.207365, 0.209985, 0.216275, 0.231925, 0.256995, 0.306815" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524", \ + "0.012822, 0.016262, 0.019619, 0.028204, 0.054915, 0.101607, 0.199524" \ + ); + } + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157511, 0.161921, 0.165651, 0.173971, 0.197741, 0.237071, 0.315771", \ + "0.158571, 0.162981, 0.166711, 0.175031, 0.198801, 0.238131, 0.316831", \ + "0.162341, 0.166751, 0.170481, 0.178801, 0.202571, 0.241901, 0.320601", \ + "0.168011, 0.172421, 0.176151, 0.184471, 0.208241, 0.247571, 0.326271", \ + "0.179501, 0.183911, 0.187641, 0.195961, 0.219731, 0.259061, 0.337761", \ + "0.192821, 0.197231, 0.200961, 0.209281, 0.233051, 0.272381, 0.351081", \ + "0.215441, 0.219851, 0.223581, 0.231901, 0.255671, 0.295001, 0.373701" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.138430, 0.142560, 0.146090, 0.154110, 0.177280, 0.215800, 0.292720", \ + "0.139510, 0.143640, 0.147170, 0.155190, 0.178360, 0.216880, 0.293800", \ + "0.143080, 0.147210, 0.150740, 0.158760, 0.181930, 0.220450, 0.297370", \ + "0.148840, 0.152970, 0.156500, 0.164520, 0.187690, 0.226210, 0.303130", \ + "0.160300, 0.164430, 0.167960, 0.175980, 0.199150, 0.237670, 0.314590", \ + "0.173720, 0.177850, 0.181380, 0.189400, 0.212570, 0.251090, 0.328010", \ + "0.196330, 0.200460, 0.203990, 0.212010, 0.235180, 0.273700, 0.350620" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514", \ + "0.012659, 0.017321, 0.022225, 0.035144, 0.076837, 0.147378, 0.291514" \ + ); + } + } + timing() { + related_pin : TENB; + timing_type : combinational; + timing_sense : negative_unate; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + sdf_cond : "DFTRAMBYP == 1'b1 && TAB[0] == 1'b1 && AB[0] == 1'b0"; + cell_fall(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.153271, 0.157611, 0.161321, 0.169691, 0.193531, 0.232861, 0.311511", \ + "0.154691, 0.159031, 0.162741, 0.171111, 0.194951, 0.234281, 0.312931", \ + "0.157501, 0.161841, 0.165551, 0.173921, 0.197761, 0.237091, 0.315741", \ + "0.162941, 0.167281, 0.170991, 0.179361, 0.203201, 0.242531, 0.321181", \ + "0.174461, 0.178801, 0.182511, 0.190881, 0.214721, 0.254051, 0.332701", \ + "0.187571, 0.191911, 0.195621, 0.203991, 0.227831, 0.267161, 0.345811", \ + "0.207691, 0.212031, 0.215741, 0.224111, 0.247951, 0.287281, 0.365931" \ + ); + } + retaining_fall(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.134466, 0.138626, 0.142146, 0.150096, 0.173286, 0.211786, 0.288756", \ + "0.135916, 0.140076, 0.143596, 0.151546, 0.174736, 0.213236, 0.290206", \ + "0.138706, 0.142866, 0.146386, 0.154336, 0.177526, 0.216026, 0.292996", \ + "0.144066, 0.148226, 0.151746, 0.159696, 0.182886, 0.221386, 0.298356", \ + "0.155736, 0.159896, 0.163416, 0.171366, 0.194556, 0.233056, 0.310026", \ + "0.168636, 0.172796, 0.176316, 0.184266, 0.207456, 0.245956, 0.322926", \ + "0.188826, 0.192986, 0.196506, 0.204456, 0.227646, 0.266146, 0.343116" \ + ); + } + fall_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885", \ + "0.012498, 0.017186, 0.022223, 0.035368, 0.077229, 0.148054, 0.290885" \ + ); + } + cell_rise(rf2_32x19_wm0_inputslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.157753, 0.161333, 0.164313, 0.170753, 0.187433, 0.213783, 0.266063", \ + "0.159413, 0.162993, 0.165973, 0.172413, 0.189093, 0.215443, 0.267723", \ + "0.162793, 0.166373, 0.169353, 0.175793, 0.192473, 0.218823, 0.271103", \ + "0.168123, 0.171703, 0.174683, 0.181123, 0.197803, 0.224153, 0.276433", \ + "0.180703, 0.184283, 0.187263, 0.193703, 0.210383, 0.236733, 0.289013", \ + "0.193253, 0.196833, 0.199813, 0.206253, 0.222933, 0.249283, 0.301563", \ + "0.216173, 0.219753, 0.222733, 0.229173, 0.245853, 0.272203, 0.324483" \ + ); + } + retaining_rise(rf2_32x19_wm0_inputslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.139581, 0.143021, 0.145871, 0.151971, 0.167831, 0.192921, 0.242771", \ + "0.141331, 0.144771, 0.147621, 0.153721, 0.169581, 0.194671, 0.244521", \ + "0.144731, 0.148171, 0.151021, 0.157121, 0.172981, 0.198071, 0.247921", \ + "0.150011, 0.153451, 0.156301, 0.162401, 0.178261, 0.203351, 0.253201", \ + "0.162611, 0.166051, 0.168901, 0.175001, 0.190861, 0.215951, 0.265801", \ + "0.175101, 0.178541, 0.181391, 0.187491, 0.203351, 0.228441, 0.278291", \ + "0.198021, 0.201461, 0.204311, 0.210411, 0.226271, 0.251361, 0.301211" \ + ); + } + rise_transition(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_inputslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218", \ + "0.012719, 0.016147, 0.019574, 0.028331, 0.054901, 0.101911, 0.198218" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&!TAB[0]&AB[0]"; + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + } + internal_power() { + related_pin : TENB; + related_pg_pin : "VDDPE"; + when : "DFTRAMBYP&TAB[0]&!AB[0]"; + fall_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592, 0.018592", \ + "0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610, 0.018610", \ + "0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629, 0.018629", \ + "0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648, 0.018648", \ + "0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666, 0.018666", \ + "0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685, 0.018685", \ + "0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704, 0.018704" \ + ); + } + rise_power(rf2_32x19_wm0_inputslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678, 0.020678", \ + "0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699, 0.020699", \ + "0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719, 0.020719", \ + "0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740, 0.020740", \ + "0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761, 0.020761", \ + "0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782, 0.020782", \ + "0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802, 0.020802" \ + ); + } + } + } + } + bus(QA) { + bus_type : rf2_32x19_wm0_QA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + memory_read() { + address : AA; + } + max_capacitance : 0.300000; + max_transition : 0.361200; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.315302, 0.319442, 0.325332, 0.334442, 0.352442, 0.383502, 0.444512", \ + "0.315532, 0.319672, 0.325562, 0.334672, 0.352672, 0.383732, 0.444742", \ + "0.317712, 0.321852, 0.327742, 0.336852, 0.354852, 0.385912, 0.446922", \ + "0.322462, 0.326602, 0.332492, 0.341602, 0.359602, 0.390662, 0.451672", \ + "0.331482, 0.335622, 0.341512, 0.350622, 0.368622, 0.399682, 0.460692", \ + "0.344022, 0.348162, 0.354052, 0.363162, 0.381162, 0.412222, 0.473232", \ + "0.363262, 0.367402, 0.373292, 0.382402, 0.400402, 0.431462, 0.492472" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.257262, 0.261372, 0.267221, 0.276482, 0.294462, 0.325652, 0.386542", \ + "0.257472, 0.261582, 0.267432, 0.276692, 0.294672, 0.325862, 0.386752", \ + "0.259401, 0.263511, 0.269362, 0.278622, 0.296602, 0.327792, 0.388682", \ + "0.264472, 0.268582, 0.274432, 0.283692, 0.301672, 0.332862, 0.393752", \ + "0.273402, 0.277512, 0.283362, 0.292622, 0.310602, 0.341792, 0.402682", \ + "0.285852, 0.289962, 0.295811, 0.305072, 0.323052, 0.354242, 0.415132", \ + "0.303282, 0.307392, 0.313241, 0.322502, 0.340482, 0.371672, 0.432562" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.294228, 0.299448, 0.306518, 0.317338, 0.339438, 0.378728, 0.456178", \ + "0.294448, 0.299668, 0.306738, 0.317558, 0.339658, 0.378948, 0.456398", \ + "0.297038, 0.302258, 0.309328, 0.320148, 0.342248, 0.381538, 0.458988", \ + "0.301588, 0.306808, 0.313878, 0.324698, 0.346798, 0.386088, 0.463538", \ + "0.310228, 0.315448, 0.322518, 0.333338, 0.355438, 0.394728, 0.472178", \ + "0.322188, 0.327408, 0.334478, 0.345298, 0.367398, 0.406688, 0.484138", \ + "0.341738, 0.346958, 0.354028, 0.364848, 0.386948, 0.426238, 0.503688" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.239139, 0.244479, 0.251540, 0.262389, 0.284750, 0.324010, 0.401850", \ + "0.239799, 0.245139, 0.252199, 0.263050, 0.285410, 0.324670, 0.402510", \ + "0.241799, 0.247139, 0.254199, 0.265050, 0.287410, 0.326670, 0.404510", \ + "0.246380, 0.251720, 0.258780, 0.269629, 0.291989, 0.331250, 0.409090", \ + "0.255450, 0.260789, 0.267849, 0.278700, 0.301059, 0.340319, 0.418159", \ + "0.267260, 0.272600, 0.279660, 0.290510, 0.312869, 0.352130, 0.429969", \ + "0.286120, 0.291460, 0.298519, 0.309370, 0.331729, 0.370990, 0.448830" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.316358, 0.320497, 0.326387, 0.335498, 0.353498, 0.384557, 0.445568", \ + "0.316587, 0.320727, 0.326618, 0.335728, 0.353727, 0.384788, 0.445798", \ + "0.318767, 0.322908, 0.328798, 0.337907, 0.355907, 0.386968, 0.447977", \ + "0.323518, 0.327657, 0.333547, 0.342658, 0.360658, 0.391717, 0.452728", \ + "0.332537, 0.336678, 0.342567, 0.351677, 0.369677, 0.400737, 0.461747", \ + "0.345077, 0.349218, 0.355108, 0.364217, 0.382217, 0.413278, 0.474287", \ + "0.364318, 0.368457, 0.374347, 0.383458, 0.401457, 0.432517, 0.493527" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.258167, 0.262277, 0.268127, 0.277387, 0.295367, 0.326557, 0.387447", \ + "0.258377, 0.262487, 0.268337, 0.277597, 0.295577, 0.326767, 0.387657", \ + "0.260307, 0.264417, 0.270267, 0.279527, 0.297507, 0.328697, 0.389587", \ + "0.265377, 0.269487, 0.275337, 0.284597, 0.302577, 0.333767, 0.394657", \ + "0.274307, 0.278417, 0.284267, 0.293527, 0.311507, 0.342697, 0.403587", \ + "0.286757, 0.290867, 0.296717, 0.305977, 0.323957, 0.355147, 0.416037", \ + "0.304187, 0.308297, 0.314147, 0.323407, 0.341387, 0.372577, 0.433467" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.295288, 0.300508, 0.307578, 0.318398, 0.340498, 0.379788, 0.457238", \ + "0.295508, 0.300728, 0.307798, 0.318618, 0.340718, 0.380008, 0.457458", \ + "0.298098, 0.303318, 0.310388, 0.321208, 0.343308, 0.382598, 0.460048", \ + "0.302648, 0.307868, 0.314938, 0.325758, 0.347858, 0.387148, 0.464598", \ + "0.311288, 0.316508, 0.323578, 0.334398, 0.356498, 0.395788, 0.473238", \ + "0.323248, 0.328468, 0.335538, 0.346358, 0.368458, 0.407748, 0.485198", \ + "0.342798, 0.348018, 0.355088, 0.365908, 0.388008, 0.427298, 0.504748" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.240045, 0.245385, 0.252445, 0.263294, 0.285655, 0.324915, 0.402755", \ + "0.240704, 0.246045, 0.253105, 0.263955, 0.286315, 0.325574, 0.403415", \ + "0.242704, 0.248045, 0.255105, 0.265955, 0.288315, 0.327575, 0.405415", \ + "0.247285, 0.252625, 0.259685, 0.270535, 0.292895, 0.332155, 0.409995", \ + "0.256355, 0.261695, 0.268755, 0.279605, 0.301965, 0.341224, 0.419065", \ + "0.268165, 0.273505, 0.280565, 0.291415, 0.313775, 0.353035, 0.430875", \ + "0.287025, 0.292365, 0.299425, 0.310275, 0.332635, 0.371895, 0.449735" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.317340, 0.321480, 0.327370, 0.336480, 0.354480, 0.385540, 0.446550", \ + "0.317570, 0.321710, 0.327600, 0.336710, 0.354710, 0.385770, 0.446780", \ + "0.319750, 0.323890, 0.329780, 0.338890, 0.356890, 0.387950, 0.448960", \ + "0.324500, 0.328640, 0.334530, 0.343640, 0.361640, 0.392700, 0.453710", \ + "0.333520, 0.337660, 0.343550, 0.352660, 0.370660, 0.401720, 0.462730", \ + "0.346060, 0.350200, 0.356090, 0.365200, 0.383200, 0.414260, 0.475270", \ + "0.365300, 0.369440, 0.375330, 0.384440, 0.402440, 0.433500, 0.494510" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.258999, 0.263109, 0.268958, 0.278219, 0.296199, 0.327389, 0.388279", \ + "0.259208, 0.263318, 0.269169, 0.278429, 0.296408, 0.327598, 0.388488", \ + "0.261138, 0.265248, 0.271099, 0.280358, 0.298338, 0.329528, 0.390418", \ + "0.266208, 0.270318, 0.276169, 0.285429, 0.303409, 0.334599, 0.395489", \ + "0.275138, 0.279248, 0.285099, 0.294359, 0.312338, 0.343528, 0.404418", \ + "0.287589, 0.291699, 0.297548, 0.306809, 0.324789, 0.355979, 0.416869", \ + "0.305019, 0.309129, 0.314978, 0.324239, 0.342219, 0.373409, 0.434299" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.296271, 0.301491, 0.308561, 0.319381, 0.341481, 0.380771, 0.458221", \ + "0.296491, 0.301711, 0.308781, 0.319601, 0.341701, 0.380991, 0.458441", \ + "0.299081, 0.304301, 0.311371, 0.322191, 0.344291, 0.383581, 0.461031", \ + "0.303631, 0.308851, 0.315921, 0.326741, 0.348841, 0.388131, 0.465581", \ + "0.312271, 0.317491, 0.324561, 0.335381, 0.357481, 0.396771, 0.474221", \ + "0.324231, 0.329451, 0.336521, 0.347341, 0.369441, 0.408731, 0.486181", \ + "0.343781, 0.349001, 0.356071, 0.366891, 0.388991, 0.428281, 0.505731" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.240875, 0.246216, 0.253276, 0.264126, 0.286486, 0.325745, 0.403586", \ + "0.241535, 0.246875, 0.253936, 0.264786, 0.287146, 0.326406, 0.404246", \ + "0.243535, 0.248875, 0.255936, 0.266786, 0.289146, 0.328406, 0.406246", \ + "0.248116, 0.253456, 0.260516, 0.271366, 0.293725, 0.332986, 0.410826", \ + "0.257186, 0.262526, 0.269586, 0.280436, 0.302796, 0.342056, 0.419895", \ + "0.268996, 0.274336, 0.281395, 0.292246, 0.314606, 0.353866, 0.431706", \ + "0.287856, 0.293196, 0.300256, 0.311106, 0.333465, 0.372726, 0.450566" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.318007, 0.322148, 0.328038, 0.337147, 0.355148, 0.386208, 0.447217", \ + "0.318238, 0.322378, 0.328267, 0.337377, 0.355378, 0.386437, 0.447447", \ + "0.320418, 0.324557, 0.330448, 0.339558, 0.357558, 0.388618, 0.449628", \ + "0.325167, 0.329308, 0.335198, 0.344307, 0.362308, 0.393368, 0.454377", \ + "0.334188, 0.338328, 0.344218, 0.353328, 0.371328, 0.402388, 0.463398", \ + "0.346728, 0.350867, 0.356758, 0.365868, 0.383868, 0.414928, 0.475938", \ + "0.365968, 0.370108, 0.375998, 0.385107, 0.403108, 0.434168, 0.495177" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.259561, 0.263671, 0.269521, 0.278781, 0.296761, 0.327951, 0.388841", \ + "0.259771, 0.263881, 0.269731, 0.278991, 0.296971, 0.328161, 0.389051", \ + "0.261701, 0.265811, 0.271661, 0.280921, 0.298901, 0.330091, 0.390981", \ + "0.266771, 0.270881, 0.276731, 0.285991, 0.303971, 0.335161, 0.396051", \ + "0.275701, 0.279811, 0.285661, 0.294921, 0.312901, 0.344091, 0.404981", \ + "0.288151, 0.292261, 0.298111, 0.307371, 0.325351, 0.356541, 0.417431", \ + "0.305581, 0.309691, 0.315541, 0.324801, 0.342781, 0.373971, 0.434861" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.296938, 0.302158, 0.309228, 0.320048, 0.342148, 0.381438, 0.458888", \ + "0.297158, 0.302378, 0.309448, 0.320268, 0.342368, 0.381658, 0.459108", \ + "0.299748, 0.304968, 0.312038, 0.322858, 0.344958, 0.384248, 0.461698", \ + "0.304298, 0.309518, 0.316588, 0.327408, 0.349508, 0.388798, 0.466248", \ + "0.312938, 0.318158, 0.325228, 0.336048, 0.358148, 0.397438, 0.474888", \ + "0.324898, 0.330118, 0.337188, 0.348008, 0.370108, 0.409398, 0.486848", \ + "0.344448, 0.349668, 0.356738, 0.367558, 0.389658, 0.428948, 0.506398" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.241438, 0.246778, 0.253838, 0.264688, 0.287049, 0.326308, 0.404149", \ + "0.242098, 0.247438, 0.254498, 0.265349, 0.287709, 0.326968, 0.404809", \ + "0.244098, 0.249438, 0.256498, 0.267349, 0.289709, 0.328968, 0.406809", \ + "0.248678, 0.254018, 0.261079, 0.271929, 0.294288, 0.333549, 0.411389", \ + "0.257749, 0.263088, 0.270148, 0.280999, 0.303359, 0.342618, 0.420459", \ + "0.269558, 0.274899, 0.281958, 0.292809, 0.315169, 0.354429, 0.432268", \ + "0.288419, 0.293759, 0.300819, 0.311669, 0.334028, 0.373289, 0.451129" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.375730, 0.379870, 0.385760, 0.394870, 0.412870, 0.443930, 0.504940", \ + "0.375960, 0.380100, 0.385990, 0.395100, 0.413100, 0.444160, 0.505170", \ + "0.378140, 0.382280, 0.388170, 0.397280, 0.415280, 0.446340, 0.507350", \ + "0.382890, 0.387030, 0.392920, 0.402030, 0.420030, 0.451090, 0.512100", \ + "0.391910, 0.396050, 0.401940, 0.411050, 0.429050, 0.460110, 0.521120", \ + "0.404450, 0.408590, 0.414480, 0.423590, 0.441590, 0.472650, 0.533660", \ + "0.423690, 0.427830, 0.433720, 0.442830, 0.460830, 0.491890, 0.552900" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.308634, 0.312744, 0.318594, 0.327854, 0.345834, 0.377024, 0.437914", \ + "0.308844, 0.312954, 0.318804, 0.328064, 0.346044, 0.377234, 0.438124", \ + "0.310774, 0.314884, 0.320734, 0.329994, 0.347974, 0.379164, 0.440054", \ + "0.315844, 0.319954, 0.325804, 0.335064, 0.353044, 0.384234, 0.445124", \ + "0.324774, 0.328884, 0.334734, 0.343994, 0.361974, 0.393164, 0.454054", \ + "0.337224, 0.341334, 0.347184, 0.356444, 0.374424, 0.405614, 0.466504", \ + "0.354654, 0.358764, 0.364614, 0.373874, 0.391854, 0.423044, 0.483934" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.354661, 0.359881, 0.366951, 0.377771, 0.399871, 0.439161, 0.516611", \ + "0.354881, 0.360101, 0.367171, 0.377991, 0.400091, 0.439381, 0.516831", \ + "0.357471, 0.362691, 0.369761, 0.380581, 0.402681, 0.441971, 0.519421", \ + "0.362021, 0.367241, 0.374311, 0.385131, 0.407231, 0.446521, 0.523971", \ + "0.370661, 0.375881, 0.382951, 0.393771, 0.415871, 0.455161, 0.532611", \ + "0.382621, 0.387841, 0.394911, 0.405731, 0.427831, 0.467121, 0.544571", \ + "0.402171, 0.407391, 0.414461, 0.425281, 0.447381, 0.486671, 0.564121" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.290507, 0.295847, 0.302907, 0.313757, 0.336117, 0.375377, 0.453217", \ + "0.291167, 0.296507, 0.303567, 0.314417, 0.336777, 0.376037, 0.453877", \ + "0.293167, 0.298507, 0.305567, 0.316417, 0.338777, 0.378037, 0.455877", \ + "0.297747, 0.303087, 0.310147, 0.320997, 0.343357, 0.382617, 0.460457", \ + "0.306817, 0.312157, 0.319217, 0.330067, 0.352427, 0.391687, 0.469527", \ + "0.318627, 0.323967, 0.331027, 0.341877, 0.364237, 0.403497, 0.481337", \ + "0.337487, 0.342827, 0.349887, 0.360737, 0.383097, 0.422357, 0.500197" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.427479, 0.431619, 0.437509, 0.446619, 0.464619, 0.495679, 0.556689", \ + "0.427709, 0.431849, 0.437739, 0.446849, 0.464849, 0.495909, 0.556919", \ + "0.429889, 0.434029, 0.439919, 0.449029, 0.467029, 0.498089, 0.559099", \ + "0.434639, 0.438779, 0.444669, 0.453779, 0.471779, 0.502839, 0.563849", \ + "0.443659, 0.447799, 0.453689, 0.462799, 0.480799, 0.511859, 0.572869", \ + "0.456199, 0.460339, 0.466229, 0.475339, 0.493339, 0.524399, 0.585409", \ + "0.475439, 0.479579, 0.485469, 0.494579, 0.512579, 0.543639, 0.604649" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.352612, 0.356722, 0.362572, 0.371832, 0.389812, 0.421002, 0.481892", \ + "0.352822, 0.356932, 0.362782, 0.372042, 0.390022, 0.421212, 0.482102", \ + "0.354752, 0.358862, 0.364712, 0.373972, 0.391952, 0.423142, 0.484032", \ + "0.359822, 0.363932, 0.369782, 0.379042, 0.397022, 0.428212, 0.489102", \ + "0.368752, 0.372862, 0.378712, 0.387972, 0.405952, 0.437142, 0.498032", \ + "0.381202, 0.385312, 0.391162, 0.400422, 0.418402, 0.449592, 0.510482", \ + "0.398632, 0.402742, 0.408592, 0.417852, 0.435832, 0.467022, 0.527912" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.406405, 0.411625, 0.418695, 0.429515, 0.451615, 0.490905, 0.568355", \ + "0.406625, 0.411845, 0.418915, 0.429735, 0.451835, 0.491125, 0.568575", \ + "0.409215, 0.414435, 0.421505, 0.432325, 0.454425, 0.493715, 0.571165", \ + "0.413765, 0.418985, 0.426055, 0.436875, 0.458975, 0.498265, 0.575715", \ + "0.422405, 0.427625, 0.434695, 0.445515, 0.467615, 0.506905, 0.584355", \ + "0.434365, 0.439585, 0.446655, 0.457475, 0.479575, 0.518865, 0.596315", \ + "0.453915, 0.459135, 0.466205, 0.477025, 0.499125, 0.538415, 0.615865" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.334490, 0.339830, 0.346890, 0.357740, 0.380100, 0.419360, 0.497200", \ + "0.335150, 0.340490, 0.347550, 0.358400, 0.380760, 0.420020, 0.497860", \ + "0.337150, 0.342490, 0.349550, 0.360400, 0.382760, 0.422020, 0.499860", \ + "0.341730, 0.347070, 0.354130, 0.364980, 0.387340, 0.426600, 0.504440", \ + "0.350800, 0.356140, 0.363200, 0.374050, 0.396410, 0.435670, 0.513510", \ + "0.362610, 0.367950, 0.375010, 0.385860, 0.408220, 0.447480, 0.525320", \ + "0.381470, 0.386810, 0.393870, 0.404720, 0.427080, 0.466340, 0.544180" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.483600, 0.487740, 0.493630, 0.502740, 0.520740, 0.551800, 0.612810", \ + "0.483830, 0.487970, 0.493860, 0.502970, 0.520970, 0.552030, 0.613040", \ + "0.486010, 0.490150, 0.496040, 0.505150, 0.523150, 0.554210, 0.615220", \ + "0.490760, 0.494900, 0.500790, 0.509900, 0.527900, 0.558960, 0.619970", \ + "0.499780, 0.503920, 0.509810, 0.518920, 0.536920, 0.567980, 0.628990", \ + "0.512320, 0.516460, 0.522350, 0.531460, 0.549460, 0.580520, 0.641530", \ + "0.531560, 0.535700, 0.541590, 0.550700, 0.568700, 0.599760, 0.660770" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.400318, 0.404428, 0.410278, 0.419538, 0.437518, 0.468708, 0.529598", \ + "0.400528, 0.404638, 0.410488, 0.419748, 0.437728, 0.468918, 0.529808", \ + "0.402458, 0.406568, 0.412418, 0.421678, 0.439658, 0.470848, 0.531738", \ + "0.407528, 0.411638, 0.417488, 0.426748, 0.444728, 0.475918, 0.536808", \ + "0.416458, 0.420568, 0.426418, 0.435678, 0.453658, 0.484848, 0.545738", \ + "0.428908, 0.433018, 0.438868, 0.448128, 0.466108, 0.497298, 0.558188", \ + "0.446338, 0.450448, 0.456298, 0.465558, 0.483538, 0.514728, 0.575618" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.462530, 0.467750, 0.474820, 0.485640, 0.507740, 0.547030, 0.624480", \ + "0.462750, 0.467970, 0.475040, 0.485860, 0.507960, 0.547250, 0.624700", \ + "0.465340, 0.470560, 0.477630, 0.488450, 0.510550, 0.549840, 0.627290", \ + "0.469890, 0.475110, 0.482180, 0.493000, 0.515100, 0.554390, 0.631840", \ + "0.478530, 0.483750, 0.490820, 0.501640, 0.523740, 0.563030, 0.640480", \ + "0.490490, 0.495710, 0.502780, 0.513600, 0.535700, 0.574990, 0.652440", \ + "0.510040, 0.515260, 0.522330, 0.533150, 0.555250, 0.594540, 0.671990" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.382192, 0.387533, 0.394592, 0.405442, 0.427803, 0.467062, 0.544902", \ + "0.382852, 0.388192, 0.395252, 0.406102, 0.428463, 0.467722, 0.545563", \ + "0.384852, 0.390193, 0.397252, 0.408102, 0.430463, 0.469722, 0.547563", \ + "0.389433, 0.394773, 0.401832, 0.412683, 0.435042, 0.474302, 0.552143", \ + "0.398503, 0.403842, 0.410903, 0.421753, 0.444113, 0.483372, 0.561213", \ + "0.410313, 0.415653, 0.422712, 0.433563, 0.455922, 0.495182, 0.573022", \ + "0.429173, 0.434513, 0.441573, 0.452423, 0.474783, 0.514043, 0.591882" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.534770, 0.538910, 0.544800, 0.553910, 0.571910, 0.602970, 0.663980", \ + "0.535000, 0.539140, 0.545030, 0.554140, 0.572140, 0.603200, 0.664210", \ + "0.537180, 0.541320, 0.547210, 0.556320, 0.574320, 0.605380, 0.666390", \ + "0.541930, 0.546070, 0.551960, 0.561070, 0.579070, 0.610130, 0.671140", \ + "0.550950, 0.555090, 0.560980, 0.570090, 0.588090, 0.619150, 0.680160", \ + "0.563490, 0.567630, 0.573520, 0.582630, 0.600630, 0.631690, 0.692700", \ + "0.582730, 0.586870, 0.592760, 0.601870, 0.619870, 0.650930, 0.711940" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.443809, 0.447919, 0.453769, 0.463029, 0.481010, 0.512199, 0.573089", \ + "0.444019, 0.448130, 0.453979, 0.463239, 0.481219, 0.512409, 0.573300", \ + "0.445949, 0.450059, 0.455909, 0.465169, 0.483149, 0.514339, 0.575229", \ + "0.451019, 0.455129, 0.460980, 0.470239, 0.488219, 0.519410, 0.580299", \ + "0.459949, 0.464060, 0.469909, 0.479169, 0.497149, 0.528339, 0.589230", \ + "0.472400, 0.476509, 0.482359, 0.491620, 0.509599, 0.540789, 0.601679", \ + "0.489829, 0.493939, 0.499789, 0.509049, 0.527029, 0.558220, 0.619109" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.513696, 0.518916, 0.525986, 0.536806, 0.558906, 0.598196, 0.675646", \ + "0.513916, 0.519136, 0.526206, 0.537026, 0.559126, 0.598416, 0.675866", \ + "0.516506, 0.521726, 0.528796, 0.539616, 0.561716, 0.601006, 0.678456", \ + "0.521056, 0.526276, 0.533346, 0.544166, 0.566266, 0.605556, 0.683006", \ + "0.529696, 0.534916, 0.541986, 0.552806, 0.574906, 0.614196, 0.691646", \ + "0.541656, 0.546876, 0.553946, 0.564766, 0.586866, 0.626156, 0.703606", \ + "0.561206, 0.566426, 0.573496, 0.584316, 0.606416, 0.645706, 0.723156" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.425687, 0.431027, 0.438087, 0.448937, 0.471297, 0.510557, 0.588397", \ + "0.426347, 0.431687, 0.438747, 0.449597, 0.471957, 0.511217, 0.589057", \ + "0.428347, 0.433687, 0.440747, 0.451597, 0.473957, 0.513217, 0.591057", \ + "0.432927, 0.438267, 0.445327, 0.456177, 0.478537, 0.517797, 0.595637", \ + "0.441997, 0.447337, 0.454397, 0.465247, 0.487607, 0.526867, 0.604707", \ + "0.453807, 0.459147, 0.466207, 0.477057, 0.499417, 0.538677, 0.616517", \ + "0.472667, 0.478007, 0.485067, 0.495917, 0.518277, 0.557537, 0.635377" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.315302, 0.319442, 0.325332, 0.334442, 0.352442, 0.383502, 0.444512", \ + "0.315532, 0.319672, 0.325562, 0.334672, 0.352672, 0.383732, 0.444742", \ + "0.317712, 0.321852, 0.327742, 0.336852, 0.354852, 0.385912, 0.446922", \ + "0.322462, 0.326602, 0.332492, 0.341602, 0.359602, 0.390662, 0.451672", \ + "0.331482, 0.335622, 0.341512, 0.350622, 0.368622, 0.399682, 0.460692", \ + "0.344022, 0.348162, 0.354052, 0.363162, 0.381162, 0.412222, 0.473232", \ + "0.363262, 0.367402, 0.373292, 0.382402, 0.400402, 0.431462, 0.492472" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.257262, 0.261372, 0.267221, 0.276482, 0.294462, 0.325652, 0.386542", \ + "0.257472, 0.261582, 0.267432, 0.276692, 0.294672, 0.325862, 0.386752", \ + "0.259401, 0.263511, 0.269362, 0.278622, 0.296602, 0.327792, 0.388682", \ + "0.264472, 0.268582, 0.274432, 0.283692, 0.301672, 0.332862, 0.393752", \ + "0.273402, 0.277512, 0.283362, 0.292622, 0.310602, 0.341792, 0.402682", \ + "0.285852, 0.289962, 0.295811, 0.305072, 0.323052, 0.354242, 0.415132", \ + "0.303282, 0.307392, 0.313241, 0.322502, 0.340482, 0.371672, 0.432562" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.294228, 0.299448, 0.306518, 0.317338, 0.339438, 0.378728, 0.456178", \ + "0.294448, 0.299668, 0.306738, 0.317558, 0.339658, 0.378948, 0.456398", \ + "0.297038, 0.302258, 0.309328, 0.320148, 0.342248, 0.381538, 0.458988", \ + "0.301588, 0.306808, 0.313878, 0.324698, 0.346798, 0.386088, 0.463538", \ + "0.310228, 0.315448, 0.322518, 0.333338, 0.355438, 0.394728, 0.472178", \ + "0.322188, 0.327408, 0.334478, 0.345298, 0.367398, 0.406688, 0.484138", \ + "0.341738, 0.346958, 0.354028, 0.364848, 0.386948, 0.426238, 0.503688" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.239139, 0.244479, 0.251540, 0.262389, 0.284750, 0.324010, 0.401850", \ + "0.239799, 0.245139, 0.252199, 0.263050, 0.285410, 0.324670, 0.402510", \ + "0.241799, 0.247139, 0.254199, 0.265050, 0.287410, 0.326670, 0.404510", \ + "0.246380, 0.251720, 0.258780, 0.269629, 0.291989, 0.331250, 0.409090", \ + "0.255450, 0.260789, 0.267849, 0.278700, 0.301059, 0.340319, 0.418159", \ + "0.267260, 0.272600, 0.279660, 0.290510, 0.312869, 0.352130, 0.429969", \ + "0.286120, 0.291460, 0.298519, 0.309370, 0.331729, 0.370990, 0.448830" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.316358, 0.320497, 0.326387, 0.335498, 0.353498, 0.384557, 0.445568", \ + "0.316587, 0.320727, 0.326618, 0.335728, 0.353727, 0.384788, 0.445798", \ + "0.318767, 0.322908, 0.328798, 0.337907, 0.355907, 0.386968, 0.447977", \ + "0.323518, 0.327657, 0.333547, 0.342658, 0.360658, 0.391717, 0.452728", \ + "0.332537, 0.336678, 0.342567, 0.351677, 0.369677, 0.400737, 0.461747", \ + "0.345077, 0.349218, 0.355108, 0.364217, 0.382217, 0.413278, 0.474287", \ + "0.364318, 0.368457, 0.374347, 0.383458, 0.401457, 0.432517, 0.493527" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.258167, 0.262277, 0.268127, 0.277387, 0.295367, 0.326557, 0.387447", \ + "0.258377, 0.262487, 0.268337, 0.277597, 0.295577, 0.326767, 0.387657", \ + "0.260307, 0.264417, 0.270267, 0.279527, 0.297507, 0.328697, 0.389587", \ + "0.265377, 0.269487, 0.275337, 0.284597, 0.302577, 0.333767, 0.394657", \ + "0.274307, 0.278417, 0.284267, 0.293527, 0.311507, 0.342697, 0.403587", \ + "0.286757, 0.290867, 0.296717, 0.305977, 0.323957, 0.355147, 0.416037", \ + "0.304187, 0.308297, 0.314147, 0.323407, 0.341387, 0.372577, 0.433467" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.295288, 0.300508, 0.307578, 0.318398, 0.340498, 0.379788, 0.457238", \ + "0.295508, 0.300728, 0.307798, 0.318618, 0.340718, 0.380008, 0.457458", \ + "0.298098, 0.303318, 0.310388, 0.321208, 0.343308, 0.382598, 0.460048", \ + "0.302648, 0.307868, 0.314938, 0.325758, 0.347858, 0.387148, 0.464598", \ + "0.311288, 0.316508, 0.323578, 0.334398, 0.356498, 0.395788, 0.473238", \ + "0.323248, 0.328468, 0.335538, 0.346358, 0.368458, 0.407748, 0.485198", \ + "0.342798, 0.348018, 0.355088, 0.365908, 0.388008, 0.427298, 0.504748" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.240045, 0.245385, 0.252445, 0.263294, 0.285655, 0.324915, 0.402755", \ + "0.240704, 0.246045, 0.253105, 0.263955, 0.286315, 0.325574, 0.403415", \ + "0.242704, 0.248045, 0.255105, 0.265955, 0.288315, 0.327575, 0.405415", \ + "0.247285, 0.252625, 0.259685, 0.270535, 0.292895, 0.332155, 0.409995", \ + "0.256355, 0.261695, 0.268755, 0.279605, 0.301965, 0.341224, 0.419065", \ + "0.268165, 0.273505, 0.280565, 0.291415, 0.313775, 0.353035, 0.430875", \ + "0.287025, 0.292365, 0.299425, 0.310275, 0.332635, 0.371895, 0.449735" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.317340, 0.321480, 0.327370, 0.336480, 0.354480, 0.385540, 0.446550", \ + "0.317570, 0.321710, 0.327600, 0.336710, 0.354710, 0.385770, 0.446780", \ + "0.319750, 0.323890, 0.329780, 0.338890, 0.356890, 0.387950, 0.448960", \ + "0.324500, 0.328640, 0.334530, 0.343640, 0.361640, 0.392700, 0.453710", \ + "0.333520, 0.337660, 0.343550, 0.352660, 0.370660, 0.401720, 0.462730", \ + "0.346060, 0.350200, 0.356090, 0.365200, 0.383200, 0.414260, 0.475270", \ + "0.365300, 0.369440, 0.375330, 0.384440, 0.402440, 0.433500, 0.494510" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.258999, 0.263109, 0.268958, 0.278219, 0.296199, 0.327389, 0.388279", \ + "0.259208, 0.263318, 0.269169, 0.278429, 0.296408, 0.327598, 0.388488", \ + "0.261138, 0.265248, 0.271099, 0.280358, 0.298338, 0.329528, 0.390418", \ + "0.266208, 0.270318, 0.276169, 0.285429, 0.303409, 0.334599, 0.395489", \ + "0.275138, 0.279248, 0.285099, 0.294359, 0.312338, 0.343528, 0.404418", \ + "0.287589, 0.291699, 0.297548, 0.306809, 0.324789, 0.355979, 0.416869", \ + "0.305019, 0.309129, 0.314978, 0.324239, 0.342219, 0.373409, 0.434299" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.296271, 0.301491, 0.308561, 0.319381, 0.341481, 0.380771, 0.458221", \ + "0.296491, 0.301711, 0.308781, 0.319601, 0.341701, 0.380991, 0.458441", \ + "0.299081, 0.304301, 0.311371, 0.322191, 0.344291, 0.383581, 0.461031", \ + "0.303631, 0.308851, 0.315921, 0.326741, 0.348841, 0.388131, 0.465581", \ + "0.312271, 0.317491, 0.324561, 0.335381, 0.357481, 0.396771, 0.474221", \ + "0.324231, 0.329451, 0.336521, 0.347341, 0.369441, 0.408731, 0.486181", \ + "0.343781, 0.349001, 0.356071, 0.366891, 0.388991, 0.428281, 0.505731" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.240875, 0.246216, 0.253276, 0.264126, 0.286486, 0.325745, 0.403586", \ + "0.241535, 0.246875, 0.253936, 0.264786, 0.287146, 0.326406, 0.404246", \ + "0.243535, 0.248875, 0.255936, 0.266786, 0.289146, 0.328406, 0.406246", \ + "0.248116, 0.253456, 0.260516, 0.271366, 0.293725, 0.332986, 0.410826", \ + "0.257186, 0.262526, 0.269586, 0.280436, 0.302796, 0.342056, 0.419895", \ + "0.268996, 0.274336, 0.281395, 0.292246, 0.314606, 0.353866, 0.431706", \ + "0.287856, 0.293196, 0.300256, 0.311106, 0.333465, 0.372726, 0.450566" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.318007, 0.322148, 0.328038, 0.337147, 0.355148, 0.386208, 0.447217", \ + "0.318238, 0.322378, 0.328267, 0.337377, 0.355378, 0.386437, 0.447447", \ + "0.320418, 0.324557, 0.330448, 0.339558, 0.357558, 0.388618, 0.449628", \ + "0.325167, 0.329308, 0.335198, 0.344307, 0.362308, 0.393368, 0.454377", \ + "0.334188, 0.338328, 0.344218, 0.353328, 0.371328, 0.402388, 0.463398", \ + "0.346728, 0.350867, 0.356758, 0.365868, 0.383868, 0.414928, 0.475938", \ + "0.365968, 0.370108, 0.375998, 0.385107, 0.403108, 0.434168, 0.495177" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.259561, 0.263671, 0.269521, 0.278781, 0.296761, 0.327951, 0.388841", \ + "0.259771, 0.263881, 0.269731, 0.278991, 0.296971, 0.328161, 0.389051", \ + "0.261701, 0.265811, 0.271661, 0.280921, 0.298901, 0.330091, 0.390981", \ + "0.266771, 0.270881, 0.276731, 0.285991, 0.303971, 0.335161, 0.396051", \ + "0.275701, 0.279811, 0.285661, 0.294921, 0.312901, 0.344091, 0.404981", \ + "0.288151, 0.292261, 0.298111, 0.307371, 0.325351, 0.356541, 0.417431", \ + "0.305581, 0.309691, 0.315541, 0.324801, 0.342781, 0.373971, 0.434861" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.296938, 0.302158, 0.309228, 0.320048, 0.342148, 0.381438, 0.458888", \ + "0.297158, 0.302378, 0.309448, 0.320268, 0.342368, 0.381658, 0.459108", \ + "0.299748, 0.304968, 0.312038, 0.322858, 0.344958, 0.384248, 0.461698", \ + "0.304298, 0.309518, 0.316588, 0.327408, 0.349508, 0.388798, 0.466248", \ + "0.312938, 0.318158, 0.325228, 0.336048, 0.358148, 0.397438, 0.474888", \ + "0.324898, 0.330118, 0.337188, 0.348008, 0.370108, 0.409398, 0.486848", \ + "0.344448, 0.349668, 0.356738, 0.367558, 0.389658, 0.428948, 0.506398" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.241438, 0.246778, 0.253838, 0.264688, 0.287049, 0.326308, 0.404149", \ + "0.242098, 0.247438, 0.254498, 0.265349, 0.287709, 0.326968, 0.404809", \ + "0.244098, 0.249438, 0.256498, 0.267349, 0.289709, 0.328968, 0.406809", \ + "0.248678, 0.254018, 0.261079, 0.271929, 0.294288, 0.333549, 0.411389", \ + "0.257749, 0.263088, 0.270148, 0.280999, 0.303359, 0.342618, 0.420459", \ + "0.269558, 0.274899, 0.281958, 0.292809, 0.315169, 0.354429, 0.432268", \ + "0.288419, 0.293759, 0.300819, 0.311669, 0.334028, 0.373289, 0.451129" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.375730, 0.379870, 0.385760, 0.394870, 0.412870, 0.443930, 0.504940", \ + "0.375960, 0.380100, 0.385990, 0.395100, 0.413100, 0.444160, 0.505170", \ + "0.378140, 0.382280, 0.388170, 0.397280, 0.415280, 0.446340, 0.507350", \ + "0.382890, 0.387030, 0.392920, 0.402030, 0.420030, 0.451090, 0.512100", \ + "0.391910, 0.396050, 0.401940, 0.411050, 0.429050, 0.460110, 0.521120", \ + "0.404450, 0.408590, 0.414480, 0.423590, 0.441590, 0.472650, 0.533660", \ + "0.423690, 0.427830, 0.433720, 0.442830, 0.460830, 0.491890, 0.552900" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.308634, 0.312744, 0.318594, 0.327854, 0.345834, 0.377024, 0.437914", \ + "0.308844, 0.312954, 0.318804, 0.328064, 0.346044, 0.377234, 0.438124", \ + "0.310774, 0.314884, 0.320734, 0.329994, 0.347974, 0.379164, 0.440054", \ + "0.315844, 0.319954, 0.325804, 0.335064, 0.353044, 0.384234, 0.445124", \ + "0.324774, 0.328884, 0.334734, 0.343994, 0.361974, 0.393164, 0.454054", \ + "0.337224, 0.341334, 0.347184, 0.356444, 0.374424, 0.405614, 0.466504", \ + "0.354654, 0.358764, 0.364614, 0.373874, 0.391854, 0.423044, 0.483934" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.354661, 0.359881, 0.366951, 0.377771, 0.399871, 0.439161, 0.516611", \ + "0.354881, 0.360101, 0.367171, 0.377991, 0.400091, 0.439381, 0.516831", \ + "0.357471, 0.362691, 0.369761, 0.380581, 0.402681, 0.441971, 0.519421", \ + "0.362021, 0.367241, 0.374311, 0.385131, 0.407231, 0.446521, 0.523971", \ + "0.370661, 0.375881, 0.382951, 0.393771, 0.415871, 0.455161, 0.532611", \ + "0.382621, 0.387841, 0.394911, 0.405731, 0.427831, 0.467121, 0.544571", \ + "0.402171, 0.407391, 0.414461, 0.425281, 0.447381, 0.486671, 0.564121" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.290507, 0.295847, 0.302907, 0.313757, 0.336117, 0.375377, 0.453217", \ + "0.291167, 0.296507, 0.303567, 0.314417, 0.336777, 0.376037, 0.453877", \ + "0.293167, 0.298507, 0.305567, 0.316417, 0.338777, 0.378037, 0.455877", \ + "0.297747, 0.303087, 0.310147, 0.320997, 0.343357, 0.382617, 0.460457", \ + "0.306817, 0.312157, 0.319217, 0.330067, 0.352427, 0.391687, 0.469527", \ + "0.318627, 0.323967, 0.331027, 0.341877, 0.364237, 0.403497, 0.481337", \ + "0.337487, 0.342827, 0.349887, 0.360737, 0.383097, 0.422357, 0.500197" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.427479, 0.431619, 0.437509, 0.446619, 0.464619, 0.495679, 0.556689", \ + "0.427709, 0.431849, 0.437739, 0.446849, 0.464849, 0.495909, 0.556919", \ + "0.429889, 0.434029, 0.439919, 0.449029, 0.467029, 0.498089, 0.559099", \ + "0.434639, 0.438779, 0.444669, 0.453779, 0.471779, 0.502839, 0.563849", \ + "0.443659, 0.447799, 0.453689, 0.462799, 0.480799, 0.511859, 0.572869", \ + "0.456199, 0.460339, 0.466229, 0.475339, 0.493339, 0.524399, 0.585409", \ + "0.475439, 0.479579, 0.485469, 0.494579, 0.512579, 0.543639, 0.604649" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.352612, 0.356722, 0.362572, 0.371832, 0.389812, 0.421002, 0.481892", \ + "0.352822, 0.356932, 0.362782, 0.372042, 0.390022, 0.421212, 0.482102", \ + "0.354752, 0.358862, 0.364712, 0.373972, 0.391952, 0.423142, 0.484032", \ + "0.359822, 0.363932, 0.369782, 0.379042, 0.397022, 0.428212, 0.489102", \ + "0.368752, 0.372862, 0.378712, 0.387972, 0.405952, 0.437142, 0.498032", \ + "0.381202, 0.385312, 0.391162, 0.400422, 0.418402, 0.449592, 0.510482", \ + "0.398632, 0.402742, 0.408592, 0.417852, 0.435832, 0.467022, 0.527912" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.406405, 0.411625, 0.418695, 0.429515, 0.451615, 0.490905, 0.568355", \ + "0.406625, 0.411845, 0.418915, 0.429735, 0.451835, 0.491125, 0.568575", \ + "0.409215, 0.414435, 0.421505, 0.432325, 0.454425, 0.493715, 0.571165", \ + "0.413765, 0.418985, 0.426055, 0.436875, 0.458975, 0.498265, 0.575715", \ + "0.422405, 0.427625, 0.434695, 0.445515, 0.467615, 0.506905, 0.584355", \ + "0.434365, 0.439585, 0.446655, 0.457475, 0.479575, 0.518865, 0.596315", \ + "0.453915, 0.459135, 0.466205, 0.477025, 0.499125, 0.538415, 0.615865" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.334490, 0.339830, 0.346890, 0.357740, 0.380100, 0.419360, 0.497200", \ + "0.335150, 0.340490, 0.347550, 0.358400, 0.380760, 0.420020, 0.497860", \ + "0.337150, 0.342490, 0.349550, 0.360400, 0.382760, 0.422020, 0.499860", \ + "0.341730, 0.347070, 0.354130, 0.364980, 0.387340, 0.426600, 0.504440", \ + "0.350800, 0.356140, 0.363200, 0.374050, 0.396410, 0.435670, 0.513510", \ + "0.362610, 0.367950, 0.375010, 0.385860, 0.408220, 0.447480, 0.525320", \ + "0.381470, 0.386810, 0.393870, 0.404720, 0.427080, 0.466340, 0.544180" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.483600, 0.487740, 0.493630, 0.502740, 0.520740, 0.551800, 0.612810", \ + "0.483830, 0.487970, 0.493860, 0.502970, 0.520970, 0.552030, 0.613040", \ + "0.486010, 0.490150, 0.496040, 0.505150, 0.523150, 0.554210, 0.615220", \ + "0.490760, 0.494900, 0.500790, 0.509900, 0.527900, 0.558960, 0.619970", \ + "0.499780, 0.503920, 0.509810, 0.518920, 0.536920, 0.567980, 0.628990", \ + "0.512320, 0.516460, 0.522350, 0.531460, 0.549460, 0.580520, 0.641530", \ + "0.531560, 0.535700, 0.541590, 0.550700, 0.568700, 0.599760, 0.660770" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.400318, 0.404428, 0.410278, 0.419538, 0.437518, 0.468708, 0.529598", \ + "0.400528, 0.404638, 0.410488, 0.419748, 0.437728, 0.468918, 0.529808", \ + "0.402458, 0.406568, 0.412418, 0.421678, 0.439658, 0.470848, 0.531738", \ + "0.407528, 0.411638, 0.417488, 0.426748, 0.444728, 0.475918, 0.536808", \ + "0.416458, 0.420568, 0.426418, 0.435678, 0.453658, 0.484848, 0.545738", \ + "0.428908, 0.433018, 0.438868, 0.448128, 0.466108, 0.497298, 0.558188", \ + "0.446338, 0.450448, 0.456298, 0.465558, 0.483538, 0.514728, 0.575618" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.462530, 0.467750, 0.474820, 0.485640, 0.507740, 0.547030, 0.624480", \ + "0.462750, 0.467970, 0.475040, 0.485860, 0.507960, 0.547250, 0.624700", \ + "0.465340, 0.470560, 0.477630, 0.488450, 0.510550, 0.549840, 0.627290", \ + "0.469890, 0.475110, 0.482180, 0.493000, 0.515100, 0.554390, 0.631840", \ + "0.478530, 0.483750, 0.490820, 0.501640, 0.523740, 0.563030, 0.640480", \ + "0.490490, 0.495710, 0.502780, 0.513600, 0.535700, 0.574990, 0.652440", \ + "0.510040, 0.515260, 0.522330, 0.533150, 0.555250, 0.594540, 0.671990" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.382192, 0.387533, 0.394592, 0.405442, 0.427803, 0.467062, 0.544902", \ + "0.382852, 0.388192, 0.395252, 0.406102, 0.428463, 0.467722, 0.545563", \ + "0.384852, 0.390193, 0.397252, 0.408102, 0.430463, 0.469722, 0.547563", \ + "0.389433, 0.394773, 0.401832, 0.412683, 0.435042, 0.474302, 0.552143", \ + "0.398503, 0.403842, 0.410903, 0.421753, 0.444113, 0.483372, 0.561213", \ + "0.410313, 0.415653, 0.422712, 0.433563, 0.455922, 0.495182, 0.573022", \ + "0.429173, 0.434513, 0.441573, 0.452423, 0.474783, 0.514043, 0.591882" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.534770, 0.538910, 0.544800, 0.553910, 0.571910, 0.602970, 0.663980", \ + "0.535000, 0.539140, 0.545030, 0.554140, 0.572140, 0.603200, 0.664210", \ + "0.537180, 0.541320, 0.547210, 0.556320, 0.574320, 0.605380, 0.666390", \ + "0.541930, 0.546070, 0.551960, 0.561070, 0.579070, 0.610130, 0.671140", \ + "0.550950, 0.555090, 0.560980, 0.570090, 0.588090, 0.619150, 0.680160", \ + "0.563490, 0.567630, 0.573520, 0.582630, 0.600630, 0.631690, 0.692700", \ + "0.582730, 0.586870, 0.592760, 0.601870, 0.619870, 0.650930, 0.711940" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.443809, 0.447919, 0.453769, 0.463029, 0.481010, 0.512199, 0.573089", \ + "0.444019, 0.448130, 0.453979, 0.463239, 0.481219, 0.512409, 0.573300", \ + "0.445949, 0.450059, 0.455909, 0.465169, 0.483149, 0.514339, 0.575229", \ + "0.451019, 0.455129, 0.460980, 0.470239, 0.488219, 0.519410, 0.580299", \ + "0.459949, 0.464060, 0.469909, 0.479169, 0.497149, 0.528339, 0.589230", \ + "0.472400, 0.476509, 0.482359, 0.491620, 0.509599, 0.540789, 0.601679", \ + "0.489829, 0.493939, 0.499789, 0.509049, 0.527029, 0.558220, 0.619109" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382", \ + "0.014931, 0.018878, 0.025129, 0.036825, 0.063629, 0.115784, 0.227382" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_outputload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.513696, 0.518916, 0.525986, 0.536806, 0.558906, 0.598196, 0.675646", \ + "0.513916, 0.519136, 0.526206, 0.537026, 0.559126, 0.598416, 0.675866", \ + "0.516506, 0.521726, 0.528796, 0.539616, 0.561716, 0.601006, 0.678456", \ + "0.521056, 0.526276, 0.533346, 0.544166, 0.566266, 0.605556, 0.683006", \ + "0.529696, 0.534916, 0.541986, 0.552806, 0.574906, 0.614196, 0.691646", \ + "0.541656, 0.546876, 0.553946, 0.564766, 0.586866, 0.626156, 0.703606", \ + "0.561206, 0.566426, 0.573496, 0.584316, 0.606416, 0.645706, 0.723156" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_outputload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.425687, 0.431027, 0.438087, 0.448937, 0.471297, 0.510557, 0.588397", \ + "0.426347, 0.431687, 0.438747, 0.449597, 0.471957, 0.511217, 0.589057", \ + "0.428347, 0.433687, 0.440747, 0.451597, 0.473957, 0.513217, 0.591057", \ + "0.432927, 0.438267, 0.445327, 0.456177, 0.478537, 0.517797, 0.595637", \ + "0.441997, 0.447337, 0.454397, 0.465247, 0.487607, 0.526867, 0.604707", \ + "0.453807, 0.459147, 0.466207, 0.477057, 0.499417, 0.538677, 0.616517", \ + "0.472667, 0.478007, 0.485067, 0.495917, 0.518277, 0.557537, 0.635377" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_outputload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498", \ + "0.018014, 0.022474, 0.029940, 0.043763, 0.077594, 0.144716, 0.284498" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008669, 0.008678, 0.008791, 0.008800, 0.008808, 0.008817, 0.008966", \ + "0.009460, 0.009470, 0.009582, 0.009592, 0.009601, 0.009611, 0.009757", \ + "0.009470, 0.009479, 0.009592, 0.009601, 0.009611, 0.009620, 0.009766", \ + "0.009479, 0.009489, 0.009601, 0.009611, 0.009620, 0.009630, 0.009776", \ + "0.009967, 0.009977, 0.010089, 0.010099, 0.010109, 0.010120, 0.010264", \ + "0.009977, 0.009987, 0.010099, 0.010109, 0.010120, 0.010130, 0.010274", \ + "0.009987, 0.009997, 0.010109, 0.010120, 0.010130, 0.010140, 0.010284" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007172, 0.007686, 0.007694, 0.007701, 0.007709, 0.008097, 0.008105", \ + "0.008066, 0.008580, 0.008588, 0.008597, 0.008606, 0.008990, 0.008999", \ + "0.008074, 0.008588, 0.008597, 0.008606, 0.008614, 0.008999, 0.009008", \ + "0.008082, 0.008597, 0.008606, 0.008614, 0.008623, 0.009008, 0.009017", \ + "0.008090, 0.008606, 0.008614, 0.008623, 0.008631, 0.009017, 0.009027", \ + "0.008098, 0.008614, 0.008623, 0.008631, 0.008640, 0.009027, 0.009036", \ + "0.008106, 0.008623, 0.008631, 0.008640, 0.008649, 0.009036, 0.009045" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.008669, 0.008678, 0.008791, 0.008800, 0.008808, 0.008817, 0.008966", \ + "0.009460, 0.009470, 0.009582, 0.009592, 0.009601, 0.009611, 0.009757", \ + "0.009470, 0.009479, 0.009592, 0.009601, 0.009611, 0.009620, 0.009766", \ + "0.009479, 0.009489, 0.009601, 0.009611, 0.009620, 0.009630, 0.009776", \ + "0.009967, 0.009977, 0.010089, 0.010099, 0.010109, 0.010120, 0.010264", \ + "0.009977, 0.009987, 0.010099, 0.010109, 0.010120, 0.010130, 0.010274", \ + "0.009987, 0.009997, 0.010109, 0.010120, 0.010130, 0.010140, 0.010284" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_outputload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.004000, 0.009000, 0.018000, 0.035000, 0.075000, 0.150000, 0.300000"); + values (\ + "0.007172, 0.007686, 0.007694, 0.007701, 0.007709, 0.008097, 0.008105", \ + "0.008066, 0.008580, 0.008588, 0.008597, 0.008606, 0.008990, 0.008999", \ + "0.008074, 0.008588, 0.008597, 0.008606, 0.008614, 0.008999, 0.009008", \ + "0.008082, 0.008597, 0.008606, 0.008614, 0.008623, 0.009008, 0.009017", \ + "0.008090, 0.008606, 0.008614, 0.008623, 0.008631, 0.009017, 0.009027", \ + "0.008098, 0.008614, 0.008623, 0.008631, 0.008640, 0.009027, 0.009036", \ + "0.008106, 0.008623, 0.008631, 0.008640, 0.008649, 0.009036, 0.009045" \ + ); + } + } + } + bus(SOA) { + bus_type : rf2_32x19_wm0_SOA; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358116, 0.360146, 0.362486, 0.368396, 0.386276, 0.417106, 0.478556", \ + "0.358306, 0.360336, 0.362676, 0.368586, 0.386466, 0.417296, 0.478746", \ + "0.359906, 0.361936, 0.364276, 0.370186, 0.388066, 0.418896, 0.480346", \ + "0.365376, 0.367406, 0.369746, 0.375656, 0.393536, 0.424366, 0.485816", \ + "0.373996, 0.376026, 0.378366, 0.384276, 0.402156, 0.432986, 0.494436", \ + "0.386646, 0.388676, 0.391016, 0.396926, 0.414806, 0.445636, 0.507086", \ + "0.405866, 0.407896, 0.410236, 0.416146, 0.434026, 0.464856, 0.526306" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.303902, 0.306052, 0.308322, 0.314032, 0.332202, 0.362562, 0.423842", \ + "0.303862, 0.306012, 0.308282, 0.313992, 0.332162, 0.362522, 0.423802", \ + "0.305462, 0.307612, 0.309882, 0.315592, 0.333762, 0.364122, 0.425402", \ + "0.311102, 0.313252, 0.315522, 0.321232, 0.339402, 0.369762, 0.431042", \ + "0.320022, 0.322172, 0.324442, 0.330152, 0.348322, 0.378682, 0.439962", \ + "0.332152, 0.334302, 0.336572, 0.342282, 0.360452, 0.390812, 0.452092", \ + "0.351332, 0.353482, 0.355752, 0.361462, 0.379632, 0.409992, 0.471272" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.331132, 0.334552, 0.337382, 0.345892, 0.372022, 0.415822, 0.503862", \ + "0.331632, 0.335052, 0.337882, 0.346392, 0.372522, 0.416322, 0.504362", \ + "0.333662, 0.337082, 0.339912, 0.348422, 0.374552, 0.418352, 0.506392", \ + "0.338292, 0.341712, 0.344542, 0.353052, 0.379182, 0.422982, 0.511022", \ + "0.347162, 0.350582, 0.353412, 0.361922, 0.388052, 0.431852, 0.519892", \ + "0.359972, 0.363392, 0.366222, 0.374732, 0.400862, 0.444662, 0.532702", \ + "0.379692, 0.383112, 0.385942, 0.394452, 0.420582, 0.464382, 0.552422" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.281023, 0.284394, 0.287304, 0.295554, 0.321444, 0.365694, 0.453723", \ + "0.281314, 0.284683, 0.287594, 0.295844, 0.321734, 0.365984, 0.454014", \ + "0.283274, 0.286644, 0.289554, 0.297804, 0.323694, 0.367943, 0.455974", \ + "0.288084, 0.291454, 0.294364, 0.302613, 0.328504, 0.372754, 0.460784", \ + "0.297204, 0.300574, 0.303484, 0.311734, 0.337624, 0.381873, 0.469904", \ + "0.308624, 0.311994, 0.314904, 0.323153, 0.349044, 0.393294, 0.481324", \ + "0.327924, 0.331294, 0.334203, 0.342454, 0.368344, 0.412594, 0.500623" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.359181, 0.361211, 0.363551, 0.369461, 0.387341, 0.418171, 0.479621", \ + "0.359371, 0.361401, 0.363741, 0.369651, 0.387531, 0.418361, 0.479811", \ + "0.360971, 0.363001, 0.365341, 0.371251, 0.389131, 0.419961, 0.481411", \ + "0.366441, 0.368471, 0.370811, 0.376721, 0.394601, 0.425431, 0.486881", \ + "0.375061, 0.377091, 0.379431, 0.385341, 0.403221, 0.434051, 0.495501", \ + "0.387711, 0.389741, 0.392081, 0.397991, 0.415871, 0.446701, 0.508151", \ + "0.406931, 0.408961, 0.411301, 0.417211, 0.435091, 0.465921, 0.527371" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.304803, 0.306953, 0.309223, 0.314933, 0.333103, 0.363463, 0.424743", \ + "0.304763, 0.306913, 0.309183, 0.314893, 0.333063, 0.363423, 0.424703", \ + "0.306363, 0.308513, 0.310783, 0.316493, 0.334663, 0.365023, 0.426303", \ + "0.312003, 0.314153, 0.316423, 0.322133, 0.340303, 0.370663, 0.431943", \ + "0.320923, 0.323073, 0.325343, 0.331053, 0.349223, 0.379583, 0.440863", \ + "0.333053, 0.335203, 0.337473, 0.343183, 0.361353, 0.391713, 0.452993", \ + "0.352233, 0.354383, 0.356653, 0.362363, 0.380533, 0.410893, 0.472173" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.332197, 0.335618, 0.338448, 0.346958, 0.373088, 0.416888, 0.504927", \ + "0.332697, 0.336118, 0.338948, 0.347458, 0.373588, 0.417388, 0.505428", \ + "0.334728, 0.338147, 0.340977, 0.349488, 0.375617, 0.419417, 0.507458", \ + "0.339357, 0.342778, 0.345608, 0.354118, 0.380248, 0.424048, 0.512088", \ + "0.348228, 0.351648, 0.354478, 0.362988, 0.389118, 0.432918, 0.520957", \ + "0.361038, 0.364457, 0.367287, 0.375798, 0.401927, 0.445727, 0.533767", \ + "0.380758, 0.384178, 0.387008, 0.395518, 0.421648, 0.465448, 0.553488" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.281925, 0.285295, 0.288205, 0.296455, 0.322345, 0.366595, 0.454625", \ + "0.282215, 0.285585, 0.288495, 0.296745, 0.322635, 0.366885, 0.454915", \ + "0.284175, 0.287545, 0.290455, 0.298705, 0.324595, 0.368845, 0.456875", \ + "0.288985, 0.292355, 0.295265, 0.303515, 0.329405, 0.373655, 0.461685", \ + "0.298105, 0.301475, 0.304385, 0.312635, 0.338525, 0.382775, 0.470805", \ + "0.309525, 0.312895, 0.315805, 0.324055, 0.349945, 0.394195, 0.482224", \ + "0.328825, 0.332195, 0.335105, 0.343355, 0.369245, 0.413495, 0.501524" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.360159, 0.362189, 0.364529, 0.370439, 0.388319, 0.419149, 0.480599", \ + "0.360349, 0.362379, 0.364719, 0.370629, 0.388509, 0.419339, 0.480789", \ + "0.361949, 0.363979, 0.366319, 0.372229, 0.390109, 0.420939, 0.482389", \ + "0.367419, 0.369449, 0.371789, 0.377699, 0.395579, 0.426409, 0.487859", \ + "0.376039, 0.378069, 0.380409, 0.386319, 0.404199, 0.435029, 0.496479", \ + "0.388689, 0.390719, 0.393059, 0.398969, 0.416849, 0.447679, 0.509129", \ + "0.407909, 0.409939, 0.412279, 0.418189, 0.436069, 0.466899, 0.528349" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305635, 0.307785, 0.310055, 0.315765, 0.333935, 0.364295, 0.425575", \ + "0.305595, 0.307745, 0.310015, 0.315725, 0.333895, 0.364255, 0.425535", \ + "0.307195, 0.309345, 0.311615, 0.317325, 0.335495, 0.365855, 0.427135", \ + "0.312835, 0.314985, 0.317255, 0.322965, 0.341135, 0.371495, 0.432775", \ + "0.321755, 0.323905, 0.326175, 0.331885, 0.350055, 0.380415, 0.441695", \ + "0.333885, 0.336035, 0.338305, 0.344015, 0.362185, 0.392545, 0.453825", \ + "0.353065, 0.355215, 0.357485, 0.363195, 0.381365, 0.411725, 0.473005" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.333175, 0.336595, 0.339425, 0.347935, 0.374065, 0.417865, 0.505905", \ + "0.333675, 0.337095, 0.339925, 0.348435, 0.374565, 0.418365, 0.506405", \ + "0.335705, 0.339125, 0.341955, 0.350465, 0.376595, 0.420395, 0.508435", \ + "0.340335, 0.343755, 0.346585, 0.355095, 0.381225, 0.425025, 0.513065", \ + "0.349205, 0.352625, 0.355455, 0.363965, 0.390095, 0.433895, 0.521935", \ + "0.362015, 0.365435, 0.368265, 0.376775, 0.402905, 0.446705, 0.534745", \ + "0.381735, 0.385155, 0.387985, 0.396495, 0.422625, 0.466425, 0.554465" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.282756, 0.286127, 0.289036, 0.297287, 0.323176, 0.367427, 0.455457", \ + "0.283046, 0.286416, 0.289327, 0.297576, 0.323467, 0.367717, 0.455746", \ + "0.285007, 0.288376, 0.291287, 0.299537, 0.325427, 0.369676, 0.457706", \ + "0.289816, 0.293186, 0.296097, 0.304346, 0.330237, 0.374487, 0.462517", \ + "0.298937, 0.302306, 0.305217, 0.313466, 0.339357, 0.383606, 0.471636", \ + "0.310356, 0.313726, 0.316637, 0.324886, 0.350777, 0.395027, 0.483056", \ + "0.329656, 0.333027, 0.335936, 0.344187, 0.370076, 0.414327, 0.502357" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.360821, 0.362851, 0.365191, 0.371101, 0.388981, 0.419811, 0.481261", \ + "0.361011, 0.363041, 0.365381, 0.371291, 0.389171, 0.420001, 0.481451", \ + "0.362611, 0.364641, 0.366981, 0.372891, 0.390771, 0.421601, 0.483051", \ + "0.368081, 0.370111, 0.372451, 0.378361, 0.396241, 0.427071, 0.488521", \ + "0.376701, 0.378731, 0.381071, 0.386981, 0.404861, 0.435691, 0.497141", \ + "0.389351, 0.391381, 0.393721, 0.399631, 0.417511, 0.448341, 0.509791", \ + "0.408571, 0.410601, 0.412941, 0.418851, 0.436731, 0.467561, 0.529011" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.306202, 0.308352, 0.310622, 0.316332, 0.334502, 0.364862, 0.426142", \ + "0.306162, 0.308312, 0.310582, 0.316292, 0.334462, 0.364822, 0.426102", \ + "0.307762, 0.309912, 0.312182, 0.317892, 0.336062, 0.366422, 0.427702", \ + "0.313402, 0.315552, 0.317822, 0.323532, 0.341702, 0.372062, 0.433342", \ + "0.322322, 0.324472, 0.326742, 0.332452, 0.350622, 0.380982, 0.442262", \ + "0.334452, 0.336602, 0.338872, 0.344582, 0.362752, 0.393112, 0.454392", \ + "0.353632, 0.355782, 0.358052, 0.363762, 0.381932, 0.412292, 0.473572" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.333842, 0.337262, 0.340092, 0.348602, 0.374732, 0.418532, 0.506572", \ + "0.334342, 0.337762, 0.340592, 0.349102, 0.375232, 0.419032, 0.507072", \ + "0.336372, 0.339792, 0.342622, 0.351132, 0.377262, 0.421062, 0.509102", \ + "0.341002, 0.344422, 0.347252, 0.355762, 0.381892, 0.425692, 0.513732", \ + "0.349872, 0.353292, 0.356122, 0.364632, 0.390762, 0.434562, 0.522602", \ + "0.362682, 0.366102, 0.368932, 0.377442, 0.403572, 0.447372, 0.535412", \ + "0.382402, 0.385822, 0.388652, 0.397162, 0.423292, 0.467092, 0.555132" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.283323, 0.286693, 0.289603, 0.297853, 0.323743, 0.367993, 0.456023", \ + "0.283613, 0.286983, 0.289893, 0.298143, 0.324033, 0.368283, 0.456313", \ + "0.285573, 0.288943, 0.291853, 0.300103, 0.325993, 0.370243, 0.458273", \ + "0.290383, 0.293753, 0.296663, 0.304913, 0.330803, 0.375053, 0.463083", \ + "0.299503, 0.302873, 0.305783, 0.314033, 0.339923, 0.384173, 0.472203", \ + "0.310923, 0.314293, 0.317203, 0.325453, 0.351343, 0.395593, 0.483623", \ + "0.330223, 0.333593, 0.336503, 0.344753, 0.370643, 0.414893, 0.502923" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.418554, 0.420584, 0.422924, 0.428834, 0.446714, 0.477544, 0.538994", \ + "0.418744, 0.420774, 0.423114, 0.429024, 0.446904, 0.477734, 0.539184", \ + "0.420344, 0.422374, 0.424714, 0.430624, 0.448504, 0.479334, 0.540784", \ + "0.425814, 0.427844, 0.430184, 0.436094, 0.453974, 0.484804, 0.546254", \ + "0.434434, 0.436464, 0.438804, 0.444714, 0.462594, 0.493424, 0.554874", \ + "0.447084, 0.449114, 0.451454, 0.457364, 0.475244, 0.506074, 0.567524", \ + "0.466304, 0.468334, 0.470674, 0.476584, 0.494464, 0.525294, 0.586744" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.355270, 0.357420, 0.359690, 0.365400, 0.383570, 0.413930, 0.475210", \ + "0.355230, 0.357380, 0.359650, 0.365360, 0.383530, 0.413890, 0.475170", \ + "0.356830, 0.358980, 0.361250, 0.366960, 0.385130, 0.415490, 0.476770", \ + "0.362470, 0.364620, 0.366890, 0.372600, 0.390770, 0.421130, 0.482410", \ + "0.371390, 0.373540, 0.375810, 0.381520, 0.399690, 0.430050, 0.491330", \ + "0.383520, 0.385670, 0.387940, 0.393650, 0.411820, 0.442180, 0.503460", \ + "0.402700, 0.404850, 0.407120, 0.412830, 0.431000, 0.461360, 0.522640" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.391570, 0.394990, 0.397820, 0.406330, 0.432460, 0.476260, 0.564300", \ + "0.392070, 0.395490, 0.398320, 0.406830, 0.432960, 0.476760, 0.564800", \ + "0.394100, 0.397520, 0.400350, 0.408860, 0.434990, 0.478790, 0.566830", \ + "0.398730, 0.402150, 0.404980, 0.413490, 0.439620, 0.483420, 0.571460", \ + "0.407600, 0.411020, 0.413850, 0.422360, 0.448490, 0.492290, 0.580330", \ + "0.420410, 0.423830, 0.426660, 0.435170, 0.461300, 0.505100, 0.593140", \ + "0.440130, 0.443550, 0.446380, 0.454890, 0.481020, 0.524820, 0.612860" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.332388, 0.335758, 0.338668, 0.346918, 0.372808, 0.417058, 0.505088", \ + "0.332678, 0.336048, 0.338958, 0.347208, 0.373098, 0.417348, 0.505378", \ + "0.334638, 0.338008, 0.340918, 0.349168, 0.375058, 0.419308, 0.507338", \ + "0.339448, 0.342818, 0.345728, 0.353978, 0.379868, 0.424118, 0.512148", \ + "0.348568, 0.351938, 0.354848, 0.363098, 0.388988, 0.433237, 0.521268", \ + "0.359988, 0.363358, 0.366268, 0.374518, 0.400408, 0.444658, 0.532688", \ + "0.379288, 0.382658, 0.385568, 0.393818, 0.419708, 0.463958, 0.551987" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.470293, 0.472323, 0.474663, 0.480573, 0.498453, 0.529283, 0.590733", \ + "0.470483, 0.472513, 0.474853, 0.480763, 0.498643, 0.529473, 0.590923", \ + "0.472083, 0.474113, 0.476453, 0.482363, 0.500243, 0.531073, 0.592523", \ + "0.477553, 0.479583, 0.481923, 0.487833, 0.505713, 0.536543, 0.597993", \ + "0.486173, 0.488203, 0.490543, 0.496453, 0.514333, 0.545163, 0.606613", \ + "0.498823, 0.500853, 0.503193, 0.509103, 0.526983, 0.557813, 0.619263", \ + "0.518043, 0.520073, 0.522413, 0.528323, 0.546203, 0.577033, 0.638483" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.399253, 0.401403, 0.403673, 0.409383, 0.427553, 0.457912, 0.519192", \ + "0.399213, 0.401363, 0.403633, 0.409343, 0.427513, 0.457873, 0.519153", \ + "0.400813, 0.402963, 0.405233, 0.410943, 0.429113, 0.459472, 0.520752", \ + "0.406453, 0.408603, 0.410873, 0.416583, 0.434753, 0.465113, 0.526393", \ + "0.415373, 0.417523, 0.419793, 0.425503, 0.443673, 0.474033, 0.535313", \ + "0.427503, 0.429653, 0.431923, 0.437633, 0.455803, 0.486163, 0.547443", \ + "0.446683, 0.448833, 0.451103, 0.456813, 0.474983, 0.505343, 0.566623" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.443314, 0.446734, 0.449564, 0.458074, 0.484204, 0.528004, 0.616044", \ + "0.443814, 0.447234, 0.450064, 0.458574, 0.484704, 0.528504, 0.616544", \ + "0.445844, 0.449264, 0.452094, 0.460604, 0.486734, 0.530534, 0.618574", \ + "0.450474, 0.453894, 0.456724, 0.465234, 0.491364, 0.535164, 0.623204", \ + "0.459344, 0.462764, 0.465594, 0.474104, 0.500234, 0.544034, 0.632074", \ + "0.472154, 0.475574, 0.478404, 0.486914, 0.513044, 0.556844, 0.644884", \ + "0.491874, 0.495294, 0.498124, 0.506634, 0.532764, 0.576564, 0.664604" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.376374, 0.379744, 0.382654, 0.390904, 0.416794, 0.461044, 0.549074", \ + "0.376664, 0.380034, 0.382944, 0.391194, 0.417084, 0.461334, 0.549364", \ + "0.378624, 0.381994, 0.384904, 0.393154, 0.419044, 0.463294, 0.551324", \ + "0.383434, 0.386804, 0.389714, 0.397964, 0.423854, 0.468104, 0.556134", \ + "0.392554, 0.395924, 0.398834, 0.407084, 0.432974, 0.477224, 0.565254", \ + "0.403974, 0.407344, 0.410254, 0.418504, 0.444394, 0.488644, 0.576674", \ + "0.423274, 0.426644, 0.429554, 0.437804, 0.463693, 0.507944, 0.595973" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.526418, 0.528448, 0.530788, 0.536698, 0.554578, 0.585408, 0.646858", \ + "0.526608, 0.528638, 0.530978, 0.536888, 0.554768, 0.585598, 0.647048", \ + "0.528208, 0.530238, 0.532578, 0.538488, 0.556368, 0.587198, 0.648648", \ + "0.533678, 0.535708, 0.538048, 0.543958, 0.561838, 0.592668, 0.654118", \ + "0.542298, 0.544328, 0.546668, 0.552578, 0.570458, 0.601288, 0.662738", \ + "0.554948, 0.556978, 0.559318, 0.565228, 0.583108, 0.613938, 0.675388", \ + "0.574168, 0.576198, 0.578538, 0.584448, 0.602328, 0.633158, 0.694608" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.446955, 0.449105, 0.451375, 0.457085, 0.475255, 0.505615, 0.566895", \ + "0.446915, 0.449065, 0.451335, 0.457045, 0.475215, 0.505575, 0.566855", \ + "0.448515, 0.450665, 0.452935, 0.458645, 0.476815, 0.507175, 0.568455", \ + "0.454155, 0.456305, 0.458575, 0.464285, 0.482455, 0.512815, 0.574095", \ + "0.463075, 0.465225, 0.467495, 0.473205, 0.491375, 0.521735, 0.583015", \ + "0.475205, 0.477355, 0.479625, 0.485335, 0.503505, 0.533865, 0.595145", \ + "0.494385, 0.496535, 0.498805, 0.504515, 0.522685, 0.553045, 0.614325" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.499434, 0.502854, 0.505684, 0.514194, 0.540324, 0.584124, 0.672164", \ + "0.499934, 0.503354, 0.506184, 0.514694, 0.540824, 0.584624, 0.672664", \ + "0.501964, 0.505384, 0.508214, 0.516724, 0.542854, 0.586654, 0.674694", \ + "0.506594, 0.510014, 0.512844, 0.521354, 0.547484, 0.591284, 0.679324", \ + "0.515464, 0.518884, 0.521714, 0.530224, 0.556354, 0.600154, 0.688194", \ + "0.528274, 0.531694, 0.534524, 0.543034, 0.569164, 0.612964, 0.701004", \ + "0.547994, 0.551414, 0.554244, 0.562754, 0.588884, 0.632684, 0.720724" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.424077, 0.427447, 0.430357, 0.438607, 0.464497, 0.508747, 0.596777", \ + "0.424367, 0.427737, 0.430647, 0.438897, 0.464787, 0.509037, 0.597067", \ + "0.426327, 0.429697, 0.432607, 0.440857, 0.466747, 0.510997, 0.599027", \ + "0.431137, 0.434507, 0.437417, 0.445667, 0.471557, 0.515807, 0.603837", \ + "0.440257, 0.443627, 0.446537, 0.454787, 0.480677, 0.524927, 0.612957", \ + "0.451677, 0.455047, 0.457957, 0.466207, 0.492097, 0.536347, 0.624377", \ + "0.470977, 0.474347, 0.477257, 0.485507, 0.511397, 0.555647, 0.643677" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&!DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b0 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.577584, 0.579614, 0.581954, 0.587864, 0.605744, 0.636574, 0.698024", \ + "0.577774, 0.579804, 0.582144, 0.588054, 0.605934, 0.636764, 0.698214", \ + "0.579374, 0.581404, 0.583744, 0.589654, 0.607534, 0.638364, 0.699814", \ + "0.584844, 0.586874, 0.589214, 0.595124, 0.613004, 0.643834, 0.705284", \ + "0.593464, 0.595494, 0.597834, 0.603744, 0.621624, 0.652454, 0.713904", \ + "0.606114, 0.608144, 0.610484, 0.616394, 0.634274, 0.665104, 0.726554", \ + "0.625334, 0.627364, 0.629704, 0.635614, 0.653494, 0.684324, 0.745774" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.490450, 0.492601, 0.494871, 0.500581, 0.518750, 0.549110, 0.610390", \ + "0.490411, 0.492560, 0.494830, 0.500541, 0.518710, 0.549071, 0.610351", \ + "0.492010, 0.494161, 0.496431, 0.502141, 0.520310, 0.550670, 0.611950", \ + "0.497651, 0.499801, 0.502071, 0.507780, 0.525951, 0.556310, 0.617590", \ + "0.506571, 0.508720, 0.510990, 0.516701, 0.534871, 0.565231, 0.626511", \ + "0.518701, 0.520851, 0.523121, 0.528831, 0.547001, 0.577360, 0.638640", \ + "0.537881, 0.540031, 0.542300, 0.548010, 0.566181, 0.596540, 0.657820" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.550600, 0.554020, 0.556850, 0.565360, 0.591490, 0.635290, 0.723330", \ + "0.551100, 0.554520, 0.557350, 0.565860, 0.591990, 0.635790, 0.723830", \ + "0.553130, 0.556550, 0.559380, 0.567890, 0.594020, 0.637820, 0.725860", \ + "0.557760, 0.561180, 0.564010, 0.572520, 0.598650, 0.642450, 0.730490", \ + "0.566630, 0.570050, 0.572880, 0.581390, 0.607520, 0.651320, 0.739360", \ + "0.579440, 0.582860, 0.585690, 0.594200, 0.620330, 0.664130, 0.752170", \ + "0.599160, 0.602580, 0.605410, 0.613920, 0.640050, 0.683850, 0.771890" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467571, 0.470942, 0.473852, 0.482102, 0.507992, 0.552242, 0.640272", \ + "0.467862, 0.471231, 0.474142, 0.482392, 0.508282, 0.552532, 0.640562", \ + "0.469822, 0.473192, 0.476102, 0.484352, 0.510242, 0.554492, 0.642522", \ + "0.474632, 0.478002, 0.480912, 0.489162, 0.515052, 0.559302, 0.647332", \ + "0.483752, 0.487122, 0.490032, 0.498282, 0.524172, 0.568422, 0.656452", \ + "0.495172, 0.498542, 0.501452, 0.509702, 0.535592, 0.579842, 0.667872", \ + "0.514472, 0.517842, 0.520752, 0.529002, 0.554892, 0.599142, 0.687172" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.358116, 0.360146, 0.362486, 0.368396, 0.386276, 0.417106, 0.478556", \ + "0.358306, 0.360336, 0.362676, 0.368586, 0.386466, 0.417296, 0.478746", \ + "0.359906, 0.361936, 0.364276, 0.370186, 0.388066, 0.418896, 0.480346", \ + "0.365376, 0.367406, 0.369746, 0.375656, 0.393536, 0.424366, 0.485816", \ + "0.373996, 0.376026, 0.378366, 0.384276, 0.402156, 0.432986, 0.494436", \ + "0.386646, 0.388676, 0.391016, 0.396926, 0.414806, 0.445636, 0.507086", \ + "0.405866, 0.407896, 0.410236, 0.416146, 0.434026, 0.464856, 0.526306" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.303902, 0.306052, 0.308322, 0.314032, 0.332202, 0.362562, 0.423842", \ + "0.303862, 0.306012, 0.308282, 0.313992, 0.332162, 0.362522, 0.423802", \ + "0.305462, 0.307612, 0.309882, 0.315592, 0.333762, 0.364122, 0.425402", \ + "0.311102, 0.313252, 0.315522, 0.321232, 0.339402, 0.369762, 0.431042", \ + "0.320022, 0.322172, 0.324442, 0.330152, 0.348322, 0.378682, 0.439962", \ + "0.332152, 0.334302, 0.336572, 0.342282, 0.360452, 0.390812, 0.452092", \ + "0.351332, 0.353482, 0.355752, 0.361462, 0.379632, 0.409992, 0.471272" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.331132, 0.334552, 0.337382, 0.345892, 0.372022, 0.415822, 0.503862", \ + "0.331632, 0.335052, 0.337882, 0.346392, 0.372522, 0.416322, 0.504362", \ + "0.333662, 0.337082, 0.339912, 0.348422, 0.374552, 0.418352, 0.506392", \ + "0.338292, 0.341712, 0.344542, 0.353052, 0.379182, 0.422982, 0.511022", \ + "0.347162, 0.350582, 0.353412, 0.361922, 0.388052, 0.431852, 0.519892", \ + "0.359972, 0.363392, 0.366222, 0.374732, 0.400862, 0.444662, 0.532702", \ + "0.379692, 0.383112, 0.385942, 0.394452, 0.420582, 0.464382, 0.552422" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.281023, 0.284394, 0.287304, 0.295554, 0.321444, 0.365694, 0.453723", \ + "0.281314, 0.284683, 0.287594, 0.295844, 0.321734, 0.365984, 0.454014", \ + "0.283274, 0.286644, 0.289554, 0.297804, 0.323694, 0.367943, 0.455974", \ + "0.288084, 0.291454, 0.294364, 0.302613, 0.328504, 0.372754, 0.460784", \ + "0.297204, 0.300574, 0.303484, 0.311734, 0.337624, 0.381873, 0.469904", \ + "0.308624, 0.311994, 0.314904, 0.323153, 0.349044, 0.393294, 0.481324", \ + "0.327924, 0.331294, 0.334203, 0.342454, 0.368344, 0.412594, 0.500623" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.359181, 0.361211, 0.363551, 0.369461, 0.387341, 0.418171, 0.479621", \ + "0.359371, 0.361401, 0.363741, 0.369651, 0.387531, 0.418361, 0.479811", \ + "0.360971, 0.363001, 0.365341, 0.371251, 0.389131, 0.419961, 0.481411", \ + "0.366441, 0.368471, 0.370811, 0.376721, 0.394601, 0.425431, 0.486881", \ + "0.375061, 0.377091, 0.379431, 0.385341, 0.403221, 0.434051, 0.495501", \ + "0.387711, 0.389741, 0.392081, 0.397991, 0.415871, 0.446701, 0.508151", \ + "0.406931, 0.408961, 0.411301, 0.417211, 0.435091, 0.465921, 0.527371" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.304803, 0.306953, 0.309223, 0.314933, 0.333103, 0.363463, 0.424743", \ + "0.304763, 0.306913, 0.309183, 0.314893, 0.333063, 0.363423, 0.424703", \ + "0.306363, 0.308513, 0.310783, 0.316493, 0.334663, 0.365023, 0.426303", \ + "0.312003, 0.314153, 0.316423, 0.322133, 0.340303, 0.370663, 0.431943", \ + "0.320923, 0.323073, 0.325343, 0.331053, 0.349223, 0.379583, 0.440863", \ + "0.333053, 0.335203, 0.337473, 0.343183, 0.361353, 0.391713, 0.452993", \ + "0.352233, 0.354383, 0.356653, 0.362363, 0.380533, 0.410893, 0.472173" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.332197, 0.335618, 0.338448, 0.346958, 0.373088, 0.416888, 0.504927", \ + "0.332697, 0.336118, 0.338948, 0.347458, 0.373588, 0.417388, 0.505428", \ + "0.334728, 0.338147, 0.340977, 0.349488, 0.375617, 0.419417, 0.507458", \ + "0.339357, 0.342778, 0.345608, 0.354118, 0.380248, 0.424048, 0.512088", \ + "0.348228, 0.351648, 0.354478, 0.362988, 0.389118, 0.432918, 0.520957", \ + "0.361038, 0.364457, 0.367287, 0.375798, 0.401927, 0.445727, 0.533767", \ + "0.380758, 0.384178, 0.387008, 0.395518, 0.421648, 0.465448, 0.553488" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.281925, 0.285295, 0.288205, 0.296455, 0.322345, 0.366595, 0.454625", \ + "0.282215, 0.285585, 0.288495, 0.296745, 0.322635, 0.366885, 0.454915", \ + "0.284175, 0.287545, 0.290455, 0.298705, 0.324595, 0.368845, 0.456875", \ + "0.288985, 0.292355, 0.295265, 0.303515, 0.329405, 0.373655, 0.461685", \ + "0.298105, 0.301475, 0.304385, 0.312635, 0.338525, 0.382775, 0.470805", \ + "0.309525, 0.312895, 0.315805, 0.324055, 0.349945, 0.394195, 0.482224", \ + "0.328825, 0.332195, 0.335105, 0.343355, 0.369245, 0.413495, 0.501524" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.360159, 0.362189, 0.364529, 0.370439, 0.388319, 0.419149, 0.480599", \ + "0.360349, 0.362379, 0.364719, 0.370629, 0.388509, 0.419339, 0.480789", \ + "0.361949, 0.363979, 0.366319, 0.372229, 0.390109, 0.420939, 0.482389", \ + "0.367419, 0.369449, 0.371789, 0.377699, 0.395579, 0.426409, 0.487859", \ + "0.376039, 0.378069, 0.380409, 0.386319, 0.404199, 0.435029, 0.496479", \ + "0.388689, 0.390719, 0.393059, 0.398969, 0.416849, 0.447679, 0.509129", \ + "0.407909, 0.409939, 0.412279, 0.418189, 0.436069, 0.466899, 0.528349" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.305635, 0.307785, 0.310055, 0.315765, 0.333935, 0.364295, 0.425575", \ + "0.305595, 0.307745, 0.310015, 0.315725, 0.333895, 0.364255, 0.425535", \ + "0.307195, 0.309345, 0.311615, 0.317325, 0.335495, 0.365855, 0.427135", \ + "0.312835, 0.314985, 0.317255, 0.322965, 0.341135, 0.371495, 0.432775", \ + "0.321755, 0.323905, 0.326175, 0.331885, 0.350055, 0.380415, 0.441695", \ + "0.333885, 0.336035, 0.338305, 0.344015, 0.362185, 0.392545, 0.453825", \ + "0.353065, 0.355215, 0.357485, 0.363195, 0.381365, 0.411725, 0.473005" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.333175, 0.336595, 0.339425, 0.347935, 0.374065, 0.417865, 0.505905", \ + "0.333675, 0.337095, 0.339925, 0.348435, 0.374565, 0.418365, 0.506405", \ + "0.335705, 0.339125, 0.341955, 0.350465, 0.376595, 0.420395, 0.508435", \ + "0.340335, 0.343755, 0.346585, 0.355095, 0.381225, 0.425025, 0.513065", \ + "0.349205, 0.352625, 0.355455, 0.363965, 0.390095, 0.433895, 0.521935", \ + "0.362015, 0.365435, 0.368265, 0.376775, 0.402905, 0.446705, 0.534745", \ + "0.381735, 0.385155, 0.387985, 0.396495, 0.422625, 0.466425, 0.554465" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.282756, 0.286127, 0.289036, 0.297287, 0.323176, 0.367427, 0.455457", \ + "0.283046, 0.286416, 0.289327, 0.297576, 0.323467, 0.367717, 0.455746", \ + "0.285007, 0.288376, 0.291287, 0.299537, 0.325427, 0.369676, 0.457706", \ + "0.289816, 0.293186, 0.296097, 0.304346, 0.330237, 0.374487, 0.462517", \ + "0.298937, 0.302306, 0.305217, 0.313466, 0.339357, 0.383606, 0.471636", \ + "0.310356, 0.313726, 0.316637, 0.324886, 0.350777, 0.395027, 0.483056", \ + "0.329656, 0.333027, 0.335936, 0.344187, 0.370076, 0.414327, 0.502357" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b0 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.360821, 0.362851, 0.365191, 0.371101, 0.388981, 0.419811, 0.481261", \ + "0.361011, 0.363041, 0.365381, 0.371291, 0.389171, 0.420001, 0.481451", \ + "0.362611, 0.364641, 0.366981, 0.372891, 0.390771, 0.421601, 0.483051", \ + "0.368081, 0.370111, 0.372451, 0.378361, 0.396241, 0.427071, 0.488521", \ + "0.376701, 0.378731, 0.381071, 0.386981, 0.404861, 0.435691, 0.497141", \ + "0.389351, 0.391381, 0.393721, 0.399631, 0.417511, 0.448341, 0.509791", \ + "0.408571, 0.410601, 0.412941, 0.418851, 0.436731, 0.467561, 0.529011" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.306202, 0.308352, 0.310622, 0.316332, 0.334502, 0.364862, 0.426142", \ + "0.306162, 0.308312, 0.310582, 0.316292, 0.334462, 0.364822, 0.426102", \ + "0.307762, 0.309912, 0.312182, 0.317892, 0.336062, 0.366422, 0.427702", \ + "0.313402, 0.315552, 0.317822, 0.323532, 0.341702, 0.372062, 0.433342", \ + "0.322322, 0.324472, 0.326742, 0.332452, 0.350622, 0.380982, 0.442262", \ + "0.334452, 0.336602, 0.338872, 0.344582, 0.362752, 0.393112, 0.454392", \ + "0.353632, 0.355782, 0.358052, 0.363762, 0.381932, 0.412292, 0.473572" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.333842, 0.337262, 0.340092, 0.348602, 0.374732, 0.418532, 0.506572", \ + "0.334342, 0.337762, 0.340592, 0.349102, 0.375232, 0.419032, 0.507072", \ + "0.336372, 0.339792, 0.342622, 0.351132, 0.377262, 0.421062, 0.509102", \ + "0.341002, 0.344422, 0.347252, 0.355762, 0.381892, 0.425692, 0.513732", \ + "0.349872, 0.353292, 0.356122, 0.364632, 0.390762, 0.434562, 0.522602", \ + "0.362682, 0.366102, 0.368932, 0.377442, 0.403572, 0.447372, 0.535412", \ + "0.382402, 0.385822, 0.388652, 0.397162, 0.423292, 0.467092, 0.555132" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.283323, 0.286693, 0.289603, 0.297853, 0.323743, 0.367993, 0.456023", \ + "0.283613, 0.286983, 0.289893, 0.298143, 0.324033, 0.368283, 0.456313", \ + "0.285573, 0.288943, 0.291853, 0.300103, 0.325993, 0.370243, 0.458273", \ + "0.290383, 0.293753, 0.296663, 0.304913, 0.330803, 0.375053, 0.463083", \ + "0.299503, 0.302873, 0.305783, 0.314033, 0.339923, 0.384173, 0.472203", \ + "0.310923, 0.314293, 0.317203, 0.325453, 0.351343, 0.395593, 0.483623", \ + "0.330223, 0.333593, 0.336503, 0.344753, 0.370643, 0.414893, 0.502923" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.418554, 0.420584, 0.422924, 0.428834, 0.446714, 0.477544, 0.538994", \ + "0.418744, 0.420774, 0.423114, 0.429024, 0.446904, 0.477734, 0.539184", \ + "0.420344, 0.422374, 0.424714, 0.430624, 0.448504, 0.479334, 0.540784", \ + "0.425814, 0.427844, 0.430184, 0.436094, 0.453974, 0.484804, 0.546254", \ + "0.434434, 0.436464, 0.438804, 0.444714, 0.462594, 0.493424, 0.554874", \ + "0.447084, 0.449114, 0.451454, 0.457364, 0.475244, 0.506074, 0.567524", \ + "0.466304, 0.468334, 0.470674, 0.476584, 0.494464, 0.525294, 0.586744" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.355270, 0.357420, 0.359690, 0.365400, 0.383570, 0.413930, 0.475210", \ + "0.355230, 0.357380, 0.359650, 0.365360, 0.383530, 0.413890, 0.475170", \ + "0.356830, 0.358980, 0.361250, 0.366960, 0.385130, 0.415490, 0.476770", \ + "0.362470, 0.364620, 0.366890, 0.372600, 0.390770, 0.421130, 0.482410", \ + "0.371390, 0.373540, 0.375810, 0.381520, 0.399690, 0.430050, 0.491330", \ + "0.383520, 0.385670, 0.387940, 0.393650, 0.411820, 0.442180, 0.503460", \ + "0.402700, 0.404850, 0.407120, 0.412830, 0.431000, 0.461360, 0.522640" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.391570, 0.394990, 0.397820, 0.406330, 0.432460, 0.476260, 0.564300", \ + "0.392070, 0.395490, 0.398320, 0.406830, 0.432960, 0.476760, 0.564800", \ + "0.394100, 0.397520, 0.400350, 0.408860, 0.434990, 0.478790, 0.566830", \ + "0.398730, 0.402150, 0.404980, 0.413490, 0.439620, 0.483420, 0.571460", \ + "0.407600, 0.411020, 0.413850, 0.422360, 0.448490, 0.492290, 0.580330", \ + "0.420410, 0.423830, 0.426660, 0.435170, 0.461300, 0.505100, 0.593140", \ + "0.440130, 0.443550, 0.446380, 0.454890, 0.481020, 0.524820, 0.612860" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.332388, 0.335758, 0.338668, 0.346918, 0.372808, 0.417058, 0.505088", \ + "0.332678, 0.336048, 0.338958, 0.347208, 0.373098, 0.417348, 0.505378", \ + "0.334638, 0.338008, 0.340918, 0.349168, 0.375058, 0.419308, 0.507338", \ + "0.339448, 0.342818, 0.345728, 0.353978, 0.379868, 0.424118, 0.512148", \ + "0.348568, 0.351938, 0.354848, 0.363098, 0.388988, 0.433237, 0.521268", \ + "0.359988, 0.363358, 0.366268, 0.374518, 0.400408, 0.444658, 0.532688", \ + "0.379288, 0.382658, 0.385568, 0.393818, 0.419708, 0.463958, 0.551987" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b0 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.470293, 0.472323, 0.474663, 0.480573, 0.498453, 0.529283, 0.590733", \ + "0.470483, 0.472513, 0.474853, 0.480763, 0.498643, 0.529473, 0.590923", \ + "0.472083, 0.474113, 0.476453, 0.482363, 0.500243, 0.531073, 0.592523", \ + "0.477553, 0.479583, 0.481923, 0.487833, 0.505713, 0.536543, 0.597993", \ + "0.486173, 0.488203, 0.490543, 0.496453, 0.514333, 0.545163, 0.606613", \ + "0.498823, 0.500853, 0.503193, 0.509103, 0.526983, 0.557813, 0.619263", \ + "0.518043, 0.520073, 0.522413, 0.528323, 0.546203, 0.577033, 0.638483" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.399253, 0.401403, 0.403673, 0.409383, 0.427553, 0.457912, 0.519192", \ + "0.399213, 0.401363, 0.403633, 0.409343, 0.427513, 0.457873, 0.519153", \ + "0.400813, 0.402963, 0.405233, 0.410943, 0.429113, 0.459472, 0.520752", \ + "0.406453, 0.408603, 0.410873, 0.416583, 0.434753, 0.465113, 0.526393", \ + "0.415373, 0.417523, 0.419793, 0.425503, 0.443673, 0.474033, 0.535313", \ + "0.427503, 0.429653, 0.431923, 0.437633, 0.455803, 0.486163, 0.547443", \ + "0.446683, 0.448833, 0.451103, 0.456813, 0.474983, 0.505343, 0.566623" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.443314, 0.446734, 0.449564, 0.458074, 0.484204, 0.528004, 0.616044", \ + "0.443814, 0.447234, 0.450064, 0.458574, 0.484704, 0.528504, 0.616544", \ + "0.445844, 0.449264, 0.452094, 0.460604, 0.486734, 0.530534, 0.618574", \ + "0.450474, 0.453894, 0.456724, 0.465234, 0.491364, 0.535164, 0.623204", \ + "0.459344, 0.462764, 0.465594, 0.474104, 0.500234, 0.544034, 0.632074", \ + "0.472154, 0.475574, 0.478404, 0.486914, 0.513044, 0.556844, 0.644884", \ + "0.491874, 0.495294, 0.498124, 0.506634, 0.532764, 0.576564, 0.664604" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.376374, 0.379744, 0.382654, 0.390904, 0.416794, 0.461044, 0.549074", \ + "0.376664, 0.380034, 0.382944, 0.391194, 0.417084, 0.461334, 0.549364", \ + "0.378624, 0.381994, 0.384904, 0.393154, 0.419044, 0.463294, 0.551324", \ + "0.383434, 0.386804, 0.389714, 0.397964, 0.423854, 0.468104, 0.556134", \ + "0.392554, 0.395924, 0.398834, 0.407084, 0.432974, 0.477224, 0.565254", \ + "0.403974, 0.407344, 0.410254, 0.418504, 0.444394, 0.488644, 0.576674", \ + "0.423274, 0.426644, 0.429554, 0.437804, 0.463693, 0.507944, 0.595973" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b0"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.526418, 0.528448, 0.530788, 0.536698, 0.554578, 0.585408, 0.646858", \ + "0.526608, 0.528638, 0.530978, 0.536888, 0.554768, 0.585598, 0.647048", \ + "0.528208, 0.530238, 0.532578, 0.538488, 0.556368, 0.587198, 0.648648", \ + "0.533678, 0.535708, 0.538048, 0.543958, 0.561838, 0.592668, 0.654118", \ + "0.542298, 0.544328, 0.546668, 0.552578, 0.570458, 0.601288, 0.662738", \ + "0.554948, 0.556978, 0.559318, 0.565228, 0.583108, 0.613938, 0.675388", \ + "0.574168, 0.576198, 0.578538, 0.584448, 0.602328, 0.633158, 0.694608" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.446955, 0.449105, 0.451375, 0.457085, 0.475255, 0.505615, 0.566895", \ + "0.446915, 0.449065, 0.451335, 0.457045, 0.475215, 0.505575, 0.566855", \ + "0.448515, 0.450665, 0.452935, 0.458645, 0.476815, 0.507175, 0.568455", \ + "0.454155, 0.456305, 0.458575, 0.464285, 0.482455, 0.512815, 0.574095", \ + "0.463075, 0.465225, 0.467495, 0.473205, 0.491375, 0.521735, 0.583015", \ + "0.475205, 0.477355, 0.479625, 0.485335, 0.503505, 0.533865, 0.595145", \ + "0.494385, 0.496535, 0.498805, 0.504515, 0.522685, 0.553045, 0.614325" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.499434, 0.502854, 0.505684, 0.514194, 0.540324, 0.584124, 0.672164", \ + "0.499934, 0.503354, 0.506184, 0.514694, 0.540824, 0.584624, 0.672664", \ + "0.501964, 0.505384, 0.508214, 0.516724, 0.542854, 0.586654, 0.674694", \ + "0.506594, 0.510014, 0.512844, 0.521354, 0.547484, 0.591284, 0.679324", \ + "0.515464, 0.518884, 0.521714, 0.530224, 0.556354, 0.600154, 0.688194", \ + "0.528274, 0.531694, 0.534524, 0.543034, 0.569164, 0.612964, 0.701004", \ + "0.547994, 0.551414, 0.554244, 0.562754, 0.588884, 0.632684, 0.720724" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.424077, 0.427447, 0.430357, 0.438607, 0.464497, 0.508747, 0.596777", \ + "0.424367, 0.427737, 0.430647, 0.438897, 0.464787, 0.509037, 0.597067", \ + "0.426327, 0.429697, 0.432607, 0.440857, 0.466747, 0.510997, 0.599027", \ + "0.431137, 0.434507, 0.437417, 0.445667, 0.471557, 0.515807, 0.603837", \ + "0.440257, 0.443627, 0.446537, 0.454787, 0.480677, 0.524927, 0.612957", \ + "0.451677, 0.455047, 0.457957, 0.466207, 0.492097, 0.536347, 0.624377", \ + "0.470977, 0.474347, 0.477257, 0.485507, 0.511397, 0.555647, 0.643677" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N&DFTRAMBYP&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "RET1N == 1'b1 && DFTRAMBYP == 1'b1 && EMAA[2] == 1'b1 && EMAA[1] == 1'b1 && \ + EMAA[0] == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.577584, 0.579614, 0.581954, 0.587864, 0.605744, 0.636574, 0.698024", \ + "0.577774, 0.579804, 0.582144, 0.588054, 0.605934, 0.636764, 0.698214", \ + "0.579374, 0.581404, 0.583744, 0.589654, 0.607534, 0.638364, 0.699814", \ + "0.584844, 0.586874, 0.589214, 0.595124, 0.613004, 0.643834, 0.705284", \ + "0.593464, 0.595494, 0.597834, 0.603744, 0.621624, 0.652454, 0.713904", \ + "0.606114, 0.608144, 0.610484, 0.616394, 0.634274, 0.665104, 0.726554", \ + "0.625334, 0.627364, 0.629704, 0.635614, 0.653494, 0.684324, 0.745774" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.490450, 0.492601, 0.494871, 0.500581, 0.518750, 0.549110, 0.610390", \ + "0.490411, 0.492560, 0.494830, 0.500541, 0.518710, 0.549071, 0.610351", \ + "0.492010, 0.494161, 0.496431, 0.502141, 0.520310, 0.550670, 0.611950", \ + "0.497651, 0.499801, 0.502071, 0.507780, 0.525951, 0.556310, 0.617590", \ + "0.506571, 0.508720, 0.510990, 0.516701, 0.534871, 0.565231, 0.626511", \ + "0.518701, 0.520851, 0.523121, 0.528831, 0.547001, 0.577360, 0.638640", \ + "0.537881, 0.540031, 0.542300, 0.548010, 0.566181, 0.596540, 0.657820" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056", \ + "0.015590, 0.019579, 0.023412, 0.033695, 0.066193, 0.122150, 0.234056" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.550600, 0.554020, 0.556850, 0.565360, 0.591490, 0.635290, 0.723330", \ + "0.551100, 0.554520, 0.557350, 0.565860, 0.591990, 0.635790, 0.723830", \ + "0.553130, 0.556550, 0.559380, 0.567890, 0.594020, 0.637820, 0.725860", \ + "0.557760, 0.561180, 0.564010, 0.572520, 0.598650, 0.642450, 0.730490", \ + "0.566630, 0.570050, 0.572880, 0.581390, 0.607520, 0.651320, 0.739360", \ + "0.579440, 0.582860, 0.585690, 0.594200, 0.620330, 0.664130, 0.752170", \ + "0.599160, 0.602580, 0.605410, 0.613920, 0.640050, 0.683850, 0.771890" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.467571, 0.470942, 0.473852, 0.482102, 0.507992, 0.552242, 0.640272", \ + "0.467862, 0.471231, 0.474142, 0.482392, 0.508282, 0.552532, 0.640562", \ + "0.469822, 0.473192, 0.476102, 0.484352, 0.510242, 0.554492, 0.642522", \ + "0.474632, 0.478002, 0.480912, 0.489162, 0.515052, 0.559302, 0.647332", \ + "0.483752, 0.487122, 0.490032, 0.498282, 0.524172, 0.568422, 0.656452", \ + "0.495172, 0.498542, 0.501452, 0.509702, 0.535592, 0.579842, 0.667872", \ + "0.514472, 0.517842, 0.520752, 0.529002, 0.554892, 0.599142, 0.687172" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415", \ + "0.019219, 0.023881, 0.029419, 0.044613, 0.091688, 0.170736, 0.327415" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&!DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + internal_power() { + related_pin : CLKA; + related_pg_pin : "VDDPE"; + when : "RET1N&DFTRAMBYP"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + } + bus(SOB) { + bus_type : rf2_32x19_wm0_SOB; + direction : output; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + power_down_function : "!VDDCE + !VDDPE + VSSE"; + max_capacitance : 0.100000; + max_transition : 0.361200; + timing() { + related_pin : CLKB; + timing_type : rising_edge; + timing_sense : non_unate; + when : "RET1N"; + sdf_cond : "RET1N == 1'b1"; + cell_rise(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.186773, 0.189883, 0.192693, 0.199193, 0.216953, 0.246453, 0.305453", \ + "0.187643, 0.190753, 0.193563, 0.200063, 0.217823, 0.247323, 0.306323", \ + "0.189953, 0.193063, 0.195873, 0.202373, 0.220133, 0.249633, 0.308633", \ + "0.194663, 0.197773, 0.200583, 0.207083, 0.224843, 0.254343, 0.313343", \ + "0.203093, 0.206203, 0.209013, 0.215513, 0.233273, 0.262773, 0.321773", \ + "0.215473, 0.218583, 0.221393, 0.227893, 0.245653, 0.275153, 0.334153", \ + "0.231643, 0.234753, 0.237563, 0.244063, 0.261823, 0.291323, 0.350323" \ + ); + } + retaining_rise(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.158451, 0.161561, 0.164361, 0.170852, 0.188632, 0.218132, 0.277122", \ + "0.158972, 0.162082, 0.164882, 0.171372, 0.189152, 0.218651, 0.277641", \ + "0.161622, 0.164732, 0.167531, 0.174021, 0.191802, 0.221302, 0.280292", \ + "0.166322, 0.169432, 0.172232, 0.178722, 0.196501, 0.226001, 0.284992", \ + "0.174771, 0.177881, 0.180681, 0.187172, 0.204952, 0.234452, 0.293442", \ + "0.187151, 0.190262, 0.193061, 0.199551, 0.217332, 0.246831, 0.305822", \ + "0.203232, 0.206342, 0.209142, 0.215631, 0.233411, 0.262912, 0.321902" \ + ); + } + rise_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806" \ + ); + } + retain_rise_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806", \ + "0.012603, 0.016257, 0.020018, 0.029719, 0.061239, 0.115056, 0.221806" \ + ); + } + cell_fall(rf2_32x19_wm0_clockslew_bistload_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.177564, 0.181834, 0.185774, 0.194984, 0.221914, 0.266884, 0.356684", \ + "0.178684, 0.182954, 0.186894, 0.196104, 0.223034, 0.268004, 0.357804", \ + "0.180684, 0.184954, 0.188894, 0.198104, 0.225034, 0.270004, 0.359804", \ + "0.185264, 0.189534, 0.193474, 0.202684, 0.229614, 0.274584, 0.364384", \ + "0.194384, 0.198654, 0.202594, 0.211804, 0.238734, 0.283704, 0.373504", \ + "0.206534, 0.210804, 0.214744, 0.223954, 0.250884, 0.295854, 0.385654", \ + "0.223124, 0.227394, 0.231334, 0.240544, 0.267474, 0.312444, 0.402244" \ + ); + } + retaining_fall(rf2_32x19_wm0_clockslew_bistload_retain_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.150762, 0.155032, 0.158912, 0.168122, 0.195042, 0.240062, 0.329812", \ + "0.151892, 0.156162, 0.160042, 0.169252, 0.196172, 0.241192, 0.330942", \ + "0.153872, 0.158142, 0.162022, 0.171232, 0.198152, 0.243172, 0.332922", \ + "0.158452, 0.162722, 0.166602, 0.175812, 0.202732, 0.247752, 0.337502", \ + "0.167592, 0.171862, 0.175742, 0.184952, 0.211872, 0.256892, 0.346642", \ + "0.179722, 0.183992, 0.187872, 0.197082, 0.224002, 0.269022, 0.358772", \ + "0.196332, 0.200602, 0.204482, 0.213692, 0.240612, 0.285632, 0.375382" \ + ); + } + fall_transition(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867" \ + ); + } + retain_fall_slew(rf2_32x19_wm0_clockslew_bistload_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867", \ + "0.014575, 0.020047, 0.025821, 0.041308, 0.089432, 0.171176, 0.332867" \ + ); + } + } + internal_power() { + related_pin : CLKB; + related_pg_pin : "VDDPE"; + when : "RET1N"; + rise_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615", \ + "0.005581, 0.005587, 0.005592, 0.005598, 0.005603, 0.005609, 0.005615" \ + ); + } + fall_power(rf2_32x19_wm0_clockslew_bistload_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.001000, 0.003000, 0.005000, 0.010000, 0.025000, 0.050000, 0.100000"); + values (\ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244", \ + "0.006207, 0.006213, 0.006219, 0.006225, 0.006231, 0.006238, 0.006244" \ + ); + } + } + } + pin(CLKA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.009116; + clock : true; + max_transition : 0.301000; + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.132286, 1.133419, 1.134734, 1.135872, 1.137005, 1.138161, 1.139300"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.132313, 1.133446, 1.134761, 1.135899, 1.137033, 1.138188, 1.139327"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.133403, 1.134535, 1.135850, 1.136988, 1.138127, 1.139278, 1.140417"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.133431, 1.134564, 1.135879, 1.137017, 1.138155, 1.139306, 1.140445"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.135942, 1.137080, 1.138395, 1.139534, 1.140673, 1.141833, 1.142972"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.136409, 1.137547, 1.138866, 1.140006, 1.141145, 1.142300, 1.143445"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.137093, 1.138232, 1.139546, 1.140686, 1.141830, 1.142986, 1.144131"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for read mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.140428, 1.141567, 1.142891, 1.144031, 1.145176, 1.146337, 1.147482"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011350, 0.011362, 0.011373, 0.011537, 0.011549, 0.011561, 0.011572"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENA&TENA)|(TCENA&!TENA))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007269, 0.007276, 0.007283, 0.007290, 0.007298, 0.007305, 0.007840"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.008076, 0.008084, 0.008092, 0.008100, 0.008109, 0.008117, 0.008711"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007269, 0.007276, 0.007283, 0.007290, 0.007298, 0.007305, 0.007840"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.008076, 0.008084, 0.008092, 0.008100, 0.008109, 0.008117, 0.008711"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.959975, 0.960485, 0.960920, 0.961882, 0.962845, 0.963827, 0.964792"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011657, 0.011669, 0.011681, 0.011692, 0.011704, 0.011746, 0.012249"); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.233168, 0.233358, 0.236021, 0.240258, 0.249228, 0.262058, 0.354438", \ + "0.233020, 0.233210, 0.235873, 0.240110, 0.249080, 0.261910, 0.354290", \ + "0.229812, 0.230002, 0.232665, 0.236902, 0.245872, 0.258702, 0.351082", \ + "0.226330, 0.226520, 0.229183, 0.233420, 0.242390, 0.255220, 0.347600", \ + "0.216711, 0.216901, 0.219564, 0.223801, 0.232771, 0.245601, 0.337981", \ + "0.204101, 0.204291, 0.206954, 0.211191, 0.220161, 0.232991, 0.325371", \ + "0.264591, 0.264781, 0.267444, 0.271681, 0.280651, 0.293481, 0.385861" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.234228, 0.234418, 0.237081, 0.241318, 0.250288, 0.263118, 0.355498", \ + "0.234080, 0.234270, 0.236933, 0.241170, 0.250140, 0.262970, 0.355350", \ + "0.230872, 0.231062, 0.233725, 0.237962, 0.246932, 0.259762, 0.352142", \ + "0.227390, 0.227580, 0.230243, 0.234480, 0.243450, 0.256280, 0.348660", \ + "0.217771, 0.217961, 0.220624, 0.224861, 0.233831, 0.246661, 0.339041", \ + "0.205161, 0.205351, 0.208014, 0.212251, 0.221221, 0.234051, 0.326431", \ + "0.265651, 0.265841, 0.268504, 0.272741, 0.281711, 0.294541, 0.386921" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.235208, 0.235398, 0.238061, 0.242298, 0.251268, 0.264098, 0.356478", \ + "0.235060, 0.235250, 0.237913, 0.242150, 0.251120, 0.263950, 0.356330", \ + "0.231852, 0.232042, 0.234705, 0.238942, 0.247912, 0.260742, 0.353122", \ + "0.228370, 0.228560, 0.231223, 0.235460, 0.244430, 0.257260, 0.349640", \ + "0.218751, 0.218941, 0.221604, 0.225841, 0.234811, 0.247641, 0.340021", \ + "0.206141, 0.206331, 0.208994, 0.213231, 0.222201, 0.235031, 0.327411", \ + "0.266631, 0.266821, 0.269484, 0.273721, 0.282691, 0.295521, 0.387901" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.235873, 0.236063, 0.238726, 0.242963, 0.251933, 0.264763, 0.357143", \ + "0.235725, 0.235915, 0.238578, 0.242815, 0.251785, 0.264615, 0.356995", \ + "0.232517, 0.232707, 0.235370, 0.239607, 0.248577, 0.261407, 0.353787", \ + "0.229035, 0.229225, 0.231888, 0.236125, 0.245095, 0.257925, 0.350305", \ + "0.219416, 0.219606, 0.222269, 0.226506, 0.235476, 0.248306, 0.340686", \ + "0.206806, 0.206996, 0.209659, 0.213896, 0.222866, 0.235696, 0.328076", \ + "0.267296, 0.267486, 0.270149, 0.274386, 0.283356, 0.296186, 0.388566" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&!EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq0aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.293598, 0.293788, 0.296451, 0.300688, 0.309658, 0.322488, 0.414868", \ + "0.293450, 0.293640, 0.296303, 0.300540, 0.309510, 0.322340, 0.414720", \ + "0.290242, 0.290432, 0.293095, 0.297332, 0.306302, 0.319132, 0.411512", \ + "0.286760, 0.286950, 0.289613, 0.293850, 0.302820, 0.315650, 0.408030", \ + "0.277141, 0.277331, 0.279994, 0.284231, 0.293201, 0.306031, 0.398411", \ + "0.264531, 0.264721, 0.267384, 0.271621, 0.280591, 0.293421, 0.385801", \ + "0.325021, 0.325211, 0.327874, 0.332111, 0.341081, 0.353911, 0.446291" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.345345, 0.345535, 0.348198, 0.352435, 0.361405, 0.374235, 0.466615", \ + "0.345197, 0.345387, 0.348050, 0.352287, 0.361257, 0.374087, 0.466467", \ + "0.341989, 0.342179, 0.344842, 0.349079, 0.358049, 0.370879, 0.463259", \ + "0.338507, 0.338697, 0.341360, 0.345597, 0.354567, 0.367397, 0.459777", \ + "0.328888, 0.329078, 0.331741, 0.335978, 0.344948, 0.357778, 0.450158", \ + "0.316278, 0.316468, 0.319131, 0.323368, 0.332338, 0.345168, 0.437548", \ + "0.376768, 0.376958, 0.379621, 0.383858, 0.392828, 0.405658, 0.498038" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&!EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq0aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.401467, 0.401657, 0.404320, 0.408557, 0.417527, 0.430357, 0.522737", \ + "0.401319, 0.401509, 0.404172, 0.408409, 0.417379, 0.430209, 0.522589", \ + "0.398111, 0.398301, 0.400964, 0.405201, 0.414171, 0.427001, 0.519381", \ + "0.394629, 0.394819, 0.397482, 0.401719, 0.410689, 0.423519, 0.515899", \ + "0.385010, 0.385200, 0.387863, 0.392100, 0.401070, 0.413900, 0.506280", \ + "0.372400, 0.372590, 0.375253, 0.379490, 0.388460, 0.401290, 0.493670", \ + "0.432890, 0.433080, 0.435743, 0.439980, 0.448950, 0.461780, 0.554160" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&!EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.452636, 0.452826, 0.455489, 0.459726, 0.468696, 0.481526, 0.573906", \ + "0.452488, 0.452678, 0.455341, 0.459578, 0.468548, 0.481378, 0.573758", \ + "0.449280, 0.449470, 0.452133, 0.456370, 0.465340, 0.478170, 0.570550", \ + "0.445798, 0.445988, 0.448651, 0.452888, 0.461858, 0.474688, 0.567068", \ + "0.436179, 0.436369, 0.439032, 0.443269, 0.452239, 0.465069, 0.557449", \ + "0.423569, 0.423759, 0.426422, 0.430659, 0.439629, 0.452459, 0.544839", \ + "0.484059, 0.484249, 0.486912, 0.491149, 0.500119, 0.512949, 0.605329" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENA&!CENA)|(!TENA&!TCENA))&EMAA[2]&EMAA[1]&EMAA[0]"; + sdf_cond : "contA_RET1Neq1aDFTRAMBYPeq0aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaEMAA2eq1aEMAA1eq1aEMAA0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.496491; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.497566; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.498559; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.499236; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.557830; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.610350; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.667312; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq0"; + } + minimum_period() { + constraint : 0.719251; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&!EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq0"; + } + minimum_period() { + constraint : 0.579429; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.580505; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.581502; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.582175; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&!EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq0aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.640768; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.693288; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&!EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq0aEMAA0eq1aEMASAeq1"; + } + minimum_period() { + constraint : 0.750251; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&!EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq0aEMASAeq1"; + } + minimum_period() { + constraint : 0.802189; + when : "RET1N&((((TENA&!CENA)|(!TENA&!TCENA))&!DFTRAMBYP)|DFTRAMBYP)&EMAA[2]&EMAA[1]&EMAA[0]&EMASA"; + sdf_cond : "RET1Neq1aopopopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcpaDFTRAMBYPeq0cpoDFTRAMBYPeq1cpaEMAA2eq1aEMAA1eq1aEMAA0eq1aEMASAeq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.077080, 0.077878, 0.079622, 0.084153, 0.093263, 0.104596, 0.123636"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + min_pulse_width_high : 0.113345; + min_pulse_width_low : 0.113076; + } + pin(CENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001339; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.098133, 0.099266, 0.101513, 0.106297, 0.117582, 0.128962, 0.220732", \ + "0.097696, 0.098829, 0.101076, 0.105860, 0.117145, 0.128525, 0.220295", \ + "0.097455, 0.098588, 0.100835, 0.105619, 0.116904, 0.128284, 0.220054", \ + "0.097773, 0.098906, 0.101153, 0.105937, 0.117222, 0.128602, 0.220372", \ + "0.098147, 0.099280, 0.101527, 0.106311, 0.117596, 0.128976, 0.220746", \ + "0.103866, 0.104999, 0.107246, 0.112030, 0.123315, 0.134695, 0.226465", \ + "0.189192, 0.190325, 0.192572, 0.197356, 0.208641, 0.220021, 0.311791" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.105697, 0.106690, 0.109925, 0.115198, 0.126548, 0.141168, 0.241618", \ + "0.104617, 0.105610, 0.108845, 0.114118, 0.125468, 0.140088, 0.240538", \ + "0.102978, 0.103971, 0.107206, 0.112479, 0.123829, 0.138449, 0.238899", \ + "0.098432, 0.099425, 0.102660, 0.107933, 0.119283, 0.133903, 0.234353", \ + "0.089362, 0.090355, 0.093590, 0.098863, 0.110213, 0.124833, 0.225283", \ + "0.092401, 0.093569, 0.096509, 0.101718, 0.113030, 0.125616, 0.226506", \ + "0.177725, 0.178893, 0.181833, 0.187042, 0.198354, 0.210940, 0.311830" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA"; + sdf_cond : "RET1Neq1aTENAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.050687, 0.049634, 0.047246, 0.042878, 0.033548, 0.023802, 0.090250", \ + "0.051595, 0.050542, 0.048154, 0.043786, 0.034456, 0.024710, 0.090250", \ + "0.053311, 0.052258, 0.049870, 0.045502, 0.036172, 0.026426, 0.090250", \ + "0.057492, 0.056439, 0.054051, 0.049683, 0.040353, 0.030607, 0.092934", \ + "0.066059, 0.065006, 0.062618, 0.058250, 0.048920, 0.039174, 0.101501", \ + "0.076883, 0.075830, 0.073442, 0.069074, 0.059744, 0.049998, 0.112325", \ + "0.169165, 0.168159, 0.165822, 0.161193, 0.151003, 0.139702, 0.201684" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.044670, 0.044820, 0.040710, 0.034987, 0.024130, 0.015000, 0.090250", \ + "0.045470, 0.045620, 0.041510, 0.035787, 0.024930, 0.015000, 0.090250", \ + "0.047214, 0.047364, 0.043254, 0.037531, 0.026674, 0.015383, 0.090250", \ + "0.051741, 0.051891, 0.047781, 0.042058, 0.031201, 0.019910, 0.090250", \ + "0.061285, 0.061435, 0.057325, 0.051602, 0.040745, 0.029454, 0.090250", \ + "0.073625, 0.073775, 0.069665, 0.063942, 0.053085, 0.041794, 0.092966", \ + "0.166666, 0.166816, 0.162706, 0.156983, 0.146126, 0.134835, 0.186007" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.317005, 0.315015, 0.313035, 0.308595, 0.297845, 0.281275, 0.260065", \ + "0.320985, 0.318995, 0.317015, 0.312575, 0.301825, 0.285255, 0.264045", \ + "0.324955, 0.322965, 0.320985, 0.316545, 0.305795, 0.289225, 0.268015", \ + "0.333845, 0.331855, 0.329875, 0.325435, 0.314685, 0.298115, 0.276905", \ + "0.355325, 0.353335, 0.351355, 0.346915, 0.336165, 0.319595, 0.298385", \ + "0.388465, 0.386475, 0.384495, 0.380055, 0.369305, 0.352735, 0.331525", \ + "0.430885, 0.428895, 0.426915, 0.422475, 0.411725, 0.395155, 0.373945" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(AA) { + bus_type : rf2_32x19_wm0_AA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001582; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.121780, 0.123100, 0.125860, 0.132070, 0.143500, 0.162570, 0.269280", \ + "0.120410, 0.121730, 0.124490, 0.130700, 0.142130, 0.161200, 0.267910", \ + "0.119100, 0.120420, 0.123180, 0.129390, 0.140820, 0.159890, 0.266600", \ + "0.114510, 0.115830, 0.118590, 0.124800, 0.136230, 0.155300, 0.262010", \ + "0.104818, 0.106138, 0.108898, 0.115108, 0.126538, 0.145608, 0.252318", \ + "0.092302, 0.093622, 0.096382, 0.102592, 0.114022, 0.133092, 0.239802", \ + "0.151377, 0.152697, 0.155457, 0.161667, 0.173097, 0.192167, 0.298877" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&TENA&!CENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq1aCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + internal_power() { + when : "TENA&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + } + pin(CLKB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.009673; + clock : true; + max_transition : 0.301000; + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.155591, 1.156744, 1.157744, 1.158902, 1.160064, 1.161281, 1.162444"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.155620, 1.156772, 1.157773, 1.158930, 1.160092, 1.161310, 1.162473"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.156705, 1.157862, 1.158862, 1.160024, 1.161182, 1.162404, 1.163567"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.156733, 1.157890, 1.158890, 1.160053, 1.161210, 1.162432, 1.163596"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.159244, 1.160406, 1.161408, 1.162570, 1.163733, 1.164957, 1.166120"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.159759, 1.160921, 1.161922, 1.163085, 1.164248, 1.165472, 1.166640"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.160443, 1.161607, 1.162607, 1.163770, 1.164934, 1.166158, 1.167327"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for write mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("1.163779, 1.164942, 1.165952, 1.167116, 1.168285, 1.169509, 1.170679"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.010940, 0.010951, 0.010962, 0.011250, 0.011261, 0.011272, 0.011327"); + } + } + /* Internal energy table for ds mode */ + internal_power() { + when : "RET1N&!DFTRAMBYP&((CENB&TENB)|(TCENB&!TENB))"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006825, 0.006956, 0.006963, 0.007047, 0.007054, 0.007065, 0.007587"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007584, 0.007729, 0.007737, 0.007830, 0.007837, 0.007850, 0.008430"); + } + } + /* Internal energy table for precharge mode */ + internal_power() { + when : "!RET1N"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006825, 0.006956, 0.006963, 0.007047, 0.007054, 0.007065, 0.007587"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.007584, 0.007729, 0.007737, 0.007830, 0.007837, 0.007850, 0.008430"); + } + } + /* Internal energy table for scan mode */ + internal_power() { + when : "RET1N&DFTRAMBYP"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.755019, 0.755876, 0.756631, 0.757387, 0.758143, 0.758904, 0.759661"); + } + fall_power(rf2_32x19_wm0_clockslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011036, 0.011058, 0.011117, 0.011346, 0.011357, 0.011369, 0.011903"); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.324190, 0.325220, 0.327790, 0.332170, 0.340960, 0.352460, 0.447370", \ + "0.323627, 0.324657, 0.327227, 0.331607, 0.340397, 0.351897, 0.446807", \ + "0.321336, 0.322366, 0.324936, 0.329316, 0.338106, 0.349606, 0.444516", \ + "0.317052, 0.318082, 0.320652, 0.325032, 0.333822, 0.345322, 0.440232", \ + "0.308061, 0.309091, 0.311661, 0.316041, 0.324831, 0.336331, 0.431241", \ + "0.296531, 0.297561, 0.300131, 0.304511, 0.313301, 0.324801, 0.419711", \ + "0.353061, 0.354091, 0.356661, 0.361041, 0.369831, 0.381331, 0.476241" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.330108, 0.331138, 0.333708, 0.338088, 0.346878, 0.358378, 0.453288", \ + "0.329545, 0.330575, 0.333145, 0.337525, 0.346315, 0.357815, 0.452725", \ + "0.327254, 0.328284, 0.330854, 0.335234, 0.344024, 0.355524, 0.450434", \ + "0.322970, 0.324000, 0.326570, 0.330950, 0.339740, 0.351240, 0.446150", \ + "0.313979, 0.315009, 0.317579, 0.321959, 0.330749, 0.342249, 0.437159", \ + "0.302449, 0.303479, 0.306049, 0.310429, 0.319219, 0.330719, 0.425629", \ + "0.358979, 0.360009, 0.362579, 0.366959, 0.375749, 0.387249, 0.482159" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.336251, 0.337281, 0.339851, 0.344231, 0.353021, 0.364521, 0.459431", \ + "0.335688, 0.336718, 0.339288, 0.343668, 0.352458, 0.363958, 0.458868", \ + "0.333397, 0.334427, 0.336997, 0.341377, 0.350167, 0.361667, 0.456577", \ + "0.329113, 0.330143, 0.332713, 0.337093, 0.345883, 0.357383, 0.452293", \ + "0.320122, 0.321152, 0.323722, 0.328102, 0.336892, 0.348392, 0.443302", \ + "0.308592, 0.309622, 0.312192, 0.316572, 0.325362, 0.336862, 0.431772", \ + "0.365122, 0.366152, 0.368722, 0.373102, 0.381892, 0.393392, 0.488302" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.345142, 0.346172, 0.348742, 0.353122, 0.361912, 0.373412, 0.468322", \ + "0.344579, 0.345609, 0.348179, 0.352559, 0.361349, 0.372849, 0.467759", \ + "0.342288, 0.343318, 0.345888, 0.350268, 0.359058, 0.370558, 0.465468", \ + "0.338004, 0.339034, 0.341604, 0.345984, 0.354774, 0.366274, 0.461184", \ + "0.329013, 0.330043, 0.332613, 0.336993, 0.345783, 0.357283, 0.452193", \ + "0.317483, 0.318513, 0.321083, 0.325463, 0.334253, 0.345753, 0.440663", \ + "0.374013, 0.375043, 0.377613, 0.381993, 0.390783, 0.402283, 0.497193" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.414578, 0.415608, 0.418178, 0.422558, 0.431348, 0.442848, 0.537758", \ + "0.414015, 0.415045, 0.417615, 0.421995, 0.430785, 0.442285, 0.537195", \ + "0.411724, 0.412754, 0.415324, 0.419704, 0.428494, 0.439994, 0.534904", \ + "0.407440, 0.408470, 0.411040, 0.415420, 0.424210, 0.435710, 0.530620", \ + "0.398449, 0.399479, 0.402049, 0.406429, 0.415219, 0.426719, 0.521629", \ + "0.386919, 0.387949, 0.390519, 0.394899, 0.403689, 0.415189, 0.510099", \ + "0.443449, 0.444479, 0.447049, 0.451429, 0.460219, 0.471719, 0.566629" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.466055, 0.467085, 0.469655, 0.474035, 0.482825, 0.494325, 0.589235", \ + "0.465492, 0.466522, 0.469092, 0.473472, 0.482262, 0.493762, 0.588672", \ + "0.463201, 0.464231, 0.466801, 0.471181, 0.479971, 0.491471, 0.586381", \ + "0.458917, 0.459947, 0.462517, 0.466897, 0.475687, 0.487187, 0.582097", \ + "0.449926, 0.450956, 0.453526, 0.457906, 0.466696, 0.478196, 0.573106", \ + "0.438396, 0.439426, 0.441996, 0.446376, 0.455166, 0.466666, 0.561576", \ + "0.494926, 0.495956, 0.498526, 0.502906, 0.511696, 0.523196, 0.618106" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.532629, 0.533659, 0.536229, 0.540609, 0.549399, 0.560899, 0.655809", \ + "0.532066, 0.533096, 0.535666, 0.540046, 0.548836, 0.560336, 0.655246", \ + "0.529775, 0.530805, 0.533375, 0.537755, 0.546545, 0.558045, 0.652955", \ + "0.525491, 0.526521, 0.529091, 0.533471, 0.542261, 0.553761, 0.648671", \ + "0.516500, 0.517530, 0.520100, 0.524480, 0.533270, 0.544770, 0.639680", \ + "0.504970, 0.506000, 0.508570, 0.512950, 0.521740, 0.533240, 0.628150", \ + "0.561500, 0.562530, 0.565100, 0.569480, 0.578270, 0.589770, 0.684680" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.583181, 0.584211, 0.586781, 0.591161, 0.599951, 0.611451, 0.706361", \ + "0.582618, 0.583648, 0.586218, 0.590598, 0.599388, 0.610888, 0.705798", \ + "0.580327, 0.581357, 0.583927, 0.588307, 0.597097, 0.608597, 0.703507", \ + "0.576043, 0.577073, 0.579643, 0.584023, 0.592813, 0.604313, 0.699223", \ + "0.567052, 0.568082, 0.570652, 0.575032, 0.583822, 0.595322, 0.690232", \ + "0.555522, 0.556552, 0.559122, 0.563502, 0.572292, 0.583792, 0.678702", \ + "0.612052, 0.613082, 0.615652, 0.620032, 0.628822, 0.640322, 0.735232" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!DFTRAMBYP&((TENB&!CENB)|(!TENB&!TCENB))&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "contB_RET1Neq1aDFTRAMBYPeq0aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + rise_constraint(rf2_32x19_wm0_clockslew_clockslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + minimum_period() { + constraint : 0.569580; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.575587; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.581827; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 0.590852; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&!EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq0aEMAB1eq1aEMAB0eq1"; + } + minimum_period() { + constraint : 0.661328; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq0"; + } + minimum_period() { + constraint : 0.713577; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&!EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq0aEMAB0eq1"; + } + minimum_period() { + constraint : 0.781150; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&!EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq0"; + } + minimum_period() { + constraint : 0.832456; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)&EMAB[2]&EMAB[1]&EMAB[0]"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cpaEMAB2eq1aEMAB1eq1aEMAB0eq1"; + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : min_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.070921, 0.072009, 0.074179, 0.078523, 0.087649, 0.098952, 0.117107"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : positive_unate; + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.117264, 0.118604, 0.120544, 0.125424, 0.134324, 0.146254, 0.161174"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.117264, 0.118604, 0.120544, 0.125424, 0.134324, 0.146254, 0.161174"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + } + timing() { + timing_type : max_clock_tree_path; + timing_sense : negative_unate; + cell_fall(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.117264, 0.118604, 0.120544, 0.125424, 0.134324, 0.146254, 0.161174"); + } + fall_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.021751, 0.021331, 0.021507, 0.021567, 0.021755, 0.021718, 0.021483"); + } + cell_rise(rf2_32x19_wm0_cts1x7_clockslew_delay_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.117264, 0.118604, 0.120544, 0.125424, 0.134324, 0.146254, 0.161174"); + } + rise_transition(rf2_32x19_wm0_cts1x7_clockslew_slew_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.018564, 0.018666, 0.018651, 0.018601, 0.018616, 0.018645, 0.018636"); + } + } + min_pulse_width_high : 0.115864; + min_pulse_width_low : 0.112793; + } + pin(CENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001261; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.103776, 0.104776, 0.107433, 0.112564, 0.123374, 0.136684, 0.227804", \ + "0.103334, 0.104334, 0.106991, 0.112122, 0.122932, 0.136242, 0.227362", \ + "0.103091, 0.104091, 0.106748, 0.111879, 0.122689, 0.135999, 0.227119", \ + "0.103192, 0.104192, 0.106849, 0.111980, 0.122790, 0.136100, 0.227220", \ + "0.104364, 0.105364, 0.108021, 0.113152, 0.123962, 0.137272, 0.228392", \ + "0.110151, 0.111151, 0.113808, 0.118939, 0.129749, 0.143059, 0.234179", \ + "0.195714, 0.196714, 0.199371, 0.204502, 0.215312, 0.228622, 0.319742" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.108809, 0.109720, 0.112476, 0.117986, 0.129646, 0.145166, 0.245716", \ + "0.107838, 0.108749, 0.111505, 0.117015, 0.128675, 0.144195, 0.244745", \ + "0.105673, 0.106584, 0.109340, 0.114850, 0.126510, 0.142030, 0.242580", \ + "0.101233, 0.102144, 0.104900, 0.110410, 0.122070, 0.137590, 0.238140", \ + "0.092120, 0.093031, 0.095787, 0.101297, 0.112957, 0.128477, 0.229027", \ + "0.097087, 0.097530, 0.100932, 0.106899, 0.118194, 0.133284, 0.233304", \ + "0.182708, 0.183151, 0.186553, 0.192520, 0.203815, 0.218905, 0.318925" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB"; + sdf_cond : "RET1Neq1aTENBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.051609, 0.050017, 0.047643, 0.043030, 0.033443, 0.030439, 0.090250", \ + "0.052833, 0.051241, 0.048867, 0.044254, 0.034667, 0.031663, 0.090250", \ + "0.054885, 0.053293, 0.050919, 0.046306, 0.036719, 0.033715, 0.090674", \ + "0.059286, 0.057694, 0.055320, 0.050707, 0.041120, 0.038116, 0.095075", \ + "0.067408, 0.065816, 0.063442, 0.058829, 0.049242, 0.046238, 0.103197", \ + "0.077629, 0.076037, 0.073663, 0.069050, 0.059463, 0.056459, 0.113418", \ + "0.165895, 0.164303, 0.161929, 0.157316, 0.147729, 0.144725, 0.201684" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.038557, 0.039108, 0.034679, 0.028500, 0.017481, 0.015000, 0.090250", \ + "0.039639, 0.040190, 0.035761, 0.029582, 0.018563, 0.015000, 0.090250", \ + "0.041812, 0.042363, 0.037934, 0.031755, 0.020736, 0.015000, 0.090250", \ + "0.046144, 0.046695, 0.042266, 0.036087, 0.025068, 0.015000, 0.090250", \ + "0.055531, 0.056082, 0.051653, 0.045474, 0.034455, 0.019481, 0.090250", \ + "0.067796, 0.068347, 0.063918, 0.057739, 0.046720, 0.031746, 0.090250", \ + "0.159971, 0.160522, 0.156093, 0.149914, 0.138895, 0.123921, 0.179012" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.317005, 0.315015, 0.313035, 0.308595, 0.297845, 0.281275, 0.260065", \ + "0.320985, 0.318995, 0.317015, 0.312575, 0.301825, 0.285255, 0.264045", \ + "0.324955, 0.322965, 0.320985, 0.316545, 0.305795, 0.289225, 0.268015", \ + "0.333845, 0.331855, 0.329875, 0.325435, 0.314685, 0.298115, 0.276905", \ + "0.355325, 0.353335, 0.351355, 0.346915, 0.336165, 0.319595, 0.298385", \ + "0.388465, 0.386475, 0.384495, 0.380055, 0.369305, 0.352735, 0.331525", \ + "0.430885, 0.428895, 0.426915, 0.422475, 0.411725, 0.395155, 0.373945" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(AB) { + bus_type : rf2_32x19_wm0_AB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001576; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.127640, 0.128540, 0.131160, 0.137150, 0.150180, 0.168330, 0.278040", \ + "0.126680, 0.127580, 0.130200, 0.136190, 0.149220, 0.167370, 0.277080", \ + "0.124540, 0.125440, 0.128060, 0.134050, 0.147080, 0.165230, 0.274940", \ + "0.120080, 0.120980, 0.123600, 0.129590, 0.142620, 0.160770, 0.270480", \ + "0.111190, 0.112090, 0.114710, 0.120700, 0.133730, 0.151880, 0.261590", \ + "0.099772, 0.100672, 0.103292, 0.109282, 0.122312, 0.140462, 0.250172", \ + "0.157362, 0.158262, 0.160882, 0.166872, 0.179902, 0.198052, 0.307762" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&!CENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq1aCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + internal_power() { + when : "TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + } + bus(DB) { + bus_type : rf2_32x19_wm0_DB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : AB; + clocked_on : CLKB; + } + capacitance : 0.001884; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.059374, 0.060609, 0.062233, 0.068022, 0.079578, 0.095842, 0.199822", \ + "0.058164, 0.059399, 0.061023, 0.066812, 0.078368, 0.094632, 0.198612", \ + "0.056056, 0.057291, 0.058915, 0.064704, 0.076260, 0.092524, 0.196504", \ + "0.051198, 0.052433, 0.054057, 0.059846, 0.071402, 0.087666, 0.191646", \ + "0.042331, 0.043566, 0.045190, 0.050979, 0.062535, 0.078799, 0.182779", \ + "0.030678, 0.031913, 0.033537, 0.039326, 0.050882, 0.067146, 0.171126", \ + "0.090681, 0.091916, 0.093540, 0.099329, 0.110885, 0.127149, 0.231129" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.065908, 0.067347, 0.070526, 0.076089, 0.088553, 0.109607, 0.217747", \ + "0.064463, 0.065902, 0.069081, 0.074644, 0.087108, 0.108162, 0.216302", \ + "0.062566, 0.064005, 0.067184, 0.072747, 0.085211, 0.106265, 0.214405", \ + "0.057709, 0.059148, 0.062327, 0.067890, 0.080354, 0.101408, 0.209548", \ + "0.048796, 0.050235, 0.053414, 0.058977, 0.071441, 0.092495, 0.200635", \ + "0.037215, 0.038654, 0.041833, 0.047396, 0.059860, 0.080914, 0.189054", \ + "0.097214, 0.098653, 0.101832, 0.107395, 0.119859, 0.140913, 0.249053" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&TENB&((DFTRAMBYP&!SEB)|(!DFTRAMBYP&!CENB))"; + sdf_cond : "RET1Neq1aTENBeq1aopopDFTRAMBYPeq1aSEBeq0cpoopDFTRAMBYPeq0aCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.111897, 0.110952, 0.108333, 0.106080, 0.095586, 0.085696, 0.152780", \ + "0.113234, 0.112289, 0.109670, 0.107417, 0.096923, 0.087033, 0.154117", \ + "0.115175, 0.114230, 0.111611, 0.109358, 0.098864, 0.088974, 0.156058", \ + "0.120054, 0.119109, 0.116490, 0.114237, 0.103743, 0.093853, 0.160937", \ + "0.128954, 0.128009, 0.125390, 0.123137, 0.112643, 0.102753, 0.169837", \ + "0.140904, 0.139959, 0.137340, 0.135087, 0.124593, 0.114703, 0.181787", \ + "0.231064, 0.230119, 0.227500, 0.225247, 0.214753, 0.204863, 0.271947" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.115018, 0.113610, 0.110718, 0.105359, 0.094626, 0.081905, 0.141099", \ + "0.116359, 0.114951, 0.112059, 0.106700, 0.095967, 0.083246, 0.142440", \ + "0.118296, 0.116888, 0.113996, 0.108637, 0.097904, 0.085183, 0.144377", \ + "0.123176, 0.121768, 0.118876, 0.113517, 0.102784, 0.090063, 0.149257", \ + "0.132086, 0.130678, 0.127786, 0.122427, 0.111694, 0.098973, 0.158167", \ + "0.144016, 0.142608, 0.139716, 0.134357, 0.123624, 0.110903, 0.170097", \ + "0.234176, 0.232768, 0.229876, 0.224517, 0.213784, 0.201063, 0.260257" \ + ); + } + } + internal_power() { + when : "TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + bus(EMAA) { + bus_type : rf2_32x19_wm0_EMAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005769; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + } + } + pin(EMASA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002465; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&(((TENA&!CENA&!DFTRAMBYP)|(!TENA&!TCENA&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENAeq1aCENAeq0aDFTRAMBYPeq0cpoopTENAeq0aTCENAeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + } + } + bus(EMAB) { + bus_type : rf2_32x19_wm0_EMAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005588; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.627953, 0.629795, 0.631786, 0.636479, 0.646091, 0.656174, 0.747814", \ + "0.626914, 0.628756, 0.630747, 0.635440, 0.645052, 0.655135, 0.746775", \ + "0.624921, 0.626763, 0.628754, 0.633447, 0.643059, 0.653142, 0.744782", \ + "0.620689, 0.622531, 0.624522, 0.629215, 0.638827, 0.648910, 0.740550", \ + "0.612466, 0.614308, 0.616299, 0.620992, 0.630604, 0.640687, 0.732327", \ + "0.599337, 0.601179, 0.603170, 0.607863, 0.617475, 0.627558, 0.719198", \ + "0.659995, 0.661837, 0.663828, 0.668521, 0.678133, 0.688216, 0.779856" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.627953, 0.629795, 0.631786, 0.636479, 0.646091, 0.656174, 0.747814", \ + "0.626914, 0.628756, 0.630747, 0.635440, 0.645052, 0.655135, 0.746775", \ + "0.624921, 0.626763, 0.628754, 0.633447, 0.643059, 0.653142, 0.744782", \ + "0.620689, 0.622531, 0.624522, 0.629215, 0.638827, 0.648910, 0.740550", \ + "0.612466, 0.614308, 0.616299, 0.620992, 0.630604, 0.640687, 0.732327", \ + "0.599337, 0.601179, 0.603170, 0.607863, 0.617475, 0.627558, 0.719198", \ + "0.659995, 0.661837, 0.663828, 0.668521, 0.678133, 0.688216, 0.779856" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&(((TENB&!CENB&!DFTRAMBYP)|(!TENB&!TCENB&!DFTRAMBYP))|DFTRAMBYP)"; + sdf_cond : "RET1Neq1aopopopTENBeq1aCENBeq0aDFTRAMBYPeq0cpoopTENBeq0aTCENBeq0aDFTRAMBYPeq0cpcpoDFTRAMBYPeq1cp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.863304, 0.862212, 0.860456, 0.858700, 0.859756, 0.860916, 0.942144", \ + "0.863995, 0.862903, 0.861147, 0.859391, 0.860447, 0.861607, 0.942835", \ + "0.866124, 0.865032, 0.863276, 0.861520, 0.862576, 0.863736, 0.944964", \ + "0.870535, 0.869443, 0.867687, 0.865931, 0.866987, 0.868147, 0.949375", \ + "0.879187, 0.878095, 0.876339, 0.874583, 0.875639, 0.876799, 0.958027", \ + "0.891543, 0.890451, 0.888695, 0.886939, 0.887995, 0.889155, 0.970383", \ + "0.983312, 0.982220, 0.980464, 0.978708, 0.979764, 0.980924, 1.062152" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.863304, 0.862212, 0.860456, 0.858700, 0.859756, 0.860916, 0.942144", \ + "0.863995, 0.862903, 0.861147, 0.859391, 0.860447, 0.861607, 0.942835", \ + "0.866124, 0.865032, 0.863276, 0.861520, 0.862576, 0.863736, 0.944964", \ + "0.870535, 0.869443, 0.867687, 0.865931, 0.866987, 0.868147, 0.949375", \ + "0.879187, 0.878095, 0.876339, 0.874583, 0.875639, 0.876799, 0.958027", \ + "0.891543, 0.890451, 0.888695, 0.886939, 0.887995, 0.889155, 0.970383", \ + "0.983312, 0.982220, 0.980464, 0.978708, 0.979764, 0.980924, 1.062152" \ + ); + } + } + } + pin(TENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.000857; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.205012, 0.207242, 0.213498, 0.225579, 0.251258, 0.288915, 0.427503", \ + "0.203863, 0.205988, 0.212470, 0.224550, 0.250230, 0.287887, 0.426475", \ + "0.202211, 0.204441, 0.210767, 0.222847, 0.248527, 0.286184, 0.424772", \ + "0.197834, 0.200065, 0.206251, 0.218332, 0.244011, 0.281669, 0.420257", \ + "0.187996, 0.190227, 0.196164, 0.208244, 0.233924, 0.271581, 0.410169", \ + "0.182583, 0.184626, 0.190434, 0.201088, 0.226623, 0.259422, 0.398010", \ + "0.267988, 0.270031, 0.275851, 0.286505, 0.312040, 0.342007, 0.465694" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.205012, 0.207242, 0.213498, 0.225579, 0.251258, 0.288915, 0.427503", \ + "0.203863, 0.205988, 0.212470, 0.224550, 0.250230, 0.287887, 0.426475", \ + "0.202211, 0.204441, 0.210767, 0.222847, 0.248527, 0.286184, 0.424772", \ + "0.197834, 0.200065, 0.206251, 0.218332, 0.244011, 0.281669, 0.420257", \ + "0.187996, 0.190227, 0.196164, 0.208244, 0.233924, 0.271581, 0.410169", \ + "0.182583, 0.184626, 0.190434, 0.201088, 0.226623, 0.259422, 0.398010", \ + "0.267988, 0.270031, 0.275851, 0.286505, 0.312040, 0.342007, 0.465694" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.087059, 0.086155, 0.083330, 0.079982, 0.072545, 0.071071, 0.151164", \ + "0.087938, 0.087034, 0.084209, 0.080861, 0.073424, 0.071950, 0.152043", \ + "0.089856, 0.088952, 0.086127, 0.082778, 0.075341, 0.073867, 0.153961", \ + "0.094841, 0.093937, 0.091112, 0.087764, 0.080325, 0.078851, 0.158945", \ + "0.104862, 0.103958, 0.101133, 0.097785, 0.090346, 0.088872, 0.168966", \ + "0.117326, 0.116422, 0.113597, 0.110249, 0.102810, 0.101336, 0.181430", \ + "0.213526, 0.212621, 0.209796, 0.206448, 0.199011, 0.197537, 0.277630" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.087059, 0.086155, 0.083330, 0.079982, 0.072545, 0.071071, 0.151164", \ + "0.087938, 0.087034, 0.084209, 0.080861, 0.073424, 0.071950, 0.152043", \ + "0.089856, 0.088952, 0.086127, 0.082778, 0.075341, 0.073867, 0.153961", \ + "0.094841, 0.093937, 0.091112, 0.087764, 0.080325, 0.078851, 0.158945", \ + "0.104862, 0.103958, 0.101133, 0.097785, 0.090346, 0.088872, 0.168966", \ + "0.117326, 0.116422, 0.113597, 0.110249, 0.102810, 0.101336, 0.181430", \ + "0.213526, 0.212621, 0.209796, 0.206448, 0.199011, 0.197537, 0.277630" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014403, 0.014517, 0.014573, 0.014588, 0.014602, 0.014615, 0.014629"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015117, 0.015132, 0.015147, 0.015162, 0.015177, 0.015192, 0.015207"); + } + } + } + pin(TCENA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001350; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.098133, 0.099266, 0.101513, 0.106297, 0.117582, 0.128962, 0.220732", \ + "0.097696, 0.098829, 0.101076, 0.105860, 0.117145, 0.128525, 0.220295", \ + "0.097455, 0.098588, 0.100835, 0.105619, 0.116904, 0.128284, 0.220054", \ + "0.097773, 0.098906, 0.101153, 0.105937, 0.117222, 0.128602, 0.220372", \ + "0.098147, 0.099280, 0.101527, 0.106311, 0.117596, 0.128976, 0.220746", \ + "0.103866, 0.104999, 0.107246, 0.112030, 0.123315, 0.134695, 0.226465", \ + "0.189192, 0.190325, 0.192572, 0.197356, 0.208641, 0.220021, 0.311791" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.105697, 0.106690, 0.109925, 0.115198, 0.126548, 0.141168, 0.241618", \ + "0.104617, 0.105610, 0.108845, 0.114118, 0.125468, 0.140088, 0.240538", \ + "0.102978, 0.103971, 0.107206, 0.112479, 0.123829, 0.138449, 0.238899", \ + "0.098432, 0.099425, 0.102660, 0.107933, 0.119283, 0.133903, 0.234353", \ + "0.089362, 0.090355, 0.093590, 0.098863, 0.110213, 0.124833, 0.225283", \ + "0.092401, 0.093569, 0.096509, 0.101718, 0.113030, 0.125616, 0.226506", \ + "0.177725, 0.178893, 0.181833, 0.187042, 0.198354, 0.210940, 0.311830" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA"; + sdf_cond : "RET1Neq1aTENAeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.053507, 0.052454, 0.050066, 0.045698, 0.036368, 0.026622, 0.093070", \ + "0.054415, 0.053362, 0.050974, 0.046606, 0.037276, 0.027530, 0.093070", \ + "0.056131, 0.055078, 0.052690, 0.048322, 0.038992, 0.029246, 0.093070", \ + "0.060312, 0.059259, 0.056871, 0.052503, 0.043173, 0.033427, 0.095754", \ + "0.068879, 0.067826, 0.065438, 0.061070, 0.051740, 0.041994, 0.104321", \ + "0.079703, 0.078650, 0.076262, 0.071894, 0.062564, 0.052818, 0.115145", \ + "0.171985, 0.170979, 0.168642, 0.164013, 0.153823, 0.142522, 0.204504" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.047490, 0.047640, 0.043530, 0.037807, 0.026950, 0.017820, 0.093070", \ + "0.048290, 0.048440, 0.044330, 0.038607, 0.027750, 0.017820, 0.093070", \ + "0.050034, 0.050184, 0.046074, 0.040351, 0.029494, 0.018203, 0.093070", \ + "0.054561, 0.054711, 0.050601, 0.044878, 0.034021, 0.022730, 0.093070", \ + "0.064105, 0.064255, 0.060145, 0.054422, 0.043565, 0.032274, 0.093070", \ + "0.076445, 0.076595, 0.072485, 0.066762, 0.055905, 0.044614, 0.095786", \ + "0.169486, 0.169636, 0.165526, 0.159803, 0.148946, 0.137655, 0.188827" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.317005, 0.315015, 0.313035, 0.308595, 0.297845, 0.281275, 0.260065", \ + "0.320985, 0.318995, 0.317015, 0.312575, 0.301825, 0.285255, 0.264045", \ + "0.324955, 0.322965, 0.320985, 0.316545, 0.305795, 0.289225, 0.268015", \ + "0.333845, 0.331855, 0.329875, 0.325435, 0.314685, 0.298115, 0.276905", \ + "0.355325, 0.353335, 0.351355, 0.346915, 0.336165, 0.319595, 0.298385", \ + "0.388465, 0.386475, 0.384495, 0.380055, 0.369305, 0.352735, 0.331525", \ + "0.430885, 0.428895, 0.426915, 0.422475, 0.411725, 0.395155, 0.373945" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + } + bus(TAA) { + bus_type : rf2_32x19_wm0_TAA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001544; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126215, 0.127535, 0.130295, 0.136505, 0.147935, 0.167005, 0.273715", \ + "0.124845, 0.126165, 0.128925, 0.135135, 0.146565, 0.165635, 0.272345", \ + "0.123535, 0.124855, 0.127615, 0.133825, 0.145255, 0.164325, 0.271035", \ + "0.118945, 0.120265, 0.123025, 0.129235, 0.140665, 0.159735, 0.266445", \ + "0.109253, 0.110573, 0.113333, 0.119543, 0.130973, 0.150043, 0.256753", \ + "0.096737, 0.098057, 0.100817, 0.107027, 0.118457, 0.137527, 0.244237", \ + "0.155812, 0.157132, 0.159892, 0.166102, 0.177532, 0.196602, 0.303312" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&!TENA&!TCENA&!COLLDISN"; + sdf_cond : "RET1Neq1aTENAeq0aTCENAeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.077957, 0.077232, 0.074531, 0.071873, 0.065950, 0.064610, 0.144263", \ + "0.078756, 0.078031, 0.075330, 0.072672, 0.066749, 0.065409, 0.145062", \ + "0.080499, 0.079774, 0.077073, 0.074415, 0.068492, 0.067152, 0.146805", \ + "0.085030, 0.084305, 0.081604, 0.078946, 0.073023, 0.071683, 0.151336", \ + "0.094140, 0.093415, 0.090714, 0.088056, 0.082133, 0.080793, 0.160446", \ + "0.105471, 0.104746, 0.102045, 0.099387, 0.093464, 0.092124, 0.171777", \ + "0.199767, 0.199042, 0.196341, 0.193683, 0.187760, 0.186420, 0.266073" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.079145, 0.078323, 0.075755, 0.072711, 0.065607, 0.062879, 0.132456", \ + "0.079944, 0.079122, 0.076554, 0.073510, 0.066406, 0.063678, 0.133255", \ + "0.081687, 0.080865, 0.078297, 0.075253, 0.068149, 0.065421, 0.134998", \ + "0.086219, 0.085397, 0.082829, 0.079785, 0.072681, 0.069953, 0.139530", \ + "0.095329, 0.094507, 0.091939, 0.088895, 0.081791, 0.079063, 0.148640", \ + "0.106660, 0.105838, 0.103270, 0.100226, 0.093122, 0.090394, 0.159971", \ + "0.200955, 0.200133, 0.197565, 0.194521, 0.187417, 0.184689, 0.254266" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENA&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.014848, 0.014886, 0.014900, 0.014915, 0.014930, 0.014945, 0.014960"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.013141, 0.013154, 0.013167, 0.013180, 0.013194, 0.013207, 0.013220"); + } + } + } + pin(TENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001015; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.281570, 0.283709, 0.289070, 0.301150, 0.325614, 0.357152, 0.483345", \ + "0.280673, 0.282812, 0.288173, 0.300253, 0.324717, 0.356255, 0.482732", \ + "0.278082, 0.280221, 0.285581, 0.297661, 0.322126, 0.353663, 0.480371", \ + "0.273779, 0.275918, 0.281279, 0.293359, 0.317823, 0.349361, 0.475880", \ + "0.264921, 0.267060, 0.272420, 0.284500, 0.308965, 0.340502, 0.466853", \ + "0.261613, 0.263852, 0.269250, 0.280471, 0.302715, 0.329413, 0.455414", \ + "0.347397, 0.349636, 0.355033, 0.366254, 0.388499, 0.415196, 0.522915" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.281570, 0.283709, 0.289070, 0.301150, 0.325614, 0.357152, 0.483345", \ + "0.280673, 0.282812, 0.288173, 0.300253, 0.324717, 0.356255, 0.482732", \ + "0.278082, 0.280221, 0.285581, 0.297661, 0.322126, 0.353663, 0.480371", \ + "0.273779, 0.275918, 0.281279, 0.293359, 0.317823, 0.349361, 0.475880", \ + "0.264921, 0.267060, 0.272420, 0.284500, 0.308965, 0.340502, 0.466853", \ + "0.261613, 0.263852, 0.269250, 0.280471, 0.302715, 0.329413, 0.455414", \ + "0.347397, 0.349636, 0.355033, 0.366254, 0.388499, 0.415196, 0.522915" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126520, 0.124971, 0.121790, 0.116688, 0.105145, 0.094266, 0.160533", \ + "0.127995, 0.126447, 0.123265, 0.118159, 0.106615, 0.095736, 0.162004", \ + "0.130126, 0.128577, 0.125396, 0.120294, 0.108750, 0.097871, 0.164139", \ + "0.135494, 0.133945, 0.130764, 0.125661, 0.114117, 0.103238, 0.169506", \ + "0.145295, 0.143746, 0.140565, 0.135451, 0.123907, 0.113028, 0.179296", \ + "0.158418, 0.156869, 0.153688, 0.148596, 0.137052, 0.126173, 0.192441", \ + "0.250069, 0.248520, 0.245339, 0.240247, 0.228703, 0.217824, 0.284092" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126520, 0.124971, 0.121790, 0.116688, 0.105145, 0.094266, 0.160533", \ + "0.127995, 0.126447, 0.123265, 0.118159, 0.106615, 0.095736, 0.162004", \ + "0.130126, 0.128577, 0.125396, 0.120294, 0.108750, 0.097871, 0.164139", \ + "0.135494, 0.133945, 0.130764, 0.125661, 0.114117, 0.103238, 0.169506", \ + "0.145295, 0.143746, 0.140565, 0.135451, 0.123907, 0.113028, 0.179296", \ + "0.158418, 0.156869, 0.153688, 0.148596, 0.137052, 0.126173, 0.192441", \ + "0.250069, 0.248520, 0.245339, 0.240247, 0.228703, 0.217824, 0.284092" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.088966, 0.089056, 0.089133, 0.089188, 0.089314, 0.089360, 0.089449"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.097685, 0.097783, 0.097881, 0.097992, 0.098090, 0.098188, 0.098286"); + } + } + } + pin(TCENB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001357; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.104990, 0.105990, 0.108647, 0.113778, 0.124588, 0.137898, 0.229018", \ + "0.104548, 0.105548, 0.108205, 0.113336, 0.124146, 0.137456, 0.228576", \ + "0.104305, 0.105305, 0.107962, 0.113093, 0.123903, 0.137213, 0.228333", \ + "0.104406, 0.105406, 0.108063, 0.113194, 0.124004, 0.137314, 0.228434", \ + "0.105578, 0.106578, 0.109235, 0.114366, 0.125176, 0.138486, 0.229606", \ + "0.111365, 0.112365, 0.115022, 0.120153, 0.130963, 0.144273, 0.235393", \ + "0.196928, 0.197928, 0.200585, 0.205716, 0.216526, 0.229836, 0.320956" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.110023, 0.110934, 0.113690, 0.119200, 0.130860, 0.146380, 0.246930", \ + "0.109052, 0.109963, 0.112719, 0.118229, 0.129889, 0.145409, 0.245959", \ + "0.106887, 0.107798, 0.110554, 0.116064, 0.127724, 0.143244, 0.243794", \ + "0.102447, 0.103358, 0.106114, 0.111624, 0.123284, 0.138804, 0.239354", \ + "0.093334, 0.094245, 0.097001, 0.102511, 0.114171, 0.129691, 0.230241", \ + "0.098301, 0.098744, 0.102146, 0.108113, 0.119408, 0.134498, 0.234518", \ + "0.183922, 0.184365, 0.187767, 0.193734, 0.205029, 0.220119, 0.320139" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB"; + sdf_cond : "RET1Neq1aTENBeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.053019, 0.051427, 0.049053, 0.044440, 0.034853, 0.031849, 0.091660", \ + "0.054243, 0.052651, 0.050277, 0.045664, 0.036077, 0.033073, 0.091660", \ + "0.056295, 0.054703, 0.052329, 0.047716, 0.038129, 0.035125, 0.092084", \ + "0.060696, 0.059104, 0.056730, 0.052117, 0.042530, 0.039526, 0.096485", \ + "0.068818, 0.067226, 0.064852, 0.060239, 0.050652, 0.047648, 0.104607", \ + "0.079039, 0.077447, 0.075073, 0.070460, 0.060873, 0.057869, 0.114828", \ + "0.167305, 0.165713, 0.163339, 0.158726, 0.149139, 0.146135, 0.203094" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.039967, 0.040518, 0.036089, 0.029910, 0.018891, 0.016410, 0.091660", \ + "0.041049, 0.041600, 0.037171, 0.030992, 0.019973, 0.016410, 0.091660", \ + "0.043222, 0.043773, 0.039344, 0.033165, 0.022146, 0.016410, 0.091660", \ + "0.047554, 0.048105, 0.043676, 0.037497, 0.026478, 0.016410, 0.091660", \ + "0.056941, 0.057492, 0.053063, 0.046884, 0.035865, 0.020891, 0.091660", \ + "0.069206, 0.069757, 0.065328, 0.059149, 0.048130, 0.033156, 0.091660", \ + "0.161381, 0.161932, 0.157503, 0.151324, 0.140305, 0.125331, 0.180422" \ + ); + } + } + internal_power() { + when : "!DFTRAMBYP&!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.029087, 0.029172, 0.029201, 0.029230, 0.029259, 0.029289, 0.029318"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.051401, 0.051453, 0.051504, 0.051556, 0.051607, 0.051659, 0.051710"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.317005, 0.315015, 0.313035, 0.308595, 0.297845, 0.281275, 0.260065", \ + "0.320985, 0.318995, 0.317015, 0.312575, 0.301825, 0.285255, 0.264045", \ + "0.324955, 0.322965, 0.320985, 0.316545, 0.305795, 0.289225, 0.268015", \ + "0.333845, 0.331855, 0.329875, 0.325435, 0.314685, 0.298115, 0.276905", \ + "0.355325, 0.353335, 0.351355, 0.346915, 0.336165, 0.319595, 0.298385", \ + "0.388465, 0.386475, 0.384495, 0.380055, 0.369305, 0.352735, 0.331525", \ + "0.430885, 0.428895, 0.426915, 0.422475, 0.411725, 0.395155, 0.373945" \ + ); + } + } + } + bus(TAB) { + bus_type : rf2_32x19_wm0_TAB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001586; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.131175, 0.132075, 0.134695, 0.140685, 0.153715, 0.171865, 0.281575", \ + "0.130215, 0.131115, 0.133735, 0.139725, 0.152755, 0.170905, 0.280615", \ + "0.128075, 0.128975, 0.131595, 0.137585, 0.150615, 0.168765, 0.278475", \ + "0.123615, 0.124515, 0.127135, 0.133125, 0.146155, 0.164305, 0.274015", \ + "0.114725, 0.115625, 0.118245, 0.124235, 0.137265, 0.155415, 0.265125", \ + "0.103307, 0.104207, 0.106827, 0.112817, 0.125847, 0.143997, 0.253707", \ + "0.160897, 0.161797, 0.164417, 0.170407, 0.183437, 0.201587, 0.311297" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&!TCENB&!COLLDISN"; + sdf_cond : "RET1Neq1aTENBeq0aTCENBeq0aCOLLDISNeq0"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.071671, 0.070983, 0.068286, 0.065709, 0.059767, 0.059189, 0.142015", \ + "0.072759, 0.072071, 0.069374, 0.066797, 0.060855, 0.060277, 0.143103", \ + "0.074929, 0.074241, 0.071544, 0.068967, 0.063025, 0.062447, 0.145273", \ + "0.079273, 0.078585, 0.075888, 0.073311, 0.067369, 0.066791, 0.149617", \ + "0.088399, 0.087711, 0.085014, 0.082437, 0.076495, 0.075917, 0.158743", \ + "0.099703, 0.099015, 0.096318, 0.093741, 0.087799, 0.087221, 0.170047", \ + "0.193107, 0.192419, 0.189722, 0.187145, 0.181203, 0.180625, 0.263451" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.072990, 0.072175, 0.069605, 0.066548, 0.059432, 0.056645, 0.131141", \ + "0.074077, 0.073262, 0.070692, 0.067635, 0.060519, 0.057732, 0.132228", \ + "0.076246, 0.075431, 0.072861, 0.069804, 0.062688, 0.059901, 0.134397", \ + "0.080591, 0.079776, 0.077206, 0.074149, 0.067033, 0.064246, 0.138742", \ + "0.089717, 0.088902, 0.086332, 0.083275, 0.076159, 0.073372, 0.147868", \ + "0.101021, 0.100206, 0.097636, 0.094579, 0.087463, 0.084676, 0.159172", \ + "0.194428, 0.193613, 0.191043, 0.187986, 0.180870, 0.178083, 0.252579" \ + ); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&!COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + internal_power() { + when : "!TENB&!DFTRAMBYP&COLLDISN"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.017232, 0.017249, 0.017266, 0.017283, 0.017301, 0.017318, 0.017335"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.015493, 0.015509, 0.015524, 0.015540, 0.015555, 0.015571, 0.015586"); + } + } + } + bus(TDB) { + bus_type : rf2_32x19_wm0_TDB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + memory_write() { + address : TAB; + clocked_on : CLKB; + } + capacitance : 0.001610; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.061672, 0.062907, 0.064531, 0.070320, 0.081876, 0.098140, 0.202120", \ + "0.060462, 0.061697, 0.063321, 0.069110, 0.080666, 0.096930, 0.200910", \ + "0.058354, 0.059589, 0.061213, 0.067002, 0.078558, 0.094822, 0.198802", \ + "0.053496, 0.054731, 0.056355, 0.062144, 0.073700, 0.089964, 0.193944", \ + "0.044629, 0.045864, 0.047488, 0.053277, 0.064833, 0.081097, 0.185077", \ + "0.032976, 0.034211, 0.035835, 0.041624, 0.053180, 0.069444, 0.173424", \ + "0.092979, 0.094214, 0.095838, 0.101627, 0.113183, 0.129447, 0.233427" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.068206, 0.069645, 0.072824, 0.078387, 0.090851, 0.111905, 0.220045", \ + "0.066761, 0.068200, 0.071379, 0.076942, 0.089406, 0.110460, 0.218600", \ + "0.064864, 0.066303, 0.069482, 0.075045, 0.087509, 0.108563, 0.216703", \ + "0.060007, 0.061446, 0.064625, 0.070188, 0.082652, 0.103706, 0.211846", \ + "0.051094, 0.052533, 0.055712, 0.061275, 0.073739, 0.094793, 0.202933", \ + "0.039513, 0.040952, 0.044131, 0.049694, 0.062158, 0.083212, 0.191352", \ + "0.099512, 0.100951, 0.104130, 0.109693, 0.122157, 0.143211, 0.251351" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&!TENB&((DFTRAMBYP&!SEB)|(!TCENB&!DFTRAMBYP))"; + sdf_cond : "RET1Neq1aTENBeq0aopopDFTRAMBYPeq1aSEBeq0cpoopTCENBeq0aDFTRAMBYPeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.111897, 0.110952, 0.108333, 0.106080, 0.095586, 0.085696, 0.152780", \ + "0.113234, 0.112289, 0.109670, 0.107417, 0.096923, 0.087033, 0.154117", \ + "0.115175, 0.114230, 0.111611, 0.109358, 0.098864, 0.088974, 0.156058", \ + "0.120054, 0.119109, 0.116490, 0.114237, 0.103743, 0.093853, 0.160937", \ + "0.128954, 0.128009, 0.125390, 0.123137, 0.112643, 0.102753, 0.169837", \ + "0.140904, 0.139959, 0.137340, 0.135087, 0.124593, 0.114703, 0.181787", \ + "0.231064, 0.230119, 0.227500, 0.225247, 0.214753, 0.204863, 0.271947" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.115018, 0.113610, 0.110718, 0.105359, 0.094626, 0.081905, 0.141099", \ + "0.116359, 0.114951, 0.112059, 0.106700, 0.095967, 0.083246, 0.142440", \ + "0.118296, 0.116888, 0.113996, 0.108637, 0.097904, 0.085183, 0.144377", \ + "0.123176, 0.121768, 0.118876, 0.113517, 0.102784, 0.090063, 0.149257", \ + "0.132086, 0.130678, 0.127786, 0.122427, 0.111694, 0.098973, 0.158167", \ + "0.144016, 0.142608, 0.139716, 0.134357, 0.123624, 0.110903, 0.170097", \ + "0.234176, 0.232768, 0.229876, 0.224517, 0.213784, 0.201063, 0.260257" \ + ); + } + } + internal_power() { + when : "!TENB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004953, 0.004971, 0.004976, 0.004981, 0.004986, 0.004991, 0.004996"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005713, 0.005719, 0.005725, 0.005730, 0.005736, 0.005742, 0.005748"); + } + } + } + pin(RET1N) { + direction : input; + always_on : true; + related_power_pin : "VDDCE"; + related_ground_pin : "VSSE"; + capacitance : 0.003399; + max_transition : 0.301000; + internal_power() { + when : "((!DFTRAMBYP&CENA&TENA)|(!DFTRAMBYP&TCENA&!TENA))&((!DFTRAMBYP&CENB&TENB)|(!DFTRAMBYP&TCENB&!TENB))"; + related_pg_pin : "VDDCE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.662604, 0.663271, 0.663934, 0.664599, 0.665263, 0.665928, 0.666594"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.153901, 0.154060, 0.154214, 0.154368, 0.154522, 0.154639, 0.154794"); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : DFTRAMBYP; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.026424, 0.026672, 0.027481, 0.028799, 0.031637, 0.035292, 0.041592", \ + "0.026154, 0.026402, 0.027211, 0.028529, 0.031367, 0.035022, 0.041322", \ + "0.025745, 0.025993, 0.026801, 0.028120, 0.030957, 0.034612, 0.040912", \ + "0.024608, 0.024856, 0.025665, 0.026983, 0.029821, 0.033476, 0.039776", \ + "0.024537, 0.024820, 0.025382, 0.026578, 0.029399, 0.032244, 0.037508", \ + "0.025966, 0.026250, 0.026811, 0.028007, 0.030829, 0.033674, 0.037814", \ + "0.028486, 0.028769, 0.029330, 0.030526, 0.033348, 0.036193, 0.040333" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.026424, 0.026672, 0.027481, 0.028799, 0.031637, 0.035292, 0.041592", \ + "0.026154, 0.026402, 0.027211, 0.028529, 0.031367, 0.035022, 0.041322", \ + "0.025745, 0.025993, 0.026801, 0.028120, 0.030957, 0.034612, 0.040912", \ + "0.024608, 0.024856, 0.025665, 0.026983, 0.029821, 0.033476, 0.039776", \ + "0.024537, 0.024820, 0.025382, 0.026578, 0.029399, 0.032244, 0.037508", \ + "0.025966, 0.026250, 0.026811, 0.028007, 0.030829, 0.033674, 0.037814", \ + "0.028486, 0.028769, 0.029330, 0.030526, 0.033348, 0.036193, 0.040333" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + fall_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.027506, 0.027733, 0.028422, 0.029800, 0.032715, 0.036595, 0.042920", \ + "0.027263, 0.027491, 0.028180, 0.029557, 0.032472, 0.036352, 0.042677", \ + "0.026722, 0.026949, 0.027638, 0.029016, 0.031931, 0.035811, 0.042136", \ + "0.026101, 0.026351, 0.027016, 0.028298, 0.031001, 0.034701, 0.041026", \ + "0.026394, 0.026644, 0.027309, 0.028591, 0.031294, 0.034621, 0.038748", \ + "0.027841, 0.028091, 0.028755, 0.030038, 0.032741, 0.036068, 0.040036", \ + "0.030419, 0.030669, 0.031334, 0.032616, 0.035319, 0.038647, 0.042614" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : TCENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.530084, 0.528992, 0.527236, 0.525480, 0.526536, 0.527696, 0.533674", \ + "0.530775, 0.529683, 0.527927, 0.526171, 0.527227, 0.528387, 0.534365", \ + "0.532904, 0.531812, 0.530056, 0.528300, 0.529356, 0.530516, 0.536494", \ + "0.537315, 0.536223, 0.534467, 0.532711, 0.533767, 0.534927, 0.540905", \ + "0.545967, 0.544875, 0.543119, 0.541363, 0.542419, 0.543579, 0.549557", \ + "0.558323, 0.557231, 0.555475, 0.553719, 0.554775, 0.555935, 0.561913", \ + "0.574842, 0.573750, 0.571994, 0.570238, 0.571294, 0.572454, 0.578432" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENB; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : CENA; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.530084, 0.528992, 0.527236, 0.525480, 0.526536, 0.527696, 0.533674", \ + "0.530775, 0.529683, 0.527927, 0.526171, 0.527227, 0.528387, 0.534365", \ + "0.532904, 0.531812, 0.530056, 0.528300, 0.529356, 0.530516, 0.536494", \ + "0.537315, 0.536223, 0.534467, 0.532711, 0.533767, 0.534927, 0.540905", \ + "0.545967, 0.544875, 0.543119, 0.541363, 0.542419, 0.543579, 0.549557", \ + "0.558323, 0.557231, 0.555475, 0.553719, 0.554775, 0.555935, 0.561913", \ + "0.574842, 0.573750, 0.571994, 0.570238, 0.571294, 0.572454, 0.578432" \ + ); + } + } + } + bus(SIA) { + bus_type : rf2_32x19_wm0_SIA; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001217; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225513, 0.227966, 0.234848, 0.248137, 0.276384, 0.317807, 0.462729", \ + "0.224249, 0.226587, 0.233716, 0.247005, 0.275253, 0.316675, 0.461597", \ + "0.222432, 0.224885, 0.231844, 0.245132, 0.273380, 0.314802, 0.459724", \ + "0.217618, 0.220071, 0.226877, 0.240165, 0.268413, 0.309835, 0.454757", \ + "0.206796, 0.209249, 0.215780, 0.229068, 0.257316, 0.298739, 0.443661", \ + "0.200841, 0.203089, 0.209477, 0.221197, 0.249285, 0.285364, 0.430286", \ + "0.287261, 0.289509, 0.295911, 0.307631, 0.335719, 0.368683, 0.497213" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225513, 0.227966, 0.234848, 0.248137, 0.276384, 0.317807, 0.462729", \ + "0.224249, 0.226587, 0.233716, 0.247005, 0.275253, 0.316675, 0.461597", \ + "0.222432, 0.224885, 0.231844, 0.245132, 0.273380, 0.314802, 0.459724", \ + "0.217618, 0.220071, 0.226877, 0.240165, 0.268413, 0.309835, 0.454757", \ + "0.206796, 0.209249, 0.215780, 0.229068, 0.257316, 0.298739, 0.443661", \ + "0.200841, 0.203089, 0.209477, 0.221197, 0.249285, 0.285364, 0.430286", \ + "0.287261, 0.289509, 0.295911, 0.307631, 0.335719, 0.368683, 0.497213" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&SEA"; + sdf_cond : "RET1Neq1aSEAeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.074410, 0.073923, 0.070325, 0.067499, 0.063367, 0.065132, 0.144373", \ + "0.075085, 0.074597, 0.070999, 0.068173, 0.064042, 0.065806, 0.145047", \ + "0.077262, 0.076774, 0.073176, 0.070350, 0.066219, 0.067983, 0.147224", \ + "0.083372, 0.082885, 0.079287, 0.076461, 0.072329, 0.074094, 0.153334", \ + "0.092741, 0.092253, 0.088655, 0.085829, 0.081698, 0.083462, 0.162703", \ + "0.107131, 0.106644, 0.103046, 0.100220, 0.096088, 0.097852, 0.177093", \ + "0.200354, 0.199867, 0.196268, 0.193443, 0.189311, 0.191075, 0.270316" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.074391, 0.073619, 0.069958, 0.066049, 0.059113, 0.052140, 0.119767", \ + "0.075076, 0.074304, 0.070643, 0.066734, 0.059798, 0.052825, 0.120452", \ + "0.077012, 0.076240, 0.072579, 0.068670, 0.061734, 0.054761, 0.122388", \ + "0.082930, 0.082158, 0.078497, 0.074588, 0.067652, 0.060679, 0.128306", \ + "0.092424, 0.091652, 0.087991, 0.084082, 0.077146, 0.070174, 0.137801", \ + "0.106560, 0.105788, 0.102127, 0.098218, 0.091283, 0.084310, 0.151937", \ + "0.200327, 0.199555, 0.195894, 0.191984, 0.185049, 0.178076, 0.245703" \ + ); + } + } + internal_power() { + when : "SEA"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006616, 0.006622, 0.006629, 0.006644, 0.006650, 0.006657, 0.006664"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011343, 0.011355, 0.011366, 0.011377, 0.011389, 0.011400, 0.011412"); + } + } + } + pin(SEA) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001602; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225513, 0.227966, 0.234848, 0.248137, 0.276384, 0.317807, 0.462729", \ + "0.224249, 0.226587, 0.233716, 0.247005, 0.275253, 0.316675, 0.461597", \ + "0.222432, 0.224885, 0.231844, 0.245132, 0.273380, 0.314802, 0.459724", \ + "0.217618, 0.220071, 0.226877, 0.240165, 0.268413, 0.309835, 0.454757", \ + "0.206796, 0.209249, 0.215780, 0.229068, 0.257316, 0.298739, 0.443661", \ + "0.200841, 0.203089, 0.209477, 0.221197, 0.249285, 0.285364, 0.430286", \ + "0.287261, 0.289509, 0.295911, 0.307631, 0.335719, 0.368683, 0.497213" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.225513, 0.227966, 0.234848, 0.248137, 0.276384, 0.317807, 0.462729", \ + "0.224249, 0.226587, 0.233716, 0.247005, 0.275253, 0.316675, 0.461597", \ + "0.222432, 0.224885, 0.231844, 0.245132, 0.273380, 0.314802, 0.459724", \ + "0.217618, 0.220071, 0.226877, 0.240165, 0.268413, 0.309835, 0.454757", \ + "0.206796, 0.209249, 0.215780, 0.229068, 0.257316, 0.298739, 0.443661", \ + "0.200841, 0.203089, 0.209477, 0.221197, 0.249285, 0.285364, 0.430286", \ + "0.287261, 0.289509, 0.295911, 0.307631, 0.335719, 0.368683, 0.497213" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.006616, 0.006622, 0.006629, 0.006644, 0.006650, 0.006657, 0.006664"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.011343, 0.011355, 0.011366, 0.011377, 0.011389, 0.011400, 0.011412"); + } + } + } + pin(DFTRAMBYP) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002056; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.164309, 0.164389, 0.167919, 0.173149, 0.185109, 0.197839, 0.294569", \ + "0.163779, 0.163859, 0.167389, 0.172619, 0.184579, 0.197309, 0.294039", \ + "0.161709, 0.161789, 0.165319, 0.170549, 0.182509, 0.195239, 0.291969", \ + "0.157019, 0.157099, 0.160629, 0.165859, 0.177819, 0.190549, 0.287279", \ + "0.147909, 0.147989, 0.151519, 0.156749, 0.168709, 0.181439, 0.278169", \ + "0.135569, 0.135649, 0.139179, 0.144409, 0.156369, 0.169099, 0.265829", \ + "0.193129, 0.193209, 0.196739, 0.201969, 0.213929, 0.226659, 0.323389" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.200563, 0.202162, 0.203882, 0.211072, 0.223633, 0.238592, 0.339672", \ + "0.199942, 0.201543, 0.203263, 0.210452, 0.223013, 0.237972, 0.339052", \ + "0.197963, 0.199563, 0.201283, 0.208473, 0.221032, 0.235992, 0.337072", \ + "0.193272, 0.194873, 0.196593, 0.203783, 0.216342, 0.231302, 0.332382", \ + "0.185223, 0.186823, 0.188543, 0.195733, 0.208292, 0.223252, 0.324332", \ + "0.171813, 0.173412, 0.175132, 0.182322, 0.194882, 0.209842, 0.310922", \ + "0.229382, 0.230982, 0.232702, 0.239893, 0.252453, 0.267412, 0.368493" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.164309, 0.164389, 0.167919, 0.173149, 0.185109, 0.197839, 0.294569", \ + "0.163779, 0.163859, 0.167389, 0.172619, 0.184579, 0.197309, 0.294039", \ + "0.161709, 0.161789, 0.165319, 0.170549, 0.182509, 0.195239, 0.291969", \ + "0.157019, 0.157099, 0.160629, 0.165859, 0.177819, 0.190549, 0.287279", \ + "0.147909, 0.147989, 0.151519, 0.156749, 0.168709, 0.181439, 0.278169", \ + "0.135569, 0.135649, 0.139179, 0.144409, 0.156369, 0.169099, 0.265829", \ + "0.193129, 0.193209, 0.196739, 0.201969, 0.213929, 0.226659, 0.323389" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.200563, 0.202162, 0.203882, 0.211072, 0.223633, 0.238592, 0.339672", \ + "0.199942, 0.201543, 0.203263, 0.210452, 0.223013, 0.237972, 0.339052", \ + "0.197963, 0.199563, 0.201283, 0.208473, 0.221032, 0.235992, 0.337072", \ + "0.193272, 0.194873, 0.196593, 0.203783, 0.216342, 0.231302, 0.332382", \ + "0.185223, 0.186823, 0.188543, 0.195733, 0.208292, 0.223252, 0.324332", \ + "0.171813, 0.173412, 0.175132, 0.182322, 0.194882, 0.209842, 0.310922", \ + "0.229382, 0.230982, 0.232702, 0.239893, 0.252453, 0.267412, 0.368493" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.700539", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.701230", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.703359", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.707770", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.716422", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.728778", \ + "0.741707, 0.740615, 0.738859, 0.737103, 0.738159, 0.739319, 0.820547" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.700539", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.701230", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.703359", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.707770", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.716422", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.728778", \ + "0.741707, 0.740615, 0.738859, 0.737103, 0.738159, 0.739319, 0.820547" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.220416, 0.221175, 0.221396, 0.221617, 0.221839, 0.222061, 0.222335"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.236454, 0.236690, 0.236913, 0.237150, 0.237387, 0.237624, 0.237862"); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_falling; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.621699, 0.620607, 0.618851, 0.617095, 0.618151, 0.619311, 0.625289", \ + "0.622390, 0.621298, 0.619542, 0.617786, 0.618842, 0.620002, 0.625980", \ + "0.624519, 0.623427, 0.621671, 0.619915, 0.620971, 0.622131, 0.628109", \ + "0.628930, 0.627838, 0.626082, 0.624326, 0.625382, 0.626542, 0.632520", \ + "0.637582, 0.636490, 0.634734, 0.632978, 0.634034, 0.635194, 0.641172", \ + "0.649938, 0.648846, 0.647090, 0.645334, 0.646390, 0.647550, 0.653528", \ + "0.666457, 0.665365, 0.663609, 0.661853, 0.662909, 0.664069, 0.670047" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_setup_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_setup_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000", \ + "0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000" \ + ); + } + } + timing() { + related_pin : RET1N; + timing_type : non_seq_hold_rising; + rise_constraint(rf2_32x19_wm0_inputslew_inputslew_hold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.317005, 0.315015, 0.313035, 0.308595, 0.297845, 0.281275, 0.260065", \ + "0.320985, 0.318995, 0.317015, 0.312575, 0.301825, 0.285255, 0.264045", \ + "0.324955, 0.322965, 0.320985, 0.316545, 0.305795, 0.289225, 0.268015", \ + "0.333845, 0.331855, 0.329875, 0.325435, 0.314685, 0.298115, 0.276905", \ + "0.355325, 0.353335, 0.351355, 0.346915, 0.336165, 0.319595, 0.298385", \ + "0.388465, 0.386475, 0.384495, 0.380055, 0.369305, 0.352735, 0.331525", \ + "0.430885, 0.428895, 0.426915, 0.422475, 0.411725, 0.395155, 0.373945" \ + ); + } + } + } + bus(SIB) { + bus_type : rf2_32x19_wm0_SIB; + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.005751; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.059374, 0.060609, 0.062233, 0.068022, 0.079578, 0.095842, 0.199822", \ + "0.058164, 0.059399, 0.061023, 0.066812, 0.078368, 0.094632, 0.198612", \ + "0.056056, 0.057291, 0.058915, 0.064704, 0.076260, 0.092524, 0.196504", \ + "0.051198, 0.052433, 0.054057, 0.059846, 0.071402, 0.087666, 0.191646", \ + "0.042331, 0.043566, 0.045190, 0.050979, 0.062535, 0.078799, 0.182779", \ + "0.030678, 0.031913, 0.033537, 0.039326, 0.050882, 0.067146, 0.171126", \ + "0.090681, 0.091916, 0.093540, 0.099329, 0.110885, 0.127149, 0.231129" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.065908, 0.067347, 0.070526, 0.076089, 0.088553, 0.109607, 0.217747", \ + "0.064463, 0.065902, 0.069081, 0.074644, 0.087108, 0.108162, 0.216302", \ + "0.062566, 0.064005, 0.067184, 0.072747, 0.085211, 0.106265, 0.214405", \ + "0.057709, 0.059148, 0.062327, 0.067890, 0.080354, 0.101408, 0.209548", \ + "0.048796, 0.050235, 0.053414, 0.058977, 0.071441, 0.092495, 0.200635", \ + "0.037215, 0.038654, 0.041833, 0.047396, 0.059860, 0.080914, 0.189054", \ + "0.097214, 0.098653, 0.101832, 0.107395, 0.119859, 0.140913, 0.249053" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&SEB"; + sdf_cond : "RET1Neq1aSEBeq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.111897, 0.110952, 0.108333, 0.106080, 0.095586, 0.085696, 0.152780", \ + "0.113234, 0.112289, 0.109670, 0.107417, 0.096923, 0.087033, 0.154117", \ + "0.115175, 0.114230, 0.111611, 0.109358, 0.098864, 0.088974, 0.156058", \ + "0.120054, 0.119109, 0.116490, 0.114237, 0.103743, 0.093853, 0.160937", \ + "0.128954, 0.128009, 0.125390, 0.123137, 0.112643, 0.102753, 0.169837", \ + "0.140904, 0.139959, 0.137340, 0.135087, 0.124593, 0.114703, 0.181787", \ + "0.231064, 0.230119, 0.227500, 0.225247, 0.214753, 0.204863, 0.271947" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.115018, 0.113610, 0.110718, 0.105359, 0.094626, 0.081905, 0.141099", \ + "0.116359, 0.114951, 0.112059, 0.106700, 0.095967, 0.083246, 0.142440", \ + "0.118296, 0.116888, 0.113996, 0.108637, 0.097904, 0.085183, 0.144377", \ + "0.123176, 0.121768, 0.118876, 0.113517, 0.102784, 0.090063, 0.149257", \ + "0.132086, 0.130678, 0.127786, 0.122427, 0.111694, 0.098973, 0.158167", \ + "0.144016, 0.142608, 0.139716, 0.134357, 0.123624, 0.110903, 0.170097", \ + "0.234176, 0.232768, 0.229876, 0.224517, 0.213784, 0.201063, 0.260257" \ + ); + } + } + internal_power() { + when : "SEB"; + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.004934, 0.004941, 0.004984, 0.005002, 0.005007, 0.005012, 0.005017"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.005682, 0.005693, 0.005699, 0.005705, 0.005710, 0.005716, 0.005722"); + } + } + } + pin(SEB) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.001894; + max_transition : 0.301000; + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.281570, 0.283709, 0.289070, 0.301150, 0.325614, 0.357152, 0.483345", \ + "0.280673, 0.282812, 0.288173, 0.300253, 0.324717, 0.356255, 0.482732", \ + "0.278082, 0.280221, 0.285581, 0.297661, 0.322126, 0.353663, 0.480371", \ + "0.273779, 0.275918, 0.281279, 0.293359, 0.317823, 0.349361, 0.475880", \ + "0.264921, 0.267060, 0.272420, 0.284500, 0.308965, 0.340502, 0.466853", \ + "0.261613, 0.263852, 0.269250, 0.280471, 0.302715, 0.329413, 0.455414", \ + "0.347397, 0.349636, 0.355033, 0.366254, 0.388499, 0.415196, 0.522915" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.281570, 0.283709, 0.289070, 0.301150, 0.325614, 0.357152, 0.483345", \ + "0.280673, 0.282812, 0.288173, 0.300253, 0.324717, 0.356255, 0.482732", \ + "0.278082, 0.280221, 0.285581, 0.297661, 0.322126, 0.353663, 0.480371", \ + "0.273779, 0.275918, 0.281279, 0.293359, 0.317823, 0.349361, 0.475880", \ + "0.264921, 0.267060, 0.272420, 0.284500, 0.308965, 0.340502, 0.466853", \ + "0.261613, 0.263852, 0.269250, 0.280471, 0.302715, 0.329413, 0.455414", \ + "0.347397, 0.349636, 0.355033, 0.366254, 0.388499, 0.415196, 0.522915" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N"; + sdf_cond : "RET1Neq1"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126520, 0.124971, 0.121790, 0.116688, 0.105145, 0.094266, 0.160533", \ + "0.127995, 0.126447, 0.123265, 0.118159, 0.106615, 0.095736, 0.162004", \ + "0.130126, 0.128577, 0.125396, 0.120294, 0.108750, 0.097871, 0.164139", \ + "0.135494, 0.133945, 0.130764, 0.125661, 0.114117, 0.103238, 0.169506", \ + "0.145295, 0.143746, 0.140565, 0.135451, 0.123907, 0.113028, 0.179296", \ + "0.158418, 0.156869, 0.153688, 0.148596, 0.137052, 0.126173, 0.192441", \ + "0.250069, 0.248520, 0.245339, 0.240247, 0.228703, 0.217824, 0.284092" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.126520, 0.124971, 0.121790, 0.116688, 0.105145, 0.094266, 0.160533", \ + "0.127995, 0.126447, 0.123265, 0.118159, 0.106615, 0.095736, 0.162004", \ + "0.130126, 0.128577, 0.125396, 0.120294, 0.108750, 0.097871, 0.164139", \ + "0.135494, 0.133945, 0.130764, 0.125661, 0.114117, 0.103238, 0.169506", \ + "0.145295, 0.143746, 0.140565, 0.135451, 0.123907, 0.113028, 0.179296", \ + "0.158418, 0.156869, 0.153688, 0.148596, 0.137052, 0.126173, 0.192441", \ + "0.250069, 0.248520, 0.245339, 0.240247, 0.228703, 0.217824, 0.284092" \ + ); + } + } + internal_power() { + related_pg_pin : "VDDPE"; + rise_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.088966, 0.089056, 0.089133, 0.089188, 0.089314, 0.089360, 0.089449"); + } + fall_power(rf2_32x19_wm0_inputslew_energy_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values ("0.097685, 0.097783, 0.097881, 0.097992, 0.098090, 0.098188, 0.098286"); + } + } + } + pin(COLLDISN) { + direction : input; + related_power_pin : "VDDPE"; + related_ground_pin : "VSSE"; + capacitance : 0.002131; + max_transition : 0.301000; + timing() { + related_pin : CLKA; + timing_type : setup_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.536338, 0.538180, 0.540171, 0.544864, 0.554476, 0.564559, 0.656199", \ + "0.535299, 0.537141, 0.539132, 0.543825, 0.553437, 0.563520, 0.655160", \ + "0.533306, 0.535148, 0.537139, 0.541832, 0.551444, 0.561527, 0.653167", \ + "0.529074, 0.530916, 0.532907, 0.537600, 0.547212, 0.557295, 0.648935", \ + "0.520851, 0.522693, 0.524684, 0.529377, 0.538989, 0.549072, 0.640712", \ + "0.507722, 0.509564, 0.511555, 0.516248, 0.525860, 0.535943, 0.627583", \ + "0.568380, 0.570222, 0.572213, 0.576906, 0.586518, 0.596601, 0.688241" \ + ); + } + } + timing() { + related_pin : CLKA; + timing_type : hold_rising; + when : "RET1N&((TENA&!CENA)|(!TENA&!TCENA))"; + sdf_cond : "RET1Neq1aopopTENAeq1aCENAeq0cpoopTENAeq0aTCENAeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.833036, 0.831944, 0.830188, 0.828432, 0.829488, 0.830648, 0.911876", \ + "0.833727, 0.832635, 0.830879, 0.829123, 0.830179, 0.831339, 0.912567", \ + "0.835856, 0.834764, 0.833008, 0.831252, 0.832308, 0.833468, 0.914696", \ + "0.840267, 0.839175, 0.837419, 0.835663, 0.836719, 0.837879, 0.919107", \ + "0.848919, 0.847827, 0.846071, 0.844315, 0.845371, 0.846531, 0.927759", \ + "0.861275, 0.860183, 0.858427, 0.856671, 0.857727, 0.858887, 0.940115", \ + "0.953044, 0.951952, 0.950196, 0.948440, 0.949496, 0.950656, 1.031884" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : setup_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.627953, 0.629795, 0.631786, 0.636479, 0.646091, 0.656174, 0.747814", \ + "0.626914, 0.628756, 0.630747, 0.635440, 0.645052, 0.655135, 0.746775", \ + "0.624921, 0.626763, 0.628754, 0.633447, 0.643059, 0.653142, 0.744782", \ + "0.620689, 0.622531, 0.624522, 0.629215, 0.638827, 0.648910, 0.740550", \ + "0.612466, 0.614308, 0.616299, 0.620992, 0.630604, 0.640687, 0.732327", \ + "0.599337, 0.601179, 0.603170, 0.607863, 0.617475, 0.627558, 0.719198", \ + "0.659995, 0.661837, 0.663828, 0.668521, 0.678133, 0.688216, 0.779856" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.627953, 0.629795, 0.631786, 0.636479, 0.646091, 0.656174, 0.747814", \ + "0.626914, 0.628756, 0.630747, 0.635440, 0.645052, 0.655135, 0.746775", \ + "0.624921, 0.626763, 0.628754, 0.633447, 0.643059, 0.653142, 0.744782", \ + "0.620689, 0.622531, 0.624522, 0.629215, 0.638827, 0.648910, 0.740550", \ + "0.612466, 0.614308, 0.616299, 0.620992, 0.630604, 0.640687, 0.732327", \ + "0.599337, 0.601179, 0.603170, 0.607863, 0.617475, 0.627558, 0.719198", \ + "0.659995, 0.661837, 0.663828, 0.668521, 0.678133, 0.688216, 0.779856" \ + ); + } + } + timing() { + related_pin : CLKB; + timing_type : hold_rising; + when : "RET1N&((TENB&!CENB)|(!TENB&!TCENB))"; + sdf_cond : "RET1Neq1aopopTENBeq1aCENBeq0cpoopTENBeq0aTCENBeq0cpcp"; + rise_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.863304, 0.862212, 0.860456, 0.858700, 0.859756, 0.860916, 0.942144", \ + "0.863995, 0.862903, 0.861147, 0.859391, 0.860447, 0.861607, 0.942835", \ + "0.866124, 0.865032, 0.863276, 0.861520, 0.862576, 0.863736, 0.944964", \ + "0.870535, 0.869443, 0.867687, 0.865931, 0.866987, 0.868147, 0.949375", \ + "0.879187, 0.878095, 0.876339, 0.874583, 0.875639, 0.876799, 0.958027", \ + "0.891543, 0.890451, 0.888695, 0.886939, 0.887995, 0.889155, 0.970383", \ + "0.983312, 0.982220, 0.980464, 0.978708, 0.979764, 0.980924, 1.062152" \ + ); + } + fall_constraint(rf2_32x19_wm0_clockslew_inputslew_setuphold_template) { + index_1 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + index_2 ("0.005000, 0.009000, 0.019000, 0.038000, 0.080000, 0.151000, 0.301000"); + values (\ + "0.863304, 0.862212, 0.860456, 0.858700, 0.859756, 0.860916, 0.942144", \ + "0.863995, 0.862903, 0.861147, 0.859391, 0.860447, 0.861607, 0.942835", \ + "0.866124, 0.865032, 0.863276, 0.861520, 0.862576, 0.863736, 0.944964", \ + "0.870535, 0.869443, 0.867687, 0.865931, 0.866987, 0.868147, 0.949375", \ + "0.879187, 0.878095, 0.876339, 0.874583, 0.875639, 0.876799, 0.958027", \ + "0.891543, 0.890451, 0.888695, 0.886939, 0.887995, 0.889155, 0.970383", \ + "0.983312, 0.982220, 0.980464, 0.978708, 0.979764, 0.980924, 1.062152" \ + ); + } + } + } + leakage_power() { + related_pg_pin : "VDDCE"; + value : 3.477e-04; + } + leakage_power() { + related_pg_pin : "VDDPE"; + value : 1.911e-03; + } + leakage_power() { + related_pg_pin : "VDDCE"; + when :"!RET1N"; + value : 3.210e-04; + } + leakage_power() { + related_pg_pin : "VDDPE"; + when :"!RET1N"; + value : 1.819e-03; + } + } +} diff --git a/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.ps b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.ps new file mode 100644 index 00000000..9d4b95ca --- /dev/null +++ b/models/memory/cln28hpm/rf2_32x19_wm0/rf2_32x19_wm0_tt_0p90v_0p90v_25c.ps @@ -0,0 +1,5288 @@ +%!PS-Adobe-3.0 +% common_memcomp Version: c0.1.0-EAC +% lang compiler Version: 4.1.6-EAC2 Oct 30 2012 16:32:37 +% CONFIDENTIAL AND PROPRIETARY SOFTWARE OF ARM PHYSICAL IP, INC. +% +% Copyright (c) 1993 - 2019 ARM Physical IP, Inc. All Rights Reserved. +% +% Use of this Software is subject to the terms and conditions of the +% applicable license agreement with ARM Physical IP, Inc. +% In addition, this Software is protected by patents, copyright law +% and international treaties. +% +% The copyright notice(s) in this Software does not indicate actual or +% intended publication of this Software. +% +% Compiler Name: High Density Two Port Register File SVT MVT Compiler +% +% Creation Date: Mon Nov 11 12:01:05 2019 +% +% Instance Options: +% Instance Name: rf2_32x19_wm0 +% Number of Words: 32 +% Number of Bits: 19 +% Multiplexer Width: 2 +% Multi-Vt selection: BASE +% Frequency : 1 +% Activity Factor <%>: 50 +% Pipeline: off +% Word-Write Mask: off +% Word Partition Size: 1 +% Write through: off +% Top Metal Layer: m5-m10 +% Power Type: otc +% Redundancy: off +% Redundant Columns: 2 +% Redundant Rows: 0 +% BIST MUXes: on +% Soft Error Repair (SER): none +% Power Gating: off +% Back Biasing: off +% Retention: on +% Extra Margin Adjustment: on +% Advanced Test Features: off +% Customer Comment: This is a memory instance +% Bus-notation: on +% Power Ground Rename: vddpe:VDDPE,vddce:VDDCE,vsse:VSSE +% Name Case: upper +% Check Instance Name: off +% Diodes: on +% Drive Strength: 6 +% Site Definitions: off +% Library Name: USERLIB +% Liberty setting: nldm +% +% Compiler Versions: +% Memory Version: r4p0 +% Lang compiler Version: 4.1.6-EAC2 +% View Name: Postscript +% AMCI Version: 1.4.3-EAC +% RTE Version: 2.1.0-EAC +% datasheet_memcomp Version: 1.3.1-amci +% +% Modeling Assumptions: N/A +% +% Modeling Limitations: N/A +% +% Known Bugs: N/A +% +% Known Work Arounds: N/A +% +%%BoundingBox: 0 0 612 792 +%%Creator: post +%%DocumentData: Clean8Bit +%%DocumentPaperSizes: Letter +%%Orientation: Portrait +%%Pages: (atend) +%%PageOrder: Ascend +%%For: ARM +%%EndComments + +%%BeginProlog + +% TableRow sets the table row height +% Expects dy on the stack +/TableRow { + /tablerow exch def +} def + + +% ArrowRight prints an arrow pointing to the right +% Expects text x y on the stack +/ArrowRight { + newpath + moveto + -2.5 1 rmoveto + 2.5 -1 rlineto + -2.5 -1 rlineto + stroke +} def + + +% ArrowLeft prints an arrow pointing to the left +% Expects text x y on the stack +/ArrowLeft { + newpath + moveto + 2.5 1 rmoveto + -2.5 -1 rlineto + 2.5 -1 rlineto + stroke +} def + + +% ArrowUp prints an arrow pointing up +% Expects text x y on the stack +/ArrowUp { + newpath + moveto + 1 -2.5 rmoveto + -1 2.5 rlineto + -1 -2.5 rlineto + stroke +} def + + +% ArrowDown prints an arrow pointing down +% Expects text x y on the stack +/ArrowDown { + newpath + moveto + 1 2.5 rmoveto + -1 -2.5 rlineto + -1 2.5 rlineto + stroke +} def + + +% CenterLabel prints text centered at the x,y +% centers on x only +% Expects text subscript x y on the stack +/CenterLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 2 div 0 exch sub % 0-dx/2 on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% LeftLabel prints text to the left of the x,y +% centers on x only +% Expects text subscript x y on the stack +/LeftLabel { + moveto + /subscr exch def % save the subscript + /txt exch def % save the text + txt stringwidth pop % string x on stack + subscr stringwidth pop % subscr x on stack + add 0 exch sub % 0-dx on stack + 0 rmoveto + txt show + 0 -2 rmoveto + subscr show +} def + + +% RightLabel prints text to the right of the x,y +% Expects text subscript x y on the stack +/RightLabel { + moveto + exch + show + 0 -2 rmoveto + show +} def + + +% CenterText prints text centered at the x,y +% centers on x only +% Expects text x y on the stack +/CenterText { + moveto + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% Table2start begins a 2 column table. +% Expects 5 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table2Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table2End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table2End { + 1 setlinewidth + tablex tabley + table1width table2width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table2DoubleLine doubles up the line at the bottom of a box +% Expects nothing on the stack +/Table2DoubleLine { + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 1.5 setlinewidth + stroke +} def + + +% Table2Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table2Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + + +% Table2CC prints centered strings at the top of a 2 column table. +% Expects string string on the stack +/Table2CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + + +% Table2LC prints one left aligned string and one centered string +% Expects 2 strings on the stack +/Table2LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LCMicron prints one left aligned string and one centered string +% The centered string has a micron symbol at the end of it. +% Expects 2 strings on the stack +/Table2LCMicron { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % col 2 width + TextFont setfont + dup stringwidth pop % dx of string on stack + /Symbol findfont 12 scalefont setfont + (\155) stringwidth pop % dx of symbol u on stack + add % dx of number with mu + TextFont setfont + (m) stringwidth pop % dx of m on stack + add % dx of entire box contents on stack + 2 div % dx/2 on stack + + % col 2 + tablex table1width add table2width 2 div add % xcenter of square on stack + exch sub + tabley 3 add % string x y+3 on stack + moveto + TextFont setfont + show + /Symbol findfont 12 scalefont setfont + (\155) show + TextFont setfont + (m) show + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + + +% Table2LL prints two left aligned strings +% at the top of a 2 column table. +% Expects 2 string (text) on the stack +/Table2LL { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table2Verticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + + % col 1 + tablex + tabley 3 add % string x y+3 on stack + moveto + ( ) show + show + +} def + + +% Table2Header prints the header to the table +% Expects string string on the stack +/Table2Header { + tablex tabley moveto + table1width table2width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + Table2CC + 0 setgray +} def + + +/Table4Header { + tablex tabley moveto + table1width table2width add table3width add table4width add 0 rlineto + 0 0 tablerow sub rlineto + 0 table1width table2width add table3width add table4width add sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + 1.0 setgray + /TextSuperScriptFont /Helvetica findfont 8 scalefont def + Table4CC + 0 setgray +} def + + +/CenterTextSuperScript{ + moveto + /sqSuper exch def + /mUnit exch def + dup stringwidth pop % string x on stack + 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show + + mUnit () ne{ + 2 0 rmoveto + (\()show + /Symbol findfont 8 scalefont setfont + (\155) show + TextSuperScriptFont setfont + mUnit show + TextFont setfont + sqSuper () eq { + (\))show + }if + }if + + sqSuper () ne { + 0 4 rmoveto + TextSuperScriptFont setfont + sqSuper show + 0 -4 rmoveto + TextFont setfont + (\)) show + } if +} def + + +/Table4CC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + % col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterTextSuperScript + + % col 1 + tablex table1width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + +} def + +% Table4Verticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table4Verticals { + % complete the box for each + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table2width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table3width 0 rmoveto + 0 tablerow rlineto + 0 tablerow neg rmoveto + table4width 0 rmoveto + 0 tablerow rlineto + 0.5 setlinewidth + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + 0.5 setlinewidth + stroke + + 1 setlinewidth +} def + +% Table4LC prints one left aligned string and one centered string +% Expects 4 strings on the stack +/Table4LC { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table4Verticals + + % set fonts for this row + TextFont setfont + + %col 4 + tablex table1width add table2width add table3width add table4width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + %col 3 + tablex table1width add table2width add table3width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText + + % col 1 + tablex 3 add + tabley 3 add % string x+2 y+3 on stack + moveto + show + +} def + +% Table4End ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table4End { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + +% Table4Start begins a 4 column table. +% Expects 7 values on the stack: w1 w2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table4Start { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4width exch def + /table3width exch def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerStart begins a 2 column table of 1 process corners. +% Expects 5 values on the stack: w1 ... wn xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/Table1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table5width 0 def + /table4width 0 def + /table3width 0 def + /table2width exch def + /table1width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% Table1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/Table1CornerEnd { + 1 setlinewidth + tablex tabley + table1width table2width add table3width add table4width add table5width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% Table1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/Table1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % between col 1 and 2 + newpath + tablex tabley moveto + table1width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + table1width 0 rlineto + table2width 0 rlineto + table3width 0 rlineto + table4width 0 rlineto + table5width 0 rlineto + stroke + + 1 setlinewidth +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerTRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost thrice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner4Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost four times as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1Corner5Row prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost five times as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 30 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string x+5 y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerDRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 2 mul def % 2* the y size + /yup 9 def + /yupc tablerow 2 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add % string x+5 y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% Table1CornerRow prints centered strings +% Expects 3 strings on the stack +% col 1 item, col 1 superscript, 1 corner values +/Table1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + Table1CornerVerticals + + % set fonts for this row + TextFont setfont + + % col 2 + tablex table1width add table2width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % save the superscript + /super exch def + + % col 1 + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% Table1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% Table1CornerCornerCol prints the header on the first column +% Expects string string string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/Table1CornerCornerCol { + /xc exch def + /temp exch def + /volt exch def + + % first line + TextFont setfont + xc tabley 3 add tablerow 2 div add % string xc y on stack + CenterText + + % next line width + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xc exch sub + tabley 5 add moveto + + % next line display + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + +} def + + +% Table1CornerHeader prints the header to the table +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/Table1CornerHeader { + (Pin) % column headings + (tt Process) (0.9) (25) + + /tablerow tablerow tablerow add def % Double the y size + + % make a box around the header area + tablex tabley moveto + table1width table2width add table3width add table4width add table5width add 0 rlineto + 0 0 tablerow sub rlineto + table1width table2width add table3width add table4width add table5width add 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray % gray fill the box + fill + + % White lines and text + 1.0 setgray + + /tabley tabley tablerow sub def + + % do the vertical lines between columns + Table1CornerVerticals + + % Column 1 header + tablex table1width add table2width 2 div add Table1CornerCornerCol + + % Pin column header + tablex table1width 2 div add Table1CornerFirstCol + + % back to black lines and text + 0 setgray + + % Restore the row height + /tablerow tablerow 2 div def +} def + + +% TableD1CornerStart begins a 2 column table of 1 double process corners. +% Expects values on the stack: pin_width corn1_1 corn1_2 +% corn2_1 corn2_2 corn3_1 corn3_2 corn4_1 corn4_2 xs ys dy +% (col widths xstart ystart at upper left of table and height of row) +/TableD1CornerStart { + TableRow % uses yrow on stack + /tabley exch def + /tablex exch def + /table4_2_width 0 def + /table4_1_width 0 def + /table3_2_width 0 def + /table3_1_width 0 def + /table2_2_width 0 def + /table2_1_width 0 def + /table1_2_width exch def + /table1_1_width exch def + /tablep_width exch def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableD1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableD1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + tabley % return y +} def + + +% TableD1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableD1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + % single between pin and first corner + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + + +% TableD1CornerRow prints centered strings +% Expects 3 strings on the stack +/TableD1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % pin name + tablex 5 add + tabley 3 add % string x+5 y+3 on stack + moveto + TextFont setfont + show + +} def + + +% TableD1CornerDRow prints centered strings +% The pin description is broken into 2 rows for this one. +% Expects 10 strings on the stack +/TableD1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableD1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % pin name in two rows + tablex 5 add + tabley 3 add + moveto + TextFont setfont + show + tablex 5 add + tabley 13 add + moveto + show + + % restore the y height of the row + /tablerow olddy def + +} def + + +% TableD1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableD1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableD1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableD1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 4 div def + + % first line (Fast Process) + xct + tabley h add h add h add 3 add % string xc y on stack + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Pulse) xcl tabley h add 3 add CenterText + (Width) xcl tabley 5 add CenterText + + % Voltage display + (Voltage) xcr tabley 3 add h 2 div add CenterText + +} def + + +% Centers converts 3 values to the 3 needed centers +% Expects xleft width1 width2 on stack +% Returns xtc xlc xrc +/Centers { + /w2 exch def + /w1 exch def + /l exch def + + l w1 add % xtc on stack + l w1 2 div add % xtc xlc on stack + l w1 add w2 2 div add % xtc xlc xrc on stack +} def + + +% TableD1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableD1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (tt Process) (0.9) (25) + /tablerow tablerow 4 mul def % 4* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in almost white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableD1CornerVerticals + /tableheader 0 def + + tablex tablep_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableD1CornerCornerCol + + tablex tablep_width 2 div add TableD1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 4 div def +} def + + +% TableT1CornerStartHydra begins a 2 column table of 1 double process corners. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStartHydra { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 80 def + /tablep_width 115 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% TableT1CornerStart begins a 2 column table of 1 double process corners. Extend first and second cols. +% Expects nothing on the stack +% Uses pagey line_left global vars +/TableT1CornerStart { + 14 TableRow % row height + /found999 (no) def % figure out illegal ema states + /tabley pagey def % starting x,y of table + /tablex line_left def + /table4_2_width 0 def % column widths + /table4_1_width 0 def + /table3_2_width 0 def % column widths + /table3_1_width 0 def + /table2_2_width 0 def % column widths + /table2_1_width 0 def + /table1_2_width 44 def % column widths + /table1_1_width 44 def + /tablet_width 130 def + /tablep_width 165 def + /tableystart tabley def + + % no drawing done yet + % no need to update the x and y +} def + + +% EMAIlegalFootnote +% Expects nothing on the stack +% returns new page y +/EMAIllegalFootnote { + /tabley pagey 10 sub def + tablex tabley moveto + TextFont setfont + (Timing value of ** indicates illegal EMA setting for this corner.) show +} def + + +% TableT1CornerEnd ends the table +% Expects nothing on the stack +% Draws a line at the bottom of the table +/TableT1CornerEnd { + 1 setlinewidth + tablex tabley + tablep_width tablet_width add + table1_1_width add table1_2_width add + tableystart tabley sub + rectstroke + % no need to update the x and y + found999 (yes) eq + { EMAIllegalFootnote } if + tabley % return y +} def + + +% TableT1CornerVerticals puts the verticals and the horiz bar +% on one row of the table +% Expects nothing on the stack +/TableT1CornerVerticals { + % complete the box for each + + 0.5 setlinewidth + + % single in corner 1 + tableheader 1 ne { + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add + 0 rmoveto + 0 tablerow rlineto + stroke + } if + + % double between symbol and first corner + newpath + tablex tabley moveto + tablep_width tablet_width add 1 sub 0 rmoveto + 0 tablerow rlineto + stroke + newpath + tablex tabley moveto + tablep_width tablet_width add 1 add 0 rmoveto + 0 tablerow rlineto + stroke + + % single between pin and symbol + newpath + tablex tabley moveto + tablep_width 0 rmoveto + 0 tablerow rlineto + stroke + + % bottom + newpath + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + table2_1_width add table2_2_width add + table3_1_width add table3_2_width add + table4_1_width add table4_2_width add + 0 rlineto + stroke + + 1 setlinewidth +} def + +% CenterText999 prints text centered at the x,y +% '999' is changed to ** +% centers on x only +% Expects text x y on the stack +/CenterText999 { + moveto + dup (999.000) eq + { % replace string if == '999.000' + pop + (**) + % found999 (yes) def + } if + dup stringwidth pop % string x on stack + 2 div 0 exch sub % string 0-x/2 on stack + 0 rmoveto + show +} def + + +% TableT1CornerRow prints centered strings +% Expects 3 strings on the stack +% pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerRow { + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley 3 add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley 4 add % x y+4 on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner4Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 4 mul def % 4* the y size + /yup 27 def + /yupc tablerow 4 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner5Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 5 mul def % 5* the y size + /yup 36 def + /yupc tablerow 5 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1Corner6Row { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 6 mul def % 6* the y size + /yup 45 def + /yupc tablerow 6 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 45 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 60 add % string xcenter y+3 on stack + moveto + show + + tablex 3 add + tabley 75 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerTRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerTRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow 3 mul def % 3* the y size + /yup 18 def + /yupc tablerow 3 div def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley 15 add + moveto + show + + tablex 3 add + tabley 30 add % string xcenter y+3 on stack + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerDRow prints centered strings +% Expects strings on the stack +% pin pin pin-superscript symbol symbol-subscript +% 1 corners with min max for each +/TableT1CornerDRow { + + % Save the old tablerow + /olddy tablerow def + % We will use a wider one that is almost twice as big + /tablerow tablerow tablerow add 2 sub def + /yup 9 def + + % update the x and y + /tabley tabley tablerow sub def + + % complete the box for each + TableT1CornerVerticals + + % set fonts for this row + TextFont setfont + + % corner 1 + tablex tablep_width add tablet_width add + table1_1_width add table1_2_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + tablex tablep_width add tablet_width add + table1_1_width 2 div add + tabley yup add % string xcenter y+3 on stack + CenterText999 + + % symbol subscript + /subs exch def + + % symbol name + /symbol exch def + + % calculate width + TextFont setfont + symbol stringwidth pop + TextSuperscriptFont setfont + subs stringwidth pop + add 2 div % width/2 now on stack + + % show + tablex tablep_width add tablet_width 2 div add + exch sub % xcenter-width/2 on stack + tabley yup add 1 add % x y+1+yup on stack + moveto + TextFont setfont + symbol show + TextSuperscriptFont setfont + 0 -2 rmoveto + subs show + + % save the superscript + /super exch def + + % pin name + tablex 3 add + tabley 3 add % string x+3 y+3 on stack + moveto + TextFont setfont + show + + % do the superscript + super () ne { + 0 4 rmoveto + TextSuperscriptFont setfont + super show + TextFont setfont + } if + + tablex 3 add + tabley olddy add + moveto + show + + % restore the row height + /tablerow olddy def + +} def + + +% TableT1CornerFirstCol prints the header on the first column +% Expects string xc on the stack +% Expects tabley to be at the bottom of the square +% Expects tablerow to be the height of a double box +/TableT1CornerFirstCol { + tabley tablerow 2 div add 3 sub % string xc yc on stack + CenterText +} def + + +% TableT1CornerCornerCol prints the header on the corner +% Expects (Fast) (1.1) (125) xct xcl xcr on the stack +% ... xcenter for top, xcenter for left, xcenter for right +% Expects tabley to be at the bottom of the square +% Expects tablerow to be 4 times the real tablerow +/TableT1CornerCornerCol { + /xcr exch def + /xcl exch def + /xct exch def + /temp exch def + /volt exch def + /h tablerow 3 div def + + % first line (Fast Process) + xct + tabley h add h add 3 add % string xc y on stack + TextFont setfont + CenterText + + % next line width (1.10V, 0oC) + volt stringwidth pop + (V, ) stringwidth pop add + temp stringwidth pop add + (oC) stringwidth pop add + 2 div + xct exch sub + tabley h add 5 add % string xc y on stack + moveto + + % next line display (1.10V, 0oC) + /saved_font TextFont def + volt show + (V, ) show + temp show + /Symbol findfont text_size scalefont setfont + (\260) show + /TextFont saved_font def + TextFont setfont + (C) show + + % Puse Width display + (Min) xcl tabley 5 add CenterText + + % Voltage display + (Max) xcr tabley 5 add CenterText + +} def + + +% TableT1CornerHeader prints the header to the table +% Expects nothing on the stack +% First string is over the first column. +% Second string is over the symbol column. +% Then 3 strings for each column such as: +% Fast Process +% 1.1V, 0oC +% where we supply the 'V,' and 'degrees C'. +/TableT1CornerHeader { + (Pin) % pin column heading + (Symbol) % var column heading + (tt Process) (0.9) (25) + + % Setup the fonts for the heading + /TextFont /Helvetica-Bold findfont text_size scalefont def + + /tablerow tablerow 3 mul def % 3* the y size + + % Create a box, fill it with black + tablex tabley moveto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 rlineto + 0 0 tablerow sub rlineto + tablep_width tablet_width add + table1_1_width add table1_2_width add + 0 exch sub 0 rlineto + 0 tablerow rlineto + 0.5 setgray + fill + + % do the text in white + 1.0 setgray + /tabley tabley tablerow sub def + /tableheader 1 def + TableT1CornerVerticals + /tableheader 0 def + + tablex tablep_width add tablet_width add + table1_1_width table1_2_width Centers % string string string xtc xlc xrc on stack + TableT1CornerCornerCol + + tablex tablep_width add tablet_width 2 div add TableT1CornerFirstCol + + tablex tablep_width 2 div add TableT1CornerFirstCol + + % back to black, back to normal table row height + 0 setgray + /tablerow tablerow 3 div def + + % Setup the fonts for the rest of the table + /TextFont /Helvetica findfont text_size scalefont def + /TextSuperscriptFont /Helvetica findfont 8 scalefont def +} def + + +% TextEnd ends a paragraph (or series of paragraphs) +% Expects nothing on the stack +% returns the new page y +/TextEnd { + text_y % return this +} def + + +% TextBulletOn sets bullets at start of para +% Expects nothing on the stack +/TextBulletOn { + /text_bullet true def + /Symbol findfont text_size scalefont setfont + (\267 ) stringwidth pop + /text_bullet_width exch def + TextFont setfont + /text_bullet true def +} def + + +% TextBulletOff sets bullets off at start of para +% Expects nothing on the stack +/TextBulletOff { + /text_bullet false def +} def + + +% TextStart initializes the paragraph stuff +% Expects left right margins y deltay on the stack +/TextStart { + /text_dy exch def + /text_y exch def + /text_right exch def + /text_left exch def + /text_starty text_y def + /text_bullet false def + /text_size 10 def + /text_indent_width 0 def +} def + + +% TextParaStart initializes one paragraph +% Expects nothing on the stack +/TextParaStart { + + % carrige return linefeed + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + + % if bullet show and step over in x + text_bullet { + /Symbol findfont text_size scalefont setfont + (\267 ) show + TextFont setfont + /text_x text_x text_bullet_width add def + } if + + % text_indent does not apply to the first line +} def + + +% TextParaEnd ends one paragraph. +% Expects nothing on the stack +/TextParaEnd { +} def + + +% TextIndent sets the indent string used at start of para +% all following lines space over the indent width +% Expects string on the stack +/TextIndent { + stringwidth pop + /text_indent_width exch def +} def + + +% TextNewline does a carrige return line feed +% Expects nothing on the stack +/TextNewline { + /text_y text_y text_dy sub def + /text_x text_left def + text_x text_y moveto + text_bullet { + text_bullet_width 0 rmoveto + /text_x text_x text_bullet_width add def + } if + text_indent_width 0 gt { + text_indent_width 0 rmoveto + /text_x text_x text_indent_width add def + } if +} def + + +% TextWord puts one word in the current paragraph +% Expects string on the stack +/TextWord { + dup stringwidth pop % dx on the stack + /text_dx exch def + text_dx text_x add % x pos at end of word on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true + dup ( ) eq + text_x text_left eq + and % if word is space and at left margin then pop + { + pop + } { + show + /text_x text_x text_dx add def + } ifelse % else show +} def + + +% TextSuperscript puts a superscript word in the current paragraph +% The routine does not test for too wide, the superscript MUST +% go with the previous word. +% Expects string on the stack +/TextSuperscript { + TextSuperscriptFont setfont + dup stringwidth pop % dx on the stack + /text_x exch text_x add def + 0 4 rmoveto + show + 0 0 text_size 2 div sub rmoveto + TextFont setfont +} def + + +% TextReserveSpace makes sure there is enough space on +% the current line for the given text to be printed. +% If there isnt enough, a newline is generated. +/TextReserveSpace { + stringwidth pop % dx on the stack + text_x add % x at end of work on stack + text_right gt { % true if word will not fit + TextNewline + } if % do newline if true +} def + + +% TextPiece puts words in the current paragraph +% Expects string on the stack +/TextPiece { + TextFont setfont + { + % expect string to search on stack + ( ) search % post match pre true or string false on stack + { TextWord TextWord } % true display pre, display space + { TextWord exit } % false display string break + ifelse + % go around loop again with string to search on stack + } loop +} def + + +% Expects string on the stack +% Uses c and s vars +/TextFourAdd { + s 1 eq { + % first one + TextPiece + } { + s c eq { + % last one + ( and ) TextPiece + TextPiece + } { + % a middle one + (, ) TextPiece + TextPiece + } ifelse + } ifelse +} def + + +% TextFourList prints from 1 to 4 things to the paragraph +% Expects 4 strings on the stack. (3 could be empty). +/TextFourList { + /s1 exch def + /s2 exch def + /s3 exch def + /s4 exch def + /c 0 def + + % count the number of items + s1 () ne { + /c c 1 add def + } if + s2 () ne { + /c c 1 add def + } if + s3 () ne { + /c c 1 add def + } if + s4 () ne { + /c c 1 add def + } if + + % display the items + /s 0 def + s1 () ne { + /s 1 s add def + s1 TextFourAdd + } if + s2 () ne { + /s 1 s add def + s2 TextFourAdd + } if + s3 () ne { + /s 1 s add def + s3 TextFourAdd + } if + s4 () ne { + /s 1 s add def + s4 TextFourAdd + } if + +} def + + +% TextLine puts a complete paragraph on the page +% Expects string on the stack +/TextLine { + dup () eq { + % Empty, go down 1/2 line. + pop + /text_y text_y text_dy 2 div sub def + } { + % Normal string, show it + TextParaStart + TextPiece + TextParaEnd + } ifelse +} def + + +% TextDegree prints a degree symbol +% Expects nothing on the stack +/TextDegree { + /TextFont /Symbol findfont text_size scalefont def + (\260) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextRegistered prints a copyright symbol +% Expects nothing on the stack +/TextRegistered { + /TextFont /Symbol findfont text_size scalefont def + (\342) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextTrademark prints a degree symbol +% Expects nothing on the stack +/TextTrademark { + /TextFont /Symbol findfont text_size scalefont def + (\344) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% TextCopyright prints a copyright symbol +% Expects nothing on the stack +/TextCopyright { + /TextFont /Symbol findfont text_size scalefont def + (\343) TextPiece + /TextFont /Helvetica findfont text_size scalefont def +} def + + +% LeftShow prints text to the left of the point +% Expects string x y on the stack +/LeftShow { + moveto + dup stringwidth pop % string dx on stack + 0 exch sub % 0-x on stack + 0 rmoveto + show +} def + + +% LeftShowMicron prints text to the left of the point +% Expects two string x y on the stack +/LeftShowMicron { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /procString exch def + dup stringwidth pop + /techStringWidth exch def + /techString exch def + suffStringWidth techStringWidth add 20 add 0 exch sub 0 rmoveto + techString show + /Symbol findfont title_size scalefont setfont + (\155) show + /Helvetica-Bold findfont title_size scalefont setfont + (m) show + procString show +}def + +% LeftShowRedundancy prints text to the left of the point +% Expects two string x y on the stack +/LeftShowRedundancy { + moveto + dup stringwidth pop + /Helvetica-Bold findfont title_size scalefont setfont + /suffStringWidth exch def + /textRed exch def + suffStringWidth 20 add 0 exch sub 0 rmoveto + textRed show + title_size 2 div 0 exch rmoveto + /Helvetica-Bold findfont text_size scalefont setfont + (TM) show + /Helvetica-Bold findfont title_size scalefont setfont +} def + + + +% SectionLine does the line part of the section header +% Expects y on the stack +/SectionLine { + /y exch def + /y y line_above sub def + newpath + line_left y moveto + line_right y lineto + 1 setlinewidth + stroke +} def + + +% SectionStart prints a horizontal bar and a section header on the page +% Expects string string y on the stack +% returns the new page y +/SectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /text2 exch def % get the subtext + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + text2 () ne { + /Helvetica findfont text_size scalefont setfont + ( \() show % space over + text2 show % print the explanation + (\)) show + } if + y 10 add % return new y +} def + +% MicronSectionStart prints a horizontal bar and a section header on the page +% Expects string y on the stack +% returns the new page y +/MicronSectionStart { + SectionLine % var y is set + /y y line_below sub 10 sub def + line_left y moveto + /Helvetica-Bold findfont text_size scalefont setfont + ( ) show % space over from start of line + show % display string + + y 10 add % return new y +} def + +/line_left 55 def +/line_right 550 def +/line_above 10 def +/line_below 10 def + +% EndingCopyright prints the copyright info at the end +% of the last page. The y location is set but the x size +% depends on the section line size. +% Expects xc y on the stack +/EndingCopyright { + SectionLine + /y y line_below sub def + /xc exch def + line_left line_right y 9 TextStart + /text_size 7 def + /TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(Words and logos marked with ) TextPiece +TextRegistered +( or ) TextPiece +TextTrademark +( are registered trademarks or trademarks of ARM) TextPiece +TextRegistered +( in the EU and other countries, except as otherwise stated below in this\ + proprietary notice. Other brands and names mentioned herein may be the trademarks\ + of their respective owners.) TextPiece +TextParaEnd +/text_y text_y 4 sub def +(Neither the whole nor any part of the information contained in, or the\ + product described in, this document may be adapted or reproduced in any\ + material form except with the prior written permission of the copyright holder.) TextLine +/text_y text_y 4 sub def +(The product described in this document is subject to continuous developments\ + and improvements. All particulars of the product and its use contained in this\ + document are given by ARM in good faith. However, all warranties implied or \ + expressed, including but not limited to implied warranties of merchantability, or\ + fitness for purpose, are excluded.) TextLine +/text_y text_y 4 sub def +(This document is intended only to assist the reader in the use of the product. \ + ARM shall not be liable for any loss or damage arising from the use of any \ + information in this document, or any error or omission in such information, or \ + any incorrect use of the product.) TextLine +/text_y text_y 4 sub def +(Where the term ARM is used it means "ARM or any of its subsidiaries as appropriate".) TextLine +/text_y text_y 4 sub def +(ARM reserves the right to make changes to any products and services\ + described herein, at any time without notice in order to make improvements\ + in design, performance, or presentation and to provide the best possible\ + products and services. Customers should obtain the latest specifications\ + before referencing any information, product, or service described herein,\ + except as expressly agreed in writing by and officer of ARM.) TextLine +/text_y text_y 4 sub def +(ARM does not assume any responsibility or liability arising out of the\ + application or use of any products or services described herein, except\ + as expressly agreed to in writing by and officer of ARM; nor does the\ + purchase, lease, or use of a product or service from ARM convey license\ + under any patent rights, copyrights, trademark rights, or any other of\ + the intellectual property rights of ARM or of third parties.) TextLine +} def + +% CenterTextMu prints two text strings centered at the x,y +% with a mu symbol between the text strings +% centers on x only +% Expects text text x y on the stack +/CenterTextMu { + moveto + /text2 exch def % save second string + /text1 exch def % save first string + /Helvetica findfont 7 scalefont setfont + text1 stringwidth pop % width of first string + text2 stringwidth pop % width of second string + (\155) stringwidth pop % width of mu + add add % width of 2 strings plus mu on stack + 2 div 0 exch sub % 0-x/2 on stack + 0 rmoveto + /Helvetica findfont 7 scalefont setfont + text1 show + /Symbol findfont 7 scalefont setfont + (\155) show + /Helvetica findfont 7 scalefont setfont + text2 show +} def + +% Expects x y scale on the stack +/ARMlogo { + gsave + translate + dup scale + 0.08 0.43 0.53 setrgbcolor + + newpath + 10 10 moveto + 50 10 lineto + 60 38 lineto + 70 62 lineto + 93 117 lineto + 117 62 lineto + 70 62 lineto + 60 38 lineto + 127 38 lineto + 140 10 lineto + 180 10 lineto + 113 150 lineto + 70 150 lineto + closepath + fill + + newpath + 188 10 moveto + 226 10 lineto + 226 125 lineto + 250 125 lineto + 250 109 16 90 270 arcn + 250 93 lineto + 226 93 lineto + 226 67 lineto + 245 67 254 56 12 arcto + 278 10 lineto + 318 10 lineto + 278 80 lineto + 260 109 41 270 90 arc + 188 150 lineto + closepath + fill + + newpath + 330 10 moveto + 367 10 lineto + 367 96 lineto + 407.5 53 lineto + 413.5 53 lineto + 454 96 lineto + 454 10 lineto + 490 10 lineto + 490 150 lineto + 454 150 lineto + 410.5 100 lineto + 367 150 lineto + 330 150 lineto + closepath + fill + + newpath + 1.5 setlinewidth + 507.5 142.5 7.5 0 360 arc + stroke + 503 138 moveto + /Helvetca-Bold findfont 12 scalefont setfont + (R) show + + grestore +} def + +% ShortCopyright will center a copyright message +% at the bottom of the page. +% Expects date page-string xcenter y on the stack +/ShortCopyright { + /y exch def + /xc exch def + /page exch def + /d exch def + /Helvetica findfont 7 scalefont setfont + ( CLN28HPM 28nm Process, RF-2P Datasheet, Version r4p0) xc y CenterText + /y y 10 sub def + (Copyright 1993-2019 ARM. All Rights Reserved.) xc y CenterText + /y y 10 sub def + page xc y CenterText + + % Instance name on left + line_left y 10 add moveto + (rf2_32x19_wm0 ) show + d show + + % Logo on right +} def + + +% SymbolStart begins the part symbol +% Expects xUpperLeft yUpperLeft inPins outPins on stack +/SymbolStart { + /symbolOutPins exch def + /symbolInPins exch def + /symbolY exch def + /symbolX exch def + /symbolCapHeight 20 def + /symbolWidth 90 def + /symbolPinLength 10 def + /symbolPinSpacing 12 def + /symbolInY symbolY symbolCapHeight sub def + /symbolOutY + symbolInPins symbolOutPins sub 2 div + symbolPinSpacing mul + symbolY exch sub symbolCapHeight sub + def + + % box of symbol + newpath + symbolX symbolY moveto + symbolWidth 0 rlineto + symbolCapHeight 2 mul + symbolInPins 1 sub symbolPinSpacing mul add + 0 exch sub + 0 exch rlineto + 0 symbolWidth sub 0 rlineto + closepath + 2 setlinewidth + stroke + + /symbolY symbolY symbolCapHeight 2 mul sub + symbolInPins 1 sub symbolPinSpacing mul sub + def + +} def + +% SymbolEnd completes the part symbol +% Expects nothing on the stack +% Returns bottom of the symbol on the stack +/SymbolEnd { + symbolY 12 sub symbolPinLength sub +} def + +% SymbolInput puts an input pin on the part +% Expects pinName on the stack +/SymbolInput { + dup () ne { + % print nonblank pin + newpath + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolInY moveto + 0 symbolPinLength sub 0 rmoveto + -2 -3 rmoveto + dup stringwidth pop 0 exch sub + 0 rmoveto + show + } { + % ignore blank pin + pop + } ifelse + /symbolInPins symbolInPins 1 sub def + /symbolInY symbolInY symbolPinSpacing sub def +} def + +% SymbolOutput puts an output pin on the part +% Expects pinName on the stack +/SymbolOutput { + dup () ne { + newpath + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rlineto + 0.5 setlinewidth + stroke + symbolX symbolOutY moveto + symbolWidth 0 rmoveto + symbolPinLength 0 rmoveto + 2 -3 rmoveto + show + } { + pop + } ifelse + /symbolOutPins symbolOutPins 1 sub def + /symbolOutY symbolOutY symbolPinSpacing sub def +} def + +% Put triangle inside, line down and string +% Expects string x y (left/right) on stack +/SymbolTriangle { + /l exch def + /y exch def + /x exch def + newpath + x y moveto + -3 0 rmoveto + 3 6 rlineto + 3 -6 rlineto + 0.5 setlinewidth + stroke + newpath + x y moveto + 0 0 symbolPinLength sub rlineto + stroke + x y moveto + 0 0 symbolPinLength sub rmoveto + 0 -12 rmoveto + l (left) eq { + dup stringwidth pop 0 exch sub 0 rmoveto + } if + l (center) eq { + dup stringwidth pop 2 div 0 exch sub 0 rmoveto + } if + show +} def + +% SymbolClocks puts two clock pins on the bottom of the part +% Expects pinName pinName on the stack +/SymbolClocks { + symbolX symbolWidth 2 mul 3 div add + symbolY (right) SymbolTriangle % string x y dir on stack + symbolX symbolWidth 3 div add + symbolY (left) SymbolTriangle % string x y dir on stack +} def + +% SymbolClock puts one clock pin on the bottom of the part +% Expects pinName on the stack +/SymbolClock { + symbolX symbolWidth 2 div add + symbolY (center) SymbolTriangle % string x y dir on stack +} def + +% Waves for frame number 1 +% 94 paths, 26 strings +% Expects x y on stack +% bounds: 0.0->347.714 0.0->207.416 +/Frame1 { + gsave + translate + newpath + 109.056 195.874 moveto + 109.056 173.503 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 205.874 moveto + 54.056 138.242 lineto + stroke + newpath + 16.556 173.503 moveto + 49.056 173.503 lineto + 59.056 188.503 lineto + 104.056 188.503 lineto + 114.056 173.503 lineto + 159.056 173.503 lineto + 169.056 188.503 lineto + 214.056 188.503 lineto + 224.056 173.503 lineto + 269.056 173.503 lineto + 279.056 188.503 lineto + 324.056 188.503 lineto + 334.056 173.374 lineto + 346.556 173.374 lineto + stroke + newpath + 54.056 193.374 moveto + 109.056 193.374 lineto + stroke + 54.056 193.374 ArrowLeft + 109.056 193.374 ArrowRight + newpath + 109.056 193.374 moveto + 164.056 193.374 lineto + stroke + 109.056 193.374 ArrowLeft + 164.056 193.374 ArrowRight + newpath + 274.056 205.874 moveto + 274.056 160.116 lineto + stroke + newpath + 219.056 198.374 moveto + 219.056 173.503 lineto + stroke + newpath + 164.056 205.874 moveto + 164.056 167.238 lineto + stroke + newpath + 164.056 193.374 moveto + 219.056 193.374 lineto + stroke + 164.056 193.374 ArrowLeft + 219.056 193.374 ArrowRight + newpath + 219.056 193.374 moveto + 274.056 193.374 lineto + stroke + 219.056 193.374 ArrowLeft + 274.056 193.374 ArrowRight + newpath + 296.556 63.7808 moveto + 296.556 41.4104 lineto + stroke + newpath + 76.556 63.7808 moveto + 76.556 41.4104 lineto + stroke + newpath + 71.556 56.2808 moveto + 16.556 56.2808 lineto + stroke + newpath + 16.556 56.2808 moveto + 71.556 56.2808 lineto + 81.556 41.2808 lineto + 161.556 41.2808 lineto + stroke + newpath + 16.556 41.2808 moveto + 71.556 41.2808 lineto + 81.556 56.2808 lineto + 161.556 56.2808 lineto + stroke + newpath + 281.556 56.2808 moveto + 291.556 56.2808 lineto + 301.556 41.2808 lineto + 311.556 41.2808 lineto + stroke + newpath + 281.556 41.2808 moveto + 291.556 41.2808 lineto + 301.556 56.2808 lineto + 311.556 56.2808 lineto + stroke + newpath + 160.635 56.2808 moveto + 288.635 56.2808 lineto + stroke + newpath + 160.635 41.2808 moveto + 288.635 41.2808 lineto + stroke + newpath + 306.556 56.2808 moveto + 346.556 56.2808 lineto + stroke + newpath + 306.556 41.2808 moveto + 346.556 41.2808 lineto + stroke + newpath + 54.056 69.4576 moveto + 54.056 58.7808 lineto + stroke + newpath + 274.056 70.708 moveto + 274.056 58.7808 lineto + stroke + newpath + 274.068 61.3056 moveto + 296.548 61.3056 lineto + stroke + 274.068 61.3056 ArrowLeft + 296.548 61.3056 ArrowRight + newpath + 54.068 61.3056 moveto + 76.548 61.3056 lineto + stroke + 54.068 61.3056 ArrowLeft + 76.548 61.3056 ArrowRight + newpath + 164.1 203.374 moveto + 274.056 203.374 lineto + stroke + 164.1 203.374 ArrowLeft + 274.056 203.374 ArrowRight + newpath + 54.388 203.368 moveto + 164.344 203.368 lineto + stroke + 54.388 203.368 ArrowLeft + 164.344 203.368 ArrowRight + newpath + 44.58 22.3712 moveto + 44.58 0 lineto + stroke + newpath + 19.58 15 moveto + 29.58 0 lineto + stroke + newpath + 29.58 15 moveto + 39.58 0 lineto + stroke + newpath + 19.58 0 moveto + 29.58 15 lineto + stroke + newpath + 29.58 0 moveto + 39.58 15 lineto + stroke + newpath + 39.4744 0.3128 moveto + 44.6552 8.1304 lineto + stroke + newpath + 56.6336 22.3712 moveto + 56.6336 0.3208 lineto + stroke + newpath + 19.4472 15.112 moveto + 39.6552 15.112 lineto + stroke + newpath + 39.6552 14.904 moveto + 49.0304 0.3208 lineto + stroke + newpath + 49.2384 0.3208 moveto + 346.322 0.3208 lineto + stroke + newpath + 19.7944 0.0432 moveto + 39.3776 0.0432 lineto + stroke + newpath + 44.0936 19.1072 moveto + 56.5936 19.1072 lineto + stroke + 44.0936 19.1072 ArrowLeft + 56.5936 19.1072 ArrowRight + newpath + 17.0584 142.309 moveto + 27.0584 127.309 lineto + stroke + newpath + 27.0584 142.309 moveto + 37.0584 127.309 lineto + stroke + newpath + 17.0584 127.309 moveto + 27.0584 142.309 lineto + stroke + newpath + 27.0584 127.309 moveto + 37.0584 142.309 lineto + stroke + newpath + 42.0584 147.309 moveto + 54.7592 147.309 lineto + stroke + 42.0584 147.309 ArrowLeft + 54.7592 147.309 ArrowRight + newpath + 37.0512 142.145 moveto + 47.712 127.514 lineto + stroke + newpath + 280.423 127.352 moveto + 47.6088 127.352 lineto + stroke + newpath + 36.9128 142.076 moveto + 16.7032 142.076 lineto + stroke + newpath + 37.1552 127.354 moveto + 16.9456 127.354 lineto + stroke + newpath + 37.2592 127.353 moveto + 42.2952 134.18 lineto + stroke + newpath + 280.628 127.238 moveto + 293.337 143.14 lineto + stroke + newpath + 42.2496 155.602 moveto + 42.2496 124.337 lineto + stroke + newpath + 286.695 154.179 moveto + 286.695 126.264 lineto + stroke + newpath + 17.7008 93.3248 moveto + 27.7008 78.3248 lineto + stroke + newpath + 27.7008 93.3248 moveto + 37.7008 78.3248 lineto + stroke + newpath + 17.7008 78.3248 moveto + 27.7008 93.3248 lineto + stroke + newpath + 27.7008 78.3248 moveto + 37.7008 93.3248 lineto + stroke + newpath + 42.7008 98.3248 moveto + 55.2008 98.3248 lineto + stroke + 42.7008 98.3248 ArrowLeft + 55.2008 98.3248 ArrowRight + newpath + 55.2008 115.954 moveto + 55.2008 95.8248 lineto + stroke + newpath + 37.1032 93.0912 moveto + 16.8936 93.0912 lineto + stroke + newpath + 37.2424 78.7864 moveto + 17.0328 78.7864 lineto + stroke + newpath + 37.624 78.924 moveto + 47.9784 94.4352 lineto + stroke + newpath + 181.046 94.34 moveto + 47.8336 94.34 lineto + stroke + newpath + 37.4232 92.7688 moveto + 47.4232 77.7688 lineto + stroke + newpath + 180.63 78.368 moveto + 46.7224 78.368 lineto + stroke + newpath + 181.174 78.6232 moveto + 191.826 94.8952 lineto + stroke + newpath + 181.174 94.4248 moveto + 192.296 77.7912 lineto + stroke + newpath + 192.283 78.0568 moveto + 202.882 94.296 lineto + stroke + newpath + 213.481 78.0568 moveto + 224.08 94.296 lineto + stroke + newpath + 224.08 78.0568 moveto + 234.678 94.296 lineto + stroke + newpath + 234.678 78.0568 moveto + 245.278 94.156 lineto + stroke + newpath + 202.882 78.0568 moveto + 213.481 94.296 lineto + stroke + newpath + 192.283 94.296 moveto + 202.882 78.0568 lineto + stroke + newpath + 202.882 94.296 moveto + 213.481 78.0568 lineto + stroke + newpath + 213.481 94.296 moveto + 224.08 78.0568 lineto + stroke + newpath + 224.08 94.296 moveto + 234.678 78.0568 lineto + stroke + newpath + 234.678 94.4352 moveto + 245.278 78.0568 lineto + stroke + newpath + 257.435 77.6736 moveto + 191.602 77.6736 lineto + stroke + newpath + 256.879 94.4576 moveto + 191.462 94.4576 lineto + stroke + newpath + 41.9712 106.297 moveto + 41.9712 80.736 lineto + stroke + newpath + 273.962 157.514 moveto + 273.962 123.453 lineto + stroke + newpath + 333.028 142.932 moveto + 293.13 142.932 lineto + stroke + newpath + 266.046 94.664 moveto + 347.714 94.664 lineto + stroke + newpath + 267.296 78.3096 moveto + 346.88 78.3096 lineto + stroke + newpath + 163.778 110.17 moveto + 163.778 92.1296 lineto + stroke + newpath + 185.895 106.701 moveto + 185.895 83.368 lineto + stroke + newpath + 262.84 99.436 moveto + 275.34 99.436 lineto + stroke + 262.84 99.436 ArrowLeft + 275.34 99.436 ArrowRight + newpath + 275.34 117.065 moveto + 275.34 96.936 lineto + stroke + newpath + 262.111 107.408 moveto + 262.111 81.8464 lineto + stroke + newpath + 256.879 78.208 moveto + 267.001 94.7568 lineto + stroke + newpath + 257.146 94.2968 moveto + 267.435 78.0688 lineto + stroke + newpath + 245.291 78.208 moveto + 257.007 94.436 lineto + stroke + newpath + 245.428 94.0192 moveto + 255.979 78.208 lineto + stroke + newpath + 163.307 99.7368 moveto + 185.926 100.227 lineto + stroke + 163.307 99.7368 ArrowLeft + 185.926 100.227 ArrowRight + newpath + 273.326 140.852 moveto + 286.027 140.852 lineto + stroke + 273.326 140.852 ArrowLeft + 286.027 140.852 ArrowRight + /Times-Roman findfont 10 scalefont setfont + (CLKA) () 0 177.754 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (CENA) () 0.6944 132.111 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (AA[J]) () 0 85.532 LeftLabel + /Times-Roman findfont 10 scalefont setfont + (QA[I]) () 0 44.9864 LeftLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 81.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 136.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckah) 191.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (ckal) 246.556 196.712 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 109.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cyca_ema3) 219.056 207.416 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (Q1) () 86.556 47.8232 RightLabel + /Times-Roman findfont 7 scalefont setfont + (Q2) () 306.556 48.5696 RightLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 65.3056 64.9888 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (accqa_rd3) 285.306 64.86 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (dftrambypas) 50.628 25.8056 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenas) 49.4192 152.925 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR1) () 108.951 85.484 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 48.9504 104.496 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (ADDR2) () 283.257 86.1784 CenterLabel + /Times-Roman findfont 6.432 scalefont setfont + (t) (aah) 174.506 102.84 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (aas) 269.09 105.607 CenterLabel + /Times-Roman findfont 7 scalefont setfont + (t) (cenah) 280.687 146.468 CenterLabel + /Times-Roman findfont 10 scalefont setfont + (DFTRAMBYP) () 1.86 3.9536 LeftLabel + grestore +} def +% Waves for frame number 1 +% 122 paths, 28 strings +% Expects x y on stack +% bounds: 0.0->346.556 0.0->200.604 +/Frame2 { + gsave + translate + newpath + 109.056 188.8 moveto + 109.056 166.43 lineto + 0.5 setlinewidth + stroke + newpath + 54.056 198.8 moveto + 54.056 133.793 lineto + stroke + newpath + 163.223 114.356 moveto + 163.223 98.792 lineto + stroke + newpath + 16.556 166.43 moveto + 49.056 166.43 lineto + 59.056 181.43 lineto + 104.056 181.43 lineto + 114.056 166.43 lineto + 159.056 166.43 lineto + 169.056 181.43 lineto + 214.056 181.43 lineto + 224.056 166.43 lineto + 269.056 166.43 lineto + 279.056 181.43 lineto + 324.056 181.43 lineto + 334.056 166.3 lineto + 346.556 166.3 lineto + stroke + newpath + 274.056 198.8 moveto + 274.056 155.667 lineto + stroke + newpath + 40.9296 104.425 moveto + 40.9296 81.9248 lineto + stroke + newpath + 219.056 188.8 moveto + 219.056 166.43 lineto + stroke + newpath + 164.056 198.8 moveto + 164.056 165.459 lineto + stroke + newpath + 41.556 62.1336 moveto + 41.556 39.892 lineto + stroke + newpath + 41.556 59.7632 moveto + 54.056 59.7632 lineto + stroke + 41.556 59.7632 ArrowLeft + 54.056 59.7632 ArrowRight + newpath + 36.556 54.6336 moveto + 46.556 39.6336 lineto + stroke + newpath + 46.9728 39.6336 moveto + 65.1264 39.6336 lineto + 106.622 39.6336 lineto + 174.056 39.6336 lineto + stroke + newpath + 36.556 40.4672 moveto + 46.2536 54.8344 lineto + stroke + newpath + 46.4624 54.6336 moveto + 174.796 54.6336 lineto + stroke + newpath + 16.556 54.892 moveto + 26.556 39.892 lineto + stroke + newpath + 26.556 54.892 moveto + 36.556 39.892 lineto + stroke + newpath + 16.556 39.892 moveto + 26.556 54.892 lineto + stroke + newpath + 26.556 39.892 moveto + 36.556 54.892 lineto + stroke + newpath + 54.056 77.5216 moveto + 54.056 57.392 lineto + stroke + newpath + 54.068 186.562 moveto + 109.068 186.562 lineto + stroke + 54.068 186.562 ArrowLeft + 109.068 186.562 ArrowRight + newpath + 109.068 186.562 moveto + 164.068 186.562 lineto + stroke + 109.068 186.562 ArrowLeft + 164.068 186.562 ArrowRight + newpath + 164.068 186.562 moveto + 219.068 186.562 lineto + stroke + 164.068 186.562 ArrowLeft + 219.068 186.562 ArrowRight + newpath + 219.068 186.562 moveto + 274.068 186.562 lineto + stroke + 219.068 186.562 ArrowLeft + 274.068 186.562 ArrowRight + newpath + 54.08 196.557 moveto + 163.695 196.557 lineto + stroke + 54.08 196.557 ArrowLeft + 163.695 196.557 ArrowRight + newpath + 164.08 196.557 moveto + 273.695 196.557 lineto + stroke + 164.08 196.557 ArrowLeft + 273.695 196.557 ArrowRight + newpath + 43.4688 22.3712 moveto + 43.4688 0 lineto + stroke + newpath + 18.4688 15 moveto + 28.4688 0 lineto + stroke + newpath + 28.4688 15 moveto + 38.4688 0 lineto + stroke + newpath + 18.4688 0 moveto + 28.4688 15 lineto + stroke + newpath + 28.4688 0 moveto + 38.4688 15 lineto + stroke + newpath + 38.3632 0.3128 moveto + 43.5448 8.1304 lineto + stroke + newpath + 55.5224 22.3712 moveto + 55.5224 0.32 lineto + stroke + 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+/leftmargin 165 def +/rightmargin 570 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 18 sub def +/Helvetica-Bold findfont title_size scalefont setfont +(High Density Two Port Register File SVT MVT Compiler) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(CLN28HPM 28nm Process) rightmargin pagey LeftShow +/pagey pagey 18 sub def +( 256 Rows Per Bit line, 0.389um^2 Bit Cell) rightmargin pagey LeftShow +/pagey pagey 18 sub def +(32 Words X 19 Bits, Mux 2 Instance) rightmargin pagey LeftShow +/pagey pagey 18 sub def + +0.35 50 650 ARMlogo +/pagey pagey 20 sub def +/text_size 10 def +(Overview) () pagey SectionStart +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +TextParaStart +(The High Density Two Port Register File SVT MVT Compiler is optimized for speed and density.\ + The memory is designed to take full advantage of the ) TextPiece + +(TSMC) TextPiece +( 28nmnm) TextReserveSpace +( 28nm) TextPiece +( CLN28HPM CMOS process.) TextPiece +TextParaEnd +() TextLine +TextParaStart +(The storage array is composed of eight-transistor\ + bit cells with fully static circuitry. The\ + register file\ + operates at a voltage of 0.9V) TextPiece +( and a junction temperature of ) TextPiece +(25.01C) TextReserveSpace +(25.0) TextPiece +TextDegree +(C.) TextPiece +TextParaEnd +TextEnd % returns new page y +/pagey exch def +% spaceLeft before Instance Settings 492 +/text_size 10 def +(Instance Settings) () pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +200 +(CLN28HPM) stringwidth pop 15 add 100 1 index 1 index + lt { exch pop } { pop } ifelse +leftmargin pagey 14 Table2Start +(Parameter) (Setting) Table2Header +Table2DoubleLine +/TextFont /Helvetica findfont text_size scalefont def +(Instance Name) (rf2_32x19_wm0) Table2LC +(Process) (CLN28HPM) Table2LC +(Number of Words ) (32) Table2LC +(Bits) (19) Table2LC +(Multiplexer Width ) (2) Table2LC +(Multi-Vt selection ) (BASE) Table2LC +(Frequency ) (1) Table2LC +(Activity Factor <%> ) (50) Table2LC +(Pipeline ) (off) Table2LC +(Word-Write Mask ) (off) Table2LC +(Word Partition Size ) (1) Table2LC +(Write through ) (off) Table2LC +(Top Metal Layer ) (m5-m10) Table2LC +(Power Type ) (otc) Table2LC +(Redundancy ) (off) Table2LC +(Redundant Columns ) (2) Table2LC +(Redundant Rows ) (0) Table2LC +(BIST MUXes ) (on) Table2LC +(Soft Error Repair (SER) ) (none) Table2LC +(Power Gating ) (off) Table2LC +(Back Biasing ) (off) Table2LC +(Retention ) (on) Table2LC +(Extra Margin Adjustment ) (on) Table2LC +(Advanced Test Features ) (off) Table2LC +(Name Case ) (upper) Table2LC +(Diodes ) (on) Table2LC +Table2End % returns the new y +/pagey exch def +% spaceLeft before description 94 +(Description) () pagey SectionStart +/pagey exch def +% spaceLeft before description text begins 74 + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +(Register file access is synchronous and is triggered by the rising-edge of the c\ +locks, CLKA and CLKB. The write port (port B) input address, input data, write \ +enable and chip enable are latched by the rising-edge of CLKB, respecting indivi\ +dual setup and hold times.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 26 +() (1) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 2 2 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Description) (cont) pagey SectionStart +/pagey exch def +/pagey pagey 6 sub def +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read port (port A) input address and chip enable are latched by the rising-e\ +dge of CLKA, respecting individual setup and hold times. The two ports can oper\ +ate completely asynchronous to each other.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 602 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A write cycle is initiated if the write port chip enable, CENB, is asserted at t\ +he rising-edge of CLKB. Input data, DB, is written at the address, AB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 572 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(A read cycle is initiated if the read port chip enable CENA is asserted at the r\ +ising-edge of CLKA. The contents of the location specified by the address, AA, a\ +re driven on the data output bus, QA. The register file is allowed to access non\ +-existing physical addresses, but the outputs will be unknown.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 518 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(In the event of a write/read collision, if COLLDISN is disabled then the write i\ +s guaranteed and the read data is undefined.However, if COLLDISN is enabled then\ + the write is not guaranteed if the read row address and write row address match\ +.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 464 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(The read address for any given memory cycle can be identical to the write addres\ +s of the previous memory cycle with the read data being identical to the data th\ +at was written from the previous memory write cycle.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 422 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +( A standby mode is provided for periods of non-operation (CENA=1 or CENB=1). The\ + ports A and B can enter standby mode independently. While in standby mode, add\ +ress and data inputs are disabled; data stored in the memory is retained, but th\ +e memory cannot be accessed for reads or writes.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 368 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(One of the inputs of the input BIST MUX is connected to system signals while the\ + other is connected to the test signals. The memory datapath will now include in\ +tegrated scan chains, with testability controlled by pins DFTRAMBYP, TENA, SEA, \ +TENB, and SEB.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 314 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Memory normal mode is enabled (RET1N=1). In this mode the core and periphery pow\ +er are both connected to the chip level power grid through Artigrid There is a p\ +ower sequence when the memory is put from active to selective precharge and back\ + to active. Selective precharge is available for all compilers except for the RO\ +M. Before entering selective precharge, the memory must be put in standby mode b\ +y setting CENA=1, TCENA=1, CENB=1 and TCENB=1.In addition, DFTRAMBYP must be set\ + to 0.) TextLine +TextEnd +/pagey exch def +% spaceLeft beginning paragraph 224 +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +(Extra Margin Adjustment pins provide the option of adding delays into internal t\ +iming pulses. There are 3 different EMA pins: EMAA, EMAWA, EMASA to control Read\ +/Write internal timing pulses.) TextLine +TextEnd +/pagey exch def + +leftmargin rightmargin pagey 12 TextStart +/TextFont /Helvetica findfont text_size scalefont def +() TextLine +% spaceLeft beginning paragraph 176 +(Refer to the user guide for a more detailed description\ + of memory operation.) TextLine +TextEnd +/pagey exch def +/text_size 10 def +(Physical Dimensions) pagey MicronSectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 75 75 75 leftmargin pagey 14 Table4Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Area Type) (Width)(m)() (Height)(m)() (Area)(m)(2) Table4Header +/TextFont /Helvetica findfont text_size scalefont def +( Core) (21.165) (100.94) (2136.4) Table4LC +Table4End +/pagey exch def + +leftmargin rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +(All width, height, and area dimensions are in drawn dimensions.\ + For shrink processes, this will be larger than the final silicon\ + post-shrink dimensions.) TextLine +TextEnd +/pagey exch def +() (2) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 3 3 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/pagey pagey 20 sub def +(Symbol) () pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +/Helvetica findfont text_size scalefont setfont +255 pagey 22 8 SymbolStart +(CENA) SymbolInput +(AA[4:0]) SymbolInput +(CENB) SymbolInput +(AB[4:0]) SymbolInput +(DB[18:0]) SymbolInput +(EMAA[2:0]) SymbolInput +(EMASA) SymbolInput +(EMAB[2:0]) SymbolInput +(TENA) SymbolInput +(TCENA) SymbolInput +(TAA[4:0]) SymbolInput +(TENB) SymbolInput +(TCENB) SymbolInput +(TAB[4:0]) SymbolInput +(TDB[18:0]) SymbolInput +(RET1N) SymbolInput +(SIA[1:0]) SymbolInput +(SEA) SymbolInput +(DFTRAMBYP) SymbolInput +(SIB[1:0]) SymbolInput +(SEB) SymbolInput +(COLLDISN) SymbolInput +(CENYA) SymbolOutput +(AYA[4:0]) SymbolOutput +(QA[18:0]) SymbolOutput +(SOA[1:0]) SymbolOutput +() SymbolOutput +(CENYB) SymbolOutput +(AYB[4:0]) SymbolOutput +(SOB[1:0]) SymbolOutput +(CLKA) (CLKB) SymbolClocks +SymbolEnd +/pagey exch def +() (3) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 4 4 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/text_size 10 def +(Pin Description) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def + +180 350 line_left pagey 14 Table2Start +/TextFont /Helvetica-Bold findfont text_size scalefont def +(Pin) (Description) Table2Header +/TextFont /Helvetica findfont text_size scalefont def +(AA[4:0], AB[4:0]) (Read & Write Addresses \(AA[0],AB[0] = LSB\)) Table2LL +(DB[18:0]) (Data Inputs \(DB[0] = LSB\)) Table2LL +(CLKA, CLKB) (Read & Write Clocks) Table2LL +(CENA, CENB) (Read & Write Enables \(active low\)) Table2LL +(EMAA[2:0], EMAB[2:0]) (Read and Write Extra Margin Adjustment \(EMAA[0],EMAB[0] = LSB\)) Table2LL +(EMASA) (Read Extra Margin Adjustment) Table2LL +(TENA, TENB) (Port A & B Test Mode Enables \(active low\)) Table2LL +(TDB[18:0]) (Data Test Input \(TDB[0] = LSB\)) Table2LL +(TCENA, TCENB) (Read & Write Chip Enable Test Inputs \(active low\)) Table2LL +(TAA[4:0], TAB[4:0]) (Read & Write Address Test Inputs \(TAA[0],TAB[0] = LSB\)) Table2LL +(COLLDISN) (Allow the user to disable the internal collision detection circuitry\(active low\)) Table2LL +(RET1N) (Retention Input \(active low\)) Table2LL +(DFTRAMBYP) (Test Control Input \(active high\)) Table2LL +(SEA,SEB) (Scan Enable Input \(active high\)) Table2LL +(QA[18:0]) (Data Outputs \(QA[0] = LSB\)) Table2LL +(CENYA, CENYB) (Read & Write Chip Enable Mux Outputs) Table2LL +(AYA[4:0], AYB[4:0]) (Read & Write Address Mux Outputs \(AYA[0],AYB[0] = LSB\)) Table2LL +(SOA[1:0],SOB[1:0]) (Scan Output \(SOA[0],SOB[0] = LSB\)) Table2LL +(SIA[1:0],SIB[1:0]) (Scan Input \(SIA[0],SIB[0] = LSB\)) Table2LL +Table2End +/pagey exch def + +/pagey pagey 10 sub def +/text_size 10 def +(Read Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +(The retain timing arc is not shown in this diagram. \ +Please refer to the User Guide for this compiler for a detailed timing \ +diagram with the retain arc.) TextLine +TextEnd +/pagey pagey 10 sub def +leftmargin pagey 250 sub Frame1 +/pagey pagey 250 sub def +() (4) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 5 5 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def + +/pagey pagey 10 sub def +/text_size 10 def +(Write Cycle Timing DFTRAMBYP=0) () pagey SectionStart +/pagey exch def +/pagey pagey 10 sub def +leftmargin pagey 290 sub Frame2 +/pagey pagey 280 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Write to Read Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 91 sub Frame1027 +/pagey pagey 96 sub def + +/pagey pagey 10 sub def +/text_size 10 def +(Read to Write Cycle Timing) () pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +leftmargin pagey 55 sub Frame1030 +/pagey pagey 85 sub def +% headerEstimate=182 +% estimate=238 +% tailEstimate=44 +% spaceLeft=64 +() (5) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 6 6 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Default Timing for Cycle and Access) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +(The timing tables shows delay values measured from\ + 50% of supply to\ + 50% of supply voltage.\ + The output pins are loaded with the standard load of 0.035pF.\ + Input pins are driven with a standard slew of 0.080ns from\ + 10% to\ + 90% of supply voltage.) TextLine +() TextLine +(The timing and power values are measured at input slew of 0.08ns on clock pin,\ + 0.08ns on signal pins and output load 0.035pF.) TextLine + +TextEnd +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader + +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.2949) (0.3533) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.3325) (0.3870) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.4992) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.5909) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.2355) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.3458) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1872) (0.2155) TableT1CornerRow +(Min. High pulse width CLKA) () (t) (ckah) (0.1133) () TableT1CornerRow +(Min. Low pulse width CLKA) () (t) (ckal) (0.1131) () TableT1CornerRow +(Min. High pulse width CLKB) () (t) (ckbh) (0.1159) () TableT1CornerRow +(Min. Low pulse width CLKB) () (t) (ckbl) (0.1128) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript + +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart + +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def + +% after table spaceLeft=206 +% headerEstimate=110 +% estimate=98 +% tailEstimate=64 +% spaceLeft=206 +(Load Timing) (units = ns/pF) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(CENYA load factor) () (K) (load_cenya) () (2.0800) TableT1CornerRow +(AYA load factor) () (K) (load_aya) () (1.6620) TableT1CornerRow +(CENYB load factor) () (K) (load_cenyb) () (1.9640) TableT1CornerRow +(AYB load factor) () (K) (load_ayb) () (1.6740) TableT1CornerRow +(QA load factor) () (K) (load_qa) () (0.6383) TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (6) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 7 7 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Timing continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=568 after continuation +(SOA load factor) () (K) (load_soa) () (1.7020) TableT1CornerRow +(SOB load factor) () (K) (load_sob) () (1.8420) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The output load factor units are ns/pF.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=476 +% headerEstimate=110 +% estimate=1036 +% tailEstimate=14 +% spaceLeft=476 +(Setup and Hold Timing) (units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 12 sub def +% Make the text paragraph the same size as the following table +line_left line_right pagey 12 TextStart +/TextFont /Helvetica findfont 10 scalefont def +/TextSuperscriptFont /Helvetica findfont 10 scalefont def +TextEnd +/pagey exch def + +/pagey pagey 12 sub def + +TableT1CornerStart +TableT1CornerHeader +(Setup Btw. CLKA and AA) (COLLDISN=1) () (t) (aas) (0.1265) () TableT1CornerDRow +(Hold Btw. CLKA and AA) (COLLDISN=1) () (t) (aah) (0.0821) () TableT1CornerDRow +(Setup Btw. CLKB and AB) (COLLDISN=1) () (t) (abs) (0.1337) () TableT1CornerDRow +(Hold Btw. CLKB and AB) (COLLDISN=1) () (t) (abh) (0.0765) () TableT1CornerDRow +(Setup Btw. CLKA and TAA) (COLLDISN=1) () (t) (taas) (0.1310) () TableT1CornerDRow +(Hold Btw. CLKA and TAA) (COLLDISN=1) () (t) (taah) (0.0821) () TableT1CornerDRow +(Setup Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabs) (0.1373) () TableT1CornerDRow +(Hold Btw. CLKB and TAB) (COLLDISN=1) () (t) (tabh) (0.0765) () TableT1CornerDRow +(Setup Btw. CLKA and CENA) () (t) (cenas) (0.1176) () TableT1CornerRow +(Hold Btw. CLKA and CENA) () (t) (cenah) (0.0489) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nfh) (0.6340) () TableT1CornerRow +(Hold Btw. RET1N and CENA) () (t) (cenaf_ret1nrh) (0.3362) () TableT1CornerRow +(Setup Btw. CLKB and CENB) () (t) (cenbs) (0.1240) () TableT1CornerRow +(Hold Btw. CLKB and CENB) () (t) (cenbh) (0.0492) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nfh) (0.6340) () TableT1CornerRow +(Hold Btw. RET1N and CENB) () (t) (cenbf_ret1nrh) (0.3362) () TableT1CornerRow +(Setup Btw. CLKB and DB) () (t) (dbs) (0.0714) () TableT1CornerRow +(Hold Btw. CLKB and DB) () (t) (dbh) (0.1126) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (7) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 8 8 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Setup Btw. CLKA and EMAA) () (t) (emaas) (0.5390) () TableT1CornerRow +(Hold Btw. CLKA and EMAA) () (t) (emaah) (0.8454) () TableT1CornerRow +(Setup Btw. CLKA and EMASA) () (t) (emasas) (0.5390) () TableT1CornerRow +(Hold Btw. CLKA and EMASA) () (t) (emasah) (0.8454) () TableT1CornerRow +(Setup Btw. CLKB and EMAB) () (t) (emabs) (0.6306) () TableT1CornerRow +(Hold Btw. CLKB and EMAB) () (t) (emabh) (0.8756) () TableT1CornerRow +(Setup Btw. CLKA and TENA) () (t) (tenas) (0.2339) () TableT1CornerRow +(Hold Btw. CLKA and TENA) () (t) (tenah) (0.0903) () TableT1CornerRow +(Setup Btw. CLKA and TCENA) () (t) (tcenas) (0.1176) () TableT1CornerRow +(Hold Btw. CLKA and TCENA) () (t) (tcenah) (0.0517) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nfh) (0.6340) () TableT1CornerRow +(Hold Btw. RET1N and TCENA) () (t) (tcenaf_ret1nrh) (0.3362) () TableT1CornerRow +(Setup Btw. CLKB and TENB) () (t) (tenbs) (0.3090) () TableT1CornerRow +(Hold Btw. CLKB and TENB) () (t) (tenbh) (0.1239) () TableT1CornerRow +(Setup Btw. CLKB and TCENB) () (t) (tcenbs) (0.1252) () TableT1CornerRow +(Hold Btw. CLKB and TCENB) () (t) (tcenbh) (0.0507) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nfh) (0.6340) () TableT1CornerRow +(Hold Btw. RET1N and TCENB) () (t) (tcenbf_ret1nrh) (0.3362) () TableT1CornerRow +(Setup Btw. CLKB and TDB) () (t) (tdbs) (0.0737) () TableT1CornerRow +(Hold Btw. CLKB and TDB) () (t) (tdbh) (0.1126) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nf_dftrambypfh) (0.0313) () TableT1CornerRow +(Hold Btw. DFTRAMBYP and RET1N) () (t) (ret1nr_dftrambypfh) (0.6340) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nf_cenbrh) (0.0313) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nf_cenarh) (0.0294) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nf_tcenarh) (0.0294) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nf_tcenbrh) (0.0313) () TableT1CornerRow +(Hold Btw. TCENB and RET1N) () (t) (ret1nr_tcenbrh) (0.6340) () TableT1CornerRow +(Hold Btw. TCENA and RET1N) () (t) (ret1nr_tcenarh) (0.5424) () TableT1CornerRow +(Hold Btw. CENB and RET1N) () (t) (ret1nr_cenbrh) (0.6340) () TableT1CornerRow +(Hold Btw. CENA and RET1N) () (t) (ret1nr_cenarh) (0.5424) () TableT1CornerRow +(Setup Btw. CLKA and SIA) () (t) (sias) (0.2573) () TableT1CornerRow +(Hold Btw. CLKA and SIA) () (t) (siah) (0.0817) () TableT1CornerRow +(Setup Btw. CLKA and SEA) () (t) (seas) (0.2573) () TableT1CornerRow +(Hold Btw. CLKA and SEA) () (t) (seah) (0.8454) () TableT1CornerRow +(Setup Btw. CLKA and DFTRAMBYP) () (t) (dftrambypas) (0.2083) () TableT1CornerRow +(Hold Btw. CLKA and DFTRAMBYP) () (t) (dftrambypah) (0.8454) () TableT1CornerRow +(Setup Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbs) (0.2083) () TableT1CornerRow +(Hold Btw. CLKB and DFTRAMBYP) () (t) (dftrambypbh) (0.6340) () TableT1CornerRow +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nfh) (0.6340) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def +() (8) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 9 9 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Setup and Hold Timing continued.) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 12 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=554 after continuation +(Hold Btw. RET1N and DFTRAMBYP) () (t) (dftrambypr_ret1nrh) (0.3362) () TableT1CornerRow +(Setup Btw. CLKB and SIB) () (t) (sibs) (0.0714) () TableT1CornerRow +(Hold Btw. CLKB and SIB) () (t) (sibh) (0.1126) () TableT1CornerRow +(Setup Btw. CLKB and SEB) () (t) (sebs) (0.3090) () TableT1CornerRow +(Hold Btw. CLKB and SEB) () (t) (sebh) (0.1239) () TableT1CornerRow +(Setup Btw. CLKA and COLLDISN) () (t) (colldisnas) (0.5390) () TableT1CornerRow +(Hold Btw. CLKA and COLLDISN) () (t) (colldisnah) (0.8454) () TableT1CornerRow +(Setup Btw. CLKB and COLLDISN) () (t) (colldisnbs) (0.6306) () TableT1CornerRow +(Hold Btw. CLKB and COLLDISN) () (t) (colldisnbh) (0.8756) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextEnd +/pagey exch def +% after table spaceLeft=414 +% headerEstimate=82 +% estimate=1862 +% tailEstimate=84 +% spaceLeft=414 +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment) +(units = ns) pagey SectionStart +/pagey exch def + +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (accqa_rd0) (0.2926) (0.3506) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (accqa_rd1) (0.2935) (0.3517) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (accqa_rd2) (0.2944) (0.3527) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (accqa_rd3) (0.2949) (0.3533) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (accqa_rd4) (0.3440) (0.4111) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (accqa_rd5) (0.3880) (0.4628) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (accqa_rd6) (0.4357) (0.5189) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (accqa_rd7) (0.4792) (0.5701) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (accqa_scan0) (0.2926) (0.3506) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (accqa_scan1) (0.2935) (0.3517) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (accqa_scan2) (0.2944) (0.3527) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (9) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 10 10 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to QA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (accqa_scan3) (0.2949) (0.3533) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (accqa_scan4) (0.3440) (0.4111) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (accqa_scan5) (0.3880) (0.4628) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (accqa_scan6) (0.4357) (0.5189) TableT1CornerDRow +(Delay CLKA to QA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (accqa_scan7) (0.4792) (0.5701) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd0) (0.3302) (0.3843) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd1) (0.3311) (0.3853) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd2) (0.3319) (0.3863) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd3) (0.3325) (0.3870) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd4) (0.3815) (0.4447) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd5) (0.4255) (0.4965) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd6) (0.4732) (0.5526) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=0) (1,2) (t) (clkasoa_rd7) (0.5167) (0.6037) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=0 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan0) (0.3302) (0.3843) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=1 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan1) (0.3311) (0.3853) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=2 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan2) (0.3319) (0.3863) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=3 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan3) (0.3325) (0.3870) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=4 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan4) (0.3815) (0.4447) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=5 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan5) (0.4255) (0.4965) TableT1CornerDRow +(Delay CLKA to SOA) (EMAA=6 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan6) (0.4732) (0.5526) TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (10) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 11 11 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Delay CLKA to SOA) (EMAA=7 DFTRAMBYP=1) (1,2) (t) (clkasoa_scan7) (0.5167) (0.6037) TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=0 EMASA=0) () (t) (cyca_ema0) (0.4965) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=1 EMASA=0) () (t) (cyca_ema1) (0.4976) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=2 EMASA=0) () (t) (cyca_ema2) (0.4986) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=3 EMASA=0) () (t) (cyca_ema3) (0.4992) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=4 EMASA=0) () (t) (cyca_ema4) (0.5578) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=5 EMASA=0) () (t) (cyca_ema5) (0.6103) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=6 EMASA=0) () (t) (cyca_ema6) (0.6673) () TableT1CornerDRow +(Min. Cycle CLKA) (EMAA=7 EMASA=0) () (t) (cyca_ema7) (0.7193) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=0) () (t) (cycb_ema0) (0.5696) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=1) () (t) (cycb_ema1) (0.5756) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=2) () (t) (cycb_ema2) (0.5818) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=3) () (t) (cycb_ema3) (0.5909) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=4) () (t) (cycb_ema4) (0.6613) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=5) () (t) (cycb_ema5) (0.7136) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=6) () (t) (cycb_ema6) (0.7812) () TableT1CornerDRow +(Min. Cycle CLKB) (EMAB=7) () (t) (cycb_ema7) (0.8325) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=0) () (t) (cracwb_rd0) (0.2328) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=1) () (t) (cracwb_rd1) (0.2338) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=2) () (t) (cracwb_rd2) (0.2348) () TableT1CornerDRow +TableT1CornerEnd +/pagey exch def +() (11) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 12 12 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Cycle and Access Timing for Different Values of Extra Margin Adjustment continued) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +% spaceLeft=574 after continuation +(Clock Collision CLKA) (EMAA=3) () (t) (cracwb_rd3) (0.2355) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=4) () (t) (cracwb_rd4) (0.2932) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=5) () (t) (cracwb_rd5) (0.3449) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=6) () (t) (cracwb_rd6) (0.4011) () TableT1CornerDRow +(Clock Collision CLKA) (EMAA=7) () (t) (cracwb_rd7) (0.4522) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=0) () (t) (cwbcra_wr0) (0.3248) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=1) () (t) (cwbcra_wr1) (0.3307) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=2) () (t) (cwbcra_wr2) (0.3369) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=3) () (t) (cwbcra_wr3) (0.3458) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=4) () (t) (cwbcra_wr4) (0.4152) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=5) () (t) (cwbcra_wr5) (0.4667) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=6) () (t) (cwbcra_wr6) (0.5333) () TableT1CornerDRow +(Clock Collision CLKB) (EMAB=7) () (t) (cwbcra_wr7) (0.5838) () TableT1CornerDRow +(Delay CLKB to SOB) (1,2) (t) (clkbsob) (0.1872) (0.2155) TableT1CornerRow +(High pulse width CLKA) () (t) (ckah) (0.1133) () TableT1CornerRow +(Low pulse width CLKA) () (t) (ckal) (0.1131) () TableT1CornerRow +(High pulse width CLKB) () (t) (ckbh) (0.1159) () TableT1CornerRow +(Low pulse width CLKB) () (t) (ckbl) (0.1128) () TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=56 +% headerEstimate=82 +% estimate=280 +% tailEstimate=84 +% spaceLeft=56 +() (12) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 13 13 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Path Delay Timing) (units = ns) pagey SectionStart +/pagey exch def +/pagey pagey 20 sub def +TableT1CornerStart +TableT1CornerHeader +(Delay CENA to CENYA) (1,2) (t) (cenacenya) (0.1110) (0.1187) TableT1CornerRow +(Delay TCENA to CENYA) (1,2) (t) (tcenacenya) (0.1101) (0.1176) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyapu) (0.1494) (0.1613) TableT1CornerRow +(Delay TENA to CENYA) (1,2) (t) (tenacenyanu) (0.1731) (0.1884) TableT1CornerRow +(Delay DFTRAMBYP to CENYA) (1,2) (t) (dftrambypcenya) (0.1133) (0.1213) TableT1CornerRow +(Delay AA to AYA) (1,2) (t) (aaaya) (0.0968) (0.1038) TableT1CornerRow +(Delay TAA to AYA) (1,2) (t) (taaaya) (0.1008) (0.1082) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayapu) (0.1699) (0.1878) TableT1CornerRow +(Delay TENA to AYA) (1,2) (t) (tenaayanu) (0.1669) (0.1834) TableT1CornerRow +(Delay DFTRAMBYP to AYA) (1,2) (t) (dftrambypaya) (0.1029) (0.1113) TableT1CornerRow +(Delay CENB to CENYB) (1,2) (t) (cenbcenyb) (0.1117) (0.1195) TableT1CornerRow +(Delay TCENB to CENYB) (1,2) (t) (tcenbcenyb) (0.1108) (0.1185) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybpu) (0.1535) (0.1658) TableT1CornerRow +(Delay TENB to CENYB) (1,2) (t) (tenbcenybnu) (0.1864) (0.2026) TableT1CornerRow +(Delay DFTRAMBYP to CENYB) (1,2) (t) (dftrambypcenyb) (0.1109) (0.1187) TableT1CornerRow +(Delay AB to AYB) (1,2) (t) (abayb) (0.0970) (0.1040) TableT1CornerRow +(Delay TAB to AYB) (1,2) (t) (tabayb) (0.0990) (0.1062) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybpu) (0.1842) (0.2038) TableT1CornerRow +(Delay TENB to AYB) (1,2) (t) (tenbaybnu) (0.1750) (0.1937) TableT1CornerRow +(Delay DFTRAMBYP to AYB) (1,2) (t) (dftrambypayb) (0.1029) (0.1118) TableT1CornerRow +TableT1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 2 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Output delays and a load dependency \(Kload\) which is\ + used to calculate:) TextPiece +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(TotalDelay = FixedDelay + \(Kload x Cload\).) TextPiece +/TextFont /Helvetica findfont 8 scalefont def +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Max access time is defined as the longest possible delay to\ + valid output and min access time is defined as \ + the shortest possible delay.) TextPiece +TextParaEnd +TextParaStart +TextEnd +/pagey exch def +% after table spaceLeft=224 +% headerEstimate=77 +% estimate=336 +% tailEstimate=0 +% spaceLeft=224 +/pagey pagey 5 sub def +(Pin Capacitance) (units = fF) pagey SectionStart +/pagey exch def + +/TextFont /Helvetica-Bold findfont text_size scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +(CLKA) () (9.1160) Table1CornerRow +(CENA) () (1.3390) Table1CornerRow +(AA) () (1.5820) Table1CornerRow +(CLKB) () (9.6730) Table1CornerRow +(CENB) () (1.2610) Table1CornerRow +(AB) () (1.5760) Table1CornerRow +(DB) () (1.8840) Table1CornerRow +(EMAA) () (5.7690) Table1CornerRow +(EMASA) () (2.4650) Table1CornerRow +(EMAB) () (5.5880) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (13) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 14 14 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Pin Capacitance continued) (units = fF) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +/TextFont /Helvetica-Bold findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +/pagey pagey 15 sub def +140 85 line_left 10 add pagey 14 Table1CornerStart +/TextFont /Helvetica findfont text_size scalefont def +Table1CornerHeader +% spaceLeft=511 after continuation +(TENA) () (0.8574) Table1CornerRow +(TCENA) () (1.3500) Table1CornerRow +(TAA) () (1.5440) Table1CornerRow +(TENB) () (1.0150) Table1CornerRow +(TCENB) () (1.3570) Table1CornerRow +(TAB) () (1.5860) Table1CornerRow +(TDB) () (1.6100) Table1CornerRow +(SIA) () (1.2170) Table1CornerRow +(SEA) () (1.6020) Table1CornerRow +(DFTRAMBYP) () (2.0560) Table1CornerRow +(SIB) () (5.7510) Table1CornerRow +(SEB) () (1.8940) Table1CornerRow +(COLLDISN) () (2.1310) Table1CornerRow +(RET1N) () (3.3990) Table1CornerRow +Table1CornerEnd +/pagey exch def +% after table spaceLeft=315 +% headerEstimate=77 +% estimate=644 +% tailEstimate=94 +% spaceLeft=315 +/Helvetica-Bold findfont text_size scalefont setfont +(Current) (units = mA) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(Core Standby std Curr.) (3) (3.864e-04) Table1CornerRow +(Peri Standby std Curr.) (3) (2.123e-03) Table1CornerRow +(Core Standby Retention-1 Curr.) (3) (3.727e-04) Table1CornerRow +(Peri Standby Retention-1 Curr.) (3) (1.273e-04) Table1CornerRow +(Core Standby Selective Precharge Curr.) (3) (3.566e-04) Table1CornerRow +(Peri Standby Selective Precharge Curr.) (3) (2.022e-03) Table1CornerRow +(Core Read AC (EMAA=0) Curr.) (1,4) (2.999e-05) Table1CornerRow +(Core Read AC (EMAA=1) Curr.) (1,4) (3.000e-05) Table1CornerRow +(Core Read AC (EMAA=2) Curr.) (1,4) (3.000e-05) Table1CornerRow +(Core Read AC (EMAA=3) Curr.) (1,4) (3.002e-05) Table1CornerRow +(Core Read AC (EMAA=4) Curr.) (1,4) (3.019e-05) Table1CornerRow +(Core Read AC (EMAA=5) Curr.) (1,4) (3.019e-05) Table1CornerRow +(Core Read AC (EMAA=6) Curr.) (1,4) (3.019e-05) Table1CornerRow +(Core Read AC (EMAA=7) Curr.) (1,4) (3.028e-05) Table1CornerRow +(Peri Read AC (EMAA=0) Curr.) (1,4) (6.947e-04) Table1CornerRow +(Peri Read AC (EMAA=1) Curr.) (1,4) (6.947e-04) Table1CornerRow +Table1CornerEnd +/pagey exch def +() (14) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 15 15 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +/Helvetica-Bold findfont text_size scalefont setfont +(Current continued) (units = mA) pagey SectionStart +/pagey exch def +/pagey pagey 15 sub def +220 80 line_left 4 add pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +% spaceLeft=593 after continuation +(Peri Read AC (EMAA=2) Curr.) (1,4) (6.953e-04) Table1CornerRow +(Peri Read AC (EMAA=3) Curr.) (1,4) (6.953e-04) Table1CornerRow +(Peri Read AC (EMAA=4) Curr.) (1,4) (6.965e-04) Table1CornerRow +(Peri Read AC (EMAA=5) Curr.) (1,4) (6.968e-04) Table1CornerRow +(Peri Read AC (EMAA=6) Curr.) (1,4) (6.972e-04) Table1CornerRow +(Peri Read AC (EMAA=7) Curr.) (1,4) (6.990e-04) Table1CornerRow +(Core Write AC (EMAB=0) Curr.) (1,4) (3.875e-05) Table1CornerRow +(Core Write AC (EMAB=1) Curr.) (1,4) (3.877e-05) Table1CornerRow +(Core Write AC (EMAB=2) Curr.) (1,4) (3.877e-05) Table1CornerRow +(Core Write AC (EMAB=3) Curr.) (1,4) (3.878e-05) Table1CornerRow +(Core Write AC (EMAB=4) Curr.) (1,4) (3.896e-05) Table1CornerRow +(Core Write AC (EMAB=5) Curr.) (1,4) (3.896e-05) Table1CornerRow +(Core Write AC (EMAB=6) Curr.) (1,4) (3.896e-05) Table1CornerRow +(Core Write AC (EMAB=7) Curr.) (1,4) (3.904e-05) Table1CornerRow +(Peri Write AC (EMAB=0) Curr.) (1,4) (7.104e-04) Table1CornerRow +(Peri Write AC (EMAB=1) Curr.) (1,4) (7.104e-04) Table1CornerRow +(Peri Write AC (EMAB=2) Curr.) (1,4) (7.110e-04) Table1CornerRow +(Peri Write AC (EMAB=3) Curr.) (1,4) (7.110e-04) Table1CornerRow +(Peri Write AC (EMAB=4) Curr.) (1,4) (7.122e-04) Table1CornerRow +(Peri Write AC (EMAB=5) Curr.) (1,4) (7.125e-04) Table1CornerRow +(Peri Write AC (EMAB=6) Curr.) (1,4) (7.128e-04) Table1CornerRow +(Peri Write AC (EMAB=7) Curr.) (1,4) (7.146e-04) Table1CornerRow +(Core Deselect(A) (icc_c_desela) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(A) (icc_p_desela) Curr.) (2,4) (4.837e-05) Table1CornerRow +(Core Deselect(B) (icc_c_deselb) Curr.) (2,4) (0.000e+00) Table1CornerRow +(Peri Deselect(B) (icc_p_deselb) Curr.) (2,4) (1.066e-04) Table1CornerRow +(Core Peak (icc_c_peak) Curr.) () (2.110219) Table1CornerRow +(Peri Peak (icc_p_peak) Curr.) () (10.038987) Table1CornerRow +(Core Inrush (icc_c_inrush) Curr.) () (1.662267) Table1CornerRow +(Peri Inrush (icc_p_inrush) Curr.) () (7.731237) Table1CornerRow +Table1CornerEnd +/pagey exch def + +/pagey pagey 4 sub def +line_left 4 add rightmargin pagey 10 TextStart +/TextFont /Helvetica findfont 8 scalefont def +/TextSuperscriptFont /Helvetica findfont 8 scalefont def +(M) TextIndent +TextParaStart +(1) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The AC current value assumes 50% read and write\ + operations, where 50% addresses and 50% of input\ + and output pins switch at the user defined frequency of 1MHz\ + and user defined clock activity_factor of 50%.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(2) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The deselected current assumes the memory is deselected,\ + 50% addresses switch, and 50% of input pins switch\ + at the user defined frequency of 1MHz.\ + The logic switching component of deselected power becomes\ + negligbly small if the input pins are held stable by\ + externally controlling these signals with chip select.) TextPiece +( It is assumed that ) TextPiece +() +(BIST) +(EMAA) +() +TextFourList +( pins do not switch.) TextPiece +TextParaEnd +TextParaStart +(3) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The standby current value is independent of frequency\ + and assumes all inputs and outputs are stable.) TextPiece +TextParaEnd +TextParaStart +(4) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The leakage current component is not included in this value.) TextPiece +TextParaEnd +TextParaStart +(5) TextSuperscript +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(Clock activity factor will affect total current.) TextPiece +TextParaEnd +TextEnd +/pagey exch def +% after table spaceLeft=79 +() (15) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Page: 16 16 +%%BeginPageSetup +/pagelevel save def +%%EndPageSetup +gsave +/leftmargin 165 def +/rightmargin 540 def +/pagey 740 def +/title_size 14 def +/centerx 300 def +/footery 56 def +/text_size 10 def +(Clock Noise Limit) (Time-units = ns, Voltage-units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 45 45 leftmargin 55 sub pagey 14 TableD1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +TableD1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(CLKA) (0.0567) (0.1800) TableD1CornerRow +(CLKB) (0.0579) (0.1800) TableD1CornerRow +TableD1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The clock noise limit is the maximum voltage allowed \(for the\ + indicated pulse width\) that does not cause an unintentional\ + memory cycle or other memory failure.) TextLine +TextEnd +/pagey exch def +(Supply Noise Limit) (units = V) pagey SectionStart +/pagey exch def + +/pagey pagey 15 sub def +75 90 leftmargin 55 sub pagey 14 Table1CornerStart +/TextFont /Helvetica-Bold findfont text_size scalefont def +Table1CornerHeader +/TextFont /Helvetica findfont text_size scalefont def +(Power) () (0.0900) Table1CornerRow +(Ground) () (0.0900) Table1CornerRow +Table1CornerEnd +/pagey exch def + +leftmargin 55 sub rightmargin pagey 10 TextStart +/TextFont /Helvetica-Oblique findfont 8 scalefont def +(The power and ground noise limit is the maximum supply\ + voltage transition that is allowed without causing\ + a memory failure.) TextLine +TextEnd +/pagey exch def +centerx 300 EndingCopyright +() (16) centerx footery ShortCopyright +grestore +pagelevel restore +showpage +%%Trailer +%%Pages: 16 +%%EOF