fixed simX multicore support, added shared memory
This commit is contained in:
Blaise Tine
468
simX/mem.h
468
simX/mem.h
@@ -4,296 +4,228 @@
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#include <vector>
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#include <queue>
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#include <unordered_map>
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// #include <pthread.h>
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#include "types.h"
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namespace vortex {
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void *consoleInputThread(void *);
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struct BadAddress {};
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void *consoleInputThread(void *);
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struct BadAddress {};
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class MemDevice {
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public:
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virtual ~MemDevice() {}
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virtual Size size() const = 0;
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virtual Word read(Addr) = 0;
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virtual void write(Addr, Word) = 0;
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virtual Byte *base() { return NULL; } /* Null if unavailable. */
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class MemDevice {
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public:
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virtual ~MemDevice() {}
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virtual Size size() const = 0;
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virtual Word read(Addr) = 0;
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virtual void write(Addr, Word) = 0;
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virtual Byte *base() {
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return NULL;
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}
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};
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///////////////////////////////////////////////////////////////////////////////
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class RamMemDevice : public MemDevice {
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public:
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RamMemDevice(Size size, Size wordSize);
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RamMemDevice(const char *filename, Size wordSize);
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~RamMemDevice() {}
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virtual Word read(Addr);
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virtual void write(Addr, Word);
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virtual Size size() const {
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return contents_.size();
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};
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class RamMemDevice : public MemDevice {
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public:
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RamMemDevice(Size size, Size wordSize);
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RamMemDevice(const char* filename, Size wordSize);
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~RamMemDevice() {}
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virtual Byte *base() {
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return &contents_[0];
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}
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virtual Size size() const { return contents.size(); };
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virtual Word read(Addr);
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virtual void write(Addr, Word);
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virtual Byte *base() { return &contents[0]; }
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protected:
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Size wordSize_;
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std::vector<Byte> contents_;
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};
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protected:
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Size wordSize;
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std::vector<Byte> contents;
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///////////////////////////////////////////////////////////////////////////////
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class RomMemDevice : public RamMemDevice {
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public:
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RomMemDevice(const char *filename, Size wordSize)
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: RamMemDevice(filename, wordSize)
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{}
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RomMemDevice(Size size, Size wordSize)
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: RamMemDevice(size, wordSize)
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{}
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~RomMemDevice();
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virtual void write(Addr, Word);
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};
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///////////////////////////////////////////////////////////////////////////////
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class Core;
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class DiskControllerMemDevice : public MemDevice {
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public:
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DiskControllerMemDevice(Size wordSize, Size blockSize, Core &c);
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virtual Word read(Addr);
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virtual void write(Addr, Word);
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virtual Size size() const {
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return uint64_t(wordSize_) * 6;
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}
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void addDisk(Byte *file, Size n) {
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disks_.push_back(Disk(file, n));
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}
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private:
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enum Status {
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OK = 0,
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INVALID_DISK,
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INVALID_BLOCK
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};
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class RomMemDevice : public RamMemDevice {
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public:
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RomMemDevice(const char* filename, Size wordSize) :
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RamMemDevice(filename, wordSize) {}
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RomMemDevice(Size size, Size wordSize) :
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RamMemDevice(size, wordSize) {}
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~RomMemDevice();
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virtual void write(Addr, Word);
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struct Disk {
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Disk(Byte *f, Size n)
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: file(f)
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, blocks(n)
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{}
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Byte *file;
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Size blocks;
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};
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class Core;
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Word curDisk_;
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Word curBlock_;
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Word nBlocks_;
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Word physAddr_;
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Word command_;
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Word status_;
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Size wordSize_;
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Size blockSize_;
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Core &core_;
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std::vector<Disk> disks_;
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};
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class DiskControllerMemDevice : public MemDevice {
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///////////////////////////////////////////////////////////////////////////////
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class MemoryUnit {
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public:
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MemoryUnit(Size pageSize, Size addrBytes, bool disableVm = false);
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void attach(MemDevice &m, Addr start, Addr end);
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struct PageFault {
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PageFault(Addr a, bool nf)
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: faultAddr(a)
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, notFound(nf)
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{}
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Addr faultAddr;
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bool notFound;
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};
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Word read(Addr, bool sup);
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Word fetch(Addr, bool sup);
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void write(Addr, Word, bool sup, Size);
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void tlbAdd(Addr virt, Addr phys, Word flags);
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void tlbRm(Addr va);
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void tlbFlush() {
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tlb_.clear();
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}
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private:
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class ADecoder {
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public:
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DiskControllerMemDevice(Size wordSize, Size blockSize, Core &c) :
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wordSize(wordSize), blockSize(blockSize), core(c), disks() {}
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ADecoder() {}
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void addDisk(Byte *file, Size n) { disks.push_back(Disk(file, n)); }
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virtual Size size() const { return wordSize * 6; }
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virtual Word read(Addr);
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virtual void write(Addr, Word);
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Word read(Addr a, bool sup, Size wordSize);
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void write(Addr a, Word w, bool sup, Size wordSize);
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void map(Addr start, Addr end, MemDevice &md);
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private:
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Word curDisk, curBlock, nBlocks, physAddr, command, status;
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enum Status { OK = 0, INVALID_DISK, INVALID_BLOCK };
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struct Disk {
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Disk(Byte *f, Size n): file(f), blocks(n) {}
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Byte *file;
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Size blocks;
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struct mem_accessor_t {
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MemDevice* md;
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Addr addr;
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};
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Size wordSize, blockSize;
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Core &core;
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std::vector <Disk> disks;
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};
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class MemoryUnit {
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public:
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MemoryUnit(Size pageSize, Size addrBytes, bool disableVm = false) :
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pageSize(pageSize), addrBytes(addrBytes), ad(), disableVm(disableVm)
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{
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if (!disableVm)
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tlb[0] = TLBEntry(0, 077);
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}
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void attach(MemDevice &m, Addr base);
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//Size wordSize();
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struct PageFault {
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PageFault(Addr a, bool nf) : faultAddr(a), notFound(nf) {}
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Addr faultAddr;
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bool notFound;
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}; /* Thrown on page fault. */
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Word read(Addr, bool sup); /* For data accesses. */
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Word fetch(Addr, bool sup); /* For instruction accesses. */
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Byte *getPtr(Addr, Size);
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void write(Addr, Word, bool sup, Size);
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void tlbAdd(Addr virt, Addr phys, Word flags);
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void tlbRm(Addr va);
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void tlbFlush() { tlb.clear(); }
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private:
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class ADecoder {
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public:
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ADecoder() : zeroChild(NULL), oneChild(NULL), range(0), md(nullptr) {}
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ADecoder(MemDevice &md, Size range) :
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zeroChild(NULL), oneChild(NULL), range(range), md(&md) {}
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Byte *getPtr(Addr a, Size sz, Size wordSize);
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Word read(Addr a, bool sup, Size wordSize);
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void write(Addr a, Word w, bool sup, Size wordSize);
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void map(Addr a, MemDevice &md, Size range, Size bit);
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private:
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MemDevice &doLookup(Addr a, Size &bit);
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ADecoder *zeroChild, *oneChild;
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Size range;
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MemDevice *md;
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struct entry_t {
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MemDevice *md;
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Addr start;
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Addr end;
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};
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struct TLBEntry {
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TLBEntry() {}
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TLBEntry(Word pfn, Word flags): pfn(pfn), flags(flags) {}
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Word pfn;
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Word flags;
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};
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bool lookup(Addr a, Size wordSize, mem_accessor_t*);
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Size pageSize, addrBytes;
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ADecoder ad;
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std::unordered_map<Addr, TLBEntry> tlb;
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TLBEntry tlbLookup(Addr vAddr, Word flagMask);
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bool disableVm;
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std::vector<entry_t> entries_;
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};
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class RAM : public MemDevice {
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public:
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uint8_t* mem[1 << 12];
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RAM(){
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for(uint32_t i = 0;i < (1 << 12);i++)
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mem[i] = NULL;
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}
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~RAM(){
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for(uint32_t i = 0;i < (1 << 12);i++)
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if(mem[i])
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delete [] mem[i];
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}
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void clear(){
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for(uint32_t i = 0;i < (1 << 12);i++)
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{
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if(mem[i])
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{
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delete mem[i];
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mem[i] = NULL;
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}
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}
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}
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uint8_t* get(uint32_t address){
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if(mem[address >> 20] == NULL) {
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uint8_t* ptr = new uint8_t[1024*1024];
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for(uint32_t i = 0;i < 1024*1024;i+=4) {
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ptr[i + 0] = 0xaa;
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ptr[i + 1] = 0xbb;
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ptr[i + 2] = 0xcc;
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ptr[i + 3] = 0xdd;
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}
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mem[address >> 20] = ptr;
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}
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return &mem[address >> 20][address & 0xFFFFF];
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}
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void read(uint32_t address,uint32_t length, uint8_t *data){
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for(unsigned i = 0;i < length;i++){
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data[i] = (*this)[address + i];
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}
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}
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void write(uint32_t address,uint32_t length, uint8_t *data){
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for(unsigned i = 0;i < length;i++){
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(*this)[address + i] = data[i];
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}
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}
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virtual Size size() const { return -1; }
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void getBlock(uint32_t address, uint8_t *data)
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{
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uint32_t block_number = address & 0xffffff00; // To zero out block offset
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uint32_t bytes_num = 256;
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this->read(block_number, bytes_num, data);
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}
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void getWord(uint32_t address, uint32_t * data)
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{
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data[0] = 0;
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uint8_t first = *get(address + 0);
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uint8_t second = *get(address + 1);
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uint8_t third = *get(address + 2);
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uint8_t fourth = *get(address + 3);
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// std::cout << std::hex;
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// std::cout << "RAM: READING ADDRESS " << address + 0 << " DATA: " << (uint32_t) first << "\n";
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// std::cout << "RAM: READING ADDRESS " << address + 1 << " DATA: " << (uint32_t) second << "\n";
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// std::cout << "RAM: READING ADDRESS " << address + 2 << " DATA: " << (uint32_t) third << "\n";
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// std::cout << "RAM: READING ADDRESS " << address + 3 << " DATA: " << (uint32_t) fourth << "\n";
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data[0] = (data[0] << 0) | fourth;
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data[0] = (data[0] << 8) | third;
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data[0] = (data[0] << 8) | second;
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data[0] = (data[0] << 8) | first;
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// data[0] = (data[0] << 0) | first;
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// data[0] = (data[0] << 8) | second;
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// data[0] = (data[0] << 8) | third;
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// data[0] = (data[0] << 8) | fourth;
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// std::cout << "FINAL DATA: " << data[0] << "\n";
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}
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void writeWord(uint32_t address, uint32_t * data)
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{
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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for (int i = 0; i < 4; i++)
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{
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// std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n";
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// std::cout << "RAM: DATA TO MASK " << byte_mask << "\n";
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// std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n";
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(*this)[address + i] = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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}
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void writeHalf(uint32_t address, uint32_t * data)
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{
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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for (int i = 0; i < 2; i++)
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{
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// std::cout << "RAM: DATA TO WRITE " << data_to_write << "\n";
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// std::cout << "RAM: DATA TO MASK " << byte_mask << "\n";
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// std::cout << "RAM: WRITING ADDRESS " << address + i << " DATA: " << (data_to_write & byte_mask) << "\n";
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(*this)[address + i] = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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}
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void writeByte(uint32_t address, uint32_t * data)
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{
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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(*this)[address] = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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uint8_t& operator [](uint32_t address) {
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return *get(address);
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}
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virtual void write(Addr addr, Word w)
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{
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uint32_t word = (uint32_t) w;
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writeWord(addr, &word);
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}
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virtual Word read(Addr addr)
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{
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uint32_t w;
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getWord(addr, &w);
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// std::cout << "RAM: read -> " << w << " at addr: " << addr << "\n";
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return (Word) w;
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}
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virtual Byte *base()
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{
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return (Byte *) this->get(0);
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}
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// MEMORY UTILS
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void loadHexImpl(std::string path);
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struct TLBEntry {
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TLBEntry() {}
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TLBEntry(Word pfn, Word flags)
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: pfn(pfn)
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, flags(flags)
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{}
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Word pfn;
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Word flags;
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};
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}
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TLBEntry tlbLookup(Addr vAddr, Word flagMask);
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std::unordered_map<Addr, TLBEntry> tlb_;
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Size pageSize_;
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Size addrBytes_;
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ADecoder decoder_;
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bool disableVm_;
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};
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///////////////////////////////////////////////////////////////////////////////
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class RAM : public MemDevice {
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public:
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RAM(uint32_t num_pages, uint32_t page_size);
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~RAM();
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void clear();
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Size size() const override;
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void write(Addr addr, Word w) override;
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Word read(Addr addr) override;
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Byte *base() override;
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void read(uint32_t address, uint32_t length, uint8_t *data);
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void write(uint32_t address, uint32_t length, uint8_t *data);
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void writeWord(uint32_t address, uint32_t *data);
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void writeHalf(uint32_t address, uint32_t *data);
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void writeByte(uint32_t address, uint32_t *data);
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void loadHexImage(std::string path);
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private:
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uint8_t *get(uint32_t address);
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void getBlock(uint32_t address, uint8_t *data);
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void getWord(uint32_t address, uint32_t *data);
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std::vector<uint8_t*> mem_;
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uint32_t page_bits_;
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uint32_t size_;
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};
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} // namespace vortex
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