fixed simX multicore support, added shared memory

simX/core.h

@@ -2,6 +2,7 @@
 
 #include <string>
 #include <vector>
+#include <list>
 #include <stack>
 #include <unordered_map>
 #include <set>
@@ -23,15 +24,6 @@ public:
 
   bool running() const;
 
-  void getCacheDelays(trace_inst_t *);
-  void warpScheduler();
-  void fetch();
-  void decode();
-  void scheduler();
-  void execute_unit();
-  void load_store();
-  void writeback();
-
   void step();
 
   void printStats() const;
@@ -48,10 +40,6 @@ public:
     return decoder_;
   }
 
-  MemoryUnit& mem() {
-    return mem_;
-  }
-
   const ArchDef& arch() const {
     return arch_;
   }  
@@ -66,26 +54,52 @@ public:
 
   unsigned long num_steps() const {
     return steps_;
-  }
+  } 
+
+  Word get_csr(Addr addr, int tid, int wid);
+  
+  void set_csr(Addr addr, Word value);
+
+  void barrier(int bar_id, int count, int warp_id);
+
+  Word icache_fetch(Addr, bool sup);
+
+  Word dcache_read(Addr, bool sup);
+
+  void dcache_write(Addr, Word, bool sup, Size);  
 
 private: 
 
+  void fetch();
+  void decode();
+  void scheduler();
+  void execute_unit();
+  void load_store();
+  void writeback();
+
+  void getCacheDelays(trace_inst_t *);
+  void warpScheduler();
+
   std::vector<std::vector<bool>> iRenameTable_;
   std::vector<std::vector<bool>> fRenameTable_;
   std::vector<bool> vRenameTable_;
   std::vector<bool> stalled_warps_;
-  bool foundSchedule_;
 
   Word id_;
   const ArchDef &arch_;
   Decoder &decoder_;
   MemoryUnit &mem_;
+#ifdef SM_ENABLE
+  RAM shared_mem_;
+#endif
   std::vector<Warp> warps_;  
-  std::unordered_map<Word, std::set<Warp *>> barriers_;  
+  std::vector<WarpMask> barriers_;  
+  std::vector<Word> csrs_;
   int schedule_w_;
   uint64_t steps_;
   uint64_t num_insts_;
   Word interruptEntry_;
+  bool foundSchedule_;
 
   trace_inst_t inst_in_fetch_;
   trace_inst_t inst_in_decode_;