lkg build rollout with 16cores optimization on arria10
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@@ -318,7 +318,7 @@
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// DRAM Response Queue Size
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`ifndef DDRSQ_SIZE
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`define DDRSQ_SIZE 4
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`define DDRSQ_SIZE `MAX(4, (`DNUM_BANKS * 2))
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`endif
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// SM Configurable Knobs //////////////////////////////////////////////////////
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@@ -382,7 +382,7 @@
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// DRAM Response Queue Size
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`ifndef L2DRSQ_SIZE
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`define L2DRSQ_SIZE 4
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`define L2DRSQ_SIZE `MAX(4, (`L2NUM_BANKS * 2))
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`endif
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// L3cache Configurable Knobs /////////////////////////////////////////////////
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@@ -419,7 +419,7 @@
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// DRAM Response Queue Size
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`ifndef L3DRSQ_SIZE
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`define L3DRSQ_SIZE 4
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`define L3DRSQ_SIZE `MAX(4, (`L3NUM_BANKS * 2))
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`endif
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`endif
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