tex_unit partial update

2021-03-20 08:40:57 -04:00
parent 50f5bdcfe3
commit 859877a00d
22 changed files with 352 additions and 183 deletions
--- a/hw/rtl/tex_unit/VX_tex_wrap.v
+++ b/hw/rtl/tex_unit/VX_tex_wrap.v
@@ -0,0 +1,23 @@
+`include "VX_define.vh"
+
+module VX_tex_wrap #(
+    parameter CORE_ID = 0,
+    parameter FRAC_BITS = 20,
+    parameter INT_BITS  = 32 - FRAC_BITS
+) (
+    input wire [`TEX_WRAP_BITS-1:0] wrap_i;
+    input wire [31:0] coord_i,
+    input wire [31:0] coord_o
+)
+    
+    always @(*) begin
+        case (wrap_i)
+            `ALU_AND:   msc_result[i] = alu_in1[i] & alu_in2_imm[i];
+            `ALU_OR:    msc_result[i] = alu_in1[i] | alu_in2_imm[i];
+            `ALU_XOR:   msc_result[i] = alu_in1[i] ^ alu_in2_imm[i];                
+            //`ALU_SLL,
+            default:    msc_result[i] = alu_in1[i] << alu_in2_imm[i][4:0];
+        endcase
+    end
+
+endmodule