added config.vh
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@@ -1,4 +1,4 @@
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`include "../VX_define.v"
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`include "../VX_define.vh"
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module VX_d_e_reg (
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input wire clk,
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@@ -16,7 +16,7 @@ module VX_d_e_reg (
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wire flush = (in_branch_stall == `STALL);
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VX_generic_register #(.N(233 + `NW_M1 + 1 + `NT)) d_e_reg
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VX_generic_register #(.N(233 + `NW_BITS-1 + 1 + `NUM_THREADS)) d_e_reg
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(
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.clk (clk),
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.reset(reset),
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@@ -1,4 +1,4 @@
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`include "../VX_define.v"
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`include "../VX_define.vh"
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module VX_f_d_reg (
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input wire clk,
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@@ -13,7 +13,7 @@ module VX_f_d_reg (
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wire flush = 1'b0;
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wire stall = in_freeze == 1'b1;
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VX_generic_register #( .N(64+`NW_M1+1+`NT) ) f_d_reg (
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VX_generic_register #( .N(64+`NW_BITS-1+1+`NUM_THREADS) ) f_d_reg (
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.clk (clk),
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.reset(reset),
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.stall(stall),
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@@ -1,4 +1,4 @@
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`include "../VX_define.v"
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`include "../VX_define.vh"
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module VX_i_d_reg (
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input wire clk,
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@@ -14,7 +14,7 @@ module VX_i_d_reg (
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wire stall = in_freeze == 1'b1;
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VX_generic_register #( .N( 64 + `NW_M1 + 1 + `NT ) ) i_d_reg (
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VX_generic_register #( .N( 64 + `NW_BITS-1 + 1 + `NUM_THREADS ) ) i_d_reg (
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.clk (clk),
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.reset(reset),
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.stall(stall),
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