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Fixed AA d_cache sizing errors

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This commit is contained in:
felsabbagh3
2019-11-11 15:20:58 -05:00
parent 0ad491f20e
commit 7ed88ce4c1
4 changed files with 210 additions and 50 deletions
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8
rtl/VX_define.v
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@@ -158,8 +158,9 @@
`define ICACHE_OFFSET_ED ($clog2(`ICACHE_NUM_WORDS_PER_BLOCK)-1)
// Index
`define ICACHE_NUM_IND (`ICACHE_SIZE / (`ICACHE_WAYS * `ICACHE_BLOCK_PER_BANK))
`define ICACHE_IND_NB (`CLOG2(`ICACHE_NUM_IND))
// `define ICACHE_NUM_IND (`ICACHE_SIZE / (`ICACHE_WAYS * `ICACHE_BLOCK_PER_BANK))
`define ICACHE_NUM_IND (`ICACHE_SIZE / (`ICACHE_WAYS * `ICACHE_BLOCK))
`define ICACHE_IND_NB ($clog2(`ICACHE_NUM_IND))
`define ICACHE_IND_ST (`ICACHE_ADDR_OFFSET_ED+1)
`define ICACHE_IND_ED (`ICACHE_IND_ST+`ICACHE_IND_NB-1)
@@ -210,7 +211,8 @@
`define DCACHE_OFFSET_ED ($clog2(`DCACHE_NUM_WORDS_PER_BLOCK)-1)
// Index
`define DCACHE_NUM_IND (`DCACHE_SIZE / (`DCACHE_WAYS * `DCACHE_BLOCK_PER_BANK))
// `define DCACHE_NUM_IND (`DCACHE_SIZE / (`DCACHE_WAYS * `DCACHE_BLOCK_PER_BANK))
`define DCACHE_NUM_IND (`DCACHE_SIZE / (`DCACHE_WAYS * `DCACHE_BLOCK))
`define DCACHE_IND_NB ($clog2(`DCACHE_NUM_IND))
`define DCACHE_IND_ST (`DCACHE_ADDR_OFFSET_ED+1)

9
rtl/cache/VX_cache_data.v vendored
View File

@@ -100,6 +100,7 @@ module VX_cache_data
`else
wire[IND_SIZE_END:IND_SIZE_START] use_addr = addr;
wire cena = 1;
@@ -127,11 +128,11 @@ module VX_cache_data
.SOB(),
.CLKA(clk),
.CENA(cena),
.AA(addr),
.AA(use_addr),
.CLKB(clk),
.CENB(cenb_d),
.WENB(write_bit_mask_d),
.AB(addr),
.AB(use_addr),
.DB(wdata_d),
.EMAA(3'b011),
.EMASA(1'b0),
@@ -199,11 +200,11 @@ module VX_cache_data
.SOB(),
.CLKA(clk),
.CENA(cena),
.AA(addr),
.AA(use_addr),
.CLKB(clk),
.CENB(cenb_m),
// .WENB(write_bit_mask_m),
.AB(addr),
.AB(use_addr),
.DB(wdata_m),
.EMAA(3'b011),
.EMASA(1'b0),