OPAE HW full redesign - basic test passing

driver/hw/Makefile

@@ -17,6 +17,9 @@ $(BUILD_DIR)/Makefile:
 run-ase:
 	cd $(BUILD_DIR) && MENT_VSIM_OPT="-dpicpppath /usr/bin/gcc" make sim
 
+wave:
+	vsim -view $(BUILD_DIR)/work/vsim.wlf -do wave.do
+
 run-fpga:
 	# TODO
 

driver/hw/ccip_std_afu.sv

@@ -108,7 +108,7 @@ module ccip_std_afu
       #(
         .NUM_LOCAL_MEM_BANKS(NUM_LOCAL_MEM_BANKS)
         )
-      hello_mem_afu_inst
+      vortex_afu_inst
        (
         .clk                 (clk),
         .SoftReset           (reset_T1),

driver/hw/sources.txt

@@ -1,5 +1,7 @@
 vortex_afu.json
 
++define+GLOBAL_BLOCK_SIZE_BYTES=64
+
 +incdir+.
 +incdir+../../rtl
 +incdir+../../rtl/shared_memory
@@ -13,6 +15,7 @@ vortex_afu.json
 ../../rtl/VX_define.v
 ../../rtl/VX_cache/VX_cache_config.v
 ../../rtl/Vortex_SOC.v
+../../rtl/Vortex_Cluster.v
 ../../rtl/Vortex.v
 ../../rtl/VX_front_end.v
 ../../rtl/VX_back_end.v

driver/hw/vortex_afu.json

@@ -3,7 +3,19 @@
    "afu-image": {
       "power": 0,
       "clock-frequency-high": "auto",
-      "clock-frequency-low": "auto",
+      "clock-frequency-low":  "auto",
+      
+      "mmio-csr-cmd":         10,      
+      "mmio-csr-status":      12,      
+      "mmio-csr-io-addr":     14,
+      "mmio-csr-mem-addr":    16,
+      "mmio-csr-data-size":   18,
+      
+      "cmd-type-read":        1,
+      "cmd-type-write":       2,
+      "cmd-type-run":         3,
+      "cmd-type-snoop":       4,
+
       "afu-top-interface":
          {
             "class": "ccip_std_afu_avalon_mm",