pipeline refactoring: centralized issue buffer

hw/rtl/interfaces/VX_gpu_req_if.v

@@ -5,17 +5,18 @@
 
 interface VX_gpu_req_if();
 
-    wire [`NUM_THREADS-1:0]  valid;
-    wire [`NW_BITS-1:0]      warp_num;
-    wire [31:0]              curr_PC;
+    wire                    valid;
+    wire [`ISTAG_BITS-1:0]  issue_tag;
+    wire [`NUM_THREADS-1:0] thread_mask;
+    wire [`NW_BITS-1:0]     warp_num;
 
-    wire [`GPU_BITS-1:0]     gpu_op;
+    wire [`GPU_BITS-1:0]    gpu_op;
 
     wire [`NUM_THREADS-1:0][31:0] rs1_data;
-    wire [31:0]              rs2_data;
-    wire [31:0]              next_PC;
+    wire [31:0]             rs2_data;
+    wire [31:0]             next_PC;
     
-    wire                     ready;
+    wire                    ready;
 
 endinterface