pipeline refactoring: centralized issue buffer

2020-07-26 11:21:08 -04:00
parent 1f63f9da25
commit 7c86b68977
62 changed files with 923 additions and 820 deletions
--- a/hw/rtl/interfaces/VX_fpu_from_csr_if.v
+++ b/hw/rtl/interfaces/VX_fpu_from_csr_if.v
@@ -3,6 +3,10 @@

 `include "VX_define.vh"

+`ifndef EXTF_F_ENABLE
+    `IGNORE_WARNINGS_BEGIN
+`endif
+
 interface VX_fpu_from_csr_if ();

 	wire [`NW_BITS-1:0] warp_num;