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fpu implementation (part1)

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This commit is contained in:
Blaise Tine
2020-07-23 03:18:09 -07:00
parent 6836f397f8
commit 75e3c31b56
31 changed files with 662 additions and 159 deletions
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2
hw/rtl/interfaces/VX_alu_req_if.v
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@@ -11,7 +11,7 @@ interface VX_alu_req_if ();
wire [`ALU_BITS-1:0] alu_op;
wire [`WB_BITS-1:0] wb;
wire wb;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] rs1_data;

3
hw/rtl/interfaces/VX_commit_if.v
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@@ -10,8 +10,7 @@ interface VX_commit_if ();
wire [31:0] curr_PC;
wire [`NUM_THREADS-1:0][31:0] data;
wire [`NR_BITS-1:0] rd;
wire [`WB_BITS-1:0] wb;
wire is_io;
wire wb;
wire ready;
endinterface

2
hw/rtl/interfaces/VX_csr_req_if.v
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@@ -15,7 +15,7 @@ interface VX_csr_req_if ();
wire [31:0] csr_mask;
wire [`NR_BITS-1:0] rd;
wire [`WB_BITS-1:0] wb;
wire wb;
wire is_io;
wire ready;

11
hw/rtl/interfaces/VX_decode_if.v
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@@ -19,12 +19,19 @@ interface VX_decode_if ();
wire [31:0] imm;
wire rs1_is_PC;
wire rs2_is_imm;
wire rs2_is_imm;
wire use_rs1;
wire use_rs2;
wire [`WB_BITS-1:0] wb;
// FP states
wire [`NR_BITS-1:0] rs3;
wire use_rs3;
wire rs1_is_fp;
wire rs2_is_fp;
wire [`FRM_BITS-1:0] frm;
wire wb;
wire ready;

16
hw/rtl/interfaces/VX_fpu_from_csr_if.v Normal file
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@@ -0,0 +1,16 @@
`ifndef VX_FPU_FROM_CSR_IF
`define VX_FPU_FROM_CSR_IF
`include "VX_define.vh"
interface VX_fpu_from_csr_if ();
`IGNORE_WARNINGS_BEGIN
wire [`NUM_WARPS-1:0][`FRM_BITS-1:0] frm;
`IGNORE_WARNINGS_END
endinterface
`endif

26
hw/rtl/interfaces/VX_fpu_req_if.v Normal file
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@@ -0,0 +1,26 @@
`ifndef VX_FPU_REQ_IF
`define VX_FPU_REQ_IF
`include "VX_define.vh"
interface VX_fpu_req_if ();
wire [`NUM_THREADS-1:0] valid;
wire [`NW_BITS-1:0] warp_num;
wire [31:0] curr_PC;
wire [`FPU_BITS-1:0] fpu_op;
wire [`FRM_BITS-1:0] frm;
wire wb;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;
wire [`NUM_THREADS-1:0][31:0] rs3_data;
wire ready;
endinterface
`endif

23
hw/rtl/interfaces/VX_fpu_to_csr_if.v Normal file
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@@ -0,0 +1,23 @@
`ifndef VX_FPU_TO_CSR_IF
`define VX_FPU_TO_CSR_IF
`include "VX_define.vh"
interface VX_fpu_to_csr_if ();
`IGNORE_WARNINGS_BEGIN
wire valid;
wire [`NW_BITS-1:0] warp_num;
wire fflags_NV;
wire fflags_DZ;
wire fflags_OF;
wire fflags_UF;
wire fflags_NX;
`IGNORE_WARNINGS_END
endinterface
`endif

1
hw/rtl/interfaces/VX_gpr_data_if.v
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@@ -7,6 +7,7 @@ interface VX_gpr_data_if ();
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;
wire [`NUM_THREADS-1:0][31:0] rs3_data;
endinterface

2
hw/rtl/interfaces/VX_lsu_req_if.v
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@@ -12,7 +12,7 @@ interface VX_lsu_req_if ();
wire rw;
wire [`BYTEEN_BITS-1:0] byteen;
wire [`WB_BITS-1:0] wb;
wire wb;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] store_data;

2
hw/rtl/interfaces/VX_mul_req_if.v
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@@ -11,7 +11,7 @@ interface VX_mul_req_if ();
wire [`MUL_BITS-1:0] mul_op;
wire [`WB_BITS-1:0] wb;
wire wb;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] rs1_data;

1
hw/rtl/interfaces/VX_wb_if.v
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@@ -9,6 +9,7 @@ interface VX_wb_if ();
wire [`NW_BITS-1:0] warp_num;
wire [`NR_BITS-1:0] rd;
wire [`NUM_THREADS-1:0][31:0] data;
wire is_fp;
wire ready;
endinterface