fpu implementation (part1)

hw/rtl/VX_issue_mux.v

@@ -10,6 +10,7 @@ module VX_issue_mux (
     VX_lsu_req_if   lsu_req_if,
     VX_csr_req_if   csr_req_if,
     VX_mul_req_if   mul_req_if,
+    VX_fpu_req_if   fpu_req_if,
     VX_gpu_req_if   gpu_req_if    
 );
 
@@ -17,6 +18,7 @@ module VX_issue_mux (
     wire[`NUM_THREADS-1:0] is_lsu = {`NUM_THREADS{decode_if.ex_type == `EX_LSU}};
     wire[`NUM_THREADS-1:0] is_csr = {`NUM_THREADS{decode_if.ex_type == `EX_CSR}};
     wire[`NUM_THREADS-1:0] is_mul = {`NUM_THREADS{decode_if.ex_type == `EX_MUL}};
+    wire[`NUM_THREADS-1:0] is_fpu = {`NUM_THREADS{decode_if.ex_type == `EX_FPU}};
     wire[`NUM_THREADS-1:0] is_gpu = {`NUM_THREADS{decode_if.ex_type == `EX_GPU}};
 
     // ALU unit
@@ -64,6 +66,18 @@ module VX_issue_mux (
     assign mul_req_if.rd          = decode_if.rd;
     assign mul_req_if.wb          = decode_if.wb;
 
+    // FPU unit
+    assign fpu_req_if.valid       = decode_if.valid & is_fpu;
+    assign fpu_req_if.warp_num    = decode_if.warp_num;
+    assign fpu_req_if.curr_PC     = decode_if.curr_PC;
+    assign fpu_req_if.fpu_op      = `FPU_OP(decode_if.instr_op);
+    assign fpu_req_if.rs1_data    = gpr_data_if.rs1_data;
+    assign fpu_req_if.rs2_data    = gpr_data_if.rs2_data;    
+    assign fpu_req_if.rs3_data    = gpr_data_if.rs3_data;    
+    assign fpu_req_if.frm         = decode_if.frm;
+    assign fpu_req_if.rd          = decode_if.rd;
+    assign fpu_req_if.wb          = decode_if.wb;
+
     // GPU unit
     assign gpu_req_if.valid       = decode_if.valid & is_gpu;
     assign gpu_req_if.warp_num    = decode_if.warp_num;