fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags
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@@ -175,8 +175,9 @@ logic [31:0] cmd_csr_wdata;
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// MMIO controller ////////////////////////////////////////////////////////////
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`IGNORE_WARNINGS_BEGIN
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t_ccip_c0_ReqMmioHdr mmio_hdr = t_ccip_c0_ReqMmioHdr'(cp2af_sRxPort.c0.hdr);
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t_ccip_c0_ReqMmioHdr mmio_hdr;
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`IGNORE_WARNINGS_END
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assign mmio_hdr = t_ccip_c0_ReqMmioHdr'(cp2af_sRxPort.c0.hdr);
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`STATIC_ASSERT(($bits(t_ccip_c0_ReqMmioHdr)-$bits(mmio_hdr.address)) == 12, ("Oops!"))
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@@ -204,9 +205,20 @@ wire [2:0] cmd_type = (cp2af_sRxPort.c0.mmioWrValid && (MMIO_CMD_TYPE == mmio_hd
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reg scope_start;
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`endif
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// disable assertions until reset
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`ifndef VERILATOR
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initial begin
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$assertoff;
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end
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`endif
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always_ff @(posedge clk)
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begin
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if (reset) begin
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`ifndef VERILATOR
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$asserton; // enable assertions
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`endif
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mmio_tx.hdr <= 0;
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mmio_tx.data <= 0;
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mmio_tx.mmioRdValid <= 0;
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@@ -324,7 +336,8 @@ begin
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end
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`endif
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default: begin
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`ifdef DBG_PRINT_OPAE
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mmio_tx.data <= 64'h0;
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`ifdef DBG_PRINT_OPAE
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$display("%t: Unknown MMIO Rd: addr=%0h", $time, mmio_hdr.address);
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`endif
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end
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