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updating fdiv/fsqrt bram hex files, reset_delay updaet

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Blaise Tine
2021-02-04 09:02:18 -08:00
parent 32b94f61f2
commit 72b6713a72
17 changed files with 1921 additions and 1923 deletions
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12
hw/rtl/VX_mem_unit.v
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@@ -86,9 +86,9 @@ module VX_mem_unit # (
VX_reset_relay #(
.NUM_NODES (2)
) reset_relay (
.clk (clk),
.reset (reset),
.reset_out ({dcache_reset, icache_reset})
.clk (clk),
.reset (reset),
.reset_o ({dcache_reset, icache_reset})
);
VX_cache #(
@@ -214,9 +214,9 @@ module VX_mem_unit # (
wire scache_reset;
VX_reset_relay reset_relay (
.clk (clk),
.reset (reset),
.reset_out (scache_reset)
.clk (clk),
.reset (reset),
.reset_o (scache_reset)
);
VX_shared_mem #(