pipeline refactoring - fmax >= 222 mhz

2020-08-14 21:50:14 -07:00
parent 71a46d04b9
commit 6c12391338
107 changed files with 1392 additions and 1239 deletions
--- a/hw/rtl/libs/VX_countones.v
+++ b/hw/rtl/libs/VX_countones.v
@@ -7,11 +7,9 @@ module VX_countones #(
    input wire [N-1:0]       valids,
    output reg [$clog2(N):0] count    
 );
-
-    integer i;
    always @(*) begin
        count = 0;
-        for (i = N-1; i >= 0; i = i - 1) begin
+        for (integer i = N-1; i >= 0; i = i - 1) begin
            if (valids[i]) begin
                count = count + 1;
            end