pipeline refactoring - fmax >= 222 mhz
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@@ -7,7 +7,7 @@ interface VX_gpr_read_if ();
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wire valid;
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wire [`NW_BITS-1:0] warp_num;
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wire [`NW_BITS-1:0] wid;
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wire [`NR_BITS-1:0] rs1;
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wire [`NR_BITS-1:0] rs2;
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