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pipeline refactoring - fmax >= 222 mhz

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This commit is contained in:
Blaise Tine
2020-08-14 21:50:14 -07:00
parent 71a46d04b9
commit 6c12391338
107 changed files with 1392 additions and 1239 deletions
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93
hw/rtl/VX_gpu_unit.v
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@@ -3,6 +3,9 @@
module VX_gpu_unit #(
parameter CORE_ID = 0
) (
input wire clk,
input wire reset,
// Input
VX_gpu_req_if gpu_req_if,
@@ -10,74 +13,74 @@ module VX_gpu_unit #(
VX_warp_ctl_if warp_ctl_if,
VX_exu_to_cmt_if gpu_commit_if
);
gpu_tmc_t tmc;
gpu_wspawn_t wspawn;
gpu_barrier_t barrier;
gpu_split_t split;
wire is_wspawn = (gpu_req_if.gpu_op == `GPU_WSPAWN);
wire is_tmc = (gpu_req_if.gpu_op == `GPU_TMC);
wire is_split = (gpu_req_if.gpu_op == `GPU_SPLIT);
wire is_bar = (gpu_req_if.gpu_op == `GPU_BAR);
wire is_wspawn = (gpu_req_if.op == `GPU_WSPAWN);
wire is_tmc = (gpu_req_if.op == `GPU_TMC);
wire is_split = (gpu_req_if.op == `GPU_SPLIT);
wire is_bar = (gpu_req_if.op == `GPU_BAR);
wire gpu_req_fire = gpu_req_if.valid && gpu_commit_if.ready;
assign warp_ctl_if.warp_num = gpu_req_if.warp_num;
wire gpu_req_fire = gpu_req_if.valid;
// tmc
genvar i;
wire [`NUM_THREADS-1:0] tmc_new_mask;
for (i = 0; i < `NUM_THREADS; i++) begin
for (genvar i = 0; i < `NUM_THREADS; i++) begin
assign tmc_new_mask[i] = (i < gpu_req_if.rs1_data[0]);
end
assign warp_ctl_if.change_mask = is_tmc && gpu_req_fire;
assign warp_ctl_if.thread_mask = tmc_new_mask;
// barrier
assign warp_ctl_if.is_barrier = is_bar && gpu_req_fire;
assign warp_ctl_if.barrier_id = gpu_req_if.rs1_data[0][`NB_BITS-1:0];
assign warp_ctl_if.barrier_num_warps = (`NW_BITS+1)'(gpu_req_if.rs2_data - 1);
assign tmc.valid = gpu_req_fire && is_tmc;
assign tmc.thread_mask = tmc_new_mask;
// wspawn
wire [31:0] wspawn_pc = gpu_req_if.rs2_data;
wire [`NUM_WARPS-1:0] wspawn_wmask;
for (i = 0; i < `NUM_WARPS; i++) begin
for (genvar i = 0; i < `NUM_WARPS; i++) begin
assign wspawn_wmask[i] = (i < gpu_req_if.rs1_data[0]);
end
assign warp_ctl_if.wspawn = is_wspawn && gpu_req_fire;
assign warp_ctl_if.wspawn_pc = wspawn_pc;
assign warp_ctl_if.wspawn_wmask = wspawn_wmask;
assign wspawn.valid = gpu_req_fire && is_wspawn;
assign wspawn.wmask = wspawn_wmask;
assign wspawn.pc = wspawn_pc;
// split
wire[`NUM_THREADS-1:0] split_new_use_mask;
wire[`NUM_THREADS-1:0] split_new_later_mask;
wire [`NUM_THREADS-1:0] split_then_mask;
wire [`NUM_THREADS-1:0] split_else_mask;
for (i = 0; i < `NUM_THREADS; i++) begin
wire curr_bool = (gpu_req_if.rs1_data[i] == 32'b1);
assign split_new_use_mask[i] = gpu_req_if.thread_mask[i] & (curr_bool);
assign split_new_later_mask[i] = gpu_req_if.thread_mask[i] & (!curr_bool);
for (genvar i = 0; i < `NUM_THREADS; i++) begin
wire taken = gpu_req_if.rs1_data[i][0];
assign split_then_mask[i] = gpu_req_if.thread_mask[i] & taken;
assign split_else_mask[i] = gpu_req_if.thread_mask[i] & ~taken;
end
wire [`NT_BITS:0] num_valids;
assign split.valid = gpu_req_fire && is_split;
assign split.diverged = (| split_then_mask) && (| split_else_mask);
assign split.then_mask = split_then_mask;
assign split.else_mask = split_else_mask;
assign split.pc = gpu_req_if.curr_PC + 4;
VX_countones #(
.N(`NUM_THREADS)
) valids_counter (
.valids(gpu_req_if.thread_mask),
.count (num_valids)
);
// barrier
assign warp_ctl_if.is_split = is_split && (num_valids > 1) && gpu_req_fire;
assign warp_ctl_if.do_split = (split_new_use_mask != 0) && (split_new_use_mask != {`NUM_THREADS{1'b1}});
assign warp_ctl_if.split_new_mask = split_new_use_mask;
assign warp_ctl_if.split_later_mask = split_new_later_mask;
assign warp_ctl_if.split_save_pc = gpu_req_if.next_PC;
assign barrier.valid = is_bar && gpu_req_fire;
assign barrier.id = gpu_req_if.rs1_data[0][`NB_BITS-1:0];
assign barrier.num_warps = (`NW_BITS+1)'(gpu_req_if.rs2_data - 1);
// commit
assign gpu_commit_if.valid = gpu_req_if.valid;
assign gpu_commit_if.issue_tag = gpu_req_if.issue_tag;
assign gpu_commit_if.data = 0;
assign gpu_req_if.ready = gpu_commit_if.ready;
// output
VX_generic_register #(
.N(1 + `ISTAG_BITS + `NW_BITS + $bits(gpu_tmc_t) + $bits(gpu_wspawn_t) + $bits(gpu_split_t) + $bits(gpu_barrier_t))
) gpu_reg (
.clk (clk),
.reset (reset),
.stall (0),
.flush (0),
.in ({gpu_req_if.valid, gpu_req_if.issue_tag, gpu_req_if.wid, tmc, wspawn, split, barrier}),
.out ({gpu_commit_if.valid, gpu_commit_if.issue_tag, warp_ctl_if.wid, warp_ctl_if.tmc, warp_ctl_if.wspawn, warp_ctl_if.split, warp_ctl_if.barrier})
);
assign gpu_req_if.ready = 1'b1;
endmodule