From 6b729fd2ea038a71553f027b38f8246b138c0bbc Mon Sep 17 00:00:00 2001 From: felsabbagh3 Date: Fri, 18 Oct 2019 01:46:38 -0400 Subject: [PATCH] minor --- rtl/Makefile | 4 ++-- rtl/interfaces/VX_exec_unit_req_inter.v | 2 -- rtl/interfaces/VX_forward_csr_response_inter.v | 3 --- rtl/interfaces/VX_frE_to_bckE_req_inter.v | 2 -- rtl/{ => simulate}/VX_define.h | 0 rtl/{ => simulate}/ram.h | 0 rtl/simulate/tb_debug.h | 1 + rtl/{ => simulate}/test_bench.cpp | 0 rtl/{ => simulate}/test_bench.h | 0 9 files changed, 3 insertions(+), 9 deletions(-) rename rtl/{ => simulate}/VX_define.h (100%) rename rtl/{ => simulate}/ram.h (100%) create mode 100644 rtl/simulate/tb_debug.h rename rtl/{ => simulate}/test_bench.cpp (100%) rename rtl/{ => simulate}/test_bench.h (100%) diff --git a/rtl/Makefile b/rtl/Makefile index c51d99a7..be9cce6b 100644 --- a/rtl/Makefile +++ b/rtl/Makefile @@ -1,10 +1,10 @@ all: RUNFILE -INCLUDE=-I. -I../models/memory/cln28hpc/rf2_32x128_wm1/ -I/usr/local/systemc/ -Iinterfaces/ -Ipipe_regs/ +INCLUDE=-I. -I../models/memory/cln28hpc/rf2_32x128_wm1/ -I/usr/local/systemc/ -Iinterfaces/ -Ipipe_regs/ -Isimulate FILE=Vortex.v -EXE=--exe test_bench.cpp +EXE=--exe ./simulate/test_bench.cpp COMP=--compiler gcc diff --git a/rtl/interfaces/VX_exec_unit_req_inter.v b/rtl/interfaces/VX_exec_unit_req_inter.v index 5afcddc9..aab6c130 100644 --- a/rtl/interfaces/VX_exec_unit_req_inter.v +++ b/rtl/interfaces/VX_exec_unit_req_inter.v @@ -43,9 +43,7 @@ interface VX_exec_unit_req_inter (); // CSR info wire is_csr; wire[11:0] csr_address; - /* verilator lint_off UNUSED */ wire csr_immed; - /* verilator lint_on UNUSED */ wire[31:0] csr_mask; endinterface diff --git a/rtl/interfaces/VX_forward_csr_response_inter.v b/rtl/interfaces/VX_forward_csr_response_inter.v index 5d702fea..8f196acb 100644 --- a/rtl/interfaces/VX_forward_csr_response_inter.v +++ b/rtl/interfaces/VX_forward_csr_response_inter.v @@ -6,11 +6,8 @@ `define VX_FWD_CSR_RSP interface VX_forward_csr_response_inter (); - /* verilator lint_off UNUSED */ wire csr_fwd; wire[31:0] csr_fwd_data; - /* verilator lint_on UNUSED */ - endinterface diff --git a/rtl/interfaces/VX_frE_to_bckE_req_inter.v b/rtl/interfaces/VX_frE_to_bckE_req_inter.v index 2827f7c4..3664d903 100644 --- a/rtl/interfaces/VX_frE_to_bckE_req_inter.v +++ b/rtl/interfaces/VX_frE_to_bckE_req_inter.v @@ -9,9 +9,7 @@ interface VX_frE_to_bckE_req_inter (); wire[11:0] csr_address; wire is_csr; - /* verilator lint_off UNUSED */ wire csr_immed; - /* verilator lint_on UNUSED */ wire[31:0] csr_mask; wire[4:0] rd; wire[4:0] rs1; diff --git a/rtl/VX_define.h b/rtl/simulate/VX_define.h similarity index 100% rename from rtl/VX_define.h rename to rtl/simulate/VX_define.h diff --git a/rtl/ram.h b/rtl/simulate/ram.h similarity index 100% rename from rtl/ram.h rename to rtl/simulate/ram.h diff --git a/rtl/simulate/tb_debug.h b/rtl/simulate/tb_debug.h new file mode 100644 index 00000000..711663cc --- /dev/null +++ b/rtl/simulate/tb_debug.h @@ -0,0 +1 @@ +#define VCD_OFF diff --git a/rtl/test_bench.cpp b/rtl/simulate/test_bench.cpp similarity index 100% rename from rtl/test_bench.cpp rename to rtl/simulate/test_bench.cpp diff --git a/rtl/test_bench.h b/rtl/simulate/test_bench.h similarity index 100% rename from rtl/test_bench.h rename to rtl/simulate/test_bench.h