cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count

This commit is contained in:
Blaise Tine
2020-11-02 01:50:12 -08:00
parent 3fe31fc337
commit 5be1d85648
39 changed files with 1145 additions and 1322 deletions

View File

@@ -14,52 +14,52 @@ module VX_io_arb #(
input wire reset,
// input requests
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0] in_io_req_valid,
input wire [NUM_REQUESTS-1:0] in_io_req_rw,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][WORD_SIZE-1:0] in_io_req_byteen,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][ADDR_WIDTH-1:0] in_io_req_addr,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][WORD_WIDTH-1:0] in_io_req_data,
input wire [NUM_REQUESTS-1:0][TAG_IN_WIDTH-1:0] in_io_req_tag,
output wire [NUM_REQUESTS-1:0] in_io_req_ready,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0] io_req_valid_in,
input wire [NUM_REQUESTS-1:0] io_req_rw_in,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][WORD_SIZE-1:0] io_req_byteen_in,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][ADDR_WIDTH-1:0] io_req_addr_in,
input wire [NUM_REQUESTS-1:0][`NUM_THREADS-1:0][WORD_WIDTH-1:0] io_req_data_in,
input wire [NUM_REQUESTS-1:0][TAG_IN_WIDTH-1:0] io_req_tag_in,
output wire [NUM_REQUESTS-1:0] io_req_ready_in,
// input response
output wire [NUM_REQUESTS-1:0] in_io_rsp_valid,
output wire [NUM_REQUESTS-1:0][WORD_WIDTH-1:0] in_io_rsp_data,
output wire [NUM_REQUESTS-1:0][TAG_IN_WIDTH-1:0] in_io_rsp_tag,
input wire [NUM_REQUESTS-1:0] in_io_rsp_ready,
output wire [NUM_REQUESTS-1:0] io_rsp_valid_in,
output wire [NUM_REQUESTS-1:0][WORD_WIDTH-1:0] io_rsp_data_in,
output wire [NUM_REQUESTS-1:0][TAG_IN_WIDTH-1:0] io_rsp_tag_in,
input wire [NUM_REQUESTS-1:0] io_rsp_ready_in,
// output request
output wire [`NUM_THREADS-1:0] out_io_req_valid,
output wire out_io_req_rw,
output wire [`NUM_THREADS-1:0][WORD_SIZE-1:0] out_io_req_byteen,
output wire [`NUM_THREADS-1:0][ADDR_WIDTH-1:0] out_io_req_addr,
output wire [`NUM_THREADS-1:0][WORD_WIDTH-1:0] out_io_req_data,
output wire [TAG_OUT_WIDTH-1:0] out_io_req_tag,
input wire out_io_req_ready,
output wire [`NUM_THREADS-1:0] io_req_valid_out,
output wire io_req_rw_out,
output wire [`NUM_THREADS-1:0][WORD_SIZE-1:0] io_req_byteen_out,
output wire [`NUM_THREADS-1:0][ADDR_WIDTH-1:0] io_req_addr_out,
output wire [`NUM_THREADS-1:0][WORD_WIDTH-1:0] io_req_data_out,
output wire [TAG_OUT_WIDTH-1:0] io_req_tag_out,
input wire io_req_ready_out,
// output response
input wire out_io_rsp_valid,
input wire [WORD_WIDTH-1:0] out_io_rsp_data,
input wire [TAG_OUT_WIDTH-1:0] out_io_rsp_tag,
output wire out_io_rsp_ready
input wire io_rsp_valid_out,
input wire [WORD_WIDTH-1:0] io_rsp_data_out,
input wire [TAG_OUT_WIDTH-1:0] io_rsp_tag_out,
output wire io_rsp_ready_out
);
if (NUM_REQUESTS == 1) begin
`UNUSED_VAR (clk)
`UNUSED_VAR (reset)
assign out_io_req_valid = in_io_req_valid;
assign out_io_req_rw = in_io_req_rw;
assign out_io_req_byteen = in_io_req_byteen;
assign out_io_req_addr = in_io_req_addr;
assign out_io_req_data = in_io_req_data;
assign out_io_req_tag = in_io_req_tag;
assign in_io_req_ready = out_io_req_ready;
assign io_req_valid_out = io_req_valid_in;
assign io_req_rw_out = io_req_rw_in;
assign io_req_byteen_out = io_req_byteen_in;
assign io_req_addr_out = io_req_addr_in;
assign io_req_data_out = io_req_data_in;
assign io_req_tag_out = io_req_tag_in;
assign io_req_ready_in = io_req_ready_out;
assign in_io_rsp_valid = out_io_rsp_valid;
assign in_io_rsp_data = out_io_rsp_data;
assign in_io_rsp_tag = out_io_rsp_tag;
assign out_io_rsp_ready = in_io_rsp_ready;
assign io_rsp_valid_in = io_rsp_valid_out;
assign io_rsp_data_in = io_rsp_data_out;
assign io_rsp_tag_in = io_rsp_tag_out;
assign io_rsp_ready_out = io_rsp_ready_in;
end else begin
@@ -68,7 +68,7 @@ module VX_io_arb #(
wire [NUM_REQUESTS-1:0] valid_requests;
for (genvar i = 0; i < NUM_REQUESTS; i++) begin
assign valid_requests[i] = (| in_io_req_valid[i]);
assign valid_requests[i] = (| io_req_valid_in[i]);
end
VX_rr_arbiter #(
@@ -82,25 +82,25 @@ module VX_io_arb #(
`UNUSED_PIN (grant_onehot)
);
assign out_io_req_valid = in_io_req_valid [bus_req_sel];
assign out_io_req_rw = in_io_req_rw [bus_req_sel];
assign out_io_req_byteen = in_io_req_byteen [bus_req_sel];
assign out_io_req_addr = in_io_req_addr [bus_req_sel];
assign out_io_req_data = in_io_req_data [bus_req_sel];
assign out_io_req_tag = {in_io_req_tag [bus_req_sel], REQS_BITS'(bus_req_sel)};
assign io_req_valid_out = io_req_valid_in [bus_req_sel];
assign io_req_rw_out = io_req_rw_in [bus_req_sel];
assign io_req_byteen_out = io_req_byteen_in [bus_req_sel];
assign io_req_addr_out = io_req_addr_in [bus_req_sel];
assign io_req_data_out = io_req_data_in [bus_req_sel];
assign io_req_tag_out = {io_req_tag_in [bus_req_sel], REQS_BITS'(bus_req_sel)};
for (genvar i = 0; i < NUM_REQUESTS; i++) begin
assign in_io_req_ready[i] = out_io_req_ready && (bus_req_sel == REQS_BITS'(i));
assign io_req_ready_in[i] = io_req_ready_out && (bus_req_sel == REQS_BITS'(i));
end
wire [REQS_BITS-1:0] bus_rsp_sel = out_io_rsp_tag[REQS_BITS-1:0];
wire [REQS_BITS-1:0] bus_rsp_sel = io_rsp_tag_out[REQS_BITS-1:0];
for (genvar i = 0; i < NUM_REQUESTS; i++) begin
assign in_io_rsp_valid[i] = out_io_rsp_valid && (bus_rsp_sel == REQS_BITS'(i));
assign in_io_rsp_data[i] = out_io_rsp_data;
assign in_io_rsp_tag[i] = out_io_rsp_tag[REQS_BITS +: TAG_IN_WIDTH];
assign io_rsp_valid_in[i] = io_rsp_valid_out && (bus_rsp_sel == REQS_BITS'(i));
assign io_rsp_data_in[i] = io_rsp_data_out;
assign io_rsp_tag_in[i] = io_rsp_tag_out[REQS_BITS +: TAG_IN_WIDTH];
end
assign out_io_rsp_ready = in_io_rsp_ready[bus_rsp_sel];
assign io_rsp_ready_out = io_rsp_ready_in[bus_rsp_sel];
end