scope refactoring

hw/rtl/cache/VX_bank.v

@@ -50,7 +50,7 @@ module VX_bank #(
     // Snooping request tag width
     parameter SNP_REQ_TAG_WIDTH             = 0
 ) (
-    `SCOPE_SIGNALS_CACHE_IO
+    `SCOPE_SIGNALS_BANK_IO
 
     input wire clk,
     input wire reset,

hw/rtl/cache/VX_cache.v

@@ -59,7 +59,7 @@ module VX_cache #(
     // Snooping forward tag width
     parameter SNP_FWD_TAG_WIDTH             = 1
  ) (
-    `SCOPE_SIGNALS_CACHE_IO
+    `SCOPE_SIGNALS_BANK_CACHE_IO
     
     input wire clk,
     input wire reset,
@@ -162,8 +162,6 @@ module VX_cache #(
     wire [NUM_BANKS-1:0][SNP_REQ_TAG_WIDTH-1:0] per_bank_snp_rsp_tag;
     wire [NUM_BANKS-1:0]                        per_bank_snp_rsp_ready;
 
-    `SCOPE_SIGNALS_CACHE_BANK_SELECT
-
     wire                         snp_req_valid_qual;    
     wire [`DRAM_ADDR_WIDTH-1:0]  snp_req_addr_qual;
     wire                         snp_req_invalidate_qual;    
@@ -367,7 +365,7 @@ module VX_cache #(
             .CORE_TAG_ID_BITS   (CORE_TAG_ID_BITS),
             .SNP_REQ_TAG_WIDTH  (SNP_REQ_TAG_WIDTH)
         ) bank (
-            `SCOPE_SIGNALS_CACHE_BANK_BIND
+            `SCOPE_SIGNALS_BANK_SELECT(i)
             
             .clk                     (clk),
             .reset                   (reset),                

hw/rtl/cache/VX_cache_config.vh

@@ -2,7 +2,6 @@
 `define VX_CACHE_CONFIG
 
 `include "VX_platform.vh"
-`include "VX_scope.vh"
 
 `ifdef DBG_CORE_REQ_INFO
 `include "VX_define.vh"

hw/rtl/cache/VX_cache_miss_resrv.v

@@ -66,7 +66,7 @@ module VX_cache_miss_resrv #(
 
     reg [`LOG2UP(MRVQ_SIZE+1)-1:0] size;
 
-    `STATIC_ASSERT(MRVQ_SIZE > 5, "invalid size")
+    `STATIC_ASSERT(MRVQ_SIZE > 5, ("invalid size"))
 
     assign miss_resrv_full = (size == $bits(size)'(MRVQ_SIZE));
     assign miss_resrv_stop = (size  > $bits(size)'(MRVQ_SIZE-5)); // need to add 5 cycles to prevent pipeline lock

hw/rtl/cache/VX_snp_forwarder.v

@@ -37,7 +37,7 @@ module VX_snp_forwarder #(
     input wire [NUM_REQUESTS-1:0][`LOG2UP(SNRQ_SIZE)-1:0] snp_fwdin_tag,
     output wire [NUM_REQUESTS-1:0]      snp_fwdin_ready
 );
-    `STATIC_ASSERT(NUM_REQUESTS > 1, "invalid value")
+    `STATIC_ASSERT(NUM_REQUESTS > 1, ("invalid value"))
 
     reg [`REQS_BITS:0] pending_cntrs [SNRQ_SIZE-1:0];