performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
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@@ -7,10 +7,8 @@ interface VX_cache_snp_rsp_if #(
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parameter SNP_TAG_WIDTH = 0
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) ();
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wire valid;
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wire valid;
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wire [SNP_TAG_WIDTH-1:0] tag;
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wire ready;
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endinterface
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