Simulate debug
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models/memory/cln28hpm/rf2_32x128_wm1/vsim/transcript
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models/memory/cln28hpm/rf2_32x128_wm1/vsim/transcript
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# vsim rf2_32x128_wm1_tb -c -lib rf_lib -do "vcd file rf2_32x128_wm1_tb.vcd; vcd add -r /rf2_32x128_wm1_tb/*; run -all; quit -f"
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# Start time: 13:02:14 on Oct 29,2019
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# ** Note: (vsim-3813) Design is being optimized due to module recompilation...
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# // ModelSim SE-64 10.6a Mar 16 2017Linux 3.10.0-1062.1.2.el7.x86_64
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# //
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# // Copyright 1991-2017 Mentor Graphics Corporation
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# // All Rights Reserved.
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# //
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# // ModelSim SE-64 and its associated documentation contain trade
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# // secrets and commercial or financial information that are the property of
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# // Mentor Graphics Corporation and are privileged, confidential,
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# // and exempt from disclosure under the Freedom of Information Act,
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# // 5 U.S.C. Section 552. Furthermore, this information
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# // is prohibited from disclosure under the Trade Secrets Act,
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# // 18 U.S.C. Section 1905.
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# //
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# Loading sv_std.std
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# Loading work.rf2_32x128_wm1_tb(fast)
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# Loading work.rf2_32x128_wm1(fast)
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# vcd file rf2_32x128_wm1_tb.vcd
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# vcd add -r /rf2_32x128_wm1_tb/*
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# run -all
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# ** Note: $finish : rf2_32x128_wm1_tb.v(42)
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# Time: 220 ns Iteration: 0 Instance: /rf2_32x128_wm1_tb
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# End time: 13:02:16 on Oct 29,2019, Elapsed time: 0:00:02
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# Errors: 0, Warnings: 0
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