using single-port block ram for cache tags, restoring core reset signal

2021-01-02 19:53:41 -08:00
parent a766c16ac9
commit 4815ab099c
9 changed files with 213 additions and 23 deletions
--- a/hw/simulate/simulator.h
+++ b/hw/simulate/simulator.h
@@ -69,6 +69,8 @@ private:
  bool csr_req_active_;
  uint32_t* csr_rsp_value_;

+  uint64_t reset_time_;
+
  RAM *ram_;
  VVortex *vortex_;
 #ifdef VCD_OUTPUT