cummulative fixes, RTL uuid trace, texture unit fixes, simx timing fixes
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@@ -125,7 +125,7 @@ module VX_axi_adapter #(
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// AXI write response channel
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`UNUSED_VAR (m_axi_bid);
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`RUNTIME_ASSERT(~m_axi_bvalid || m_axi_bresp == 0, ("AXI response error"));
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`RUNTIME_ASSERT(~m_axi_bvalid || m_axi_bresp == 0, ("%t: *** AXI response error", $time));
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assign m_axi_bready = 1'b1;
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// AXI read request channel
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@@ -144,7 +144,7 @@ module VX_axi_adapter #(
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assign mem_rsp_valid = m_axi_rvalid;
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assign mem_rsp_tag = m_axi_rid;
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assign mem_rsp_data = m_axi_rdata;
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`RUNTIME_ASSERT(~m_axi_rvalid || m_axi_rresp == 0, ("AXI response error"));
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`RUNTIME_ASSERT(~m_axi_rvalid || m_axi_rresp == 0, ("%t: *** AXI response error", $time));
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`UNUSED_VAR (m_axi_rlast);
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assign m_axi_rready = mem_rsp_ready;
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