From 40e3e0105acf48da91e403f1d4b7fc6f9559e684 Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Mon, 22 Mar 2021 10:48:26 -0400 Subject: [PATCH] minor update --- hw/rtl/tex_unit/{VX_tex_addr_gen.v => VX_tex_addr.v} | 2 +- hw/rtl/tex_unit/VX_tex_unit.v | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) rename hw/rtl/tex_unit/{VX_tex_addr_gen.v => VX_tex_addr.v} (99%) diff --git a/hw/rtl/tex_unit/VX_tex_addr_gen.v b/hw/rtl/tex_unit/VX_tex_addr.v similarity index 99% rename from hw/rtl/tex_unit/VX_tex_addr_gen.v rename to hw/rtl/tex_unit/VX_tex_addr.v index e38671fb..261d0716 100644 --- a/hw/rtl/tex_unit/VX_tex_addr_gen.v +++ b/hw/rtl/tex_unit/VX_tex_addr.v @@ -1,6 +1,6 @@ `include "VX_tex_define.vh" -module VX_tex_addr_gen #( +module VX_tex_addr #( parameter CORE_ID = 0, parameter REQ_INFO_WIDTH = 1 ) ( diff --git a/hw/rtl/tex_unit/VX_tex_unit.v b/hw/rtl/tex_unit/VX_tex_unit.v index 42e976d2..eb3609f8 100644 --- a/hw/rtl/tex_unit/VX_tex_unit.v +++ b/hw/rtl/tex_unit/VX_tex_unit.v @@ -89,9 +89,9 @@ module VX_tex_unit #( wire [REQ_INFO_WIDTH_M-1:0] mem_rsp_info; wire mem_rsp_ready; - VX_tex_addr_gen #( + VX_tex_addr #( .REQ_INFO_WIDTH (REQ_INFO_WIDTH_A) - ) tex_addr_gen ( + ) tex_addr ( .clk (clk), .reset (reset),