fmax optimizations bundles
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@@ -90,11 +90,6 @@ module VX_alu_unit #(
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wire is_less = cmp_result[32];
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wire is_equal = ~(| cmp_result[31:0]);
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wire br_neg = `INST_BR_NEG(br_op);
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wire br_less = `INST_BR_LESS(br_op);
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wire br_static = `INST_BR_STATIC(br_op);
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wire br_taken = ((br_less ? is_less : is_equal) ^ br_neg) | br_static;
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// output
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wire result_valid;
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@@ -178,24 +173,33 @@ module VX_alu_unit #(
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`endif
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wire [`INST_BR_BITS-1:0] br_op_r;
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wire is_less_r;
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wire is_equal_r;
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wire is_br_op_r;
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assign stall_out = ~alu_commit_if.ready && alu_commit_if.valid;
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VX_pipe_register #(
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.DATAW (1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + 1 + 32),
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.DATAW (1 + `NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1 + (`NUM_THREADS * 32) + 1 + `INST_BR_BITS + 1 + 1 + 32),
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.RESETW (1)
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) pipe_reg (
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.clk (clk),
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.reset (reset),
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.enable (!stall_out),
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.data_in ({result_valid, result_wid, result_tmask, result_PC, result_rd, result_wb, result_data, result_is_br, br_taken, br_dest}),
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.data_out ({alu_commit_if.valid, alu_commit_if.wid, alu_commit_if.tmask, alu_commit_if.PC, alu_commit_if.rd, alu_commit_if.wb, alu_commit_if.data, is_br_op_r, branch_ctl_if.taken, branch_ctl_if.dest})
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.data_in ({result_valid, result_wid, result_tmask, result_PC, result_rd, result_wb, result_data, result_is_br, br_op, is_less, is_equal, br_dest}),
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.data_out ({alu_commit_if.valid, alu_commit_if.wid, alu_commit_if.tmask, alu_commit_if.PC, alu_commit_if.rd, alu_commit_if.wb, alu_commit_if.data, is_br_op_r, br_op_r, is_less_r, is_equal_r, branch_ctl_if.dest})
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);
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assign alu_commit_if.eop = 1'b1;
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`UNUSED_VAR (br_op_r)
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wire br_neg = `INST_BR_NEG(br_op_r);
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wire br_less = `INST_BR_LESS(br_op_r);
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wire br_static = `INST_BR_STATIC(br_op_r);
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assign branch_ctl_if.valid = alu_commit_if.valid && alu_commit_if.ready && is_br_op_r;
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assign branch_ctl_if.taken = ((br_less ? is_less_r : is_equal_r) ^ br_neg) | br_static;
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assign branch_ctl_if.wid = alu_commit_if.wid;
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// can accept new request?
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