From c43b3800d83683d63b666b47a7fbe63102172954 Mon Sep 17 00:00:00 2001
From: Shim <dshim8@gtcad-srv3.ece.gatech.edu>
Date: Tue, 22 Oct 2019 11:27:13 -0400
Subject: [PATCH] added report power and save ddc to synthesis script

---
 syn/syn.tcl | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/syn/syn.tcl b/syn/syn.tcl
index ddd351e2..130fea93 100755
--- a/syn/syn.tcl
+++ b/syn/syn.tcl
@@ -36,9 +36,11 @@ report_hierarchy
 report_cell
 report_reference
 report_port
+report_power
 
 write -hierarchy -format verilog -output Vortex.netlist.v
 remove_ideal_network [get_ports clk]
 set_propagated_clock [get_ports clk]
 write_sdc -version 1.9 Vortex.sdc
+write_file -format ddc -output Vortex.ddc
 exit