GPR ASIC Working

2019-10-29 23:20:16 -04:00
parent 3caae2b88e
commit 3b49b82c46
15 changed files with 168 additions and 99 deletions
--- a/rtl/VX_back_end.v
+++ b/rtl/VX_back_end.v
@@ -1,3 +1,5 @@
+`include "VX_define.v"
+
 module VX_back_end (
 	input wire clk, 
 	input wire reset, 
@@ -8,7 +10,6 @@ module VX_back_end (
 	VX_jal_response_inter     VX_jal_rsp,
 	VX_branch_response_inter  VX_branch_rsp,

-
 	VX_frE_to_bckE_req_inter  VX_bckE_req,
 	VX_wb_inter               VX_writeback_inter,