texture unit hardware optimizations

2021-12-02 10:22:21 -08:00
parent 4477cbeed1
commit 38f166f090
9 changed files with 208 additions and 106 deletions
--- a/hw/rtl/tex_unit/VX_tex_lerp.sv
+++ b/hw/rtl/tex_unit/VX_tex_lerp.sv
@@ -3,12 +3,11 @@
 module VX_tex_lerp (
    input wire [3:0][7:0]  in1,
    input wire [3:0][7:0]  in2,
-    input wire [8:0]       alpha,
-    input wire [7:0]       beta,
+    input wire [7:0]       frac,
    output wire [3:0][7:0] out
-);  
+);
    for (genvar i = 0; i < 4; ++i) begin
-        wire [16:0] sum = in1[i] * alpha + in2[i] * beta;
+        wire [16:0] sum = in1[i] * 8'(8'hff - frac) + in2[i] * frac;
        `UNUSED_VAR (sum)
        assign out[i] = sum[15:8];
    end