multiplier unit optimization - using fifo for metadata, shift register optimization

2020-12-26 11:23:21 -08:00
parent b459192dec
commit 33c431ed44
13 changed files with 171 additions and 76 deletions
--- a/hw/rtl/VX_fpu_unit.v
+++ b/hw/rtl/VX_fpu_unit.v
@@ -43,7 +43,7 @@ module VX_fpu_unit #(
        .DATAW   (`NW_BITS + `NUM_THREADS + 32 + `NR_BITS + 1),
        .SIZE    (`FPUQ_SIZE),
        .FASTRAM (1)
-    ) req_metadata_buf  (
+    ) req_metadata  (
        .clk          (clk),
        .reset        (reset),
        .acquire_slot (fpuq_push),