pipeline optimization

2020-07-30 03:06:01 -07:00
parent 60e05ae19a
commit 27e95530ef
20 changed files with 184 additions and 340 deletions
--- a/hw/rtl/libs/VX_generic_queue.v
+++ b/hw/rtl/libs/VX_generic_queue.v
@@ -52,11 +52,7 @@ module VX_generic_queue #(

    end else begin // (SIZE > 1)

-    `ifdef QUEUE_FORCE_MLAB
-        (* syn_ramstyle = "mlab" *) reg [DATAW-1:0] data [SIZE-1:0];
-    `else
-        reg [DATAW-1:0] data [SIZE-1:0];
-    `endif
+        `USE_FAST_BRAM reg [DATAW-1:0] data [SIZE-1:0];

        if (0 == BUFFERED) begin