pipeline optimization

2020-07-30 03:06:01 -07:00
parent 60e05ae19a
commit 27e95530ef
20 changed files with 184 additions and 340 deletions
--- a/hw/rtl/libs/VX_cam_buffer.v
+++ b/hw/rtl/libs/VX_cam_buffer.v
@@ -12,7 +12,7 @@ module VX_cam_buffer #(
    output wire [ADDRW-1:0] write_addr,
    input  wire acquire_slot,
    input  wire [RPORTS-1:0][ADDRW-1:0] read_addr,
-    output reg [RPORTS-1:0][DATAW-1:0] read_data,
+    output reg  [RPORTS-1:0][DATAW-1:0] read_data,
    input  wire [RPORTS-1:0] release_slot,        
    output wire full
 );