wu-arch/kernels
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

pipeline optimization

Browse Source
This commit is contained in:
Blaise Tine
2020-07-30 03:06:01 -07:00
parent 60e05ae19a
commit 27e95530ef
20 changed files with 184 additions and 340 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
hw/rtl/interfaces/VX_decode_if.v
View File

@@ -21,16 +21,12 @@ interface VX_decode_if ();
wire rs1_is_PC;
wire rs2_is_imm;
wire use_rs1;
wire use_rs2;
wire [`NUM_REGS-1:0] reg_use_mask;
// FP states
wire [`NR_BITS-1:0] rs3;
wire use_rs3;
wire rd_is_fp;
wire rs1_is_fp;
wire rs2_is_fp;
wire use_rs3;
wire [`FRM_BITS-1:0] frm;
wire wb;

5
hw/rtl/interfaces/VX_gpr_read_if.v
View File

@@ -13,10 +13,7 @@ interface VX_gpr_read_if ();
wire [`NR_BITS-1:0] rs2;
wire [`NR_BITS-1:0] rs3;
wire use_rs3;
wire rs1_is_fp;
wire rs2_is_fp;
wire use_rs3;
wire [`NUM_THREADS-1:0][31:0] rs1_data;
wire [`NUM_THREADS-1:0][31:0] rs2_data;

2
hw/rtl/interfaces/VX_wb_if.v
View File

@@ -14,8 +14,8 @@ interface VX_wb_if ();
`IGNORE_WARNINGS_END
wire [`NR_BITS-1:0] rd;
wire rd_is_fp;
wire [`NUM_THREADS-1:0][31:0] data;
wire ready;
endinterface