wu-arch/kernels
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Added capability for instrumentation on all register accesses.

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git-svn-id: http://www.cdkersey.com/harp/harptool@30 0246edb2-e076-4747-b392-db732a341fa2
This commit is contained in:
chad
2011-10-19 01:04:51 +00:00
parent 15fc1a6d6e
commit 1ada993c54
3 changed files with 52 additions and 14 deletions
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29
src/core.cpp
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@@ -16,11 +16,24 @@ using namespace std;
Core::Core(const ArchDef &a, Decoder &d, MemoryUnit &mem, Word id) :
a(a), iDec(d), mem(mem), pc(0), interruptEnable(false), supervisorMode(true),
activeThreads(1),
reg(a.getNThds(), vector<Word>(a.getNRegs())),
pred(a.getNThds(), vector<bool>(a.getNPRegs())),
shadowReg(), shadowPReg(), interruptEntry(0), id(id)
{ reg[0][0] = (a.getNThds()<<(a.getWordSize()*8 / 2)) | id; }
activeThreads(1), reg(0), pred(0), shadowReg(a.getNRegs()), shadowPReg(a.getNPRegs()o),
interruptEntry(0), id(id)
{
/* Build the register file. */
Word regNum(0);
for (Word j = 0; j < a.getNThds(); ++j) {
reg.push_back(vector<Reg<Word> >(0));
for (Word i = 0; i < a.getNRegs(); ++i)
reg[j].push_back(Reg<Word>(id, regNum++));
pred.push_back(vector<Reg<bool> >(0));
for (Word i = 0; i < a.getNPRegs(); ++i)
pred[j].push_back(Reg<bool>(id, regNum++));
}
/* Set initial register contents. */
reg[0][0] = (a.getNThds()<<(a.getWordSize()*8 / 2)) | id;
}
void Core::step() {
Size fetchPos(0), decPos, wordSize(a.getWordSize());
@@ -82,8 +95,10 @@ bool Core::interrupt(Word r0) {
shadowActiveThreads = activeThreads;
shadowInterruptEnable = interruptEnable; /* For traps. */
shadowSupervisorMode = supervisorMode;
shadowReg = reg[0];
shadowPReg = pred[0];
for (Word i = 0; i < reg[0].size(); ++i) shadowReg[i] = reg[0][i];
for (Word i = 0; i < pred[0].size(); ++i) shadowPReg[i] = pred[0][i];
shadowPc = pc;
activeThreads = 1;
interruptEnable = false;