From 189cec3ca2529c0061dd121bb27fc92e7332d032 Mon Sep 17 00:00:00 2001 From: Blaise Tine Date: Wed, 1 Dec 2021 10:36:50 -0500 Subject: [PATCH] minor update --- ci/regression.sh | 1 + sim/simx/processor.cpp | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/ci/regression.sh b/ci/regression.sh index b6125ce1..4a1336c8 100755 --- a/ci/regression.sh +++ b/ci/regression.sh @@ -56,6 +56,7 @@ echo "begin clustering tests..." ./ci/blackbox.sh --driver=rtlsim --cores=2 --l2cache --app=demo --args="-n1" ./ci/blackbox.sh --driver=rtlsim --cores=2 --clusters=2 --l3cache --app=demo --args="-n1" ./ci/blackbox.sh --driver=rtlsim --cores=2 --clusters=2 --l2cache --l3cache --app=io_addr --args="-n1" +./ci/blackbox.sh --driver=simx --cores=4 --clusters=2 --l2cache --app=demo --args="-n1" ./ci/blackbox.sh --driver=simx --cores=4 --clusters=4 --l2cache --l3cache --app=demo --args="-n1" echo "clustering tests done!" diff --git a/sim/simx/processor.cpp b/sim/simx/processor.cpp index f069a6b7..6bb46229 100644 --- a/sim/simx/processor.cpp +++ b/sim/simx/processor.cpp @@ -109,7 +109,7 @@ Processor::Processor(const ArchDef& arch) } for (uint32_t j = 0; j < cores_per_cluster; ++j) { - auto& core = cores_.at((i * NUM_CLUSTERS) + j); + auto& core = cores_.at((i * cores_per_cluster) + j); cluster_mem_rsp_ports.at(j)->bind(&core->MemRspPort); core->MemReqPort.bind(cluster_mem_req_ports.at(j)); }