L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization

2020-11-21 09:47:56 -08:00
parent a7da36c007
commit 1795980a52
50 changed files with 972 additions and 952 deletions
--- a/hw/rtl/interfaces/VX_gpr_rsp_if.v
+++ b/hw/rtl/interfaces/VX_gpr_rsp_if.v
@@ -9,7 +9,6 @@ interface VX_gpr_rsp_if ();
    wire [`NW_BITS-1:0]     wid;
    wire [31:0]             PC;
 `IGNORE_WARNINGS_END
-
    wire [`NUM_THREADS-1:0][31:0] rs1_data;
    wire [`NUM_THREADS-1:0][31:0] rs2_data;
    wire [`NUM_THREADS-1:0][31:0] rs3_data;