moved apae sources into rtl/afu

This commit is contained in:
Blaise Tine
2020-12-08 04:59:11 -08:00
parent d5fa82f5e4
commit 14baec86d5
18 changed files with 35 additions and 1710 deletions

View File

@@ -1,6 +1,6 @@
ASE_BUILD_DIR=build_ase
FPGA_BUILD_DIR=build_fpga
RTL_DIR=../rtl
all: ase-1c
@@ -11,15 +11,15 @@ gen_sources: sources.txt
ase-1c: gen_sources setup-ase-1c
make -C $(ASE_BUILD_DIR)_1c
cp ../rtl/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_1c/work
cp $(RTL_DIR)/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_1c/work
ase-2c: gen_sources setup-ase-2c
make -C $(ASE_BUILD_DIR)_2c
cp ../rtl/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_2c/work
cp $(RTL_DIR)/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_2c/work
ase-4c: gen_sources setup-ase-4c
make -C $(ASE_BUILD_DIR)_4c
cp ../rtl/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_4c/work
cp $(RTL_DIR)/fp_cores/altera/*.hex $(ASE_BUILD_DIR)_4c/work
setup-ase-1c: $(ASE_BUILD_DIR)_1c/Makefile
@@ -38,15 +38,15 @@ $(ASE_BUILD_DIR)_4c/Makefile: sources.txt
fpga-1c: gen_sources setup-fpga-1c
cd $(FPGA_BUILD_DIR)_1c && qsub-synth
cp ../rtl/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_1c
cp $(RTL_DIR)/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_1c
fpga-2c: gen_sources setup-fpga-2c
cd $(FPGA_BUILD_DIR)_2c && qsub-synth
cp ../rtl/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_2c
cp $(RTL_DIR)/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_2c
fpga-4c: gen_sources setup-fpga-4c
cd $(FPGA_BUILD_DIR)_4c && qsub-synth
cp ../rtl/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_4c
cp $(RTL_DIR)/fp_cores/altera/*.hex $(FPGA_BUILD_DIR)_4c
setup-fpga-1c: $(FPGA_BUILD_DIR)_1c/build/dcp.qpf
@@ -90,3 +90,5 @@ clean-fpga-2c:
clean-fpga-4c:
rm -rf $(FPGA_BUILD_DIR)_4c sources.txt
clean: clean-ase-1c clean-ase-2c clean-ase-4c clean-fpga-1c clean-fpga-2c clean-fpga-4c
rm sources.txt