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minor update

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Blaise Tine
2021-01-06 19:59:04 -08:00
parent 2b8435471a
commit 146c285aa0
13 changed files with 67 additions and 28 deletions
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hw/syn/quartus/project.tcl
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@@ -39,7 +39,6 @@ set_global_assignment -name VERILOG_MACRO QUARTUS
set_global_assignment -name VERILOG_MACRO SYNTHESIS
set_global_assignment -name VERILOG_MACRO NDEBUG
set_global_assignment -name MESSAGE_DISABLE 16818
set_global_assignment -name VERILOG_MACRO FPU_FAST
set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON
set_global_assignment -name OPTIMIZATION_TECHNIQUE SPEED