shared memory optimization
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2
hw/rtl/cache/VX_cache_define.vh
vendored
2
hw/rtl/cache/VX_cache_define.vh
vendored
@@ -59,8 +59,6 @@
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`define CORE_RSP_TAGS ((CORE_TAG_ID_BITS != 0) ? 1 : NUM_REQS)
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`define BANK_READY_COUNT ((SHARED_BANK_READY != 0) ? 1 : NUM_BANKS)
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`define LINE_TO_MEM_ADDR(x, i) {x, `BANK_SELECT_BITS'(i)}
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`define MEM_TAG_TO_REQ_ID(x) x[MSHR_ADDR_WIDTH-1:0]
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