more renaming and cleanup
This commit is contained in:
Richard Yan
170
lib/gemmini/rocc-software/src/xcustom.h
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170
lib/gemmini/rocc-software/src/xcustom.h
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// Copyright 2018--2020 IBM
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef ROCC_SOFTWARE_SRC_XCUSTOM_H_
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#define ROCC_SOFTWARE_SRC_XCUSTOM_H_
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#define STR1(x) #x
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#ifndef STR
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#define STR(x) STR1(x)
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#endif
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#define CAT_(A, B) A##B
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#define CAT(A, B) CAT_(A, B)
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/** Assembly macro for creating "raw" Rocket Custom Coproessor (RoCC)
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* assembly language instructions that will return data in rd. These
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* are to be used only in assembly language programs (not C/C++).
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*
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* Example:
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*
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* Consider the following macro consisting of a CUSTOM_0 instruction
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* with func7 "42" that is doing some operation of "a0 = op(a1, a2)":
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*
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* ROCC_INSTRUCTION_RAW_R_R_R(0, a0, a1, a2, 42)
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*
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* This will produce the following pseudo assembly language
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* instruction:
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*
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* .insn r CUSTOM_0, 7, 42, a0, a1, a2
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*
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* @param x the custom instruction number: 0, 1, 2, or 3
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* @param rd the destination register, e.g., a0 or x10
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* @param rs1 the first source register, e.g., a0 or x10
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* @param rs2 the second source register, e.g., a0 or x10
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* @param func7 the value of the func7 field
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* @return a raw .insn RoCC instruction
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*/
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#define ROCC_INSTRUCTION_RAW_R_R_R(x, rd, rs1, rs2, func7) \
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.insn r CAT(CUSTOM_, x), 7, func7, rd, rs1, rs2
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/** Assembly macro for creating "raw" Rocket Custom Coproessor (RoCC)
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* assembly language instructions that will *NOT* return data in rd.
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* These are to be used only in assembly language programs (not
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* C/C++).
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*
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* Example:
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*
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* Consider the following macro consisting of a CUSTOM_1 instruction
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* with func7 "42" that is doing some operation of "op(a1, a2)". *NO*
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* data is returned:
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*
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* ROCC_INSTRUCTION_RAW_R_R_R(1, a1, a2, 42)
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*
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* This will produce the following pseudo assembly language
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* instruction:
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*
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* .insn r CUSTOM_1, 3, 42, x0, a1, a2
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*
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* @param x the custom instruction number: 0, 1, 2, or 3
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* @param rs1 the first source register, e.g., a0 or x10
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* @param rs2 the second source register, e.g., a0 or x10
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* @param func7 the value of the func7 field
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* @return a raw .insn RoCC instruction
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*/
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#define ROCC_INSTRUCTION_RAW_0_R_R(x, rs1, rs2, func7) \
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.insn r CAT(CUSTOM_, x), 3, func7, x0, rs1, rs2
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/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
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* (RoCC) instructions that return data in rd. These are to be used
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* only in C/C++ programs (not bare assembly).
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*
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* This is equivalent to ROCC_INSTRUCTION_R_R_R. See it's
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* documentation.
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*/
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#define ROCC_INSTRUCTION(x, rd, rs1, rs2, func7) \
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ROCC_INSTRUCTION_R_R_R(x, rd, rs1, rs2, func7)
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/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
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* (RoCC) instructions that return data in C variable rd.
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* These are to be used only in C/C++ programs (not bare assembly).
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*
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* Example:
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*
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* Consider the following macro consisting of a CUSTOM_2 instruction
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* with func7 "42" that is doing some operation of "a0 = op(a1, a2)"
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* (where a0, a1, and a2 are variables defined in C):
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*
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* ROCC_INSTRUCTION(2, a0, a1, a2, 42)
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*
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* This will produce the following inline assembly:
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*
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* asm volatile(
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* ".insn r CUSTOM_2, 0x7, 42, %0, %1, %2"
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* : "=r"(rd)
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* : "r"(rs1), "r"(rs2));
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*
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* @param x the custom instruction number: 0, 1, 2, or 3
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* @param rd the C variable to capture as destination operand
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* @param rs1 the C variable to capture for first source register
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* @param rs2 the C variable to capture for second source register
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* @param func7 the value of the func7 field
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* @return an inline assembly RoCC instruction
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*/
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#define ROCC_INSTRUCTION_R_R_R(x, rd, rs1, rs2, func7) \
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{ \
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asm volatile( \
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".insn r " STR(CAT(CUSTOM_, x)) ", " STR(0x7) ", " STR(func7) ", %0, %1, %2" \
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: "=r"(rd) \
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: "r"(rs1), "r"(rs2)); \
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}
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/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
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* (RoCC) instructions that return data in C variable rd.
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* These are to be used only in C/C++ programs (not bare assembly).
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*
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* Example:
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*
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* Consider the following macro consisting of a CUSTOM_3 instruction
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* with func7 "42" that is doing some operation of "a0 = op(a1, a2)"
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* (where a0, a1, and a2 are variables defined in C):
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*
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* ROCC_INSTRUCTION(3, a0, a1, a2, 42)
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*
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* This will produce the following inline assembly:
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*
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* asm volatile(
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* ".insn r CUSTOM_3, 0x7, 42, %0, %1, %2"
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* :: "r"(rs1), "r"(rs2));
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*
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* @param x the custom instruction number: 0, 1, 2, or 3
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* @param rs1 the C variable to capture for first source register
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* @param rs2 the C variable to capture for second source register
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* @param funct7 the value of the funct7 f
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* @return an inline assembly RoCC instruction
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*/
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#define ROCC_INSTRUCTION_0_R_R(x, rs1, rs2, func7) \
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{ \
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asm volatile( \
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".insn r " STR(CAT(CUSTOM_, x)) ", " STR(0x3) ", " STR(func7) ", x0, %0, %1" \
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: \
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: "r"(rs1), "r"(rs2)); \
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}
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// [TODO] fix these to align with the above approach
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// Macro to pass rs2_ as an immediate
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/*
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#define ROCC_INSTRUCTION_R_R_I(XCUSTOM_, rd_, rs1_, rs2_, funct_) \
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asm volatile (XCUSTOM_" %[rd], %[rs1], %[rs2], %[funct]" \
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: [rd] "=r" (rd_) \
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: [rs1] "r" (rs1_), [rs2] "i" (rs2_), [funct] "i" (funct_))
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// Macro to pass rs1_ and rs2_ as immediates
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#define ROCC_INSTRUCTION_R_I_I(XCUSTOM_, rd_, rs1_, rs2_, funct_) \
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asm volatile (XCUSTOM_" %[rd], %[rs1], %[rs2], %[funct]" \
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: [rd] "=r" (rd_) \
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: [rs1] "i" (rs1_), [rs2] "i" (rs2_), [funct] "i" (funct_))
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*/
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#endif // ROCC_SOFTWARE_SRC_XCUSTOM_H_
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