more renaming and cleanup
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vendored
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vendored
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@@ -0,0 +1,3 @@
|
||||
*~
|
||||
*#
|
||||
*.#*
|
||||
46
lib/gemmini/rocc-software/CONTRIBUTING.md
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|
||||
All contributors must agree to the Developer Certificate of Origin Version 1.1. (DCO 1.1) by signing their commits with:
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||||
|
||||
```
|
||||
DCO 1.1 Signed-off-by: [NAME] <[EMAIL]>
|
||||
```
|
||||
|
||||
The full text of the DCO 1.1 is as follows:
|
||||
|
||||
```
|
||||
Developer Certificate of Origin
|
||||
Version 1.1
|
||||
|
||||
Copyright (C) 2004, 2006 The Linux Foundation and its contributors.
|
||||
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Developer's Certificate of Origin 1.1
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By making a contribution to this project, I certify that:
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||||
(a) The contribution was created in whole or in part by me and I
|
||||
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||||
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|
||||
|
||||
(b) The contribution is based upon previous work that, to the best
|
||||
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|
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(c) The contribution was provided directly to me by some other
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|
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||||
Apache License
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||||
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||||
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4
lib/gemmini/rocc-software/README.md
Normal file
4
lib/gemmini/rocc-software/README.md
Normal file
@@ -0,0 +1,4 @@
|
||||
Rocket Custom Coprocessor (RoCC) Software
|
||||
========================================
|
||||
|
||||
This is a set of C and RISC-V Assembly macros that help with emitting custom RISC-V instructions for talking with Rocket Custom Coprocessors (RoCCs).
|
||||
28
lib/gemmini/rocc-software/src/riscv_test_rocc.h
Normal file
28
lib/gemmini/rocc-software/src/riscv_test_rocc.h
Normal file
@@ -0,0 +1,28 @@
|
||||
// Copyright 2018 IBM
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef ROCC_SOFTWARE_SRC_RISCV_TEST_ROCC_H_
|
||||
#define ROCC_SOFTWARE_SRC_RISCV_TEST_ROCC_H_
|
||||
|
||||
|
||||
#define RVTEST_XS_ENABLE \
|
||||
li a0, MSTATUS_XS & (MSTATUS_XS >> 1); \
|
||||
csrs mstatus, a0;
|
||||
|
||||
#define RVTEST_WITH_ROCC \
|
||||
.macro init; \
|
||||
RVTEST_XS_ENABLE \
|
||||
.endm
|
||||
|
||||
#endif // ROCC_SOFTWARE_SRC_RISCV_TEST_ROCC_H_
|
||||
170
lib/gemmini/rocc-software/src/xcustom.h
Normal file
170
lib/gemmini/rocc-software/src/xcustom.h
Normal file
@@ -0,0 +1,170 @@
|
||||
// Copyright 2018--2020 IBM
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#ifndef ROCC_SOFTWARE_SRC_XCUSTOM_H_
|
||||
#define ROCC_SOFTWARE_SRC_XCUSTOM_H_
|
||||
|
||||
#define STR1(x) #x
|
||||
#ifndef STR
|
||||
#define STR(x) STR1(x)
|
||||
#endif
|
||||
|
||||
#define CAT_(A, B) A##B
|
||||
#define CAT(A, B) CAT_(A, B)
|
||||
|
||||
/** Assembly macro for creating "raw" Rocket Custom Coproessor (RoCC)
|
||||
* assembly language instructions that will return data in rd. These
|
||||
* are to be used only in assembly language programs (not C/C++).
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* Consider the following macro consisting of a CUSTOM_0 instruction
|
||||
* with func7 "42" that is doing some operation of "a0 = op(a1, a2)":
|
||||
*
|
||||
* ROCC_INSTRUCTION_RAW_R_R_R(0, a0, a1, a2, 42)
|
||||
*
|
||||
* This will produce the following pseudo assembly language
|
||||
* instruction:
|
||||
*
|
||||
* .insn r CUSTOM_0, 7, 42, a0, a1, a2
|
||||
*
|
||||
* @param x the custom instruction number: 0, 1, 2, or 3
|
||||
* @param rd the destination register, e.g., a0 or x10
|
||||
* @param rs1 the first source register, e.g., a0 or x10
|
||||
* @param rs2 the second source register, e.g., a0 or x10
|
||||
* @param func7 the value of the func7 field
|
||||
* @return a raw .insn RoCC instruction
|
||||
*/
|
||||
#define ROCC_INSTRUCTION_RAW_R_R_R(x, rd, rs1, rs2, func7) \
|
||||
.insn r CAT(CUSTOM_, x), 7, func7, rd, rs1, rs2
|
||||
|
||||
/** Assembly macro for creating "raw" Rocket Custom Coproessor (RoCC)
|
||||
* assembly language instructions that will *NOT* return data in rd.
|
||||
* These are to be used only in assembly language programs (not
|
||||
* C/C++).
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* Consider the following macro consisting of a CUSTOM_1 instruction
|
||||
* with func7 "42" that is doing some operation of "op(a1, a2)". *NO*
|
||||
* data is returned:
|
||||
*
|
||||
* ROCC_INSTRUCTION_RAW_R_R_R(1, a1, a2, 42)
|
||||
*
|
||||
* This will produce the following pseudo assembly language
|
||||
* instruction:
|
||||
*
|
||||
* .insn r CUSTOM_1, 3, 42, x0, a1, a2
|
||||
*
|
||||
* @param x the custom instruction number: 0, 1, 2, or 3
|
||||
* @param rs1 the first source register, e.g., a0 or x10
|
||||
* @param rs2 the second source register, e.g., a0 or x10
|
||||
* @param func7 the value of the func7 field
|
||||
* @return a raw .insn RoCC instruction
|
||||
*/
|
||||
#define ROCC_INSTRUCTION_RAW_0_R_R(x, rs1, rs2, func7) \
|
||||
.insn r CAT(CUSTOM_, x), 3, func7, x0, rs1, rs2
|
||||
|
||||
/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
|
||||
* (RoCC) instructions that return data in rd. These are to be used
|
||||
* only in C/C++ programs (not bare assembly).
|
||||
*
|
||||
* This is equivalent to ROCC_INSTRUCTION_R_R_R. See it's
|
||||
* documentation.
|
||||
*/
|
||||
#define ROCC_INSTRUCTION(x, rd, rs1, rs2, func7) \
|
||||
ROCC_INSTRUCTION_R_R_R(x, rd, rs1, rs2, func7)
|
||||
|
||||
/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
|
||||
* (RoCC) instructions that return data in C variable rd.
|
||||
* These are to be used only in C/C++ programs (not bare assembly).
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* Consider the following macro consisting of a CUSTOM_2 instruction
|
||||
* with func7 "42" that is doing some operation of "a0 = op(a1, a2)"
|
||||
* (where a0, a1, and a2 are variables defined in C):
|
||||
*
|
||||
* ROCC_INSTRUCTION(2, a0, a1, a2, 42)
|
||||
*
|
||||
* This will produce the following inline assembly:
|
||||
*
|
||||
* asm volatile(
|
||||
* ".insn r CUSTOM_2, 0x7, 42, %0, %1, %2"
|
||||
* : "=r"(rd)
|
||||
* : "r"(rs1), "r"(rs2));
|
||||
*
|
||||
* @param x the custom instruction number: 0, 1, 2, or 3
|
||||
* @param rd the C variable to capture as destination operand
|
||||
* @param rs1 the C variable to capture for first source register
|
||||
* @param rs2 the C variable to capture for second source register
|
||||
* @param func7 the value of the func7 field
|
||||
* @return an inline assembly RoCC instruction
|
||||
*/
|
||||
#define ROCC_INSTRUCTION_R_R_R(x, rd, rs1, rs2, func7) \
|
||||
{ \
|
||||
asm volatile( \
|
||||
".insn r " STR(CAT(CUSTOM_, x)) ", " STR(0x7) ", " STR(func7) ", %0, %1, %2" \
|
||||
: "=r"(rd) \
|
||||
: "r"(rs1), "r"(rs2)); \
|
||||
}
|
||||
|
||||
/** C/C++ inline assembly macro for creating Rocket Custom Coprocessor
|
||||
* (RoCC) instructions that return data in C variable rd.
|
||||
* These are to be used only in C/C++ programs (not bare assembly).
|
||||
*
|
||||
* Example:
|
||||
*
|
||||
* Consider the following macro consisting of a CUSTOM_3 instruction
|
||||
* with func7 "42" that is doing some operation of "a0 = op(a1, a2)"
|
||||
* (where a0, a1, and a2 are variables defined in C):
|
||||
*
|
||||
* ROCC_INSTRUCTION(3, a0, a1, a2, 42)
|
||||
*
|
||||
* This will produce the following inline assembly:
|
||||
*
|
||||
* asm volatile(
|
||||
* ".insn r CUSTOM_3, 0x7, 42, %0, %1, %2"
|
||||
* :: "r"(rs1), "r"(rs2));
|
||||
*
|
||||
* @param x the custom instruction number: 0, 1, 2, or 3
|
||||
* @param rs1 the C variable to capture for first source register
|
||||
* @param rs2 the C variable to capture for second source register
|
||||
* @param funct7 the value of the funct7 f
|
||||
* @return an inline assembly RoCC instruction
|
||||
*/
|
||||
#define ROCC_INSTRUCTION_0_R_R(x, rs1, rs2, func7) \
|
||||
{ \
|
||||
asm volatile( \
|
||||
".insn r " STR(CAT(CUSTOM_, x)) ", " STR(0x3) ", " STR(func7) ", x0, %0, %1" \
|
||||
: \
|
||||
: "r"(rs1), "r"(rs2)); \
|
||||
}
|
||||
|
||||
// [TODO] fix these to align with the above approach
|
||||
// Macro to pass rs2_ as an immediate
|
||||
/*
|
||||
#define ROCC_INSTRUCTION_R_R_I(XCUSTOM_, rd_, rs1_, rs2_, funct_) \
|
||||
asm volatile (XCUSTOM_" %[rd], %[rs1], %[rs2], %[funct]" \
|
||||
: [rd] "=r" (rd_) \
|
||||
: [rs1] "r" (rs1_), [rs2] "i" (rs2_), [funct] "i" (funct_))
|
||||
|
||||
// Macro to pass rs1_ and rs2_ as immediates
|
||||
#define ROCC_INSTRUCTION_R_I_I(XCUSTOM_, rd_, rs1_, rs2_, funct_) \
|
||||
asm volatile (XCUSTOM_" %[rd], %[rs1], %[rs2], %[funct]" \
|
||||
: [rd] "=r" (rd_) \
|
||||
: [rs1] "i" (rs1_), [rs2] "i" (rs2_), [funct] "i" (funct_))
|
||||
*/
|
||||
|
||||
#endif // ROCC_SOFTWARE_SRC_XCUSTOM_H_
|
||||
Reference in New Issue
Block a user