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minor update

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This commit is contained in:
Blaise Tine
2020-12-03 08:47:03 -08:00
parent b7a724410b
commit 0a8f41964d
5 changed files with 101 additions and 70 deletions
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14
hw/rtl/cache/VX_cache.v vendored
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@@ -6,13 +6,13 @@ module VX_cache #(
// Size of cache in bytes
parameter CACHE_SIZE = 8092,
// Size of line inside a bank in bytes
parameter BANK_LINE_SIZE = 64,
parameter BANK_LINE_SIZE = 16,
// Number of banks
parameter NUM_BANKS = 4,
// Size of a word in bytes
parameter WORD_SIZE = 4,
// Number of Word requests per cycle
parameter NUM_REQS = 4,
parameter NUM_REQS = NUM_BANKS,
// Core Request Queue Size
parameter CREQ_SIZE = 4,
@@ -39,14 +39,14 @@ module VX_cache #(
// Enable cache flush
parameter FLUSH_ENABLE = 1,
// core request tag size
parameter CORE_TAG_WIDTH = 4,
// size of tag id in core request tag
parameter CORE_TAG_ID_BITS = 0,
parameter CORE_TAG_ID_BITS = $clog2(MSHR_SIZE),
// core request tag size
parameter CORE_TAG_WIDTH = CORE_TAG_ID_BITS,
// dram request tag size
parameter DRAM_TAG_WIDTH = 28,
parameter DRAM_TAG_WIDTH = (32 - $clog2(BANK_LINE_SIZE)),
// Snooping request tag width
parameter SNP_TAG_WIDTH = 1

37
hw/rtl/cache/VX_cache_core_rsp_merge.v vendored
View File

@@ -62,6 +62,7 @@ module VX_cache_core_rsp_merge #(
end
end
end
end else begin
always @(*) begin
@@ -80,6 +81,7 @@ module VX_cache_core_rsp_merge #(
end
end
end
end
wire stall = ~core_rsp_ready && (| core_rsp_valid);
@@ -100,30 +102,51 @@ module VX_cache_core_rsp_merge #(
for (genvar i = 0; i < NUM_BANKS; i++) begin
assign per_bank_core_rsp_ready[i] = core_rsp_bank_select[i] && ~stall;
end
end else begin
`UNUSED_VAR (clk)
`UNUSED_VAR (reset)
if (NUM_REQS > 1) begin
assign core_rsp_valid[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_valid;
reg [NUM_REQS-1:0] core_rsp_valid_unqual;
reg [`CORE_REQ_TAG_COUNT-1:0][CORE_TAG_WIDTH-1:0] core_rsp_tag_unqual;
reg [NUM_REQS-1:0][`WORD_WIDTH-1:0] core_rsp_data_unqual;
if (CORE_TAG_ID_BITS != 0) begin
assign core_rsp_tag = per_bank_core_rsp_tag[0];
always @(*) begin
core_rsp_valid_unqual = 0;
core_rsp_tag_unqual = per_bank_core_rsp_tag[0];
core_rsp_data_unqual = 'x;
core_rsp_valid_unqual[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_valid;
core_rsp_data_unqual[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_data[0];
end
end else begin
assign core_rsp_tag[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_tag[0];
always @(*) begin
core_rsp_valid_unqual = 0;
core_rsp_tag_unqual = 'x;
core_rsp_data_unqual = 'x;
core_rsp_valid_unqual[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_valid;
core_rsp_tag_unqual[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_tag[0];
core_rsp_data_unqual[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_data[0];
end
end
assign core_rsp_data[per_bank_core_rsp_tid[0]] = per_bank_core_rsp_data[0];
assign core_rsp_valid = core_rsp_valid_unqual;
assign core_rsp_tag = core_rsp_tag_unqual;
assign core_rsp_data = core_rsp_data_unqual;
assign per_bank_core_rsp_ready[0] = core_rsp_ready;
end else begin
`UNUSED_VAR(per_bank_core_rsp_tid)
assign core_rsp_valid = per_bank_core_rsp_valid;
assign core_rsp_tag = per_bank_core_rsp_tag[0];
assign core_rsp_data = per_bank_core_rsp_data[0];
assign core_rsp_tag = per_bank_core_rsp_tag[0];
assign core_rsp_data = per_bank_core_rsp_data[0];
assign per_bank_core_rsp_ready[0] = core_rsp_ready;
end
end
end
endmodule