RTL code refactoring

hw/rtl/interfaces/VX_gpu_dcache_req_if.v

@@ -7,21 +7,21 @@ interface VX_gpu_dcache_req_if #(
 	parameter NUM_REQUESTS = 32
 ) ();
 
-	// Core Request
+	// Core request
 	wire [NUM_REQUESTS-1:0]         core_req_valid;
-	wire [NUM_REQUESTS-1:0][31:0]   core_req_addr;
-	wire [NUM_REQUESTS-1:0][31:0]   core_req_writedata;
 	wire [NUM_REQUESTS-1:0][2:0]    core_req_mem_read;
 	wire [NUM_REQUESTS-1:0][2:0]    core_req_mem_write;
+	wire [NUM_REQUESTS-1:0][31:0]   core_req_addr;
+	wire [NUM_REQUESTS-1:0][31:0]   core_req_writedata;	
+	
+	// Core request Meta data
     wire [4:0]                      core_req_rd;
     wire [NUM_REQUESTS-1:0][1:0]    core_req_wb;
     wire [`NW_BITS-1:0]             core_req_warp_num;
     wire [31:0]                     core_req_pc;
 
-    // Can't WB
-    wire                            core_no_wb_slot;
+	wire                            core_no_wb_slot;
 
 endinterface
 
-
 `endif