RTL code refactoring

2020-04-20 06:47:24 -04:00
parent 5671b08a5e
commit 07135263f5
22 changed files with 334 additions and 474 deletions
--- a/hw/rtl/interfaces/VX_gpu_dcache_dram_req_if.v
+++ b/hw/rtl/interfaces/VX_gpu_dcache_dram_req_if.v
@@ -12,7 +12,7 @@ interface VX_gpu_dcache_dram_req_if #(
    wire                              dram_req_read;
    wire [31:0]                       dram_req_addr;
    wire [BANK_LINE_WORDS-1:0][31:0]  dram_req_data;    
-    wire                              dram_req_full;
+    wire                              dram_req_ready;

    wire                              dram_rsp_ready;