fp16 dma kernel
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@@ -21,15 +21,15 @@ matrix_a = generate_fp16_matrix(size)
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matrix_b = generate_fp16_matrix(size)
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matrix_b = generate_fp16_matrix(size)
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# Save the operand matrices to binary files
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# Save the operand matrices to binary files
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# save_matrix_to_bin("input.a.bin", matrix_a)
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save_matrix_to_bin("input.a.bin", matrix_a)
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# save_matrix_to_bin("input.b.bin", matrix_b)
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save_matrix_to_bin("input.b.bin", matrix_b)
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# Generate and save the reference matrices for 128x128, 256x256, and 512x512 sizes
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# Generate and save the reference matrices for 128x128, 256x256, and 512x512 sizes
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sizes = [128, 256, 512]
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sizes = [128, 256, 512]
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for s in sizes:
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for s in sizes:
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ref_matrix = truncated_matrix_multiplication(matrix_a, matrix_b, s)
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ref_matrix = truncated_matrix_multiplication(matrix_a, matrix_b, s)
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print(ref_matrix)
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print(ref_matrix)
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# save_matrix_to_bin(f"ref{s}.bin", ref_matrix)
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save_matrix_to_bin(f"ref{s}.bin", ref_matrix)
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print("All files generated successfully.")
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print("All files generated successfully.")
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@@ -8,9 +8,9 @@
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// fp16 16x16
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// fp16 16x16
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#define TILE_M 128
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#define TILE_M 128
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#define TILE_N 128
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#define TILE_N 64
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#define TILE_K 128
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#define TILE_K 128
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#define BOUND_INST 0x800080008ULL
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#define BOUND_INST 0x800040008ULL
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#define NUM_THREADS_IN_CLUSTER 512
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#define NUM_THREADS_IN_CLUSTER 512
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// fp32 8x8
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// fp32 8x8
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@@ -52,12 +52,12 @@
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#define PRINTF(...) sprintf(PRINT_BUF, __VA_ARGS__)
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#define PRINTF(...) sprintf(PRINT_BUF, __VA_ARGS__)
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// #define PRINTF(...) vx_printf(__VA_ARGS__)
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// #define PRINTF(...) vx_printf(__VA_ARGS__)
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#define SWISH(beta, x) ((x) / (1 + exp(-(beta) * (x))))
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#define SWISH(beta, x) ((x) / (1 + exp(-(beta) * (x))))
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#define POWER
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//#define POWER
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typedef uint16_t smem_elem_t;
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typedef uint16_t smem_elem_t;
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// typedef float smem_elem_t;
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// typedef float smem_elem_t;
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inline void threadblock_barrier(unsigned int barrier_id, unsigned int count) {
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inline void threadblock_barrier(unsigned int barrier_id, unsigned int count) __attribute__((convergent)) {
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vx_fence();
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vx_fence();
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vx_barrier(barrier_id, count);
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vx_barrier(barrier_id, count);
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}
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}
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@@ -79,6 +79,22 @@ void thread_block_matmul_gemmini(kernel_arg_t *__UNIFORM__ arg,
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}
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}
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vx_fence();
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vx_fence();
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// if (HW_TID() < 128) {
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// *((volatile uint32_t *) 0xff000000 + HW_TID()) = HW_TID();
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// for (int i = 0; i < 128; i++) {
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// if (HW_TID() == i) {
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// volatile uint32_t x = *((volatile uint32_t *) 0xff000000 + HW_TID());
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// if (x != i) {
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// PRINTF("%d ", x);
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// }
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// }
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// }
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// }
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// threadblock_barrier(/*barrier_id=*/0, /*count=*/NUM_WARPS);
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// if (HW_TID() == 0) {
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// PRINTF("\n finished\n");
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// }
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// threadblock_barrier(/*barrier_id=*/0, /*count=*/NUM_WARPS);
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uint32_t marker0, marker1;
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uint32_t marker0, marker1;
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rd_cycles_force(marker0);
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rd_cycles_force(marker0);
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@@ -93,24 +109,31 @@ void thread_block_matmul_gemmini(kernel_arg_t *__UNIFORM__ arg,
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const uint32_t num_tile_rows_per_tb = num_tiles_m / NUM_CLUSTERS;
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const uint32_t num_tile_rows_per_tb = num_tiles_m / NUM_CLUSTERS;
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if (HW_TID() == 0) gemmini_fence();
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threadblock_barrier(3, NUM_WARPS);
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if (HW_TID() == 0) gemmini_fence();
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threadblock_barrier(3, NUM_WARPS);
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if (HW_TID() == 0) gemmini_fence();
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threadblock_barrier(3, NUM_WARPS);
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if (HW_TID() == 0) gemmini_fence();
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threadblock_barrier(3, NUM_WARPS);
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if (HW_TID() == 0) {
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if (HW_TID() == 0) {
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gemmini_extended3_config_ld(dim_k * sizeof(elem_t), MVIN_SCALE_IDENTITY, false, 0);
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gemmini_extended3_config_ld(dim_k * sizeof(elem_t), MVIN_SCALE_IDENTITY, false, 0);
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gemmini_extended3_config_ld(dim_n * sizeof(elem_t), MVIN_SCALE_IDENTITY, false, 1);
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gemmini_extended3_config_ld(dim_n * sizeof(elem_t), MVIN_SCALE_IDENTITY, false, 1);
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// gemmini_extended3_config_ld(repeating_bias ? 0 : (stride_D * sizeof_D), D_scale_factor, low_D, 2);
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// gemmini_extended3_config_ld(repeating_bias ? 0 : (stride_D * sizeof_D), D_scale_factor, low_D, 2);
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gemmini_extended_config_st(dim_n * sizeof(elem_t), 0, MVIN_SCALE_IDENTITY);
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gemmini_extended_config_st(dim_n * sizeof(elem_t), 0, MVIN_SCALE_IDENTITY);
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// gemmini_extended_config_st(stride_C * sizeof_C, act & 3, scale);
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// gemmini_extended_config_st(stride_C * sizeof_C, act & 3, scale);
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}
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for (uint32_t tile_i = num_tile_rows_per_tb * threadblock_id;
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for (uint32_t tile_i = num_tile_rows_per_tb * threadblock_id;
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tile_i < num_tile_rows_per_tb * (threadblock_id + 1);
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tile_i < num_tile_rows_per_tb * (threadblock_id + 1);
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tile_i += 1) {
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tile_i += 1) {
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for (int tile_j = 0; tile_j < num_tiles_n; tile_j += 1) {
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for (int tile_j = 0; tile_j < num_tiles_n; tile_j += 1) {
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if (HW_TID() == 0) {
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for (int tile_k = 0; tile_k < num_tiles_k; tile_k += 1) {
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for (int tile_k = 0; tile_k < num_tiles_k; tile_k += 1) {
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ROCC_INSTRUCTION_RS1_RS2(XCUSTOM_ACC,
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ROCC_INSTRUCTION_RS1_RS2(XCUSTOM_ACC,
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(uint64_t) (A + tile_i * TILE_M * dim_k + tile_k * TILE_K),
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(uint64_t) (A + tile_i * TILE_M * dim_k + tile_k * TILE_K),
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(uint64_t) (B + tile_k * TILE_K * dim_n + tile_j * TILE_N), k_LOOP_WS_CONFIG_ADDRS_AB)
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(uint64_t) (B + tile_k * TILE_K * dim_n + tile_j * TILE_N), k_LOOP_WS_CONFIG_ADDRS_AB)
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GEMMINI_CISC_CMD_R((dim_n) << 16 | (dim_k << 8) | 8);
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GEMMINI_CISC_CMD_R((dim_n << 20) | (dim_k << 8) | 8);
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if (tile_k & 1) {
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if (tile_k & 1) {
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GEMMINI_CISC_CMD_I(11);
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GEMMINI_CISC_CMD_I(11);
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} else {
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} else {
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@@ -157,7 +180,7 @@ void thread_block_matmul_gemmini(kernel_arg_t *__UNIFORM__ arg,
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rd_cycles_force(marker1);
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rd_cycles_force(marker1);
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if (HW_TID() == 0) {
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if (HW_TID() == 0) {
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#ifdef POWER
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#ifdef POWER
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PRINTF("%d\n", marker1 - marker0);
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// PRINTF("%d\n", marker1 - marker0);
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#else
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#else
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PRINTF("\ncomplete\n");
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PRINTF("\ncomplete\n");
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PRINTF("total cycles: %d\n", marker1 - marker0);
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PRINTF("total cycles: %d\n", marker1 - marker0);
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