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IN_ORDER_MEM feature doesn't work becasue when cache bank's mem-req-queue is full, we need to schedule the mem response and skip the mshr

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Blaise Tine
2021-05-01 13:44:08 -07:00
parent e40a3feefa
commit 04a1c0e9eb
3 changed files with 16 additions and 34 deletions
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6
hw/rtl/VX_mem_unit.v
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@@ -101,8 +101,7 @@ module VX_mem_unit # (
.WRITE_ENABLE (0),
.CORE_TAG_WIDTH (`ICORE_TAG_WIDTH),
.CORE_TAG_ID_BITS (`ICORE_TAG_ID_BITS),
.MEM_TAG_WIDTH (`DMEM_TAG_WIDTH),
.IN_ORDER_MEM (!(`L2_ENABLE || `L3_ENABLE))
.MEM_TAG_WIDTH (`DMEM_TAG_WIDTH)
) icache (
`SCOPE_BIND_VX_mem_unit_icache
@@ -161,8 +160,7 @@ module VX_mem_unit # (
.WRITE_ENABLE (1),
.CORE_TAG_WIDTH (`DCORE_TAG_WIDTH),
.CORE_TAG_ID_BITS (`DCORE_TAG_ID_BITS),
.MEM_TAG_WIDTH (`DMEM_TAG_WIDTH),
.IN_ORDER_MEM (!(`L2_ENABLE || `L3_ENABLE))
.MEM_TAG_WIDTH (`DMEM_TAG_WIDTH)
) dcache (
`SCOPE_BIND_VX_mem_unit_dcache