dma mvout, double buffering & other opts
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@@ -37,30 +37,33 @@
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#undef ROCC_INSTRUCTION_RS1_RS2
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#define ROCC_INSTRUCTION_RS1_RS2(x, rs1, rs2, funct) { \
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/* printf("function %d\n", funct); */ \
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uint32_t instruction = (0x7B) | (0 << 7) | (3 << 12) | (1 << 15) | (2 << 20) | ((uint32_t) (funct) << 25); \
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*((volatile uint64_t *) GEMMINI_RS1_ADDR) = (volatile uint64_t) (rs1); \
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*((volatile uint64_t *) GEMMINI_RS2_ADDR) = (volatile uint64_t) (rs2); \
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/* printf("function %d\n", funct); */ \
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*((volatile uint64_t *) GEMMINI_RS1_ADDR) = (rs1); \
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*((volatile uint64_t *) GEMMINI_RS2_ADDR) = (rs2); \
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/* *((volatile uint32_t*) GEMMINI_RS2_ADDR) = (uint32_t) ((uint64_t) (rs2) & 0xFFFFFFFFULL); */ \
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/* *((volatile uint32_t*) (GEMMINI_RS2_ADDR + 4)) = (uint32_t) ((uint64_t) (rs2) >> 32); */ \
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/* gemmini_fence(); */ \
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*((volatile uint32_t*) GEMMINI_INST_ADDR) = instruction; \
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*((volatile uint32_t*) GEMMINI_INST_ADDR) = (0x7B) | (0 << 7) | (3 << 12) | (1 << 15) | (2 << 20) | ((funct) << 25); \
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/* sprintf((char *) PRINT_BUF, "%llx %llx %d\n", rs1, rs2, funct); */ \
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}
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static void sp_tiled_matmul_full_spad_ws(const uint32_t A_sp_addr_start, const uint32_t B_sp_addr_start,
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const uint32_t D_sp_addr_start, const uint32_t C_dst_sp_addr_start,
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size_t I, size_t J, size_t K, size_t pad_I, size_t pad_J, size_t pad_K,
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bool a_transpose, bool b_transpose,
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bool full_C, bool low_D,
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bool no_bias, bool repeating_bias,
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int act) {
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#define sp_tiled_matmul_full_spad_ws(A_sp_addr_start, B_sp_addr_start, D_sp_addr_start, C_dst_sp_addr_start,\
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I, J, K, pad_I, pad_J, pad_K, a_transpose, b_transpose, full_C, low_D, acc, act, skips) \
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gemmini_loop_ws_spad(I, J, K, pad_I, pad_J, pad_K, A_sp_addr_start, (B_sp_addr_start) + (K) * (J) * DIM, NULL, \
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C_dst_sp_addr_start, a_transpose, b_transpose, full_C, low_D, acc, act, 0, 0, false, skips)
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/* inline static void sp_tiled_matmul_full_spad_ws(const uint32_t A_sp_addr_start, const uint32_t B_sp_addr_start,
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const uint32_t D_sp_addr_start, const uint32_t C_dst_sp_addr_start,
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size_t I, size_t J, size_t K, size_t pad_I, size_t pad_J, size_t pad_K,
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bool a_transpose, bool b_transpose,
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bool full_C, bool low_D, bool acc,
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int act, int skip_mvout) {
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gemmini_loop_ws_spad(I, J, K, pad_I, pad_J, pad_K,
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A_sp_addr_start, B_sp_addr_start + K * J * DIM, NULL, C_dst_sp_addr_start,
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a_transpose, b_transpose,
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full_C, low_D, false,
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act, 0, 0, false);
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full_C, low_D, acc,
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act, 0, 0, false, skip_mvout); */
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/*
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return;
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@@ -155,8 +158,7 @@ static void sp_tiled_matmul_full_spad_ws(const uint32_t A_sp_addr_start, const u
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}
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}
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gemmini_fence();
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*/
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}
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}*/
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#endif
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@@ -102,7 +102,7 @@ init_regs:
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#endif
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csrr t0, VX_CSR_MHARTID
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sll t1, t0, STACK_LOG2_SIZE
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sll t2, t0, 2
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sll t2, t0, 4
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add t1, t1, t2
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sub sp, sp, t1
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