Files
chipyard/sims/common-sim-flags.mk
Hansung Kim 0ea06336b5 Set preproc defines for Vortex
Includes GPR_RESET which uses simulation-only initial block to clear out
regfile.
2023-11-27 16:15:55 -08:00

56 lines
1.3 KiB
Makefile

#----------------------------------------------------------------------------------------
# common gcc configuration/optimization
#----------------------------------------------------------------------------------------
SIM_OPT_CXXFLAGS := -O3
# Workaround: esp-isa-sim doesn't install libriscv,
# so don't link with libriscv if it doesn't exist
# potentially breaks some configs
ifeq (,$(wildcard $(RISCV)/lib/libriscv.so))
$(warning libriscv not found)
LRISCV=
else
LRISCV=-lriscv
endif
SIM_CXXFLAGS = \
$(CXXFLAGS) \
$(SIM_OPT_CXXFLAGS) \
-std=c++17 \
-I$(RISCV)/include \
-I$(dramsim_dir) \
-I$(GEN_COLLATERAL_DIR) \
$(EXTRA_SIM_CXXFLAGS)
SIM_LDFLAGS = \
$(LDFLAGS) \
-L$(RISCV)/lib \
-Wl,-rpath,$(RISCV)/lib \
-L$(sim_dir) \
-L$(dramsim_dir) \
$(LRISCV) \
-lfesvr \
-ldramsim \
$(EXTRA_SIM_LDFLAGS)
CLOCK_PERIOD ?= 1.0
RESET_DELAY ?= 777.7
VORTEX_SIM_PREPROC_DEFINES = \
+define+GPR_RESET \
+define+DBG_TRACE_CORE_PIPELINE_VCS
SIM_PREPROC_DEFINES = \
+define+CLOCK_PERIOD=$(CLOCK_PERIOD) \
+define+RESET_DELAY=$(RESET_DELAY) \
+define+PRINTF_COND=$(TB).printf_cond \
+define+STOP_COND=!$(TB).reset \
+define+MODEL=$(MODEL) \
+define+RANDOMIZE_MEM_INIT \
+define+RANDOMIZE_REG_INIT \
+define+RANDOMIZE_GARBAGE_ASSIGN \
+define+RANDOMIZE_INVALID_ASSIGN \
$(VORTEX_SIM_PREPROC_DEFINES) \
$(EXTRA_SIM_PREPROC_DEFINES)